cpsc 121: models of computation 2011 winter term 1

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CPSC 121: Models of Computation2011 Winter Term 1

Building & Designing Sequential Circuits

Steve Wolfman, based on notes by Patrice Belleville and others

1

Outline

• Prereqs, Learning Goals, and Quiz Notes• Problems and Discussion

– A Pushbutton Light Switch– Memory and Events: D Latches & Flip-Flops– General Implementation of DFAs

(with a more complex DFA as an example)– How Powerful are DFAs?

• Next Lecture Notes

2

Learning Goals: Pre-Class

We are mostly departing from the readings to talk about a new kind of circuit on our way to a full computer: sequential circuits.

The pre-class goals are to be able to:– Trace the operation of a deterministic finite-

state automaton (represented as a diagram) on an input, including indicating whether the DFA accepts or rejects the input.

– Deduce the language accepted by a simple DFA after working through multiple example inputs.

3

Learning Goals: In-Class

By the end of this unit, you should be able to:– Translate a DFA to a corresponding sequential

circuit, but with a “hole” in it for the circuitry describing the DFA’s transitions.

– Describe the contents of that “hole” as a combinational circuitry problem (and therefore solve it, just like you do other combinational circuitry problems!).

– Explain how and why each part of the resulting circuit works.

4

Where We Are inThe Big Stories

TheoryHow do we model

computational systems?

Now: With our powerful modelling language (pred logic), we can prove things like universality of NOR gates for combinational circuits.

Our new model (DFAs) are sort of full computers.

HardwareHow do we build devices to

compute?

Now: Learning to build a new kind of circuit with memory that will be the key new feature we need to build full-blown computers!(Something you’ve seen in lab from a new angle.)

5

Outline

• Prereqs, Learning Goals, and Quiz Notes• Problems and Discussion




6

Problem: Push-Button Light Switch

Problem: Design a circuit to control a light so that the light changes state any time its “push-button” switch is pressed.

(Like the light switches in Dempster: Press and release, and the light changes state. Press and release again, and it changes again.)

?

7

A Light Switch “DFA”

light off

light on

pressed

pressed

This Deterministic Finite Automaton (DFA) isn’t really about accepting/rejecting; its current state is the state of the light.

?

8

Problem: Light Switch

Problem: Design a circuit to control a light so that the light changes state any time its “push-button” switch is pressed.

Identifying inputs/outputs: consider these possible inputs and outputs:

Input1: the button was pressedInput2: the button is downOutput1: the light is onOutput2: the light changed states

Which are most useful for this problem?

a.Input1 and Output1

b.Input1 and Output2

c.Input2 and Output1

d.Input2 and Output2

e.None of these9

?

COMPARE TO: Lecture 2’s Light Switch

Problem: Design a circuit to control a light so that the light changes state any time its switch is flipped.

?

Identifying inputs/outputs: consider these possible inputs and outputs:

Input1: the switch flippedInput2: the switch is onOutput1: the light is onOutput2: the light changed states

Which are most useful for this problem?

a.Input1 and Output1

b.Input1 and Output2

c.Input2 and Output1

d.Input2 and Output2

e.None of these10

Outline

• Prereqs, Learning Goals, and !Quiz Notes• Problems and Discussion




11

Departures from Combinational Circuits

MEMORY:We need to “remember” the light’s state.

EVENTS:We need to act on a button push rather than in response to an input value.

12

Problem: How Do We Remember?

We want a circuit that:• Sometimes… remembers its current state.• Other times… loads a new state to remember.

13Sounds like a choice.

What circuit element do we have for modelling choices?

Worked Problem: “Muxy Memory”

How do we use a mux to store a bit of memory? We choose to remember on a control value of 0 and to load a new state on a 1.

0

1output

???

new data

control14

Worked Problem: Muxy Memory

How do we use a mux to store a bit of memory? We choose to remember on a control value of 0 and to load a new state on a 1.

0

1output (Q)

old output (Q’)

new data (D)

control (G)This violates our basic combinational constraint: no cycles.

15

Truth Table for “Muxy Memory”

Fill in the MM’s truth table:

G D Q'0 0 00 0 10 1 00 1 11 0 01 0 11 1 01 1 1

a. b. c. d. e.Q01010101

Q01010011

Q01010FF1

Q00011101

None of

these

16

Worked Problem: Truth Table for “Muxy Memory”

Worked Problem: Write a truth table for the MM: G D Q' Q

0 0 0 00 0 1 10 1 0 00 1 1 11 0 0 01 0 1 01 1 0 11 1 1 1

Like a “normal” mux table, but what happens when Q' Q?17

Worked Problem: Truth Table for “Muxy Memory”

Worked Problem: Write a truth table for the MM: G D Q' Q

0 0 0 00 0 1 10 1 0 00 1 1 11 0 0 01 0 1 01 1 0 11 1 1 1Q' “takes on” Q’s value at the “next step”.

18

“D Latch” Symbol + Semantics

We call a “muxy memory” a “D latch”.When G is low, the latch maintains its memory. When G is high, the latch loads a new value from D.

0

1output (Q)

old output (Q’)

new data (D)

control (G) 19

D Latch Symbol + Semantics

When G is low, the latch maintains its memory. When G is high, the latch loads a new value from D.

0

1output (Q)

old output (Q’)

new data (D)

control (G) 20

D Latch Symbol + Semantics

When G is low, the latch maintains its memory. When G is high, the latch loads a new value from D.

output (Q)

new data (D)

control (G)

D

G

Q

21

Hold On!!

Why does the D Latch have two inputs and one output when the mux inside has THREE inputs and one output?

a. The D Latch is broken as is; it should have three inputs.

b. A circuit can always ignore one of its inputs.c. One of the inputs is always true.d. One of the inputs is always false.e. None of these (but the D Latch is not broken as is).

22

Using the D Latch for Circuits with Memory

Problem: What goes in the cloud? What do we send into G?

D

GQ Combinational

Circuit to calculatenext state

input

??

23We assume we just want Q as the output.

Using the D Latch for Our Light Switch

Problem: What do we send into G?

D

GQ

no (0 bit) input output

??

current light state

a. T if the button is down, F if it’s up.b. T if the button is up, F if it’s down.c. Neither of these. 24

A Timing Problem:We Need EVENTS!


D

GQ

output

“pulse” when

button is pressed

current light state

button pressed

As long as the button is down, D flows to Q flows through the NOT gate and back to D...

which is bad!25

A Timing Problem, Metaphor(from MIT 6.004, Fall 2002)

What’s wrong with this tollbooth?

P.S. Call this a “bar”, not a “gate”, or we’ll tie ourselves in (k)nots.

26

A Timing Solution, Metaphor(from MIT 6.004, Fall 2002)

Is this one OK?

27

A Timing Problem


D

GQ

output

“pulse” when

button is pressed

current light state

button pressed

As long as the button is down, D flows to Q flows through the NOT gate and back to D...

which is bad!28

A Timing Solution (Almost)

D

GQ

output

button pressed

D

GQ

Never raise both “bars” at the same time.

29

A Timing Solution

D

GQ

output

D

GQ

??

The two latches are never enabled at the same time (except for the moment needed for the NOT gate on the left to compute, which is so short that no “cars” get through).

30

A Timing Solution

D

GQ

output

D

GQ

button pressed

button press signal

31

Button/Clock is LO (unpressed)

D

GQ

output

D

GQ

LO

32

1

1

0

0

1

Why isn’t the right latch’s Q output 1?a.An error: it should be.b.The G input is 0.c.Not enough time for the D input to propagate.d.I don’t know.

Button goes HI (is pressed)

D

GQ

output

D

GQ

HI

33

1

1

0

1

1

Propagating signal.. left NOT, right latch

D

GQ

output

D

GQ

HI

34

1

1

1

1

0

Propagating signal.. right NOT (steady state)

D

GQ

output

D

GQ

HI

35

0

1

1

1

0

Button goes LO (released)

D

GQ

output

D

GQ

LO

36

0

1

1

0

0

Propagating signal..left NOT

D

GQ

output

D

GQ

LO

37

0

1

1

0

1

Propagating signal..left latch (steady state)

D

GQ

output

D

GQ

LO

38

0

0

1

0

1

And, we’re done with one cycle.How does this compare to our initial state?

Master/Slave D Flip-Flop Symbol + Semantics

When CLK goes from low to high, the flip-flop loads a new value from D.

Otherwise, it maintains its current value.

output (Q)

new data (D)

control or

“clock” signal (CLK)

D

G

Q

D

G

Q

39




output (Q)

new data (D)

control or


D

G

Q

D

G

Q

40




output (Q)

new data (D)

control or


D

G

Q

D

G

Q

41




new data

clock signal

DQ output

42The clock and data inputs are SWAPPEDcompared to Logisim’s symbol; sorry!

Outline





43

Branch Prediction Machine

An “if” in hardware is called a “branch”.Computers “pre-execute” instructions... but to

pre-execute a “branch”, they must guess whether to execute the then or else part.

Here’s one reasonable guess: whatever the last branch did, the next one will, too.

Why? In recursion, how often do we hit the base case vs. the recursive case?

44

Implementing the Branch Predictor (First Pass)

Here’s the corresponding DFA. (Instead of accept/reject, we care about the current state.)

yes no

taken

nottaken

taken

45

nottaken

Experiments show it generally works well to add “inertia”so that it takes two “wrong guesses” to change the prediction…

Implementing the Branch Predictor (Final Version)

Here’s a version that takes two wrong guesses in a row to admit it’s wrong:

Can we build a branch prediction circuit?

YES!

yes?

no?

NO!

nottaken

taken

nottaken

taken

nottaken

takentaken

not taken

46

Abstract Template for a DFA Circuit

input

clock

47

compute next state

store current

state

Each time the clock “ticks” move from one state to the next.

Template for a DFA Circuit

Each time the clock “ticks” move from one state to the next.

DQ Combinational

circuit to calculatenext state/output

input

CLK

Each of these lines (except the clock) may carry multiple bits; the D flip-flop may be several flip-flops to store several bits.48

How to Implement a DFA: Slightly Harder

(1) Number the states and figure out b: the number of bits needed to store the state number.

(2) Lay out b D flip-flops. Together, their memory is the state as a binary number.

(3) Build a combinational circuit that determines the next state given the input and the current state.

(4) Use the next state as the new state of the flip-flops.

49

How to Implement a DFA: Slightly Easier MUX Solution



(3) For each state, build a combinational circuit that determines the next state given the input.

(4) Send the next states into a MUX with the current state as the control signal: only the appropriate next state gets used!

(5) Use the MUX’s output as the new state of the flip-flops.

50With a separate circuit for each state, they’re often very simple!

Implementing the PredictorStep 1

YES!3

yes?2

no?1

NO!0

nottaken

taken

nottaken

taken

nottaken

takentaken

not takenWhat is b (the number of 1-bit flip-flops

needed to represent the state)?a.0, no memory neededb.1c.2d.3e.None of these

As always, we use numbers to represent the inputs:

taken = 1not taken = 051

Just Truth Tables...

Current State input New state0 0 0 0 00 0 1 0 10 1 0

0 1 11 0 01 0 1

1 1 01 1 1

YES!3

yes?2

no?1

NO!0

nottaken

taken

nottaken

taken

nottaken

takentaken

not taken

What’s in this row?a.0 0b.0 1c.1 0d.1 1e.None of these. 52

Reminder: taken = 0 not taken = 1


Current State input New state0 0 0 0 00 0 1 0 10 1 0 0 0

0 1 1 1 11 0 0 0 01 0 1 1 1

1 1 0 1 01 1 1 1 1

YES!3

yes?2

no?1

NO!0

nottaken

taken

nottaken

taken

nottaken

takentaken

not taken

53

Reminder: taken = 0 not taken = 1

Implementing the Predictor:Step 3

We always use this pattern.In this case, we need two flip-flops.

DQ Combinational

circuit to calculatenext state/output

input

CLK

DQ

Let’s switch to Logisim schematics...54

???


DQ ??

input

CLK

DQ

55

state0

state1


56

???

state0

state1

input

Implementing the Predictor: Step 5 (easier than 4!)

57

The MUX “trick” here is much like in the ALU from lab!

state0

state1

input

Implementing the Predictor: Step 4

58

state0

state1

input

In state number 0, what’s the new value of state0?a.inputb.~inputc.1d.0e.None of these.


59

state0

state1

input



input


60

state0

state1


input


61

state0

state1


state0 state1 input state0' state1'

0 0 0 0 00 0 1 0 10 1 0 0 0

0 1 1 1 11 0 0 0 01 0 1 1 11 1 0 1 0

1 1 1 1 1

62input


63

state0

state1

input



64

state1

input


TADA!! 65

state0

state1

input

You can often simplify, but that’s not the point.

66

state0

state1

input

Just for Fun: Renaming to Make a Pattern Clearer...

pred last input pred' last'0 0 0 0 00 0 1 0 10 1 0 0 0

0 1 1 1 11 0 0 0 01 0 1 1 1

1 1 0 1 01 1 1 1 1

YES!3

yes?2

no?1

NO!0

nottaken

taken

nottaken

taken

nottaken

takentaken

not taken

67

Outline





68

Steps to Build a Powerful Machine



(3) For each state, build a combinational circuit that determines the next state given the input.

(4) Send the next states into a MUX with the current state as the control signal: only the appropriate next state gets used!

(5) Use the MUX’s output as the new state of the flip-flops.

69With a separate circuit for each state, they’re often very simple!

How Powerful Is a DFA?

How does a DFA compare to a modern computer?

a.Modern computer is more powerful.b.DFA is more powerful.c.They’re the same.

70

Where We’ll Go From Here...

We’ll come back to DFAs again later in lecture.In lab you have been and will continue to

explore what you can do once you have memory and events.

And, before long, how you combine these into a working computer!

Also in lab, you’ll work with a widely used representation equivalent to DFAs: regular expressions.

71

Outline





72

Learning Goals: In-Class

By the end of this unit, you should be able to:– Translate a DFA into a sequential circuit that

implements the DFA.– Explain how and why each part of the

resulting circuit works.

73

Next Lecture Learning Goals: Pre-Class

By the start of class, you should be able to:– Convert sequences to and from explicit formulas

that describe the sequence.– Convert sums to and from summation/”sigma”

notation.– Convert products to and from product/”pi”

notation.– Manipulate formulas in summation/product

notation by adjusting their bounds, merging or splitting summations/products, and factoring out values.

74

Next Lecture Prerequisites

See the Mathematical Induction Textbook Sections at the bottom of the “Textbook and References” page.

Complete the open-book, untimed quiz on Vista that’s due before the next class.

75

http://www.ugrad.cs.ubc.ca/~cs121/current/Homepage/references.html#sections

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More problems to solve...

(on your own or if we have time)

76

Problem: Traffic Light

Problem: Design a DFA with outputs to control a set of traffic lights.

77

Problem: Traffic LightProblem: Design a DFA with outputs to control a set

of traffic lights.Thought: try allowing an output that sets a timer

which in turn causes an input like our “button press” when it goes off.

Variants to try:- Pedestrian cross-walks- Turn signals- Inductive sensors to indicate presence of cars- Left-turn signals

78

1 2 3a a

a,b,cb

b,c c

PROBLEM: Does this accept the empty string?

79

“Moore Machines” DFAs whose state matters

A “Moore Machine” is a DFA that’s not about accepting or rejecting but about what state it’s in at a particular time.

Let’s work with a specific example...

80

cpsc 121: models of computation 2011 winter term 1

Documents

light changes state

light switches

s light switchproblem

new kind of circuit

pushbutton switch

new model dfas

point of learning goals

complex dfa