cs311-computer organizationinterrupt systemlecture 10 - 1 lecture 10 interrupt system

CS311-Computer Organization Interrupt System Lecture 10 - 1

Lecture 10Lecture 10Interrupt SystemInterrupt System


Lecture 10 - InterruptLecture 10 - Interrupt

In this lecture, we will study– Needs for interrupt– Principles of interrupt– Interrupt request structure– Interrupt preprocessing

» Saving PC» Identifying source of interrupt» Calling interrupt processing routine

– Interrupt major state– Interrupt processing routine– Priority interrupt


Why Interrupt ?Why Interrupt ?

• Power failure• Hardware failure

– In the machine– On the communication line

• Software problem– Attempt to unauthorized access to the protected area– Attempt to execute unauthorized codes– Try to execute an unrecognizable instruction

• Operator• Input/Output

– Need attention of CPU during I/O process• Need attention of CPU by the computer controlled environment


Principles of InterruptsPrinciples of Interrupts

• When there is an interrupt, continuation of the execution of the current program is meaningless– Execution of the Current program needs to be stopped

• In a computer system, there are many sources of interrupts– Needs to prepare interrupt processing routines for each

source of interrupts– Source of interrupt needs to be identified– Needs to initiate execution of the interrupt processing

routine associated with the identified interrupt• When the interrupt is resolved, the interrupted program

needs to be continued for the efficiency reason– Needs to resume execution of the interrupted program


Principle Of InterruptPrinciple Of Interrupt

Interrupt process[1] Program ceases to execute, When ?

– At the completion of the current instruction– Not at the end of current memory(machine) cycle

[2] Save PC, Where ?– Stack, Memory

[3] Execute interrupt preprocessing– Identify the source of interrupt

» Initiate the execution of the Interrupt Processing Routine of the identified interrupt source

[4] Execution of the interrupt processing routine– Save the state of the interrupted program, Where ?– Resolve the interrupt

[5] Restore PC and the status of the interrupted program, and resume execution of the interrupted program


Interrupt RequestInterrupt Request

InterruptResource

InterruptResource

. . .CPU

Interrupt Request Line

CPUInterruptResource

InterruptResource

. . .

CPU InterruptResource

InterruptResource ...

InterruptResource

InterruptResource ...

Single Line Interrupt Request

Multiple Line Interrupt Request

Mixed Interrupt Request


Single Line Interrupt Single Line Interrupt RequestRequest

Interrupt Enable LinePolling LineInterrupt Request Line

InterruptRecognition Line

IE

RI

reset

set

Interrupt Dev Decoder

Interrupt Dev DecoderIRQ

DIR

IRQ

DIR

SEL SEL

Interrupt 0

. . .

CPU

Interrupt 1

RI

DIR

IRQ


Multiple Line Interrupt Multiple Line Interrupt RequestRequest

Interrupt Recognition LineInterrupt Enable Line


Interrupt Recognition Line


IE

setRI

CPU

IRQ

DIR

DIR

IRQ

Interrupt 0 . . . Interrupt (n-1)

. . .IRQ

DIR

set


Time OutTime Out

• 아침을 먹으려고 커피숖에 가서 이것 저것 쟁반에 담고 , 계란 요리를 해주는 카운터에 도달하여 차례를 기다렸다 .

• 그런데 계란 요리사의 표정을 보니 매우 우울해 보였다 .

• 마침내 차례가 되어 계란 두 개를 부탁하였다 .

• 요리사가 물었다 . “ 어떻게 해 드릴까요 ?”

• 요리사가 측은하게 생각되어 편하게 해 줄 생각으로 말했다 . “ 자네가 편한 대로 해 주게 .”

• 그 말이 떨어지자마자 그는 계란 두 개를 집어서 쟁반 위에 깨뜨려 주었다 .


Interrupt PreprocessingInterrupt Preprocessing

• Save PC – Main memory location 0– Interrupt Vector(IV)

• Identify the source of interrupt– Software(Polling)– Hardware

• Initiate execution of the Interrupt Processing Routine(IPR)

These functions can be implemented in one Interrupt Preprocessing Routine(IPPR)


Saving PCSaving PC

• Memory Location 0

• Stack

• Interrupt Vector

Interrupt Request

IPPR

JMP

IPPR

[1] M[0] PC;[2] PC 1, FETCH;

[1] SP SP + 1;[2] S[SP] PC;

Interrupt source is identified with HW[1] IV[IVA+INx2] PC; [2] PC IVA+INx2+1, FETCH;

. . .

Interrupt VectorIVA+0

IVA+1x2

IVA+2x2

(PC save area) JMP IPR

(PC save area) JMP IPR(PC save area) JMP IPR

1. Save interrupted program state2. Identify the source of interrupt3. Initiate IPR

Running Program

74

PC0 1 73 74 230


Identifying Source of Interrupt:Identifying Source of Interrupt:

Software PollingSoftware PollingInterrupt ReqRI=1 and IE=1

Interrupt 0SEL=1 ?

Interrupt 1SEL=1 ?

Interrupt nSEL=1 ?

...

No Interrupt

Interrupt 0 recognized

Interrupt 1 recognized

Interrupt n recognized

y

y

y


Identifying Source of Interrupt:Identifying Source of Interrupt:

HardwareHardwareDaisy Chain

No interrupt if Daisy Chain returns 1

IE

RI

CPU

Interrupt Enable Line

Interrupt Select Line

InterruptRequest Line

Interrupt Dev.Code LineInterrupt 0 Interrupt 1 . . .

InterruptDev. CodeGenerator

InterruptDev. CodeGenerator

IRQ

DIR

IRQ

DIRSEL SEL

...1

IRQ


Calling Interrupt Processing Calling Interrupt Processing RoutineRoutine

IPR 0:Interrupt 0 processing...

IPR 1:Interrupt 1 processing…

. . .IPR n:

Interrupt n processing

Interrupt Preprocessing Routine

…

CALL @(DISP + IN)

…

DISP: X0X1

…Xn

X0

X1

Xn

CALL @XM[M[X]] PC, PC M[M[X]]+1;

CALL XM[X] PC, PC X+1;


Interrupt Major StateInterrupt Major State

Save PC in Location 0

INT.t0: MAR 0, W;INT.t1: MBR PC;INT.t2: PC 1; /Branch to Int Preproc RoutineINT.t3: FET;

Interrupt VectorINT.t0: MAR (IVA+INx2), W;INT.t1: MBR PC;INT.t2: PC (IVA+INx2+1); /Branch to Int. Proc RoutineINT.t3: FET;


Interrupt ProcessingInterrupt Processing

[1]Saving interrupted program status to be used for restoring status when the program resumes execution after the interrupt processing– Special location in memory– Stack– Registers

[2]Selective interrupt disable– Interrupt mask

[3] Interrupt processing[4]Restoration of the status and prepare to begin execution of

the interrupted program


Saving Program StatusSaving Program Status

• IPR saves in the area within IPR• Special Stack• Assign separate register set to each interrupt processing

routine


Selective Interrupt Disable Selective Interrupt Disable

Direct clear input of the FF

IE

RI

MASK k

CPU

IR

D

IR

D

InterruptDev CodeDecoder

InterruptDev CodeDecoder

SEL SEL

Interrupt Recognition Line

Interrupt Enable Line

Interrupt Mask Line

Interrupt Dev.Code Line Interrupt Request Line

Interrupt 0 Interrupt 1 . . .


Priority InterruptPriority Interrupt

• Software Priority - Polling– Polling order is the interrupt priority– Low cost– Interrupt processing routine can be interrupted by any

interrupt» In order to establish priority, interrupt mask can be used to mask

out the lower priority interrupts» This establishes 3-level priority

> Unmasked interrupts are higher priority than the current interrupt

> Currently processing interrupt> Masked interrupts are lower priority than the current interrupt

• Hardware Priority


Priority Interrupt - HardwarePriority Interrupt - Hardware

RIPriority level

0 1 2 3 . . . n-1

If RI(k) = RI(h) = 1, and k < h Priority of Interrupt k is higher than Interrupt h PR: Current Interrupt Priority Level(PR<0, when there is no interrupt being processed)

(1) PR<0 and RI=0, i.e., no pending interruptIf an interrupt request is received

Interrupt to be processed h = Min { i } RI(i)=1

Process the requested interrupt; PR = h (2) PR=k>0 and RI = 0, i.e., there are pending interrupts

If an interrupt is receivedHighest priority among pending interrupts h = Min { i }

RI(i)=1

If h>k, continue processing k,If h<k, Interrupt IPR k and process h; PR=h

cs311-computer organizationinterrupt systemlecture 10 - 1 lecture 10 interrupt system

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