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CS433 Operating Systems 1

Overview

Computer-System Structures


Overview

Computer-System OperationI/O StructureStorage StructureStorage HierarchyHardware ProtectionNetwork StructureSummary


Computer-System OperationA computer system consists of a CPU and a number of device controllers that are connected through a common bus that provides access to shared memory

Device controllers and the CPU can execute concurrently.Each device controller is in charge of a particular device type.Each device controller has a local buffer.CPU moves data from/to main memory to/from local buffersI/O is from the device to local buffer of controller.Device controller informs CPU that it has finished its operation by causing an interrupt


Computer-System Architecture


Computer-System Operation (Con’t)

For a computer to start running it needs to have an initial program to run

Bootstrap program (loader)Stored in read-only (ROM) or EEPROMInitializes all aspects of the system (CPU registers, device controllers, memory contents)Locates and loads into memory the operating system kernel. The operating system then starts executing the first process (init) and waits for events to occur


Interrupts

The occurrence of an event is usually signaled by an interrupt from either hardware or software

Hardware interruptMay trigger an interrupt at any time by sending a signal to CPU by way of the system bus

Software interrupt (trap or exception)May trigger an interrupt by executing a special operation calleda system call, caused by an error or by a specific request

Modern operating systems are interrupt drivenIf there is nothing for the operating system to do, it will waitfor an event to happenEvents are always signaled by an interrupt or trap


Common Functions of Interrupts

For each type of interrupt, separate segments of code, called an interrupt service routine (ISR), are provided to determine what action should be takenWhen the CPU is interrupted, it stops what it is doing and immediately transfers execution to a fixed location

This location contains the starting address for the ISRThe ISR executes; on completion, the CPU resumes the interrupted computation


Interrupt Time Line For a Single Process Doing Output


Interrupt Handling

The interrupt handling mechanism must transfer control to the appropriate interrupt service routineThis transfer is done with the use of a table of pointers where the ISR is called indirectly

The locations in the table hold the addresses to the various ISR’sThe table of addresses is then indexed by a unique number (interrupt vector) to provide the address to the appropriate ISR

The operating system must also preserve the state of the CPU by storing registers and the program counterAfter the interrupt is serviced the state of the CPU is loaded back as though the interrupt never happened


I/O Structure

Each device controller is in charge of a specific deviceDepending on the controller there may be more than one device (SCSI)A device controller maintains some local buffer storage and a set of special-purpose registersThe device controller is responsible for moving the data between the device and its local buffer storageThe size of the local buffer within a device controller varies between devices (i.e. 512 bytes for a disk sector)


I/O Interrupts

To start an I/O operation, the CPU loads the appropriate registers within the device controllerThe device controller then examines the contents of the registers to determine which action to take (i.e. start the transfer of data from the device to the local buffer – read request)Once the transfer is complete the controller informs the CPU the operation is finished by triggering an interruptIn general, the interrupt will be triggered, as the result of a user process requesting I/O


I/O Interrupts (Con’t)

Once the I/O is started, two courses of action are possible

The I/O is started; then at I/O completion control is returned to the user process, known as synchronous I/OThe other possibility, called asynchronous I/O, returns control to the user program without waiting for the I/O to complete


Two I/O MethodsSynchronous Asynchronous


I/O CompletionSpecial machine instruction (wait) that idles the CPU until the next interruptIf no wait instruction then a wait loop may be used:Loop: jmp Loop

This tight loop simply continues until the interrupt occursAlso need to keep track of many I/O requests at the same time

The operating system uses a device-status tableDevice’s type, address and state (not functioning, idle or busy)

An I/O device interrupts when it needs service so when an interrupt occurs the operating system determines which device caused the interruptThe operating system then indexes into the device table to determine the status of the device and modifies the table to indicate the occurrence of the interruptFor most devices the interrupt signals the completion of an I/O request


Device-Status Table


DMA Structure

Used for high-speed I/O devices able to transmit information at close to memory speeds.Device controller transfers blocks of data from buffer storage directly to main memory without CPU intervention.Only on interrupt is generated per block, rather than the one interrupt per byte


Storage Structure

Computer programs must be in main memory (RAM) to be executedMain memory is the only large storage area that the CPU can access directlyBecause main memory is neither large enough or permanent, most computer system provide secondary storage as an extension to main memoryThe most common form of secondary storage is magnetic diskOther secondary storage devices include CD-ROM, magnetic tapes, …


Main Memory

Main memory and the processor’s registers itself are the only storage the CPU can access directlyAny instruction or data must be in one of these direct-access storage devices and if not then it must be moved there before the CPU can operate on themMemory-Mapped I/O

Memory address ranges are mapped to the appropriate device registersReads/Writes to these addresses cause data to be transferred to/from the device registerAllows for convenient and fast access to I/O devices (video controller, serial/parallel ports, …)


Magnetic Disks

Provide the bulk of the secondary storage for computer systemsThe disk drive is attached to the I/O bus (EIDE, ATA, SCSI, ..)Data transfers on the bus are handled by controllers

Host controller is the controller at the computer endDisk controller is built into each disk driveHost controller sends a command (i.e. read/write) to the disk controller which operates the hardware to carry out the operation


Moving-Head Disk Mechanism


Magnetic Tape

Used as an early secondary-storage mediumRelatively permanent and can hold large quantities of dataAccess time is slow compared to magnetic diskTapes are used mainly for backup, storage of infrequently used data, and as a way to transfer data from one computer to another


Storage Hierarchy

Storage systems can be organized in a hierarchy according to speed and cost

Higher levels are expensive and fastLower levels are less expensive and slower

Caching – copying information into faster storage system; main memory can be viewed as a last cache for secondary storage.


Storage-Device Hierarchy


CachingHigh-speed memory to hold recently-accessed informationCache management is required due to the limited size of the cache

Careful selection of cache size and the replacement policy can increase the accesses being in cache, greatly increasing performance

Caching introduces another level in storage hierarchy. This requires data that is simultaneously stored in more than one level to be consistent


Coherency and Consistency

In a hierarchical storage system, the same data may appear in different levels of the storage systemIn a multitasking environment, where the CPU is switched back and forth between processes, care must be taken to ensure each process has the most recent update of the dataIn a multiprocessor environment, where each CPU has its own local cache, data can exist simultaneously in several places.

Cache coherencyUpdate to data in one cache is reflected in all other caches where that data resides

In a distributed environment, where the same data could be on different computers, we must ensure all computers are brought up to date


Hardware Protection

The sharing of resources increases computer utilization but also increases problems

A bug in one program can adversely affect other processes

To protect against erroneous programs hardware protection must be provided

Dual-Mode OperationI/O ProtectionMemory ProtectionCPU protection


Dual-Mode Operation

To ensure proper operation, we must protect the operating system and all other programs and their dataProtection is needed for any shared resourceProvide hardware support to differentiate between at least two modes of operations.1.User mode – execution done on behalf of a user.2.Monitor mode (also kernel mode or system mode)

– execution done on behalf of operating system.


Dual-Mode Operation (Cont.)Mode bit added to computer hardware to indicate the current mode: monitor (0) or user (1).When an interrupt or fault occurs hardware switches to monitor mode.

Protects the operating system from errant users and errant users from one another.Machine instructions that may cause harm are designated as privileged instructions and privileged instructions can only be issued in monitor mode

monitor user

Interrupt/fault

set user mode


I/O ProtectionTo prevent users from performing illegal I/O (accessing illegal memory locations or failing to relinquish the CPU) all I/O instructions are defined as privilegedI/O protection must ensure that a user program could never gain control of the computer in monitor mode (i.e., a user program that, as part of its execution, stores a new address in the interrupt vector).

System Call to Perform I/O


Memory ProtectionMust provide memory protection at least for the interrupt vector and the interrupt service routinesOne memory protection scheme is to separate each program’s memory space

Use two registers that determine the range of legal addresses a program may access:

Base register – holds the smallest legal physical memory address.Limit register – contains the size of the range

Memory outside the defined range is protected


Memory Protection (Con’t)

Memory protection is accomplished by the CPU hardware comparing every address generated with the registersAny attempt by a user program to access other process’s memory results in a trap, which is treated as a fatal errorWhen executing in monitor mode, the operating system has unrestricted access to both monitor and user’s memory.The load instructions for the base and limit registers are privileged instructionsThis scheme prevents the user program from modifying the code/data of another process


Hardware Address Protection


CPU Protection

To ensure the operating system maintains control we must prevent the user program from getting stuck in an infinite loop or calling system services and never returning control to the operating systemTimer – interrupts computer after specified period to ensure operating system maintains control.

Timer is decremented every clock tick.When timer reaches the value 0, an interrupt occurs.

Timer commonly used to implement time sharing.Time also used to compute the current time.Load-timer is a privileged instruction.


Network Structure

There are basically two types of networksLocal-Area Networks (LAN)

Composed of homogenous processors distributes over small geographic areas Wide-Area Networks (WAN)

Wide-Area Networks (WAN)Composed of heterogeneous processors distributed over a large geographic area

The main difference between the two is the way in which they are geographically distributed


Local Area Network Structure


Wide Area Network Structure


Summary

Multiprogramming and time-sharing systems improve performance by sharing CPU and I/O operations

Requires data transfer between the CPU and an I/O device be handled by polled or interrupt-driven access to an I/O port, or by a DMA transfer

The CPU executes programs from main memory which is the only large storage area the processor can access directly

Main memory has limited storage capacity and volatile so secondary storage is used as an extension

The storage systems are organized in a hierarchy according to their speed and cost

Higher levels are fast and expensive while the lower levels are slower and less expensive


Summary (Con’t)

The operating system must ensure correct operation of the computer system

Dual ModePrivileged InstructionsMemory ProtectionTimer Interrupts

LANs and WANs are the two basic types of networks

Differentiated by their geographical distribution

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