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CS503: Operating SystemsSpring 2014

Dongyan XuDepartment of Computer Science

Purdue University

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Acknowledgement

• The following people for sharing their slides:– Prof. Peter Chen (U. Michigan)– Prof. Sam King (UIUC)– Prof. Klara Nahrstedt (UIUC)– Prof. Gustavo Rodriguez-Rivera (Purdue)

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A Typical Computer from a Hardware Point of View

CPU

ChipsetMemory

I/O bus

CPU. . .

Network

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North Bridgechip

South Bridgechip

Modem Sound card

Hard disks CD-ROM

Videocard

Memory

CPU

AGPport

PCI bus

PCI slots

IDE controller Serial, paralleland USB ports

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Typical Computer System

Operating System Software

Programs and data

MemoryCPU

CPU

...

OSApps

Data

Network

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Processors• Each CPU has a specific set of instructions• All CPUs contain

– General registers inside to hold key variables and temporary results

– Special registers visible to the programmer• Program counter contains the memory address of the next instruction

to be fetched• Stack pointer points to the top of the current stack in memory• Control registers (e.g., CR0-CR4 in x86)• PSW (Program Status Word) contains the condition code bits which

are set by comparison instructions, the CPU priority, the mode (user or kernel) and various other control bits.

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How Processors Work• Execute instructions

– CPU cycles• Fetch (from mem) decode execute• Program counter (PC)

– When is PC changed?

• Pipeline: fetch n+2 while decode n+1 while execute n

– Two modes of CPU (why?)• User mode (a subset of instructions)• Privileged mode (all instruction)

– Trap (special instruction)

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Memory Access

• Memory read:– Assert address on address lines– Wait till data appear on data line– Much slower than CPU!

• How many mem access for one instruction?– Fetch instruction– Fetch operand (0, 1 or 2)– Write results (0 or 1)

• How to speed up instruction execution?

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CPU Cache

• Cache hit: – no need to access memory

• Cache miss: – data obtained from mem, possibly update cache

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Memory-Storage Hierarchy

<

- 4MB

-1GB

-TB

-TB

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Memory• Registers internal to CPU (as fast as CPU)

– Storage 32x32 bits on a 32-bit CPU, 64x64 on 64 bit CPU (less than 1KB in both cases)

• Cache memory controlled by hardware– Cache hit and miss

• RAM (Random Access Memory)• Disk (magnetic disk), CD-ROM, DVD,…

– Cylinder, track, …• Non-volatile Memory

– ROM (Read Only Memory) • Programmed at the factory and can’t be changed

– EEPROM (Electrically Erasable ROM) – Flash RAM

• Can be erased and re-written

• Volatile Memory – CMOS holds current time and date

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Memory Management

• How to protect programs from each other?• How to handle relocation ? • Base register• Limit register• Check and Mapping of Addresses

– Virtual Address - Physical Address– Memory Management Unit (MMU – located on CPU

chip or close to it• Performance effects on memory system

– Cache– Context switch

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I/O Devices

• Controller– Example: Disk Controller– Controllers are complex converting OS request into

device parameters– Controllers often contain small embedded computers

• Device– Fairly simple interfaces and standardized– IDE (Integrated Drive Electronics) – standard disk

type on Pentiums and other computers

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I/O Devices

• Device Driver– Needed since each type of controller may

be different. – Software that talks to a controller, giving it

comments and accepting responses– Each controller manufacturer supplies a

driver for each OS it supports (e.g., drivers for Windows XP, Longhorn, UNIX)

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Methods for I/O

• How device driver talks to controller– Busy wait– Interrupt– DMA

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Bus

• Pentium systems have eight buses– Cache, local, memory, PCI, SCSI, USB, IDE, ISA

• PCI (Peripheral Component Interconnect) bus is successor to IBM PC ISA bus

– Intel bus, 528MB/sec

• ISA (Industry Standard Architecture) bus– 16.67 MB/sec

– Specialized buses:• SCSI (Small Computer System Interface)

– 160MB/sec – for disks, scanners (popular on Macintosh, UNIX)

• USB (Universal Serial Bus) – 1.5 MB/sec

• IEEE 1394 – FireWire (Apple) bus– 50MB/sec, connectivity for cameras to computer

• IDE (Integrated Drive Electronics) bus– Disk, CD-ROM

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Structure of an Intel Pentium System