CSC 3650 Introduction to Computer Architecture

Time: 3:30 to 6:30 Meeting Days: W Location: Oxendine 1237B

Textbook: Essentials of Computer Architecture, Author: Douglas E. Comer, 2005, Pearson Prentice Hall

Spring 2011

Register Transfer Languages

Dr. Chuck Lillie

Micro-operations

• Micro-operations are the basis for most sequential digital systems– Movement of data from one register, memory location,

or I/O device to another

– Modify stored values

– Perform arithmetic or logical functions

– Modify a stored value

• By performing a sequence of micro-operations to move and modify data, a sequential digital system performs a larger task

Hardware Description Language

• Used to design a system– More efficient than using digital logic

– Used to verify that the logic of the design is correct

– Can be translated into the final hardware design of the system

– The design looks something like a computer program written in a high level language

– Can be input into a circuit analysis and design (CAD) program to simulate the behavior of the circuit under all conditions

Implementation of the micro operation X Y

Direct Connection

Bus Connection

X Y does not indicate the condition under which transfer occurs

X

Implementation of the data transfer α: X Y

Direct Path

Using a Bus

IF α THEN X Y is written in RTL as α: X Y

X

Implementation of Data Transfer α: X Y, Y Z

To improve system performance do two or more transfers simultaneously

Single bus cannot be used because a bus can hold only one value at a time.

Implementation of Data Transfer α: X Y, Z Y

Can write to more than one place at a time, but cannot send to the same location for more than one placeα: X Y, Z Y is OKα: X Y, X Z is not OK

Three implementations of data transfers α: X 0 and β: X 1

Using a multiplexer to select data input

Using β as the data input

Using the CLR signal

Move a constant value into a register

What happens if α and β are both 1?1. Need hardware to ensure that will not happen or2. Make sure they have mutual exclusion using one of the following threeα β’: X 0 α : X 0 α β’: X 0β : X 1 α’ β :X 1 α’ β : X 1

Implementation of four-bit Data Transfer α: X Y

Direct Path

Using a Bus

X

Accessing single bits or subset of bits of multi-bit register

• α: X(3-1) Y(2-0)

• β: X3 X2

: X(3-0) X(2-0),X3 or X(2-0,3)

Arithmetic and logical micro-operations

Shift micro-operations

Transferring data between memory and registers

• To transfer between register AC and memory, first move address into address register and then perform transfer– AR 55– M[AR] AC or AC M[AR]

• If decide AR is always the address register– M AC and AC M can be used without

referring to AR

D flip-flop

Without clear input With clear input

LD: Q D LD: Q DCLR: Q 0What happens when D, LD, CLR all 1NeedCLR’ LD: Q D LD: Q DCLR: Q 0 LD’ CLR: Q 0Priority to CLR Priority to LD

Data paths of the system to implement the RTL code using direct connect

j: M Ao: A Yh: R Mn: Y R, M R

What’s missing?

Complete design of the system to implement the RTL code using direct connections

Implementation using bus with tri-state buffers

Advantage of bus over direct connect:Bus system can be partitioned and their sections designed separately; task of buffer is not to pass the value of M on to the bus so it can be read in by register R, rather, its task is to place the contents of M on to the bus so that it can be read by whatever register should read it in.

Complete design of the system to implement the RTL code using a bus and multiplexer

State Table for Modulo 6 Counter

S0 S1 S2 S3 S4 S5 S0 …

State Diagram for Modulo 6 Counter

RTL code for the counter:(S0 + S1 + S3 + S3 + S4)U: V V + 1, C 0S5U + S6 + S7: V 0, C 1+ on left of : is OR, on right of : is arithmetic add

Implementation of RTL code for Modulo 6 counter using a register

Implementation of RTL code for Modulo 6 counter using a counter

States for toll boot controller

State table for toll booth controller

State diagram for toll booth controller

State value assignments for the toll booth controller

RTL code for the toll booth controller, excluding output

RTL code for the toll booth controller outputs

Complete RTL code for toll booth controller

VHDL file to implement the modulo 6 counter using a high level of abstraction

VHDL code continued

Logic diagram for modulo 6 counter based on VHDL in next slide

VHDL file to implement the modulo 6 counter using a low level abstraction