csce 212 chapter 3: arithmetic for computers

CSCE 212Chapter 3: Arithmetic for Computers

Instructor: Jason D. Bakos

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Lecture Outline

• Review of topics from 211• Overflow• Binary Multiplication• Binary Division• IEEE 754 Floating Point• Floating-Point Addition and Multiplication• MIPS Floating-Point

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Review

• Binary and hex representation• Converting between binary/hexidecimal and decimal• Two’s compliment representation• Sign extention• Binary addition and subtraction

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Lecture Outline


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Overflow

• Overflow for unsigned addition– Carry-out

• Overflow for unsigned subtraction– No carry-out

• Overflow for signed

• Overflow causes exception– Go to handler address 80000080– Registers BadVAddr, Status, Cause, and EPC used to handle

• SPIM has a simple interrupt handler built-in that deals with interrupts

Operation

Operand A Operand B Result

A+B Positive Positive Negative

A+B Negative Negative Positive

A-B Positive Negative Negative

A-B Negative Positive Positive

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Overflow

• Test for signed ADD overflow:addu $t0,$t1,$t2 # sum but don’t trap

xor $t3,$t1,$t2 # check if signs differ

slt $t3,$t3,$zero # $t3=1 if signs differ

bne $t3,$zero, No_OVF

xor $t3,$t0,$t1 # signs of operands same, compare sign of result

slt $t3,$t3,$zero

bne $t3,$zero,OVF

• Test for unsigned ADD overflow:addu $t0,$t1,$t2 # sum but don’t trap

nor $t3,$t1,$zero # invert bits of $t1 (-$t1–1), 232-$t1-1

sltu $t3,$t3,$t2 # 232-$t1-1 < $t2, 232-1 < $t1+$t2

bne $t3,$zero,OVF

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Lecture Outline


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Binary Multiplication

1000

x 1001

1000

0000

0000

1000

1001000

multiplicandmultiplier

product

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works with signed but must sign extend shifts

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Multiplication Example

multiplicand register (MR) product register (PR) next action it

1001 0000 0101 LSB of PR is 1, so PR[7:4]=PR[7:4]+MR

1

1001 1001 0101 shift PR 1

1001 0100 1010 LSB of PR is 0, so shift 2

1001 0010 0101 LSB of PR is 1, so PR[7:4]=PR[7:4]+MR

3

1001 1011 0101 shift PR 3

1001 0101 1010 LSB of PR is 0, so shift 4

1001 0010 1101 PR is 45, done! X

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Faster Multiplication

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Lecture Outline


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Binary Division

Re

10011000 1001010

1000

1010

1000

10

Quotient

Divisor Dividend

mander

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Binary Division

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Binary Division

For signed, convert to positive and negate quotient if signs disagree

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Division Example

divisor register (DR) remainder register (RR) next action it

0100 0000 1011 shift RR left 1 bit 0

0100 0001 0110 RR[7:4]=RR[7:4]-DR 1

0100 1101 0110 RR<0, so RR[7:4]=RR[7:4]+DR 1

0100 0001 0110 shift RR to left, shift in 0 1

0100 0010 1100 RR[7:4]=RR[7:4]-DR 2

0100 1110 1100 RR<0, so RR[7:4]=RR[7:4]+DR 2


0100 0101 1000 RR[7:4]=RR[7:4]-DR 3

0100 0001 1000 RR>=0, so shift RR to left, shift in 1 3

0100 0011 0001 RR[7:4]=RR[7:4]-DR 4

0100 1111 0001 RR<0, so RR[7:4]=RR[7:4]+DR 4


0100 0110 0010 shift RR[7:4] to right

0100 0011 0010 done, quotient=2, remainder=3

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Lecture Outline


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Fixed-Point

• Need a way to represent fractional numbers in binary

• Fixed-point– Assume a decimal point at some location in a value:– Example:

• 6-bit (unsigned) value

• = 1x21 + 0x20 + 1x2-1 + 1x2-2 + 0x2-3 + 1x2-4

• For signed, use two’s compliment

1 0. 1 1 0 1

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Precision

• Assume we have 4 binary digits to the right of the point…– Convert .8749 to binary…

– .1101 = .8125

– Actual value – represented value = .0624 (approaches 2-4)

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Floating Point

• Floating point represent values that are fractional or too large– Expressed in scientific notation (base 2) and normalized– 1.xxxx2 * 2yyyy

– xxxx is the significand (fraction) and yyyy is the exponent– First bit of the significand is implicit– Exponent bias is 127 for single-precision and 1023 for double-precision

• IEEE 754 standard– Single-precision (2x10-38 to 2x1038)

• bit 31: sign of significand• bit 30..23 (8) exponent (2’s comp)• bit 22..0 (23) significand

– Double-precision (2x10-308 to 2x10308)• Significand is 52 bits and the exponent is 11 bits

• Exponent => range, significand => precision

• To represent:– zero: 0 in the exponent and significand– +/- infinity: all ones in exponent, 0 in significand– NaN: all ones in exponent, nonzero signficand

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Conversion

• To convert from decimal to binary floating-point:– Significand:

• Use the iterative method to convert the fractional part to binary• Convert the integer part to binary using the “old-fashioned” method• Shift the decimal point to the left until the number is normalized• Drop the leading 1, and set the exponent to be the number of positions you

shifted the decimal point• Adjust the exponent for bias (127/1023)

• When you max out the exponent, denormalize the significand

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Lecture Outline


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Floating-Point Addition

• Match exponents for both operands by un-normalizing one of them– Match to the exponent of the larger number

• Add significands• Normalize result• Round significand

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Example

• Assume 11-bit limited representation:– 1 bit sign bit– 6 bit significand (precision 2-6 = 0.0156)– 4 bit exponent (bias 7)

• range 1 x 2-7 (7.8 x 10-3) to 1.111111 x 28 (5.1 x 102)• (assuming no denormalized numbers)

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Floating-Point Addition Hardware

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Floating-Point Multiplication

• Un-bias and add exponents

• Multiply significands– Move point

• Re-normalize• Set sign based on sign

of operands

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Accurate Arithmetic

• Keep 2 additional bits to the right during intermediate computation– guard and round

• Worst case for rounding:– Actual number is halfway between two floating point representations– Accuracy is measured as number of least-significant error bits (units in

the last place (ulp))

• IEEE 754 guarantees that the computer is within .5 ulp (using guard and round)

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Lecture Outline


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MIPS Floating-Point

• $f0 - $f31 coprocessor registers– Used in pairs for doubles

• Arithmetic: [add | sub | mul | div].[s | d]

• Data transfer: lwc1, swc1 (32-bits only)

• Conditional branch:– c.lt.[s | d] (compare less-than)– bclt (branch if true), bclf (branch if false)

• Register transfer:– mfc1, mtc1 (move to/from coprocessor 1, dest. is first)

csce 212 chapter 3: arithmetic for computers

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