current mirrors and current references

7/21/2019 Current Mirrors and Current References

1/29

Current Mirror and Current

Reference


2/29

IIT Kharagpur

Introduction

Characteristic of Ideal Current MirrorDifferent Current Mirror Topologies

Simple Current Mirror (SCM)

Cascode Current Mirror (CCM)

Wide Swing Cascode Current Mirror (WSCCM)Self-Biased Wide Swing Cascode Current Mirror (SBWSCCM)

Wilson Current Mirror (WCM)

Regulated Cascode Current Mirror (RCCM)

Current Reference

Bootstrapped Current Reference

Supply Dependency

Start-up Issue

Stability

Outline

2Short-term Course on CMOS Analog Design


3/29

IIT Kharagpur

Introduction

3

Current source defined by a resistive divider

I KW

L

R

R+ RVDD VTH

Ioutis significantly dependent on

supply voltage, processand temperature

A better approach is to copy current from areference current !

Short-term Course on CMOS Analog Design


4/29

IIT Kharagpur

A current mirror is basically nothing more than a current amplifier.

The ideal characteristics of a current mirror are:

Output current is linearly related to the input current (i= Ai).

Input resistance (R) is zero

Output resistance (R) is infinite.

In addition, we have the characteristic VMINwhich applies not only to the output but

also the input.

V is the range of input voltage over which the input resistance is not small.

V is the range of the output voltage over which the output resistance is not large

Characteristics of Current Mirror

4

Input characteristic Transfer characteristic Output characteristic

Graphically:



5/29

IIT Kharagpur

Simple Current Mirror (SCM)

5

IEF= K

W

LV VTH

=

=

VD= V= V

V= VD V VTH

IEF= K

W

LV VTH

(1 + V)

I= K

W

LV VTH

(1 + V)

= VO

Influence of Channel-length Modulation

IdealSituation

VO+ VTH

R=1

g



6/29

IIT Kharagpur

Small-signal Analysis of SCM

6

Calculation of Rin

v= V

r gv i = V

gV i=V

r

R=

=

1

+ 1

1

Calculation of Rout

v= v= 0

ri= V

R=V

i= r



7/29IIT Kharagpur

Mismatch in SCM

7

How can we reduce themismatch?

Large channel device

Matching layout

=

+

( + ) VD VDleads t1o poor current gain accuracy



8/29IIT Kharagpur

Cascode Current Mirror (CCM)

8

Large channel length (L) increases channel width (W)Output capacitance

of the current source increases

Solution: Use cascodetransistor to increase output resistance (Rout) !

44

M4shields node

Yfrom any

perturbation at

node P !

is chosen such that V= V V4 = V

V= V+ V4

(V3+ V)



9/29IIT Kharagpur

CCMcontinued

9

If

=

, then V3= V4and V= V

VOVO+ VTH

2VO+ 2VTH

2VO+ VTH

Headroom = 2 Overdrives + 1 Thresholds

R2

g

R

g

r

=



10/29IIT Kharagpur

CCMcontinued

10

M2enters into saturation

M4enters into saturation

Output characteristic

VD= VDleads accurate mirrored current



11/29IIT Kharagpur

Small-signal Analysis of CCM

11

Calculation of Rin(= , )

v= i gV r

v=ir

1 + gr

Similarly,

v3=ir3

1 + g3r3

v= v+ v3= i

r

1 + gr +

r3

1 + g3r3

R=v

i=

1

g r+

1

g3 r3

1

g+

1

g3



12/29IIT Kharagpur

Small-signal Analysis of CCM

12

Calculation of Rout(= , )

v= r4 i g4v4

+r(i gv)

But, i= 0, v= v3= 0

v= 0; &

v4= v4= ir

v= i r+ r4 + g4r4ri

R=v

i

= r+ r4+ g4r4r g4r4r



13/29IIT Kharagpur

Wide-Swing Cascode CM (WSCCM)

13

VO+ VTH

VO5+ VTH

Condition:VO5 VO+ VTH

M5is weaker than M1

2VO

R1

g

R g4r4r

Headroom = 2 Overdrives

Matched pairs

=



14/29IIT Kharagpur

Small-signal Analysis of WSCCM

14


Calculation of Rout Same as that of CCM

v= v

v= (ig3v3)r3+ v3

but, v3= 0 v3= v3

v= r3i+ (1 + g3r3)v3

but, v3= r(i gv)= r(i gv)

v= r3i+ (1 + g3r3)ri

gr 1 + g3r3 v

R=v

i=

r3+ 1 + g3r3 r

1 + gr 1 + g3r3

1

g



15/29IIT Kharagpur

CCM vs. WSCCM

15

CCM

WSCCM



16/29IIT Kharagpur 16

V+ IEFR

Condition:VO3 IEFR VTH

Headroom = 2 Overdrives

Self-Biased Wide-Swing Cascode CM (SBWSCCM)

2VO

V

R R +1

g

R g4r4r

=

Matched pairs



17/29

IIT Kharagpur

Small-signal Analysis of SBWSCCM

17


Calculation of Rout Same as that of CCM

v= iR + r3 i g3v3

+r i gv

v= v iR and

v3= v r i gv

= v ri+ gr(v iR)

v= iR + r3i g3r3 v ri+ gr v iR

+r[i g(v+ iR)]

v 1 + g3r3+ grg3r3+ gr = iR + r+ r3+ g3r3r

+grg3r3R

R=v

i=

R + r+ r3+ g3r3r+ grg3r3R

1 + g3r3+ gg3r3+ gr R +

1

g



18/29

IIT Kharagpur

Wilson Current Mirror (WCM)

18

WCM employs current-seriesnegative feedback

V

ID

+

-

=

( + )

[ + + ]

VD VDleads t1o poor current gain accuracy

Rg+ g3

gg3

R33

2VO+ VTH2(VO+ VTH)



19/29

IIT Kharagpur

Regulated Cascode Current Mirror (RCCM)


R g r

3

R1

g4

I

VV


20/29

IIT Kharagpur

Comparison

20

SCM poor VO VO+ VTH r1

g

CCM excellent 2VO+ VTH 2 VO+ VTH gr

2

g

WSCCM excellent 2VO VO+ VTH gr

1

g

SBWSCCM excellent 2VO VO+ VTH gr R +

1

g

WCM poor 2VO+ VTH 2VO+ VTH gr

1

g

RCCM good 2VO+ VTH VO+ VTH g r

31

g



21/29

IIT Kharagpur

Current Reference

21

Current Source

Current Sink

1:K

1:K

V1V2

VDD= V4+ V

Considering, VD= VD V= V

V= Vh+2I

K W

L( 1 +V)

V3= Vh+2KI

K W4

L4 1 + VDD V

I= VDD

Problems:

Supply dependency

The current is not well-defined. The

circuit can support any arbitrary current

(at least, theoretically) as I= KIis

the only design equation



22/29

IIT Kharagpur

Boot-strapped Current Reference

Short-term Course on CMOS Analog Design 22

V= Vh+2IEF

K W

L ( 1 +VD)

= Vh+2IEF

K

K

WL (1 + VD)

+ IEFR

IEFR =2

K W

L(1 + VD)

1 1

K

1 + VD

1 + VD

IEF= 12

K W

L(1 + VD)

1 1K

1 +( VD VD)

VDhas less supply dependency

VD= VDD V4; V4changes when VDDchanges.

But this change would be negligible if is less

Use long channel device

Cascode

K>1

aka -Mult ip l ier Circu it


23/29

IIT Kharagpur

VX VY

VG

Supply Dependency


VYVX

VG

Increasing the output resistance of short-

channel MOSFETs using feedback. The

result is better power supply sensitivity

A practical way of implementing

the error amplifier


24/29

IIT Kharagpur

Degenerated Bias Point & Start-up Circuit


Degenerated

bias point

Start-up Problem:The circuit can

latch to the degenerated bias pointBoot-strapped Current Referencewith Start-up Ckt.

This start-up circuit works for both

zeroand non-zero currents


25/29

IIT Kharagpur

Stability of Boot-strapped Current Reference


What type of feedback exists in the circuit?

V

V

V3

V4

It is a positive feedback !!!

Will the loop be stable?

Yes, because the loop-gain (LG) is less than one.

L.G.=V

V

V4

V=

g 1g4

1 + gR

g3

g

. . =

( + )< because, g< g


26/29

IIT Kharagpur

Mismatch due to Body-bias Effect


V= Vh+2IEF

K W

L(1 + VD)

= Vh+2IEF

K K

WL

(1 + VD)+ IEFR

Vh Vh

Threshold

increases due

to body-bias

Alternative implementation eliminating

body effect (possible in n-well process)


27/29

IIT Kharagpur

Practical Applications


Current Reference

NMOS Current Mirror

PMOS Current Mirror

R f


28/29

IIT Kharagpur

1. B. Razavi, Design of Analog CMOS Integrated Circuits.

2. R. J. Baker, H. W. Li, and D. E. Boyce, CMOS Circuit Design, Layout, and Simulation.

3. P. E. Allen, and D. R. Holberg, CMOS Analog Circuit Design.

References



29/29

current mirrors and current references

Documents