cyclone v soc development & education board (de0-nano-soc … · 5 5 4 4 3 3 2 2 1 1 d d c c b...

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Block Diagram01

PAGE

02

Cyclone V SoC Development & Education Board (DE0-Nano-SoC-HDMI)CONTENT

Cover Page

FPGA IO Bank3, 4, 5 and 803FPGA IO Bank 6 (HPS DDR3)FPGA IO Bank 7 (HPS Peripheral Device)FPGA Clock In/Out and Clock GeneratorFPGA Configuration and EPCS deviceFPGA Power

04050607080910

HPS Peripheral : UART to USB and SD Card Socket

11121314151617181920212223

FPGA DecouplingUSB Blaster IIJTAG ChainHPS Peripheral : DDR3 SDRAM

HPS Peripheral : USB OTGHPS Peripheral : Gagabit EthernetHPS Peripheral : Accelerometer & LTC Expansion Header

FPGA : ADC1 (LTC2308) for 8-channel Analog Expansion Header and Arduino Analog inputHPS Peripheral : Reset Circuit, Button and LED

24

FPGA : GPIO, Analog and Arduino UNO Expansion HeaderFPGA : Button, Switch and LED

Power - 1.1V, 5VPower - 2.5V, 3.3VPower - 1.2V, 1.5V, 1.8V, 9V

FPGA : HDMI TX

Title

Size Document Number Rev

Date: Sheet of

Copyright (c) 2015 by Terasic Inc. Taiwan.

No part of this schematic design may be reproduced, duplicated, or used without the prior written permission of Terasic.All rights reserved.

Cover Page B0

DE0-Nano-SoC-HDMI Board

B

1 24Thursday, March 03, 2016

Title


Date: Sheet of



Cover Page B0


B


Title


Date: Sheet of



Cover Page B0


B


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of



Block Diagram B0


B

2 24Friday, April 29, 2016

Title


Date: Sheet of



Block Diagram B0


B


Title


Date: Sheet of



Block Diagram B0


B


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VCCIO = 3.3V

VCCIO = 3.3V

VCCIO = 3.3V

VCCIO = 3.3V

VCCIO = 3.3V

GPIO

User Interface (FPGA)

Arduino Digital Interface

HDMI Audio Interface

HDMI TX HDMI Interface

Arduino_Reset_n

Arduino_IO12

Arduino_IO13

KEY0KEY1

LED4

LED5LED6

LED7

LED0LED1

LED2LED3

Arduino_IO14

Arduino_IO15

Arduino_IO11

Arduino_IO10Arduino_IO9

Arduino_IO8

Arduino_IO7


Arduino_IO3

Arduino_IO2

Arduino_IO1

Arduino_IO6

Arduino_IO0

GPIO_1_D16

GPIO_0_D32GPIO_0_D35

GPIO_0_D13

HDMI_TX_D16GPIO_0_D8HDMI_TX_D5HDMI_TX_D10HDMI_LRCLKHDMI_MCLKHDMI_TX_D12HDMI_TX_D14HDMI_TX_D23HDMI_TX_D22HDMI_TX_D4HDMI_TX_D6

HDMI_TX_D15HDMI_TX_D13

GPIO_1_D3GPIO_0_D29GPIO_0_D28

GPIO_0_D6HDMI_TX_D21HDMI_TX_INTHDMI_TX_D8HDMI_I2S0HDMI_SCLKGPIO_0_D9HDMI_TX_D17



GPIO_0_D27HDMI_TX_VSGPIO_0_D11GPIO_0_D5GPIO_1_D32GPIO_0_D7GPIO_0_D19GPIO_1_D35

GPIO_1_D30

GPIO_1_D34HDMI_TX_DEGPIO_0_D24GPIO_0_D26GPIO_1_D28GPIO_1_D29GPIO_1_D26GPIO_1_D27GPIO_1_D33GPIO_0_D17


GPIO_1_D19

GPIO_1_D22GPIO_1_D25GPIO_0_D14GPIO_1_D23

GPIO_1_D18GPIO_1_D20GPIO_1_D17GPIO_1_D14GPIO_1_D15

GPIO_1_D12

GPIO_1_D8

GPIO_0_D15GPIO_0_D12GPIO_0_D21GPIO_0_D20


GPIO_1_D10

GPIO_1_D7GPIO_1_D5

GPIO_1_D13

GPIO_0_D10

GPIO_0_D30

KEY[1..0]20

LED[7..0]20

Arduino_IO[15..0]19

Arduino_Reset_n19

GPIO_0_D[35..0]6,7,19

GPIO_1_D[35..0]6,19

HDMI_I2S021

HDMI_TX_D[23..0]6,21

HDMI_TX_CLK6,21

HDMI_TX_HS6,21

HDMI_TX_VS6,21

HDMI_TX_DE6,21

HDMI_LRCLK21

HDMI_MCLK21

HDMI_SCLK21

HDMI_TX_INT21

HDMI_TX_VS21

HDMI_TX_DE21

Title


Date: Sheet of



FPGA Bank 3, 4, 5, 8 B0


B

3 24Monday, March 21, 2016

Title


Date: Sheet of



FPGA Bank 3, 4, 5, 8 B0


B


Title


Date: Sheet of



FPGA Bank 3, 4, 5, 8 B0


B


Bank 4A

CYCLONE V SoC BANK 4

5CSXFC6C6U23C6N

U1J

IO_4A/RZQ_0/DIFFIO_TX_B25NAH7

IO_4A/DIFFIO_RX_B26N/B_DQ_0/DQ4BAF13

IO_4A/DIFFIO_TX_B25P/B_DQ_2/DQ4BAG8

IO_4A/DIFFIO_RX_B26P/B_DQ_1/DQ4BAG13

IO_4A/DIFFIO_RX_B27N/B_DQSN_0/DQSN4BU13

IO_4A/DIFFIO_TX_B28N/B_DQ_3/DQ4BAH8

IO_4A/DIFFIO_RX_B27P/B_DQS_0/DQS4BU14

IO_4A/DIFFIO_TX_B28P/B_ODT_0AG9

IO_4A/DIFFIO_TX_B29N/B_ODT_1/DQ4BAH9

IO_4A/DIFFIO_RX_B30N/B_DQ_4/DQ4BAE15


IO_4A/DIFFIO_RX_B30P/B_DQ_5/DQ4BAF15

IO_4A/DIFFIO_TX_B32N/B_DQ_7/DQ4BAH11 IO_4A/DIFFIO_TX_B32P/B_DM_0/DQ4BAG11

IO_4A/DIFFIO_RX_B34N/B_DQ_8/DQ5BAG16

IO_4A/DIFFIO_TX_B33P/B_DQ_10/DQ5BAH12


IO_4A/DIFFIO_RX_B35N/B_DQSN_1/DQSN5BV13


IO_4A/DIFFIO_RX_B35P/B_DQS_1/DQS5BW14

IO_4A/DIFFIO_TX_B36P/B_CKE_1AG14

IO_4A/DIFFIO_TX_B37N/B_CKE_0/DQ5BAH14



IO_4A/DIFFIO_RX_B38P/B_DQ_13/DQ5BAD17

IO_4A/DIFFIO_TX_B40N/B_DQ_15/DQ5BAH16 IO_4A/DIFFIO_TX_B40P/B_DM_1/DQ5BAH17


IO_4A/DIFFIO_RX_B43P/B_DQS_2/DQS6BAA19

IO_4A/DIFFIO_TX_B44P/B_RESETNAG18

IO_4A/DIFFIO_TX_B45N/GND/DQ6BAH19

IO_4A/DIFFIO_RX_B46N/B_DQ_20/DQ6BAD20


IO_4A/DIFFIO_RX_B46P/B_DQ_21/DQ6BAE20

IO_4A/DIFFIO_TX_B48N/B_DQ_23/DQ6BAG20IO_4A/DIFFIO_TX_B48P/B_DM_2/DQ6BAF20




IO_4A/DIFFIO_RX_B51N/B_DQSN_3/DQSN7BAE22


IO_4A/DIFFIO_RX_B51P/B_DQS_3/DQS7BAD23



IO_4A/DIFFIO_TX_B53P/B_DQ_30/DQ7BAH23

IO_4A/DIFFIO_RX_B54P/B_DQ_29/DQ7BAG23

IO_4A/DIFFIO_TX_B56N/B_DQ_31/DQ7BAH24IO_4A/DIFFIO_TX_B56P/B_DM_3/DQ7BAG24




IO_4A/DIFFIO_RX_B59N/B_DQSN_4/DQSN8BAC23


IO_4A/DIFFIO_RX_B59P/B_DQS_4/DQS8BAC22


IO_4A/DIFFIO_RX_B62N/B_DQ_36/DQ8BAG25



IO_4A/DIFFIO_TX_B64N/B_DQ_39/DQ8BAF28IO_4A/DIFFIO_TX_B64P/B_DM_4/DQ8BAF27

IO_4A/DIFFIO_TX_B41P/B_DQ_18/DQ6BAF18


IO_4A/DIFFIO_RX_B42N/B_DQ_16/DQ6BAD19

IO_4A/DIFFIO_RX_B43N/B_DQSN_2/DQSN6BAA18

Bank 5A


Bank 5B

5CSXFC6C6U23C6N

U1K

IO_5A/RZQ_1/DIFFIO_TX_R1P/DQ1RAF26

IO_5A/PR_REQUEST/DIFFIO_TX_R1N/DQ1RAE26

IO_5A/DIFFIO_RX_R4P/DQ1RY17 IO_5A/CVP_CONFDONE/DIFFIO_TX_R3N/DQ1R

AD26

IO_5A/DIFFIO_RX_R4N/DQ1RY18

IO_5A/DIFFIO_RX_R6P/DQS1RY16

IO_5A/DIFFIO_RX_R6N/DQSN1RW15

IO_5A/DIFFIO_TX_R7P/DQ1RAA24

IO_5A/DIFFIO_RX_R8P/DQ1RV16IO_5A/DIFFIO_TX_R7NAA23

IO_5A/DIFFIO_RX_R8N/DQ1RV15

IO_5B/RZQ_2/DIFFIO_TX_R24NAB25

Bank 3A


Bank 3B

5CSXFC6C6U23C6N

U1I

IO_3A/PR_DONE/DIFFIO_RX_B7NAA11

IO_3A/PR_READY/DIFFIO_TX_B8N/DQ1BAE6

IO_3A/PR_ERROR/DIFFIO_RX_B7PY11

IO_3A/DIFFIO_TX_B8P/DQ1BAD5

IO_3B/DIFFIO_TX_B9N/GNDAF4

IO_3B/DIFFIO_RX_B10N/B_A_15/DQ2BAE9

IO_3B/DIFFIO_TX_B9P/B_WEN/DQ2BAE4

IO_3B/DIFFIO_RX_B10P/B_A_14/DQ2BAD10

IO_3B/DIFFIO_RX_B11N/B_CSN_1/DQSN2BU11

IO_3B/DIFFIO_TX_B12N/B_A_13/DQ2BAF8

IO_3B/DIFFIO_RX_B11P/B_CSN_0/DQS2BT11

IO_3B/DIFFIO_TX_B12P/B_A_12AE7

IO_3B/DIFFIO_TX_B13N/B_A_11/DQ2BAF9

IO_3B/DIFFIO_RX_B14N/B_A_9/DQ2BAE11

IO_3B/DIFFIO_TX_B13P/B_A_10/DQ2BAE8

IO_3B/DIFFIO_RX_B14P/B_A_8/DQ2BAD11

IO_3B/DIFFIO_TX_B16N/B_RASN/DQ2BAF6 IO_3B/DIFFIO_TX_B16P/B_CASN/DQ2BAF5

IO_3B/DIFFIO_TX_B17N/GNDAG6

IO_3B/DIFFIO_RX_B18N/B_BA_2/DQ3BAF10

IO_3B/DIFFIO_TX_B17P/B_BA_0/DQ3BAF7

IO_3B/DIFFIO_RX_B18P/B_BA_1/DQ3BAF11

IO_3B/DIFFIO_RX_B19N/B_CKN/DQSN3BT12

IO_3B/DIFFIO_TX_B20N/B_A_7/DQ3BAH2

IO_3B/DIFFIO_RX_B19P/B_CK/DQS3BT13

IO_3B/DIFFIO_TX_B20P/B_A_6AH3

IO_3B/DIFFIO_RX_B22N/B_A_5/DQ3BAD12IO_3B/DIFFIO_RX_B22P/B_A_4/DQ3BAE12

IO_3B/DIFFIO_TX_B24N/B_A_1/DQ3BAH5IO_3B/DIFFIO_TX_B24P/B_A_0/DQ3BAH6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR3 Interface (HPS)

VCCIO = 1.5V

VCCIO = 1.5V

HPS_DDR3_RZQ

HPS_DDR3_ADDR0

HPS_DDR3_DQ16HPS_DDR3_DQ17HPS_DDR3_DQ18HPS_DDR3_DQ19HPS_DDR3_DQ20HPS_DDR3_DQ21HPS_DDR3_DQ22HPS_DDR3_DQ23

HPS_DDR3_DM2

HPS_DDR3_DQS_P2HPS_DDR3_DQS_N2

HPS_DDR3_DM1



HPS_DDR3_DM0



HPS_DDR3_ADDR1HPS_DDR3_ADDR2HPS_DDR3_ADDR3HPS_DDR3_ADDR4HPS_DDR3_ADDR5HPS_DDR3_ADDR6HPS_DDR3_ADDR7HPS_DDR3_ADDR8HPS_DDR3_ADDR9HPS_DDR3_ADDR10HPS_DDR3_ADDR11HPS_DDR3_ADDR12HPS_DDR3_ADDR13HPS_DDR3_ADDR14

HPS_DDR3_BA0HPS_DDR3_BA1HPS_DDR3_BA2

HPS_DDR3_DM3



HPS_DDR3_ODT

HPS_DDR3_CKEHPS_DDR3_CK_NHPS_DDR3_CK_P

HPS_DDR3_WE_NHPS_DDR3_CS_N

HPS_DDR3_RAS_NHPS_DDR3_CAS_N

HPS_DDR3_RESET_N

HPS_DDR3_ODT1

HPS_DDR3_CS1_N

HPS_DDR3_CKE1

HPS_DDR3_DQS_N[3..0]12

HPS_DDR3_DQS_P[3..0]12

HPS_DDR3_DQ[31..0]12

HPS_DDR3_DM[3..0]12

HPS_DDR3_BA[2..0]12

HPS_DDR3_ADDR[14..0]12

HPS_DDR3_RESET_N12

HPS_DDR3_CK_P12

HPS_DDR3_CK_N12

HPS_DDR3_CAS_N12

HPS_DDR3_RAS_N12

HPS_DDR3_CS_N12HPS_DDR3_WE_N

12HPS_DDR3_ODT12HPS_DDR3_CKE

12

HPS_DDR3_CS1_N12HPS_DDR3_CKE1

12HPS_DDR3_ODT112

Title


Date: Sheet of



FPGA Bank 6 B0


B


Title


Date: Sheet of



FPGA Bank 6 B0


B


Title


Date: Sheet of



FPGA Bank 6 B0


B


R117 100

Bank 6A

CYCLONE V SoC BANK 6 (HPS)

Bank 6B

5CSXFC6C6U23C6N

U1L

HPS_DDR/HPS_DM_4AE28

HPS_DDR/HPS_DQ_39AD28

HPS_DDR/HPS_DQ_37V20

HPS_DDR/HPS_DQ_38AE27


HPS_DDR/HPS_DQS_4V18

HPS_DDR/HPS_DQSn_4V17


HPS_DDR/HPS_DQ_33U25

HPS_DDR/HPS_DQ_34AC28

HPS_DDR/HPS_DQ_32T26

HPS_DDR/HPS_DM_3AB28

HPS_DDR/HPS_DQ_31AA27


HPS_DDR/HPS_DQ_30Y27

HPS_DDR/HPS_DQ_28R24

HPS_DDR/HPS_DQS_3U19

HPS_GPI9Y26

HPS_DDR/HPS_DQSn_3T20

HPS_DDR/HPS_DQ_27W26


HPS_DDR/HPS_DQ_26AA28


HPS_GPI8Y28HPS_GPI7T16

HPS_DDR/HPS_DM_2W28


HPS_DDR/HPS_DQ_21N27



HPS_DDR/HPS_DQS_2T19

HPS_DDR/HPS_RESETnV28

HPS_DDR/HPS_DQSn_2T18

HPS_DDR/HPS_DQ_19U28




HPS_GPI3R21

HPS_DDR/HPS_DM_1P28

HPS_GPI2R20


HPS_DDR/HPS_DQ_13M26



HPS_DDR/HPS_DQS_1R19

HPS_DDR/HPS_DQSn_1R18

HPS_GPI1K27HPS_GPI0M25

HPS_DDR/HPS_A_0C28

HPS_DDR/HPS_A_1B28

HPS_DDR/HPS_A_4J21

HPS_DDR/HPS_A_2E26

HPS_DDR/HPS_A_5J20

HPS_DDR/HPS_A_3D26

HPS_DDR/HPS_A_6C26

HPS_DDR/HPS_A_7B26

HPS_DDR/HPS_A_8F26

HPS_DDR/HPS_A_9F25

HPS_DDR/HPS_A_10A24

HPS_DDR/HPS_A_11B24

HPS_DDR/HPS_A_12D24

HPS_DDR/HPS_A_13C24

HPS_DDR/HPS_A_14G23

HPS_DDR/HPS_A_15F24

HPS_RZQ_0D25

HPS_DDR/HPS_DQ_8K25

HPS_DDR/HPS_DQ_10J27HPS_DDR/HPS_DQ_9L25

HPS_DDR/HPS_DQ_11J28

HPS_DDR/HPS_CKN21

HPS_DDR/HPS_CKnN20

HPS_DDR/HPS_CKE_0L28

HPS_DDR/HPS_CKE_1K28

HPS_DDR/HPS_BA_0A27

HPS_DDR/HPS_BA_1H25

HPS_DDR/HPS_BA_2G25

HPS_DDR/HPS_RASnA25

HPS_DDR/HPS_CASnA26

HPS_DDR/HPS_WEnE25

HPS_DDR/HPS_CSn_0L21

HPS_DDR/HPS_CSn_1L20

HPS_DDR/HPS_ODT_0D28

HPS_DDR/HPS_ODT_1G26

HPS_DDR/HPS_DQ_0J25

HPS_DDR/HPS_DQ_1J24

HPS_DDR/HPS_DQ_2E28

HPS_DDR/HPS_DQ_3D27

HPS_DDR/HPS_DQ_4J26

HPS_DDR/HPS_DQ_5K26

HPS_DDR/HPS_DQ_6G27

HPS_DDR/HPS_DQ_7F28

HPS_DDR/HPS_DQS_0R17

HPS_DDR/HPS_DQSn_0R16

HPS_DDR/HPS_DM_0G28

HPS_GPI10U15

HPS_GPI11U16

HPS_GPI12AC27

HPS_GPI13V24

HPS_GPI4R28

HPS_GPI5P26

HPS_GPI6T17

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VCCIO = 3.3V

VCCIO = 3.3V

VCCIO = 3.3V

VCCIO = 3.3V

UBS PHY Interface (ULPI)

Ethernet PHY Interface (RGMII)

SD Card Interface

UART Interface

(CLOCKSEL0)(BOOTSEL2)

Default Setting: BOOTSEL[2:0]=101 (Boot from SD CARD) CLKSEL[1:0] =00

(BOOTSEL1)(BOOTSEL0)

(CLOCKSEL1)

HPS Reset

HPS Clock

HPS JTAG INTERFACE

Accelerometer Interface

LTC Interface

HPS Key and LED

HPS_USB_CLKOUT

HPS_USB_DATA3HPS_USB_DATA2HPS_USB_DATA1HPS_USB_DATA0

HPS_USB_DATA5

HPS_USB_DATA7

HPS_USB_DATA6

HPS_USB_DATA4

HPS_USB_DIRHPS_USB_STP

HPS_USB_NXT

HPS_ENET_GTX_CLKHPS_ENET_TX_DATA0

HPS_ENET_TX_DATA3HPS_ENET_TX_DATA2HPS_ENET_TX_DATA1

HPS_ENET_RX_DATA0

HPS_ENET_MDCHPS_ENET_MDIO

HPS_ENET_RX_DVHPS_ENET_TX_ENHPS_ENET_RX_CLK

HPS_ENET_RX_DATA2HPS_ENET_RX_DATA1

HPS_ENET_RX_DATA3

HPS_SD_DATA0

HPS_SD_DATA3HPS_SD_DATA2HPS_SD_DATA1

HPS_SD_CMD

HPS_UART_RXHPS_UART_TX

HPS_ENET_RESET_NHPS_USB_RESET

HPS_CONV_USB_N

HPS_SPIM_SSHPS_CLOCKSEL1

HPS_BOOTSEL0HPS_BOOTSEL1HPS_BOOTSEL2

HPS_BOOTSEL0

HPS_SPIM_SS

HPS_BOOTSEL2

HPS_CLOCKSEL1

HPS_BOOTSEL1

HPS_TCKHPS_TMSHPS_TDIHPS_TDO

JTAG_TRST

HPS_CLK2_25HPS_CLK1_25

HPS_RESET_NHPS_WARM_RST_N

HPS_PORSEL

HPS_GSENSOR_INT

HPS_SPIM_CLKHPS_SPIM_MOSIHPS_SPIM_MISO

HPS_I2C0_SDATHPS_I2C0_SCLK


HPS_LTC_GPIO

HPS_ENET_INT_N

HPS_LEDHPS_KEY

HPS_SD_CLK

VCC3P3

VCC3P3

HPS_USB_DATA[7..0]14

HPS_USB_CLKOUT14

HPS_USB_DIR14

HPS_USB_NXT14

HPS_USB_STP14

HPS_USB_RESET10,14

HPS_ENET_TX_DATA[3..0]15

HPS_ENET_GTX_CLK15

HPS_ENET_TX_EN15

HPS_ENET_MDC15

HPS_ENET_RESET_N10,15,17

HPS_ENET_RX_DATA[3..0]15

HPS_ENET_RX_CLK15

HPS_ENET_INT_N15

HPS_ENET_RX_DV15

HPS_ENET_MDIO15

HPS_SD_DATA[3..0]13

HPS_SD_CMD13HPS_SD_CLK13

HPS_CONV_USB_N13

HPS_UART_TX13

HPS_UART_RX13

HPS_TMS11HPS_TDI11

HPS_TCK11

HPS_TDO11

HPS_WARM_RST_N10,17

HPS_RESET_N10,17

JTAG_TRST10

HPS_CLK1_256

HPS_CLK2_256

HPS_I2C0_SCLK16

HPS_GSENSOR_INT16

HPS_I2C0_SDAT16

HPS_SPIM_MOSI16

HPS_I2C1_SCLK16

HPS_SPIM_SS16

HPS_SPIM_CLK16

HPS_LTC_GPIO16

HPS_SPIM_MISO16

HPS_I2C1_SDAT16

HPS_LED17

HPS_KEY17

Title


Date: Sheet of



FPGA Bank 7 B0


B


Title


Date: Sheet of



FPGA Bank 7 B0


B


Title


Date: Sheet of



FPGA Bank 7 B0


B


R135 10K DNI

R125 1KDNI

R118 4.7K

R124 1K

R127 1KDNI

Bank 7A

CYCLONE V SoC BANK 7 (HPS)

Bank 7B

Bank 7C

Bank 7D

5CSXFC6C6U23C6N

U1M

HPS_NRSTA23

HPS_NPORH19

HPS_TDOB23

HPS_TMSC23 HPS_TCKK19

HPS_TRSTC22

HPS_TDID22

HPS_PORSELE18

HPS_CLK1E20

HPS_CLK2D20

NAND_ALE/RGMII1_TX_CLK/QSPI_SS3/HPS_GPIO14J15

NAND_CE/RGMII1_TXD0/USB1_D0/HPS_GPIO15A16

NAND_CLE/RGMII1_TXD1/USB1_D1/HPS_GPIO16J14

NAND_RE/RGMII1_TXD2/USB1_D2/HPS_GPIO17A15

NAND_RB/RGMII1_TXD3/USB1_D3/HPS_GPIO18D17

NAND_DQ0/RGMII1_RXD0/ - /HPS_GPIO19A14

NAND_DQ1/RGMII1_MDIO/I2C3_SDA/HPS_GPIO20E16

NAND_DQ2/RGMII1_MDC/I2C3_SCL/HPS_GPIO21A13

NAND_DQ3/RGMII1_RX_CTL/USB1_D4/HPS_GPIO22J13

NAND_DQ4/RGMII1_TX_CTL/USB1_D5/HPS_GPIO23A12

NAND_DQ5/RGMII1_RX_CLK/USB1_D6/HPS_GPIO24J12

NAND_DQ6/RGMII1_RXD1/USB1_D7/HPS_GPIO25A11

NAND_DQ7/RGMII1_RXD2/ - /HPS_GPIO26C15

NAND_WP/RGMII1_RXD3/QSPI_SS2/HPS_GPIO27A9

NAND_WE,BOOTSEL2/QSPI_SS1/ - /HPS_GPIO28D15

QSPI_IO0/ - /USB1_CLK/HPS_GPIO29A8

QSPI_IO1/ - /USB1_STP/HPS_GPIO30H16

QSPI_IO2/ - /USB1_DIR/HPS_GPIO31A7

QSPI_IO3/ - /USB1_NXT/HPS_GPIO32J16

QSPI_SS0,BOOTSEL1/ - / - /HPS_GPIO33A6

QSPI_CLK/ - / - /HPS_GPIO34C14

QSPI_SS1/ - / - /HPS_GPIO35B14

SDMMC_CMD/USB0_D0/ - /HPS_GPIO36D14

SDMMC_PWREN/USB0_D1/ - /HPS_GPIO37A5

RGMII0_TX_CLK/ - / - /HPS_GPIO0E4

RGMII0_RXD0/USB1_D4/ - /HPS_GPIO5C8

RGMII0_MDIO/USB1_D5/I2C2_SDA/HPS_GPIO6D4

RGMII0_MDC/USB1_D6/I2C2_SCL/HPS_GPIO7C7

RGMII0_RX_CTL/USB1_D7/ - /HPS_GPIO8F4 RGMII0_TX_CTL/ - / - /HPS_GPIO9

C6RGMII0_RX_CLK/USB1_CLK/ - /HPS_GPIO10

G4

TRACE_CLK/ - / - /HPS_GPIO48C21

TRACE_D0/SPIS0_CLK/UART0_RX/HPS_GPIO49A22

TRACE_D1/SPIS0_MOSI/UART0_TX/HPS_GPIO50B21

TRACE_D2/SPIS0_MISO/I2C1_SDA/HPS_GPIO51A21

TRACE_D3/SPIS0_SS0/I2C1_SCL/HPS_GPIO52K18

TRACE_D4/SPIS1_CLK/CAN1_RX/HPS_GPIO53A20

TRACE_D5/SPIS1_MOSI/CAN1_TX/HPS_GPIO54J18

TRACE_D6/SPIS1_SS0/I2C0_SDA/HPS_GPIO55A19

TRACE_D7/SPIS1_MISO/I2C0_SCL/HPS_GPIO56C18

SPIM0_CLK/I2C1_SDA/UART0_CTS/HPS_GPIO57A18

SPIM0_MOSI/I2C1_SCL/UART0_RTS/HPS_GPIO58C17

SPIM0_MISO/CAN1_RX/UART1_CTS/HPS_GPIO59B18

SPIM0_SS0,BOOTSEL0/CAN1_TX/UART1_RTS/HPS_GPIO60J17

UART0_RX/CAN0_RX/SPIM0_SS1/HPS_GPIO61A17

UART0_TX,CLKSEL1/CAN0_TX/SPIM1_SS1/HPS_GPIO62H17

I2C0_SDA/UART1_RX/SPIM1_CLK/HPS_GPIO63C19

I2C0_SCL/UART1_TX/SPIM1_MOSI/HPS_GPIO64B16

CAN0_RX/UART0_RX/SPIM1_MISO/HPS_GPIO65B19

CAN0_TX,CLKSEL0/UART0_TX/SPIM1_SS0/HPS_GPIO66C16

SDMMC_D0/USB0_D2/ - /HPS_GPIO38C13

SDMMC_D1/USB0_D3/ - /HPS_GPIO39B6 SDMMC_D4/USB0_D4/ - /HPS_GPIO40

H13

SDMMC_D5/USB0_D5/ - /HPS_GPIO41A4

SDMMC_D6/USB0_D6/ - /HPS_GPIO42H12

SDMMC_D7/USB0_D7/ - /HPS_GPIO43B4

SDMMC_FB_CLK_IN/USB0_CLK/ - /HPS_GPIO44B12

SDMMC_CCLK_OUT/USB0_STP/ - /HPS_GPIO45B8

SDMMC_D2/USB0_DIR/ - /HPS_GPIO46B11

SDMMC_D3/USB0_NXT/ - /HPS_GPIO47B9

RGMII0_RXD1/USB1_STP/ - /HPS_GPIO11C5

RGMII0_RXD2/USB1_DIR/ - /HPS_GPIO12E5

RGMII0_RXD3/USB1_NXT/ - /HPS_GPIO13D5

RGMII0_TXD0/USB1_D0/ - /HPS_GPIO1C10

RGMII0_TXD1/USB1_D1/ - /HPS_GPIO2F5



R140 10KR126 1K

R120 0 DNI

C8933p

DNI50V

R123 1K

R139 10K DNI

R119 0DNI

R138 10K

R143 4.7K

R137 10K DNI

R121 0 DNI

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Default: 50MHz

Default: 50MHz

Default: 25MHz

Default: 25MHz

Default: 24MHz

Default: 25MHz

Default: 24MHz

Factory Default Configuration:50MHz x225MHz x324MHz x2

Clock Generator

GPIO

CAD Note:Place near IC power pin

CAD Note:Place near pin 3 and 5(C3 & C322)

Default : I2C Address 0xDA/0xDB

HDMI TX

VCCIO = 3.3V

VCCIO = 3.3V

VCCIO = 3.3V

VCCIO = 3.3V

User Interface (FPGA)FPGA_CLK1_50

GPIO_0_D2GPIO_0_D0

GPIO_1_D0GPIO_1_D2

CLK_I2C_SDA

CLK_I2C_SCLFPGA_CLK1_50

HPS_CLK1_25

FPGA_CLK2_50

HPS_CLK2_25

CLK_ENET_25

CLK_UB2_24

CLK_USB_24

FPGA_CLK2_50

GPIO_0_D25 HDMI_TX_D18HDMI_TX_CLK

GPIO_0_D34

FPGA_CLK3_50FPGA_CLK1_50


GPIO_0_D1GPIO_0_D4


SW0SW1SW2SW3

VCC1P8 VCC3P3

VCC3P3

CLK_ENET_2515

HPS_CLK2_255

HPS_CLK1_255

CLK_USB_2414

CLK_UB2_2410

GPIO_0_D[35..0]3,7,19

GPIO_1_D[35..0]3,19

HDMI_TX_D[23..0]3,21

HDMI_TX_DE21

HDMI_TX_HS21

HDMI_TX_CLK21

SW[3..0]20

Title


Date: Sheet of



FPGA Clock and Clock Generator B0


B

6 24Thursday, April 28, 2016

Title


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B


Title


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B


C2530.1u16V

C490.01u50V

C2440.1u16V

C236 4p

DNI6.3V

Bank 3B

CYCLONE V SoC Clock

Bank 4A

Bank 5B

Bank 8A

5CSXFC6C6U23C6N

U1B

IO_3B/CLK0N,FPLL_BL_FBN/DIFFIO_RX_B15NW11 IO_3B/CLK0P,FPLL_BL_FBP/DIFFIO_RX_B15PV11

IO_3B/FPLL_BL_CLKOUT1,FPLL_BL_CLKOUTN/DIFFIO_TX_B21N/B_A_3/DQ3BAH4IO_3B/FPLL_BL_CLKOUT0,FPLL_BL_CLKOUTP,FPLL_BL_FB/DIFFIO_TX_B21P/B_A_2/DQ3BAG5

IO_3B/CLK1N/DIFFIO_RX_B23NW12 IO_3B/CLK1P/DIFFIO_RX_B23PV12

IO_4A/CLK2N/DIFFIO_RX_B31NAA13 IO_4A/CLK2P/DIFFIO_RX_B31P

Y13

IO_4A/CLK3N/DIFFIO_RX_B39NAA15 IO_4A/CLK3P/DIFFIO_RX_B39P

Y15

IO_8A/CLK7P/DIFFIO_RX_T1PD12

IO_8A/CLK7N/DIFFIO_RX_T1NC12

IO_8A/FPLL_TL_CLKOUT0,FPLL_TL_CLKOUTP,FPLL_TL_FB/DIFFIO_TX_T4PE8

IO_8A/FPLL_TL_CLKOUT1,FPLL_TL_CLKOUTN/DIFFIO_TX_T4ND8IO_8A/CLK6P,FPLL_TL_FBP/DIFFIO_RX_T9P

E11

IO_8A/CLK6N,FPLL_TL_FBN/DIFFIO_RX_T9ND11

IO_5B/CLK5P/DIFFIO_RX_R21PW21

IO_5B/CLK5N/DIFFIO_RX_R21NW20

IO_5B/CLK4P,FPLL_BR_FBP/DIFFIO_RX_R23PY24

IO_5B/CLK4N,FPLL_BR_FBN/DIFFIO_RX_R23NW24

IO_5B/FPLL_BR_CLKOUT1,FPLL_BR_CLKOUTN/DIFFIO_TX_R22NAA26IO_5B/FPLL_BR_CLKOUT0,FPLL_BR_CLKOUTP,FPLL_BR_FB/DIFFIO_TX_R22PAB26

C2460.1u16V

C245 4p

DNI6.3V

R49 18.2

R174 4.7KDNI

R54 18.2

R175 4.7KDNI

R55 18.2

Y124.00MHz

13

24

U15

CDCE937PWRG4

Xin/Clk1

Xout20

S02

S1/SDA19

S2/SCL18

GN

D5

GN

D9

GN

D16

Vctrl4

VDD

3

Vddo

ut6

Vddo

ut10

Vddo

ut13

Y117

Y215

Y314

Y47

Y58

Y612

Y711

C2474.7u6.3V

L4220 ohm, 0.3A

R56 18.2

R47 18.2

L17220 ohm, 0.3A

R57 18.2

C501n50V

C2524.7u6.3V

R48 18.2

R159 0

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Design Note:Optional termination resistorfor DCLK

CAD Note:Place near FPGA DCLK pin

Default Setup MSEL[4:0] = 10010,AS Fast Mode

USB Blaster

FPGA JTAG INTERFACE

GPIO

ADC

I2C Interface

VCCIO = 3.3V

VCCIO = 3.3V

VCCIO = 3.3V

FPGA_NCONFIG

FPGA_NSTATUS

FPGA_CONF_DONE

FPGA_TCK

FPGA_TMS

EPCQ_nCSO

EPCQ_DCLK

FPGA_TDOFPGA_TDI

FPGA_TCK

EPCQ_AS_DATA2

EPCQ_AS_DATA0

EPCQ_AS_DATA3

EPCQ_AS_DATA1

MSEL0

MSEL2MSEL3

MSEL1

MSEL4

MSEL0MSEL1MSEL2MSEL3MSEL4

MSEL1MSEL0

MSEL4

MSEL2MSEL3

EPCQ_AS_DATA0

EPCQ_DCLKEPCQ_NCSO

EPCQ_AS_DATA3EPCQ_AS_DATA2EPCQ_AS_DATA1

ADC_SCKADC_SDI

ADC_SDOADC_CONVSTHDMI_I2C_SDA

HDMI_I2C_SCL

HDMI_TX_D9HDMI_TX_D3HDMI_TX_D7HDMI_TX_D2HDMI_TX_D11HDMI_TX_HS

GPIO_1_D21

GPIO_1_D1

GPIO_0_D23

GPIO_0_D22

GPIO_1_D6

VCC3P3

VCC3P3

VCC3P3

VCC3P3

VCC3P3

FPGA_TCK11

FPGA_TDI11

FPGA_TMS11

FPGA_TDO11

FPGA_NCONFIG10

FPGA_CONF_DONE10

GPIO_0_D[35..0]3,6,19

ADC_CONVST18

ADC_SDO18ADC_SDI18

ADC_SCK18

HDMI_I2C_SCL6,21

HDMI_I2C_SDA6,21

HDMI_TX_D[23..0]6,21

HDMI_TX_HS21

GPIO_1_D[35..0]6,19

Title


Date: Sheet of



FPGA Configuration and EPCS B0


B

7 24Wednesday, March 23, 2016

Title


Date: Sheet of





B


Title


Date: Sheet of





B


C400.1u16V

R144 10K

R8 1K

R3 0 DNI

1

ON

SW10

DIP SWITCH

1234

121110987

56

R5 0 DNI

C23712p

DNI50V

U28

S25FL128

VCC

2

NC013

NC024

NC035

NC046

nCS7

DATA18

DCLK16

DATA015

NC0511

NC0612

NC0713

NC0814

GN

D10

DATA29

DATA31

R9 1K

R4 0 DNI

C3533p

DNI50V

R6 0 DNI

R178 0DNI

R7 0 DNI

R1691K

R17610KDNI

CYCLONE V SoC BANK XCVR

Bank GXB_L0

Bank GXB_L1

U1N

5CSXFC6C6U23C6N

REFCLK0LpV5

REFCLK0LnV4

GXB_RX_L0n,GXB_REFCLK_L0nAF1

GXB_RX_L0p,GXB_REFCLK_L0pAF2

GXB_RX_L1n,GXB_REFCLK_L1nAB1

GXB_RX_L1p,GXB_REFCLK_L1pAB2

GXB_RX_L2n,GXB_REFCLK_L2nV1

GXB_RX_L2p,GXB_REFCLK_L2pV2

GXB_RX_L3n,GXB_REFCLK_L3nP1

GXB_RX_L3p,GXB_REFCLK_L3pP2

GXB_RX_L4n,GXB_REFCLK_L4nK1

GXB_RX_L4p,GXB_REFCLK_L4pK2

GXB_RX_L5n,GXB_REFCLK_L5nF1

GXB_RX_L5p,GXB_REFCLK_L5pF2

REFCLK1LpP8

REFCLK1LnN8

GXB_TX_L0pAD2

GXB_TX_L0nAD1

GXB_TX_L1pY2

GXB_TX_L1nY1

GXB_TX_L2pT2

GXB_TX_L2nT1

GXB_TX_L3pM2

GXB_TX_L3nM1

GXB_TX_L4pH2

GXB_TX_L4nH1

GXB_TX_L5pD2

GXB_TX_L5nD1

R10 1K

R171 0DNI

R1771KDNI

R11 1KR12 1K

CYCLONE V SoC Configuration

Bank 5ABank 3A

Bank 9A

5CSXFC6C6U23C6N

U1A

TDOY9

NCSO/DATA4AA6

TMSAC7

AS_DATA3/DATA3AB6

TCKAB5

AS_DATA2/DATA2AC5

TDIW10

AS_DATA1/DATA1AC6

DCLKAA8

AS_DATA0,ASDO/DATA0AD7

IO_3A/DATA6/DIFFIO_RX_B1N/DQ1BY8 IO_3A/DATA5/DIFFIO_TX_B2NY4

IO_3A/DATA8/DIFFIO_RX_B1P/DQ1BW8 IO_3A/DATA7/DIFFIO_TX_B2P/DQ1BY5

IO_3A/DATA10/DIFFIO_RX_B3N/DQSN1BT8 IO_3A/DATA9/DIFFIO_TX_B4N/DQ1B

AB4

IO_3A/DATA12/DIFFIO_RX_B3P/DQS1BU9 IO_3A/DATA11/DIFFIO_TX_B4P

AA4

IO_3A/DATA14/DIFFIO_RX_B5N/DQ1BV10 IO_3A/DATA13/DIFFIO_TX_B6N/DQ1BAD4

IO_3A/CLKUSR/DIFFIO_RX_B5P/DQ1BU10

IO_3A/DATA15/DIFFIO_TX_B6P/DQ1BAC4

IO_5A/INIT_DONE/DIFFIO_RX_R2PAA20

IO_5A/CRC_ERROR/DIFFIO_RX_R2NY19

IO_5A/nCEO/DIFFIO_TX_R3P/DQ1RAE25

IO_5A/DEV_OE/DIFFIO_TX_R5PAC24

IO_5A/DEV_CLRn/DIFFIO_TX_R5N/DQ1RAB23

MSEL0J10

CONF_DONEJ8

MSEL1H9

nSTATUSH8

nCEE6

MSEL2G6

MSEL3K10

nCONFIGF7

MSEL4K9

R136 10K

R147 10K

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VCC3P3 VCC3P3

VCC3P3

VCC3P3

VCCA_FPLL VCC2P5

VCC3P3VCCINT_FPGA

VCC2P5VCC_AUX_SHARED

VCC2P5VCC_AUX

VCCBATVCC2P5

VCC1P1_HPS

VCC2P5

VCC3P3

VCC3P3

VCC_AUX

VCC1P5_DDR3

DDR3_VREF_HPS

VCC3P3

VCCINT_FPGA

VCCA_FPLLVCCINT_FPGA

Title


Date: Sheet of



FPGA Power B0


B

8 24Tuesday, March 22, 2016

Title


Date: Sheet of



FPGA Power B0


B


Title


Date: Sheet of



FPGA Power B0


B


R1342K

L12 BEAD

GND

5CSXFC6C6U23C6N

U1G

GNDK14

GNDK16

GNDK20

GNDK3

GNDK4

GNDY14

GNDL1

GNDY12

GNDL13

GNDL15

GNDL17

GNDL19

GNDL2

GNDL24

GNDL27

GNDL3

GNDL5

GNDW4

GNDW3

GNDM10

GNDM11

GNDM14

GNDM16

GNDM20

GNDM3

GNDM8

GNDN1

GNDN13

GNDN15

GNDN17

GNDN19

GNDN2

GNDN3

GNDN4

GNDP10

GNDP12

GNDP16

GNDP18

GNDP20

GNDP25

GNDP3

GNDP5

GNDP9

GNDR8

GNDT10

GNDT14

GNDT3

GNDU1

GNDU12

GNDU17

GNDU2

GNDU20

GNDU24

GNDU27

GNDU3

GNDU5

GNDV14

GNDV3

GNDV8

GNDV9

GNDW1

GNDW16

GNDW18

GNDW2

GNDV26

GNDV21

DNU_1A2

DNU_2B2

DNU_15D23

DNU_16E12

DNU_17U8

DNU_18AE14

GNDH4

GNDH5

GNDH6

GNDK8

GNDL8

GNDL9

GNDL10

GNDR1

GNDR11

GNDR13

GNDR15

GNDR2

GNDR3

GND

5CSXFC6C6U23C6N

U1F

GNDF23

GNDE23

GNDD21

GNDF6

GNDA10

GNDA3

GNDAA1

GNDAA17

GNDAA2

GNDAA3

GNDAA9

GNDAB24

GNDAB27

GNDAB3

GNDAC1

GNDAC2

GNDAC3

GNDAD14

GNDAD22

GNDAD25

GNDAD3

GNDAD6

GNDAD8

GNDAE1

GNDAE16

GNDAE18

GNDAE2

GNDAE3

GNDAF24

GNDAF3

GNDAG1

GNDAG17

GNDAG2

GNDB15

GNDB17

GNDB20

GNDB22

GNDB25

GNDB27

GNDB3

GNDB5

GNDB7

GNDC1

GNDC11

GNDC2

GNDC3

GNDD10

GNDD13

GNDD16

GNDD3

GNDE1

GNDE19

GNDE2

GNDE22

GNDE24

GNDE27

GNDE3

GNDE9

GNDF3

GNDG1

GNDG2

GNDG3

GNDH11

GNDH15

GNDH18

GNDH20

GNDH24

GNDH27

GNDH3

GNDY3

GNDY25

GNDY20

GNDJ1

GNDJ2

GNDJ3

GNDJ5

GNDJ9

GNDK11

GNDK12

GNDAG27

GNDAG3

GNDAG7

GNDAH10

GNDAH20

L10 BEAD

Reference pin

5CSXFC6C6U23C6N

U1H

RREF_TLB1

CYCLONE V SoC Power

5CSXFC6C6U23C6N

U1D

VCCJ11

VCCK13

VCCK15

VCCL11

VCCL12

VCCL14

VCCM12

VCCM13

VCCM15

VCCM9

VCCN10

VCCN11

VCCN12

VCCN14

VCCN9

VCCP11

VCCP13

VCCP14

VCCP15

VCCR10

VCCR12

VCCR14

VCCR9

VCCT15 VCC

T9

VCCU26

VCCPD3AAA10

VCCPD3B4AAA14

VCCPD3B4AAD13

VCCPD3B4AAD16

VCCPD3B4AAD18

VCCPD3B4AAD21

VCCPD3B4AAD9

VCCPD5AY21

VCCPD8AE10

VCCA_FPLLK5

VCCA_FPLLP4

VCCA_FPLLU4

VCCA_FPLLW5

VCCA_FPLLJ4

VCCA_FPLLAA21

VCC_AUXAC21VCC_AUXAC8

VCC_AUXAD15

VCC_AUXE15

VCC_AUXF8

VCC_AUX_SHAREDF21

VCCPGMY10

VCCPGMAD24

VCCPGMH10

VCCBATD7

VCCPD5BW19

L13 BEAD

L11 BEAD

CYCLONE V SoC HPS Power

Transceiver Power

5CSXFC6C6U23C6N

U1C

VCCRSTCLK_HPSJ19

VCCIO7A_HPSC20

VCCIO7A_HPSD18

VCCIO7B_HPSB13

VCCIO7B_HPSH14

VCCIO7C_HPSB10

VCCIO7D_HPSD6

VCCIO7D_HPSG5VCCRSTCLK_HPS

F22

VCCPLL_HPSH23

VCC_HPSU21

VCC_HPSK17

VCC_HPSL16

VCC_HPSL18

VCC_HPSM17

VCC_HPSM18

VCC_HPSM19

VCC_HPSN16

VCC_HPSN18

VCC_HPSP17

VCC_HPSP19

VCCIO6A_HPSC25

VCCIO6A_HPSC27

VCCIO6A_HPSF27

VCCIO6A_HPSG24

VCCIO6A_HPSH21

VCCIO6A_HPSH26

VCCIO6A_HPSL26

VCCIO6A_HPSM21

VCCIO6B_HPSP27

VCCIO6B_HPST21

VCCIO6B_HPST25

VCCIO6B_HPSU18

VCCIO6B_HPSW27

VCCIO6B_HPSAD27

VCCPD6A6B_HPSK21

VCCPD6A6B_HPSK24

VCCPD6A6B_HPSM24

VCCPD6A6B_HPSP21

VCCPD6A6B_HPSP24

VCCPD7A_HPSE21

VCCPD7B_HPSE17

VCCPD7C_HPSE14

VCCPD7D_HPSE13

VREFB6BN0_HPST27

VREFB6AN0_HPSH28

VREFB7A7B7C7DN0_HPSD19

VCCL_GXBLT4 VCCL_GXBLL4

VCCH_GXBLM4

VCCH_GXBLR4 VCCE_GXBL

M5

VCCE_GXBLN5

VCCE_GXBLR5

VCCE_GXBLT5

CYCLONE V SoC Power

5CSXFC6C6U23C6N

U1E

VCCIO3AAA5 VCCIO3AW9

VCCIO3BAA12

VCCIO3BAE10

VCCIO3BAE13

VCCIO3BAG4

VCCIO4AAA16

VCCIO4AAE21

VCCIO4AAF14

VCCIO4AAF19

VCCIO4AAG12

VCCIO4AAG22

VCCIO4AAH15

VCCIO4AAH25

VCCIO4AW13

VCCIO8AE7

VREFB3AN0AE5

VREFB3BN0AF12 VREFB4AN0

AF16

VREFB8AN0D9

VCCIO5BW25

VREFB5BN0AA25

VCCIO5AW17

VCCIO5AAC25

VREFB5AN0AC26

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FPGA VCCINT

FPGA VCC3P3(BANK 3, 4, 5, 8)

Place one 0.1uF cap close to J20/G23 pin

HPS 1.5V(BANK 6)

HPS VCC3P3(BANK 7)

HPS VCC2P5(BANK 6) for VCCPGM

VCCA_FPLL

VCCINT_FPGA

VCC1P1_HPS

VCC3P3

VCC1P5_DDR3

VCCBAT

VCC_AUX

VCCINT_FPGA

VCC_AUX_SHARED

VCCINT_FPGA

VCC3P3

VCC2P5

VCCINT_FPGA

VCC3P3

VCCINT_FPGA

Title


Date: Sheet of



FPGA Decoupling B0


B


Title


Date: Sheet of



FPGA Decoupling B0


B


Title


Date: Sheet of



FPGA Decoupling B0


B


C2144.7n10V

C19147n16V

C1724.7n10V

C1404.7n10V

C1380.01u10V

C14622n16V

C224.7u6.3V

C1531u10V

C1132.2u6.3V

C1891u10V

C1264.7n10V

C14922n16V

C2070.47u6.3V

+ C91100u6.3V

C19247n16V

C1870.01u10V

C14547n16V

C1374.7n10V

C21022n16V

C2230.47u6.3V

C15122n16V

C1694.7n10V

C2210.1u6.3V

C2062.2u6.3V

C1860.01u10V

C1500.1u6.3V

C1600.01u10V

C2130.22u10V

+ C235100u6.3V

C1850.1u6.3V

C1640.01u10V

C1390.22u10V

C1760.47u6.3V

C1660.01u10V

C22222n16V

C2240.1u6.3V

C1834.7n10V

C18422n16V

C1714.7n10V

C1634.7n10V

C15847n16V

C1670.01u10V

C1520.1u6.3V

C12822n16V

C22647n16V

C1940.22u10V

C1744.7n10V

C1614.7n10V

C1200.01u10V

C1410.47u6.3V

C1680.01u10V

C1650.01u10V

+ C195100u6.3V

C1930.1u6.3V

C1430.01u10V

C21622n16V

C1090.01u10V

C1734.7n10V

C1570.1u6.3V

C1150.1u6.3V

C1624.7n10V

C1470.01u10V

C2080.47u6.3V

C1904.7n10V

C1700.01u10V

C1080.01u10V

C1240.01u10V

C1770.01u10V

C1480.01u10V

C17810u6.3V

C1274.7u6.3V

C15947n16V

C1101u10V

C1884.7n10V

+ C155330u2.5V

C1220.01u10V

C1251u10V

C15622n16V

C2114.7n10V

C1230.01u10V

+ C130100u6.3V

C2094.7n10V

C1290.01u10V

C1120.1u6.3V

C1210.01u10V

C1140.1u6.3V

C2154.7n10V

+ C90100u6.3V

C1424.7n10V

C1754.7n10V

C1110.1u6.3V

C2251u10V

C1440.01u10V

C20510u6.3V

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Place near MAX IIPlace near MAX II

Place Near CY7C68013A

Design Note:Plase assign USB_DISABLE_n to Weakly pull-upUSB_DISABLE_n Not use.

CAD Note:Place near XTALIN pin

HPS Reset

FPGA Configuration

JTAG Interface (off-page, to JTAG Chain)

To HDMI CEC

From Clock Generator

JTAG_RX

JTAG_TX

FX2_D_NFX2_D_P

FX2_PD4FX2_PD3

FX2_PD0FX2_PD1FX2_PD2

FX2_PD5FX2_PD6FX2_PD7

UB2_CLK

FX2_PB0FX2_PB1FX2_PB2FX2_PB3FX2_PB4FX2_PB5FX2_PB6FX2_PB7

USB_IFCLK

FX2_FLAGCFX2_FLAGB

FX2_WAKEUP

FX2_SLWRnFX2_SLRDn

FX2_FLAGA

FX2_SCLFX2_SDA

FX2_RESETn

FX2_SDA MAX_SDA

VBUS_VCC5

FX2_PA1FX2_PA2FX2_PA3FX2_PA4FX2_PA5FX2_PA6FX2_PA7

JTAG_RXJTAG_TX

FX2_FLAGC

FX2_PA3

FX2_PA2

FX2_PA4

FX2_PA7FX2_FLAGA

FX2_PB4

USB_DISABLE_nFX2_PB5

FX2_FLAGB

FX2_PA1FX2_PB0

FX2_PA6FX2_PB2

FX2_PB6

FX2_SCL

FX2_PB1FX2_PB3

FX2_PD4FX2_PD6

FX2_SLWRnFX2_SLRDn

FX2_PD5

FX2_PD7FX2_PA5

JTAG_Blaster_TDI

JTAG_Blaster_TDOJTAG_Blaster_TMS

JTAG_Blaster_TCK

HPS_WARM_RST_N

FPGA_CONF_DONE

HPS_RESET_N

USB_IFCLK

FX2_RESETn

FX2_PB7

MAX_SDA

C_USB_MAX_TCK

C_USB_MAX_TDO

C_USB_MAX_TMSC_USB_MAX_TDI

FX2_RESETn

FPGA_NCONFIG

JTAG_TRST

LED_CONF_DONE_N

LED_CONF_DONE_N

CLK_MAX_24CLK_UB2_24

CLK_MAX_24

UB2_CLK_OUT

UB2_CLK_OUT

KEY_WARM_RESET_N

COLD_RESET_N

KEY_COLD_RESET_N

HPS_USB_RESET

HPS_ENET_RESET_N

CLK_12MHz

FX2_PD0FX2_PD1FX2_PD2FX2_PD3 C_USB_MAX_TDO

C_USB_MAX_TCKC_USB_MAX_TMSC_USB_MAX_TDI

Blaster_TDIBlaster_TCK

Blaster_TMS

Blaster_TDO

USB_DISABLE_n

JTAG_Blaster_TCKJTAG_Blaster_TMS

JTAG_Blaster_TDIJTAG_Blaster_TDO

Blaster_TDI

Blaster_TCKBlaster_TMSBlaster_TDO

HPS_WARM_RST_N

VBUS_VCC5 FX2_WAKEUP

JTAG_TRST

C_USB_MAX_TCK

C_USB_MAX_TMS

VCC3P3

VCC3P3VCC3P3

VCC3P3VCC3P3 VCC1P8

VCC1P8

VCC3P3

VCC3P3

VBUS_VCC5 VCC3P3

VCC3P3VCC3P3

VCC3P3 VCC3P3

VCC3P3

FPGA_NCONFIG7

FPGA_CONF_DONE7

HPS_WARM_RST_N5,17

HPS_RESET_N5,17

JTAG_TRST5

CLK_UB2_246

JTAG_Blaster_TCK11

JTAG_Blaster_TDO11

JTAG_Blaster_TMS11

JTAG_Blaster_TDI11


COLD_RESET_N17

HPS_USB_RESET5,14

KEY_COLD_RESET_N17

KEY_WARM_RESET_N17

CLK_12MHz21

Title


Date: Sheet of



USB Blaster II B0


B


Title


Date: Sheet of



USB Blaster II B0


B


Title


Date: Sheet of



USB Blaster II B0


B


R224 0DNI

C520.1u16V

RN9 0

DNI

1234 5

678

R226 0

U21D

EPM570GF100C5N

GCLK2pF8

GCLK3pE10

DEV_CLRnK9

DEV_OEJ7

GCLK0pE2

GCLK1pE1TCK

H3

TDIH2 TMSJ1

TDOJ2

R25 1MC580.1u16V

R204 0DNI

R260 0

R73 2K

R93 560

C24 4.7n50V

LED11 LEDG2 1

C2650.1u16V

C550.1u16V

U21A

EPM570GF100C5N

GNDINTC5

GNDINTF5 GNDINTE6

GNDIOD5

GNDIOG7

GNDIOD7

GNDIOG5 GNDIOF6 GNDIOE5

GNDINTH5

VCCINTC6

VCCINTE7

VCCINTH6VCCINTF4

VCCIO2F7VCCIO2D6VCCIO2D4

VCCIO1E4

VCCIO1G4

VCCIO1G6RN1 0

1234 5

678

R72 10

R201 1K

U16

CY7C68013A_QFN

RDY01

RDY12

XTALIN5

AVCC3

DMINUS9

AGND6

VCC11

GND12

PD752

CLKOUT54

XTALOUT4

AVCC7

DPLUS8

AGND10

IFCLK13

RESERVED14

PD550PD449

PD651

SCL15

SDA16

PB018

GND26

GND28

GND41

PB119

PB321PB220

VCC17

VCC27

PB624PB523PB422

PD348PD247

PA740

PA437

PA134

PB725

PD146

WAKEUP44

PA639

GND53

VCC43

PA336

CTL130CTL029

PD045

RESET42

PA538

GND56

VCC55

PA235

PA033

CTL231

VCC32

EXPOSED_PAD57

U21B

EPM570GF100C5N

IO_B1_B1B1

IO_B1_C1C1

IO_B1_C2C2

IO_B1_D1D1

IO_B1_D2D2

IO_B1_D3D3

IO_B1_E3E3

IO_B1_F1F1

IO_B1_F2F2

IO_B1_F3F3

IO_B1_G1G1

IO_B1_G2G2

IO_B1_G3G3

IO_B1_H1H1

IO_B1_H4H4

IO_B1_H7H7

IO_B1_H8H8

IO_B1_J3J3

IO_B1_J4J4

IO_B1_J5J5

IO_B1_J6J6

IO_B1_J8J8

IO_B1_J9J9

IO_B1_K1K1

IO_B1_K10K10

IO_B1_K2K2

IO_B1_K3K3

IO_B1_K4K4

IO_B1_K5K5

IO_B1_K6K6

IO_B1_K7K7

IO_B1_K8K8

R199 0DNI

C2760.1u16V

R65 0

C570.1u16V

R219 0DNI

R261 0DNI

R223 0DNI

R94 120

U21C

EPM570GF100C5N

IO_B2_A1A1

IO_B2_A10A10

IO_B2_A2A2

IO_B2_A3A3

IO_B2_A4A4

IO_B2_A5A5

IO_B2_A6A6

IO_B2_A7A7

IO_B2_A8A8

IO_B2_A9A9

IO_B2_B10B10

IO_B2_B2B2

IO_B2_B3B3

IO_B2_B4B4

IO_B2_B5B5

IO_B2_B6B6

IO_B2_B7B7

IO_B2_B8B8

IO_B2_B9B9

IO_B2_C10C10

IO_B2_C3C3

IO_B2_C4C4

IO_B2_C7C7

IO_B2_C8C8 IO_B2_C9C9

IO_B2_D10D10

IO_B2_D8D8IO_B2_D9

D9 IO_B2_E8E8

IO_B2_E9E9

IO_B2_F10F10

IO_B2_F9F9

IO_B2_G10G10

IO_B2_G8G8

IO_B2_G9G9

IO_B2_H10H10IO_B2_H9H9

IO_B2_J10J10

RN10 01234 5

678

R195 1K

C430.1u16V

U27

TPD2EUSB30D-

2D+1

GND3

R200 0DNI

C600.1u16V

R218 0DNI

C610.1u16V

R70 10DNI

R206 10K

C2660.1u16V

C2490.1u16V

R227 0

R3820K

R64 2K

LED10 LEDY2 1

R95 120

VBUSD-D+ID

J13Mini-USB-B

12345

6789

U18

TLV809K33DBVRGND

1RESET

2VCC

3

C2700.1u16V

R225 0

C2480.1u16V

R39 10K

R221 0DNI

R78 10DNI

C5933p

DNI50V

LED12 LEDG2 1

R69100K

C2750.1u16V

C2540.1u16V

R222 0DNI

R205 0DNI

C2740.1u16V

C3140.1u16V

R710DNI

J19

2x5 Header DNI

1 23 45 67 89 10

C320.1u16V

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

JTAG Chain

FPGA JTAG INTERFACE

USB Blaster

HPS JTAG INTERFACE

HPS FPGA

JTAG_Blaster_TDO

JTAG_Blaster_TCK

JTAG_Blaster_TMS

JTAG_Blaster_TDI

HPS_TCK

HPS_TMS

HPS_TDO

FPGA_TMS

FPGA_TCK

FPGA_TDI

FPGA_TDO

HPS_TDI

VCC3P3VCC3P3

JTAG_Blaster_TMS10

JTAG_Blaster_TDI10

JTAG_Blaster_TCK10

JTAG_Blaster_TDO10

HPS_TCK5

HPS_TMS5

HPS_TDI5

HPS_TDO5

FPGA_TDI7

FPGA_TMS7

FPGA_TCK7

FPGA_TDO7

Title


Date: Sheet of



JTAG Chain B0


B


Title


Date: Sheet of



JTAG Chain B0


B


Title


Date: Sheet of



JTAG Chain B0


B


R153 0

R170 0

R160 0R271K

R151 0DNI

R152 0DNI

R261K

R168 0

R161 0

R162 0DNI

R154 0

R163 0

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Note : you can swap the signals on the OCT resistor array(include NC pin)

Note : you can only swap the DQ signals within x8 group (e.g. 0-7,8-15,16-23,24-31) on the DDR3 chips

DDR3 Interface (HPS)

CAD Note:Place close to DDR3 chip

HPS_DDR3_ADDR0HPS_DDR3_ADDR1HPS_DDR3_ADDR2HPS_DDR3_ADDR3HPS_DDR3_ADDR4HPS_DDR3_ADDR5HPS_DDR3_ADDR6HPS_DDR3_ADDR7HPS_DDR3_ADDR8HPS_DDR3_ADDR9HPS_DDR3_ADDR10HPS_DDR3_ADDR11HPS_DDR3_ADDR12HPS_DDR3_ADDR13HPS_DDR3_ADDR14

HPS_DDR3_DQ31HPS_DDR3_DQ30HPS_DDR3_DQ29HPS_DDR3_DQ28HPS_DDR3_DQ27HPS_DDR3_DQ26HPS_DDR3_DQ25HPS_DDR3_DQ24HPS_DDR3_DQ23HPS_DDR3_DQ22HPS_DDR3_DQ21HPS_DDR3_DQ20HPS_DDR3_DQ19HPS_DDR3_DQ18HPS_DDR3_DQ17HPS_DDR3_DQ16


HPS_DDR3_DM2HPS_DDR3_DM3

HPS_DDR3_CK_NHPS_DDR3_CKE

HPS_DDR3_CK_P

HPS_DDR3_CS_NHPS_DDR3_RESET_NHPS_DDR3_WE_NHPS_DDR3_RAS_NHPS_DDR3_CAS_N


HPS_DDR3_DM0HPS_DDR3_DM1

HPS_DDR3_ODT

HPS_DDR3_DQS_P0HPS_DDR3_DQS_N0HPS_DDR3_DQS_P1HPS_DDR3_DQS_N1

HPS_DDR3_DQS_P2HPS_DDR3_DQS_N2HPS_DDR3_DQS_P3HPS_DDR3_DQS_N3

HPS_DDR3_ZQ10 HPS_DDR3_ZQ00

HPS_DDR3_ADDR0HPS_DDR3_ADDR1HPS_DDR3_ADDR2HPS_DDR3_ADDR3HPS_DDR3_ADDR4HPS_DDR3_ADDR5HPS_DDR3_ADDR6HPS_DDR3_ADDR7HPS_DDR3_ADDR8HPS_DDR3_ADDR9HPS_DDR3_ADDR10HPS_DDR3_ADDR11HPS_DDR3_ADDR12HPS_DDR3_ADDR13HPS_DDR3_ADDR14

HPS_DDR3_CK_NHPS_DDR3_CKE

HPS_DDR3_CK_P

HPS_DDR3_CS_NHPS_DDR3_RESET_NHPS_DDR3_WE_NHPS_DDR3_RAS_NHPS_DDR3_CAS_N

HPS_DDR3_ODT

HPS_DDR3_DQ14HPS_DDR3_DQ13HPS_DDR3_DQ12HPS_DDR3_DQ11HPS_DDR3_DQ10HPS_DDR3_DQ9HPS_DDR3_DQ8HPS_DDR3_DQ7HPS_DDR3_DQ6HPS_DDR3_DQ5HPS_DDR3_DQ4HPS_DDR3_DQ3HPS_DDR3_DQ2HPS_DDR3_DQ1HPS_DDR3_DQ0

HPS_DDR3_DQ15

HPS_DDR3_CAS_NHPS_DDR3_WE_N

HPS_DDR3_ADDR10HPS_DDR3_ADDR12HPS_DDR3_BA1HPS_DDR3_ADDR1HPS_DDR3_ADDR4HPS_DDR3_ADDR6

HPS_DDR3_ADDR7HPS_DDR3_ADDR5HPS_DDR3_ADDR3HPS_DDR3_BA2HPS_DDR3_BA0HPS_DDR3_CS_NHPS_DDR3_ODT

HPS_DDR3_ZQ11 HPS_DDR3_ZQ01

HPS_DDR3_ODT1HPS_DDR3_CKE1HPS_DDR3_CS1_N HPS_DDR3_CS1_N

HPS_DDR3_CKE1HPS_DDR3_ODT1

HPS_DDR3_ODT1

HPS_DDR3_CS1_N

HPS_DDR3_CKE1

HPS_DDR3_CKE

HPS_DDR3_CK_NHPS_DDR3_CK_P

HPS_DDR3_RESET_N

HPS_DDR3_ADDR8

HPS_DDR3_ADDR14

HPS_DDR3_RAS_N

HPS_DDR3_ADDR11

HPS_DDR3_ADDR2

HPS_DDR3_ADDR0HPS_DDR3_ADDR9HPS_DDR3_ADDR13

VCC1P5_DDR3

DDR3_VREF_HPS

VCC1P5_DDR3

DDR3_VREF_HPS

VCC1P5_DDR3

DDR3_VREF_HPSVCC1P5_DDR3 DDR3_VREF_HPSVCC1P5_DDR3

VCC1P5_DDR3

DDR3_VTT_HPS DDR3_VTT_HPS



VCC1P5_DDR3

HPS_DDR3_BA[2..0]4

HPS_DDR3_DQS_N[3..0]4

HPS_DDR3_DQS_P[3..0]4

HPS_DDR3_DM[3..0]4

HPS_DDR3_DQ[31..0]4

HPS_DDR3_ADDR[14..0]4

HPS_DDR3_CK_P4

HPS_DDR3_CK_N4

HPS_DDR3_CKE4

HPS_DDR3_CS_N4

HPS_DDR3_RESET_N4HPS_DDR3_WE_N4

HPS_DDR3_RAS_N4

HPS_DDR3_CAS_N4

HPS_DDR3_ODT4

HPS_DDR3_CS1_N4

HPS_DDR3_CKE14HPS_DDR3_ODT14

Title


Date: Sheet of



HPS : DDR3 SDRAM B0


B


Title


Date: Sheet of



HPS : DDR3 SDRAM B0


B


Title


Date: Sheet of



HPS : DDR3 SDRAM B0


B


C2310.1u16V

V24

C974.7n50V

R114 240DNI

V17

V11

C2012.2n50V

C1042.2n50V

C2290.47u10V

V19

RN4

51

123456789

10111213141516

V20

V10

C1983.3n50V

R21 51DNI

CN10.1u1 2 3 4

5678

C1820.01u50V

C1180.47u10V

V15

V12

C1032.2n50V

C2300.1u16V

R115 240

V18

C993.3n50V

C1330.01u50V

C1540.1u16V

V30

C2032.2n50V

C1012.2n50V

RN5

51

123456789

10111213141516

V27

U6

IS43TR16256A-15HBL

VSSA9

VDDB2

NC3L1

UDMD3

VSSB3

VDDD9

VSSE1

VSSQB1

DQ0E3

LDME7

VSSQB9

VDDQA1

VDDQA8

DQ2F2

LDQSF3

DQ3F8

DQ1F7

VSSQD8VSSQD1

DQ6G2

LDQSnG3

VDDG7

VSSG8

VSSQE2

VREFDQH1

VDDQC1

DQ4H3

DQ7H7

DQ5H8

VDDQC9

VSSJ8

RASJ3

CLKJ7

VSSJ2

ODTK1

VDDK8

CASK3

CLK_nK7

CKEK9

CSL2

WEL3

A10/APL7

ZQL8

VSSM1

BA0M2

BA2M3

NC4L9

VREFCAM8

VSSM9

A3N2

A0N3

A12/BC_nN7

BA1N8

VSSP1

A5P2

A2P3 A1P7

A4P8

VSSP9

A7R2

A9R3

A11R7

A6R8

VSST1

A13T3

A8T8

VSST9

A14T7

VDDQD2

VDDQE9

VDDQF1

VDDQH2

VDDQH9

VDDK2

VDDN1

VDDN9

VDDR1

VDDR9

VSSQE8

VSSQF9

VSSQG1

VSSQG9

NC1J1

NC2J9

DQ8D7

DQ9C3

DQ10C8

DQ11C2

DQ12A7

DQ13A2

DQ14B8

DQ15A3

UDQSC7

UDQSnB7

RESETT2

NC5M7

C1970.1u16V

C1190.47u10V

C1022.2n50V

V4

V25

R150 240DNI

C1310.1u16V

CN30.1u1 2 3 4

5678

U11

IS43TR16256A-15HBL

VSSA9

VDDB2

NC3L1

UDMD3

VSSB3

VDDD9

VSSE1

VSSQB1

DQ0E3

LDME7

VSSQB9

VDDQA1

VDDQA8

DQ2F2

LDQSF3

DQ3F8

DQ1F7

VSSQD8VSSQD1

DQ6G2

LDQSnG3

VDDG7

VSSG8

VSSQE2

VREFDQH1

VDDQC1

DQ4H3

DQ7H7

DQ5H8

VDDQC9

VSSJ8

RASJ3

CLKJ7

VSSJ2

ODTK1

VDDK8

CASK3

CLK_nK7

CKEK9

CSL2

WEL3

A10/APL7

ZQL8

VSSM1

BA0M2

BA2M3

NC4L9

VREFCAM8

VSSM9

A3N2

A0N3

A12/BC_nN7

BA1N8

VSSP1

A5P2

A2P3 A1P7

A4P8

VSSP9

A7R2

A9R3

A11R7

A6R8

VSST1

A13T3

A8T8

VSST9

A14T7

VDDQD2

VDDQE9

VDDQF1

VDDQH2

VDDQH9

VDDK2

VDDN1

VDDN9

VDDR1

VDDR9

VSSQE8

VSSQF9

VSSQG1

VSSQG9

NC1J1

NC2J9

DQ8D7

DQ9C3

DQ10C8

DQ11C2

DQ12A7

DQ13A2

DQ14B8

DQ15A3

UDQSC7

UDQSnB7

RESETT2

NC5M7

C1002.2n50V

V7

V29

C1340.01u50V

V2

V9

V23

R146 4.7KDNI

C1350.01u50V

C2200.01u50V

C2042.2n50V

RN6

51

123456789

10111213141516

V8

R28 240

C1170.1u16V

C2280.47u10V

C870.47u10V

V6

CN20.1u1 2 3 4

5678 V14

C2024.7n50V

C2002.2n50V

V1

C980.1u16V

C2180.47u10V

C2330.01u50V

V28

R149 4.7K

C1992.2n50V

V16R132 100

V5

C2320.1u16V

V26

C1320.1u16V

V21

R22 2K

C1812.2n50V

C2190.1u16V

V3

C1052.2n50V

V22

V13

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SD Card Interface

Design Note:BUS-powered & Internal OSC

CAD Note:Place 0.1u near FT232R Chip pin.1 and pin.19

UART Interface

HPS_UART_RX

HPS_UART_RESET_N

HPS_UART_RESET_N

HPS_SD_DATA2HPS_SD_DATA0HPS_SD_DATA1

HPS_SD_DATA1

HPS_SD_DATA2HPS_SD_DATA3

HPS_SD_DATA0

HPS_SD_CMD

HPS_SD_CLK

FT232_DMFT232_DP

UART_TXLEDUART_RXLED

UART_PW_EN

HPS_UART_TX

HPS_CONV_USB_N

HPS_SD_DATA3

HPS_SD_CMD

VCC3P3_UARTUSB_UART_VBUS

VCC3P3_SD

VCC3P3_SD

VCC3P3 VCC3P3_SD

USB_UART_VBUS

USB_UART_VBUS

VCC3P3_UART

HPS_SD_CMD5

HPS_SD_CLK5

HPS_SD_DATA[3..0]5

HPS_UART_RESET_N17

HPS_UART_TX5

HPS_UART_RX5

HPS_CONV_USB_N5

Title


Date: Sheet of



HPS : UART to USB & SD CARD B0


B


Title


Date: Sheet of





B


Title


Date: Sheet of





B


C31 0.1u16V

R167 10K

R165 120

R77 10KDNI

R30 1M

R164 120

C2270.1u16V

123

11

45678

109

12

J11

Mic

ro S

D C

ard

Sock

etDAT3CMDVCCCLKVSSDAT0DAT1

DAT2

CD

VSS

VSS

CD2

R155 10k

R45 0

L7 30ohm, 3A

U20

ESD5V3U2UDNI

K11

K22

A3

C630.1u16V

C664.7u6.3V

TPD2E001DRLR

U8

VCC1

NC2

IO13

GND4

IO25

R157 4.7K

RXD LEDR2 1

RN2

10K

1234 5

678

R76 316K

R156 0

D3

SD107WS-TP

21

TXD LEDG2 1

C2170.1u16V

U22

ESD5V3U2UDNI

K11

K22

A3

L2 BEAD

C234.7u6.3V

R166 10k

U24

ESD5V3U2UDNI

K11

K22

A3

C1800.01u50V

J4

Mini-USB-BVBUS

1 D-2 D+3 ID4 GND5

SHIELD16 SHIELD27 SHIELD38 SHIELD49U12

FT232R

VCC19VCCIO1

GN

D4

RESET18

3V3OUT16

USBDP14

USBDM15

TXD30

RXD2

CTS#8 RTS#

32

DSR#6 DTR#

31

DCD#7

RI#3

CBUS022

NC15

AGN

D24

NC212

NC313

NC525

NC629

NC423

OSCI27

OSCO28

GN

D17

GN

D20

TEST26

CBUS121

CBUS311 CBUS210

CBUS49

EP_G

ND

33

C304.7u6.3VDNI

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

UBS PHY Interface (ULPI)

CAD Note:Place near XI pin

USB_DM

USB_CPEN

USB_DP

HPS_USB_DATA0HPS_USB_DATA1HPS_USB_DATA2HPS_USB_DATA3HPS_USB_DATA4HPS_USB_DATA5HPS_USB_DATA6HPS_USB_DATA7

HPS_USB_NXTHPS_USB_DIRHPS_USB_STP

USB_RBIAS

USB_VBUS

USB_ID

USB_EXTVBUS

HPS_USB_CLKOUT

HPS_USB_RESET

HPS_USB_RESET_N

CLK_USB_24

USB_VDD

USB_VDDAVCC3P3_USB

VCC3P3_USB

VCC5 USB_VCC5

VCC3P3

VCC5

USB_VCC5

VCC3P3 VCC3P3_USB USB_VDD USB_VDDA VCC5

HPS_USB_RESET5,10

HPS_USB_DATA[7..0]5

HPS_USB_RESET_N17

HPS_USB_CLKOUT5

HPS_USB_NXT5

HPS_USB_DIR5

HPS_USB_STP5

CLK_USB_246

Title


Date: Sheet of



HPS : USB3300 B0


B


Title


Date: Sheet of



HPS : USB3300 B0


B


Title


Date: Sheet of



HPS : USB3300 B0


B


C10633p

DNI50V

U26 TPD4S012

D+

1

D-

2

ID3

GN

D4

NC

5

VBU

S6

R15100K

C784.7u6.3V

C930.1u16V

C142.2u10V

R9910kDNI

R12212K

C34.7u6.3V

C960.1u16V

C92.2u10V

R1300DNI

Q1HE8050G

R17 1M

C790.1u16V

C800.1u16V

R111 560

C1160.1u16V

R131 0

L9

100ohm, 1.2AC950.1u16V

C850.1u16V

R13 820

C7 4.7n50V

R1004.99K

C50.1u16V

C940.1u16V

R14 0

U7

TPS2553DRVR

IN6

GND5

EN4

FAULT_n3

ILIM2

OUT1

EP_GND7

R102 22

R1620K

+ C6100u6.3V

R101 0

U3

USB3300

GND1

GND2

CPEN3

VBUS4

ID5

VDD

3P3

6

DP7DM8

RESET9

EXTVBUS10

NXT11

DIR12

STP13

CLKOUT14

VDD

1P8

15

VDD

3P3

16

DATA717 DATA618 DATA519 DATA420 DATA321 DATA222 DATA123 DATA024 VD

D3P

325

VDD

1P8

26

XO27

XI28

VDD

A1P8

29

VDD

3P3

30

REG_EN31

RBIAS32

GND_FLAG33

VBUS

D-

D+

ID

GND

Micro-USB AB

J2Micro USB-AB

123

5

76

4

8 9 10 11

C774.7u6.3V

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PHY Address is 00001

Ethernet PHY Interface (RGMII)

CAD Note:Place near XI pin

HPS_ENET_RESET_N

LED2_DUAL_1

LED2_DUAL_2

HPS_ENET_INT_NHPS_ENET_MDCHPS_ENET_MDIO

CLK125_NDO_LED_MODE

HPS_ENET_GTX_CLK

HPS_ENET_TX_EN

HPS_ENET_TX_DATA0HPS_ENET_TX_DATA1HPS_ENET_TX_DATA2HPS_ENET_TX_DATA3

HPS_ENET_RX_CLK

HPS_ENET_RX_DV

HPS_ENET_RX_DATA0HPS_ENET_RX_DATA1HPS_ENET_RX_DATA2HPS_ENET_RX_DATA3

CLK125_NDO_LED_MODEHPS_ENET_INT_NHPS_ENET_RESET_N

HPS_ENET_MDC

HPS_ENET_MDIO

LED2_DUAL_1

LED2_DUAL_2

HPS_ENET_RX_CLK

MDI_HPS_P0MDI_HPS_N0




LED2_DUAL_1

LED2_DUAL_2

MDI_HPS_P0

MDI_HPS_N0

MDI_HPS_P1

MDI_HPS_N1

MDI_HPS_P2

MDI_HPS_N2

MDI_HPS_P3

MDI_HPS_N3

HPS_ENET_RX_DV

HPS_ENET_GTX_CLK

HPS_ENET_RX_DATA0

HPS_ENET_RX_DATA1

HPS_ENET_RX_DATA2

HPS_ENET_RX_DATA3

CLK_ENET_25

HPS_ENET_LDO_O

HPS_ENET_LDO_O

ENET_PLL

VCC1P2

VCC1P2 ENET_PLL

ENET_VCCA

ENET_VCCA

VCC1P2 ENET_DVDDL

VCC3P3 ENET_AVDD

ENET_DVDDL

VCC3P3

VCC3P3

VCC3P3

ENET_AVDD

VCC3P3

VCC3P3 ENET_DVDDH

ENET_DVDDH

ENET_DVDDHENET_AVDD VCC1P2

HPS_ENET_GTX_CLK5

HPS_ENET_RX_CLK5

HPS_ENET_TX_EN5

HPS_ENET_MDC5


HPS_ENET_MDIO5

HPS_ENET_TX_DATA[3..0]5

HPS_ENET_RX_DATA[3..0]5

HPS_ENET_RX_DV5

HPS_ENET_INT_N5

CLK_ENET_256

Title


Date: Sheet of



HPS : Gagabit Ethernet B0


B


Title


Date: Sheet of





B


Title


Date: Sheet of





B


C62 10n

DNI50VR83

0DNI

C2591u10V

R88 220

L19

100ohm, 1.2A

R182 4.7KDNI

R185 4.7KDNI

C2501u10V

R60 4.7K

L14

100ohm, 1.2A

R220 4.7KDNI

R85 49.9DNI

R203 4.7K

C51 10n

DNI50V

R183 4.7KDNI

R67 4.7KDNI

C65 10n

DNI50V

C56 10n

DNI50V

C2580.22u50V

R42 4.7KDNI

R84 12.1K

C2550.22u50V

R75 49.9DNI

R63 49.9DNI

R80 4.7KDNI

R81 4.7K

R74 4.7K

C26710u6.3V

C47 0.01u50V

R43 220

Q5

AO3415DNI

U17

KSZ9031RNX

AVD

DH

1

TXRXP_A2

TXRXM_A3

AVD

DL

4

TXRXP_B5

TXRXM_B6

TXRXP_C7

TXRXM_C8

AVD

DL

9

TXRXP_D10

TXRXM_D11

AVD

DH

12

VSS_

PS13

DVD

DL

14

LED2/PHYAD115

DVD

DH

16

LED1/PHYAD017

DVD

DL

18

TXD019

TXD120

TXD221

TXD322

DVD

DL

23

GTX_CLK24

TX_EN25

DVD

DL

26

RXD3/MODE327 RXD2/MODE228

VSS

29

DVD

DL

30

RXD1/MODE131 RXD0/MODE032

RX_DV/CLK125_EN33

DVD

DH

34

RX_CLK/PHYAD235

MDC36

MDIO37

INT_N38

DVD

DL

39

DVD

DH

40

CLK125_NDO/LED_MODE41

RESET_N42

LDO

_O43

AVD

DL_

PLL

44

XO45

XI46

AVD

DH

47

ISET48

PAD

DLE

49

R61 4.7K

C2510.22u50V

R196 4.7K

C24210u6.3V

R62 49.9DNI

C26910u6.3V

R51 4.7K

R79 4.7K

R50 4.7K

R46 10J10

8207S-810X4372

GND11

GND210

MD(1)+4

MD(1)-5

MD(3)+8

MD(3)-9

LEDG+11

LEDG-12

LEDY+13

LEDY-14

SHIELD_216

MD(0)+2

MD(0)-3

MD(2)+6

MD(2)-7

SHIELD_115

C24010u6.3V

R197 1K

R228 1K

R52 49.9DNI

C26810u6.3V

R82 0

L20

100ohm, 1.2AC2561u10V

C2410.22u50V

R68 49.9DNI

R41 4.7KDNI

R173 4.7K

R66 4.7KDNI

L18

100ohm, 1.2A

R86 49.9DNI

R181 1KDNI

C2431u10V

R53 49.9DNI

C6433p

DNI50V

R184 4.7KDNI

C2570.22u50V

R202 4.7K

C2391u10V

L15

100ohm, 1.2A

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Digital Accelerometer

Tie CS_n to high to I2C mode only

Default : I2C Address 0xA6/0xA7

LTC 2x7 Connector

Accelerometer Interface

LTC Interface

HPS_I2C0_SDAT

HPS_GSENSOR_INT

HPS_I2C0_SCLK

SCK_SCLSCK_SCL_R

HPS_I2C1_SDAT_RHPS_I2C1_SCLK_R

HPS_LTC_GPIO_R

CSnMISOMOSI_SDA

HPS_LTC_GPIO


CSn

HPS_SPIM_MISOMISO

HPS_SPIM_SS

HPS_LTC_GPIO

HPS_SPIM_CLK

HPS_I2C1_SCLK

MOSI_SDA

SCK_SCL

HPS_SPIM_MOSI

HPS_I2C1_SDAT

CODEC_SEL

VCC_VS

VCC3P3

VCC3P3

VCC_Gsensor

VCC_Gsensor

VCC_Gsensor

VCC9 VCC3P3

VCC3P3

VCC3P3

VCC3P3

VCC3P3

VCC3P3

VCC3P3

HPS_I2C0_SDAT5

HPS_GSENSOR_INT5

HPS_I2C0_SCLK5

HPS_I2C1_SCLK5

HPS_SPIM_MOSI5

HPS_SPIM_CLK5

HPS_SPIM_SS5

HPS_I2C1_SDAT5

HPS_LTC_GPIO5

HPS_SPIM_MISO5

Title


Date: Sheet of



HPS : Accelerometer, LTC Connector B0


B


Title


Date: Sheet of





B


Title


Date: Sheet of





B


COM1 NC1

NO1

NO2

NC2COM2

NO3

NC3COM3

NO4

NC4COM4

IN

ENGND

V+

H:COM=NO:COM=NCL

U2

TS3A5018

8

16

11

14

5

2

3

6

10

13

4

7

9

12

115

R1902.2K

L16 BEAD

C2614.7u6.3V

R106 0

R1932.2K

R187 0

R116 0

R1912.2K

C2630.1u16V

R103 0

J17

2x7 Header

1 23 45 67 89 10

11 1213 14 C81

0.1u16V

U19

ADXL345

VDD1

GND2

RESERVED3

GND4

GND5

VS6

CS_n7

INT18INT29NC10RESERVED_111SDO_ALT_ADDRESS12SDA_SDI_SDIO13SCL_SCLK14

C2620.1u16V

R11210KDNI

R59 0

C760.1u16V

C2641u25V

R188 0DNI

C860.1u16V

R1892.2KDNI

R19210KDNI

R1862.2K

R104 0

R58 0

C2601u25V

R113 0

L21 BEAD

R107 0

R198 2.2KDNI

R105 0DNI

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

HPS User Button HPS User LED

HPS Cold Reset

HPS Warm Reset

HPS Cold Reset

HPS Warm Reset

HPS Key and LED

KEY_COLD_RESET_NHPS_ENET_RESET_N

HPS_UART_RESET_N

HPS_RESET_NCOLD_RESET_N

KEY_WARM_RESET_N

HPS_LED

HPS_KEY

HPS_USB_RESET_N

HPS_WARM_RST_N

VCC3P3

VCC3P3VCC3P3

VCC3P3

VCC3P3

HPS_ENET_RESET_N5,10,15,17

HPS_UART_RESET_N13HPS_USB_RESET_N14

HPS_RESET_N5,10

HPS_WARM_RST_N5,10

HPS_KEY5

HPS_LED5

HPS_USB_RESET5,10,14

HPS_ENET_RESET_N5,10,15,17

COLD_RESET_N10

KEY_COLD_RESET_N10

KEY_WARM_RESET_N10

Title


Date: Sheet of



HPS : BUTTON and LED B0


B


Title


Date: Sheet of





B


Title


Date: Sheet of





B


U30

TPS3831K33GND

3

RESET1

MR2

VDD4

TP5

C2780.1u16V

R214 0

R216 0DNI

R210 4.7K

LED13 LEDG2 1

C2731u10V

KEY3

TACT SW

4 3

21

R96 330

KEY2

TACT SW

4 3

21

R213 0

R211100K

R212100KDNI

R215100K

U31

TPS3831K33GND

3

RESET1

MR2

VDD4

TP5

R217 0

R209100KDNI

R208100K

KEY4

TACT SW

4 3

21

C2770.1u16V

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ADC

Analog input interface

ADC_CH1

ADC_CH2

ADC_CH3

ADC_CH5

ADC_CH6

ADC_CH7

ADC_CH0ADC_IN0

ADC_CH4

ADC_VREF

ADC_REFCOMP

ADC_DC_BIAS

ADC_DC_BIAS

ADC_CH0

ADC_CONVST

ADC_SDI

ADC_SCK

ADC_SDO

Arduino_VREF

ADC_IN1

ADC_IN2

ADC_IN3

ADC_IN4

ADC_IN5

ADC_IN6

ADC_IN7

ADC_CH1

ADC_CH2

ADC_CH3

ADC_CH4

ADC_CH5

ADC_CH6

ADC_CH7

VCC5_ADC VCC5_ADC

VCC3P3

VCC5ADC_SDO7

ADC_CONVST7

ADC_SCK7

ADC_SDI7

ADC_IN[7..0]19

Arduino_VREF19

Title


Date: Sheet of



FPGA : ADC1 - LTC2308 for ADC Header Analog input B0


B


Title


Date: Sheet of





B


Title


Date: Sheet of





B


R235 49.9

R231 49.9

R234 49.9

C29810u10V

R229 49.9

C2881n50V

C29510u10V

C2962.2u10V

R236 49.9

R240 0DNI

C2841n50VDNI

C28610u10V

C2811n50VDNI

R974.99K

C2801n50V

L22 30ohm, 3A

R984.99K

C2821n50V

C2850.1u16V

C2940.1u16V

R2390

C2891n50VDNI

VCC5_ADC

R237 100

R233 49.9

C2931n50VDNI

C2791n50V

R232 49.9

C2831n50V

C2970.1u16V

C2921n50V

CH0

CH1

CH2

CH3

CH4

CH5

CH6

CH7

COM

GN

D

GN

D

GN

D

GN

D

GN

DG

ND

VREF

REFCOMP

SDI

SCK

SDO

CONV

DVD

D

OVD

D

AVD

D1

AVD

D1

U32

LTC2308CUF

22

23

24

1

2

3

4

5

6

25 9 10 11 20 18

7

8

15

16

17

14

12131921

R238 0

R230 49.9

C2900.1u16V

C2911n50V

R241 49.9

C731u10V

C2871n50V

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

JP6

Pin.1

JP2

Pin.1

JP3

Pin.1

JP5

Pin.1

JP4

Pin.1

Arduino Pin out

MOSIMISOSCK

SS

SCLSDA

GPIO

Arduino Digital Interface

Arduino UNO Rev3

Analog input interface

ADC Header

GPIO 0 Header

Clock_inClock_in

GPIO 1 Header

Clock_inClock_in

Arduino_VREF

Arduino_Reset_n

Arduino_IO0Arduino_IO1Arduino_IO2Arduino_IO3Arduino_IO4Arduino_IO5Arduino_IO6Arduino_IO7

Arduino_IO8Arduino_IO9Arduino_IO10Arduino_IO11Arduino_IO12Arduino_IO13

ADC_IN0



Arduino_Reset_nArduino_IO13


Arduino_Reset_n

ADC_IN0ADC_IN1ADC_IN3ADC_IN5ADC_IN7

ADC_IN2

ADC_IN6ADC_IN4


GPIO_0_D30

GPIO_0_D6


GPIO_0_D8


GPIO_0_D24

GPIO_0_D14

GPIO_0_D22


GPIO_0_D20


GPIO_1_D0


GPIO_1_D1

GPIO_1_D30


GPIO_1_D14

GPIO_1_D2

GPIO_1_D10


GPIO_1_D22

GPIO_1_D3

GPIO_1_D24


GPIO_1_D19

GPIO_1_D12


GPIO_1_D25

GPIO_1_D26

GPIO_1_D20



GPIO_1_D17

GPIO_1_D27

GPIO_1_D35

GPIO_1_D28 GPIO_1_D29

GPIO_0_D11


GPIO_0_D9GPIO_0_D7

GPIO_0_D15

GPIO_0_D23

GPIO_0_D13


GPIO_0_D25

GPIO_0_D33


GPIO_0_D35

GPIO_0_D27ADC_IN1ADC_IN2ADC_IN3ADC_IN4ADC_IN5

VCC5VCC3P3

VCC3P3

VCC5

VCC9

VCC5

VCC3P3

VCC5

VCC3P3

VCC5

Arduino_IO[15..0]3

Arduino_Reset_n3

ADC_IN[7..0]18Arduino_VREF18

GPIO_0_D[35..0]3,6,7

GPIO_1_D[35..0]3,6

Title


Date: Sheet of



FPGA : GPIO, ADC & Arduino Expansion Header B0


B


Title


Date: Sheet of





B


Title


Date: Sheet of





B


JP1

2x20 Header

11

22

33

44

55

66

77

88

99

1010

1111

1212

1313

1414

1515

1616

1717

1818

1919

2020

2121

2222

2323

2424

2525

2626

2727

2828

2929

3030

3131

3232

3333

3434

3535

3636

3737

3838

3939

4040

R4010K

JP2

1x10 Header

12345678910

R12.2KDNI

R22.2KDNI

JP5

1x8 Header

12345678

J15

2x5 Header

1 23 45 67 89 10

JP6

1x6 Header

123456

JP7

2x20 Header

11

22

33

44

55

66

77

88

99

1010

1111

1212

1313

1414

1515

1616

1717

1818

1919

2020

2121

2222

2323

2424

2525

2626

2727

2828

2929

3030

3131

3232

3333

3434

3535

3636

3737

3838

3939

4040

JP4

2x3 Header DNI

1 23 45 6

JP3

1x8 Header

12345678

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

KEY

LED

SWITCH

LED0LED1LED2LED3

KEY0BTN1BTN0

KEY1

SW1SW0

SW3SW2

LED4LED5LED6LED7

VCC3P3 VCC3P3

VCC3P3

VCC3P3 VCC3P3

VCC3P3VCC3P3KEY[1..0]3

LED[7..0]3

SW[3..0]3

Title


Date: Sheet of



FPGA : LED, KEY, SW B0


B


Title


Date: Sheet of





B


Title


Date: Sheet of





B


SW1

SLIDE SW

123

4

5

U29

SN74AUC17

1A1

2A3

3A5

4A9

5A11

6A13

1Y2

2Y4

3Y6

4Y8

5Y10

6Y12

GND7

VCC14

ETP15

C721u10V

KEY0

TACT SW

4 3

21

C711u10V

KEY1

TACT SW

4 3

21

C2710.1u16V

SW2

SLIDE SW

123

4

5

RN3

120

1234 5

678

RN7

120

1234 5

678

SW3

SLIDE SW

123

4

5

LED7 LEDG2 1

LED6 LEDG2 1

LED5 LEDG2 1

LED4 LEDG2 1

LED0 LEDG2 1

LED3 LEDG2 1

LED2 LEDG2 1

LED1 LEDG2 1

R90100K

SW0

SLIDE SW

123

4

5

R89100K

RN8

120

1234 5

678

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

HDMI TX

Default : I2C Address 0x72/0x73

HDMI TX

HDMI Audio Interface

From MAX

I2C Interface

Note:Place Capacitor near ADV7513 DVDD pins

Note:Place Capacitor near ADV7513 AVDD pins

Note:Place Capacitor near ADV7513 PVDD and BGVDD pin

Note:Place Capacitor near ADV7513 DVDD_3V

TMDS_TX_p1TMDS_TX_n1TMDS_TX_p2TMDS_TX_n2

TMDS_TX_p0TMDS_TX_n0


TMDS_TX_p1TMDS_TX_n1 TMDS_TX_n1

TMDS_TX_p1

TMDS_TX_p2TMDS_TX_n2 TMDS_TX_n2

TMDS_TX_p2

TMDS_TXC_pTMDS_TXC_n TMDS_TXC_n

TMDS_TXC_p

HDMI_TX_D0HDMI_TX_D1HDMI_TX_D2HDMI_TX_D3HDMI_TX_D4HDMI_TX_D5HDMI_TX_D6HDMI_TX_D7

HDMI_TX_D8

HDMI_TX_D16

HDMI_TX_CLKHDMI_TX_DE

HDMI_TX_VSHDMI_TX_HS

HDMI_SDAHDMI_SCL

DDCSCLDDCSDA

CEC

HDMI_TX_D9

HDMI_HPD

HDMI_TX_D10HDMI_TX_D11HDMI_TX_D12HDMI_TX_D13HDMI_TX_D14HDMI_TX_D15

HDMI_TX_D17HDMI_TX_D18HDMI_TX_D19HDMI_TX_D20HDMI_TX_D21HDMI_TX_D22HDMI_TX_D23

TMDS_TXC_pTMDS_TXC_n


DDCSDADDCSCLCEC_IO

HDMI_HPD

CEC_CLK

CEC_CLK

HDMI_MCLK

HDMI_I2S0

HDMI_SCLKHDMI_LRCLK

CECDDCSCL

DDCSDAHDMI_HPD

HDMI_TX_INT

CLK_12MHz

HDMI_I2C_SCL

HDMI_I2C_SDA HDMI_SDA

HDMI_SCL

VCC1P8 VCC1P8_DVDD

VCC1P8 VCC1P8_AVDD

VCC1P8 VCC1P8_PVDD

VCC3P3

VCC1P8_DVDD

VCC3P3_DVDD

VCC1P8_PVDD

VCC1P8_AVDD

VCC3P3_DVDD

VCC5

VCC3P3_DVDD

VCC1P8_AVDD

GND_EXT

VCC5

VCC3P3

VCC3P3

HDMI_I2C_SDA6,7

CLK_12MHz10

HDMI_I2C_SCL6,7

HDMI_I2S07HDMI_MCLK7

HDMI_LRCLK7

HDMI_SCLK7

HDMI_TX_INT7

HDMI_TX_D[23..0]3,6

HDMI_TX_CLK6

HDMI_TX_HS6

HDMI_TX_VS6HDMI_TX_DE6

Title


Date: Sheet of



HDMI TX B0


B


Title


Date: Sheet of



HDMI TX B0


B


Title


Date: Sheet of



HDMI TX B0


B


R249 10K

R2480

C3020.1u16V

C3060.1u16V

C30910u6.3V

D5 RClamp0514P

1

84

6

392

57

10

L26 10uH

74479777310

L25 10uH

74479777310 C3100.1u16V

R2564.7K

R253 887

D6DFLS1150-7DNI

R2470

R2432K

C3080.1u16V

U33

ADV7513BSWZ

D062

D161

D260

D359

D458

D557

D656

D755

D854

D952

D1050

D1149

D1248

D1347

D1446

D1545

D1644

D1743

D1842

D1941

D2040

D2139

D2238

D2337

CLK53

DE63

HSYNC64

VSYNC2

R_EXT14

HPD16

SPDIF3

MCLK4

I2S05

I2S16

I2S27

I2S38

SCLK9

LRCLK10

PD22

TXC+18

TXC-17

TX0+21

TX0-20

TX1+24

TX1-23

TX2+27

TX2-26

INT28

SDA36

SCL35

DDCSDA34

DDCSCL33

CEC30

CEC_CLK32

DVDD_3V29

DVDD11

DVDD211

DVDD331

DVDD451

PVDD12

BGVDD13

AVDD115

AVDD219

AVDD325

EPAD_GND65

C299 0.1u25V

C30510u6.3V

L24 10uH

74479777310

R244 0DNI

C3070.1u16V

R246 2K

R254 2K

U34

TPD4E001_0

13246

5

C3010.1u16V

R252 22DNI

R24227KDNI

C3130.1u16V

R245 2K

C3040.1u16V

C3110.1u16V

R2574.7K

L23 10uH

74479777310

SHELL

GND

CEC

D2-

D1-

CK-

D1+

D0+

SDA

CK+

GND

GND

GND

D0-

D2+

+5V

GND

HPD

SCL

J18

1

23

4

56

7

89

10

1112

13151617

1819

20212223R250 49.9DNI

C30010u6.3V

R255 2KDNI

R258 22

C3030.1u16V

D4 RClamp0514P1

84

6

392

57

10

R251 1M

C31210u6.3V

R259 22

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Ramp TimeTsoft-start = 1 msec1.1V / 5.5A

DC 5V Power Input

Overvoltage Protection Threshold Voltage : 5.45V

VCC1P1_PGOOD

VCC5

VCC5

VCCINT_FPGA

VCC1P1_HPS

VCC5

VCC1P1_PGOOD 23

Title


Date: Sheet of



Power - 1.1V, 5V B0


B


Title


Date: Sheet of



Power - 1.1V, 5V B0


B


Title


Date: Sheet of



Power - 1.1V, 5V B0


B


FID9

R37180K

FID12 FID3

D2

BZX84C5V1

3

21

FID7 FID4

R35100K

LED8LEDBDNI

21

FID1 FID10

C25

10u10V

R141100K

FID2

R91120DNI

FID8

Q4HE8550G

R36150K

FID11

C20

10u10V

LTC3616

U10

RT/SYNC2

SW8PVIN

10

PVIN11

SVIN18

RUN19

PGOOD20

MODE21

ITH23

TRACK/SS24

SRLIM/DDR1

SGN

D3

SW5

SW6

SW13

VFB22

PGN

D_E

PAD

25

PVIN4

SW7

SW14

SW15

SW16

PVIN17

PCB

MPB-3266-B0

C26

10u10V

MH1

R3310K

Q3AO3415

FID5

R12930K

R1286.8K

MH2

+ C12

2.5V330u

12

MH4

R14230K

R148 6.8K

MH3

R145330

C9247u10V

C3922p

C179100u6.3V

L1

330nH

1 2

Q2AO3415

C21

10u10V

J14 DC_5V123

VCC1P1

VCC5

FID6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Ramp TimeTsoft-start = 1 msec3.3V / 3A

Ramp TimeTsoft-start = 1 msec2.5V / 3A

VCC1P1_PGOOD

VCC1P1_PGOOD

VCC3P3

VCC5

VCC2P5

VCC5

VCC5

VCC5

VCC1P1_PGOOD 22

Title


Date: Sheet of



Power - 2.5V, 3.3V B0


B


Title


Date: Sheet of



Power - 2.5V, 3.3V B0


B


Title


Date: Sheet of



Power - 2.5V, 3.3V B0


B


R23165K

C15

22p

C33

10u10V

+ C1966.3V100u

12

C34

10u10V

R17952.3K

R2436.5K

R92240

VCC3P3

C10

10u10V

C11

10u10V

R18 100KDNI

R19 0

VCC2P5

C38

10u10V

R32 0

+ C176.3V100u

12

L6

470nH

1 2

L3

470nH

1 2

C45

47u6.3V

C19

10u10V

LTC3612EUDC#TRPBF

U9

RT/SYNC2

PVIN_18

PVIN_29

PVIN_DRV13

SVIN14

RUN15

PGOOD16

MODE17

ITH19

TRACK/SS20

DDR1

SGN

D3

SW_15

SW_26

SW_311

SW_412

VFB18

PGN

D_E

PAD

21+ C44

6.3V100u

12

LTC3612EUDC#TRPBF

U13

RT/SYNC2

PVIN_18

PVIN_29

PVIN_DRV13

SVIN14

RUN15

PGOOD16

MODE17

ITH19

TRACK/SS20

DDR1

SGN

D3

SW_15

SW_26

SW_311

SW_412

VFB18

PGN

D_E

PAD

21

LED9LEDB

21

C238

22p

C16

10u10V

R180165K

C18

100u6.3V

R31 100KDNI

C37

10u10V

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

1.2V / 1.1ARamp Time = 0.8msec

1.8V / 1.1ARamp Time = 1.2 msec

1.5V / 2.2ARamp Time = 1.27 msec

HPS DDR3 VTT, VREF

9V / 1A

VCC5 VCC9

VCC1P2VCC2P5

VCC3P3

VCC1P8VCC2P5

VCC3P3

VCC2P5

VCC2P5

VCC1P5_DDR3

VCC3P3

VCC1P5_DDR3

DDR3_VTT_HPS DDR3_VREF_HPS

VCC2P5

Title


Date: Sheet of



Power - 1.2V, 1.5V, 1.8V, 9V B0


B


Title


Date: Sheet of



Power - 1.2V, 1.5V, 1.8V, 9V B0


B


Title


Date: Sheet of



Power - 1.2V, 1.5V, 1.8V, 9V B0


B


C28

22u

+ C136.3V100u

12

C2724.7n

C88

1n

LT3080

U4

OUT11

OUT22

OUT33

SET4

IN28 IN17

NC6

V_CONTROL5

OUT49

C5322u

C424.7u

VCC1P5_DDR3

LT3080

U5

OUT11

OUT22

OUT33

SET4

IN28 IN17

NC6

V_CONTROL5

OUT49

C691u

LT3080

U14

OUT11

OUT22

OUT33

SET4

IN28 IN17

NC6

V_CONTROL5

OUT49

R44 100K

C6722u

D1

DFLS230-7

2 1

C13647u

VCC9

R133

75K

C4

1u

C740.1u

C481u

DDR3_VREF_HPS

U25

LT35803

VIN

SHDN5

RT6

SYNC8

SS7

GN

D_E

P9

4

SW

FB1

VC2

C1

1u

L8

2.2uH

1 2

C2344.7n

C682.2u

C29

10u

R194

2KC461u

R207120K

C107

0.01u C27

22u

C84

10u10V

R20

1K

C701u

TPS51200

REG1

REFIN1

VLDOIN2

VO3

VOSNS5

VIN10

PGOOD9

GN

D8

EN7

REFOUT6

GN

D_P

AD11

PGN

D4

C8

1u

C2

1u

C542.2u

R10993.1K

C212

22u

DDR3_VTT_HPS

R11020K

C75

10u16V

C83

47p

R10835.7K

R34

10K

R87

2K

L5 BEAD

VCC1P2

C41

0.1u

C820.1u

VCC1P8

R172180K

LT3080

U23

OUT11

OUT22

OUT33

SET4

IN28 IN17

NC6

V_CONTROL5

OUT49

R29 10K

C36

1n

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