d0301-014 final engineering f.port for the medium
TRANSCRIPT
D0301-014
FINAL ENGINEERING _F.PORT
FOR THE
MEDIUM RESOLUTION INFRA-RED (MRIR) EXPERIMENT
ENGINEERING MODEL DIGITAL ELECTRONICS TELEMETRY UNIT
FOR
NIMBUS "B"
1 November 1965 - 1 April 1966
CONTRACT NO. NAS5-9699
Prepared by
CALIFORNIA COMPUTER PRODUCTS, INC.
305 North Muller Street
Anaheim, California
For
GODDARD SPACE FLIGHT CENTER
Greenbelt, Maryland
D0301-014
SUMMARY
The object of this report is to describe in detail the
overall design aspects of the Engineering Model MRIR
Telemetry Unit, and to present design information onthe Bench Test Equipment which was modified for the
MRIR Telemetry Unit. The Bench Test Equipment was origi-
nally designed and fabricated for the MRIR Telemetry Unit
contained in the NIMBUS "C" Spacecraft.
The final engineering design report is intended to estab-
lish information on the telemetry unit operation, to
define engineering problems uncovered during functional
testing, and to recommend improvements to be incorporated
into succeeding units. Data pertinent to maintaining the
MRIR Telemetry Unit is also presented within this report.
The finished Engineering Model MRIR Telemetry Unit had
slight deviations from the information presented in the
Design Study Report, CalComp Document D0301-013, dated
31 December 1965. The deviations, electrical in nature,
were brought about because of problems uncovered during
fanctional test. These problems involved circuit changes
or logic changes. These were as follows:
a. Noise pulses on the second stage flip-flop
input of the commutation ring counter.
i,_:CELTigG F'F\G E ..........
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b. 200-kc input filter network.
c. A/D Converter comparator amplifier compensation.
d. A/D Converter precision operational amplifier
compensation.
e. MOS-FET device failures during functional test.
Solutions and recommendations pertaining to these problems
are explained in the main test of this report.
The initial engineering model design approach was straight-
forward and relatively complete. Except for. necessary
changes to ensure reliable operation, only two recommenda-
tions are made as improvements. One improvement recommenda-
tion is the availability of two MOS-FET devices per analog
input channel (requires two additional TO-5 packages), and
the other improvement is to provide better noise isolation
on the second stage comg.utation ring counter.
The functional test of the Engineering Model MRIR Telemetry
Unit was performed with the aid of the modified NIMBUS "C"
Bench Test Equipment. The BTE provided the input signals
and captured the responses which were processed to provide
visual inspection capability for determining the operation
of the telemetry unit. Inasmuch as the BTE was used to
test the telemetry unit, the very act of its testing capa-
bility provided data which indicated that the BTE was per-
forming in a manner which constituted acceptance of its own
operability. Therefore, the modification to the BTE has
been tested through actual use of the equipment.
iv
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In concluding this summary, it is felt that the Engineering
Model MRIR Telemetry Unit and the Bench Test Equipment meet
the requirements of the GSFC-NASA specification for the
Medium Resolution IR (MRIR) Experiment Engineering Model
for the NIMBUS "B" Spacecraft. The design, fabrication,
assembly, and testing of the telemetry unit did not present
any major problems that could not be simply and easily
rectified. The mechanical design is complete and all parts
were assembled without any modifications being required.With the inclusion of the suggested recommendations, pro-
totype and flight model telemetry units may be constructed
and tested in the same manner as the Engineering Model MRIRTelemetry Unit. The BTE and its new modifications have
been checked out and found to be sufficient for testing
the telemetry unit. No further additions or modifications
are to be incorporated into the BTE.
V
D0301-014
TABLE OF CONTENTS
Section Title
l • INTRODUCTION ..............
1.1
1.2
1.3
1.4
Scope ...............
History of Contract NAS5-9699
Engineering Model Telemetry
Unit General Description .....
Bench Test Equipment
General Description ........
i-I
i-i
I-i
1-6
1-7
• ELECTRONIC REVIEW ...........
2.1 Printed Circuit Boards ......
2 .i .i
2.1.2
2.1.3
2 .i .6
Analog Input -25-KC Generator Board
Analog/Digital
Converter Board ......
Analog/Digital
Data Control ........
Encode-Timing Generator
Frame Sync and
Data Output ........
DC/DC Converter
Nos. 1 and 2 ........
2.2 Grounding Scheme and
Voltage Distribution
2-6
2-9
2-11
2-13
2-13
2-13
2-13
v1
D0301-014
TABLE OF CONTENTS (continued)
Section Title
2.3
2.4
2.5
Telemetry Points .......... 2-15
Electrical Precautionary Measures. 2-17
Electronic Design Recommendations. 2-17
o MECHANICAL DESIGN ............ 3-1
3.1 Engineering Model
MRIR Telemetry Unit ......... 3-1
3.1.1 Package Layout ........ 3-1
3.1.2 Physical Parameters ..... 3-3
3.1.3 Center of Gravity ...... 3-5
3.1.4 Mechanical Design
Recommendations ....... 3-5
3.2 Bench Test Equipment ........ 3-7
.
.
SYSTEM TEST AND OPERATION ........ 4-1
4.1 System Temperature Cycle Test .... 4-1
4.2 MRIR Telemetry Unit Interface. . . 4-1
4.3 MRIR Telemetry Timing Diagram. . 4-2
4.4 Interconnection Diagram ...... 4-9
NEW TECHNOLOGY ..............
5.1 Results of Contractor's Review .
vii
D0301-014
TABLE OF CONTENTS (continued)
Section Title
. B IBL I OGRAPHY ..............
6.1 Technical Reports
and Manuals ............
Monthly Progress Reports .....
Functional Test Specifications.
6-1
6-1
6-3
6-4
Appendix Title
n.
So
C •
DQ
MRIR TELEMETRY UNIT
ELECTRICAL SCHEMATICS AND
PRINTED CIRCUIT BOARD ASSEMBLY DRAWINGS
MRIR TELEMETRY UNIT
INTERFACE DESCRIPTION
MRIR TELEMETRY UNIT
MECHANICAL DRAWINGS
MRIR TELEMETRY UNIT
INTERCONNECTING PIN CHART
A-I
B-I
C-I
D-I
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D0301-014
LIST OF ILLUSTRATIONS
Figure Title
2-1 Split-Phase Wave form .......... 2-4
2-2 First Stage Input Commutator
(Pre-Functional Test Design) ...... 2-7
2-3 First Stage Input Commutator
(Engineering Model Fix) ......... 2-8
2-4 200KC Input Filter
Pre-Functional Test Design ....... 2-10
2-5 200KC Input Filter Prototype
Flight Model Design .......... 2-10
2-6 200KC Input Filter
Engineering Model Design ........ 2-10
2-7 Frame Sync Inhibit Logic ........ 2-12
2-8 Ground and Power Supply Wiring
MRIR Telemetry Unit .......... 2-14
2-9 Temperature Telemetry Point ...... 2-16
D0301-014
LIST OF ILLUSTRATIONS (continued)
Fiqure Title
2-10 First Stage Input Commutator
(Prototype - Flight Model
Design Recommendation) .......... 2-19
2-i1 Two MOS-FET Per Analog
Input Channel .............. 2-21
3-1 Printed Circuit Board Allocation . . . 3-2
3-2 MRIR Telemetry Unit
Engineering Model Center of Gravity . • 3-6
3-3 Display Console ............. 3-8
3-4 Auxiliary Console ............ 3-9
4-1 Timing Chart NIMBUS "B" MRIR
(Telemetry Unit) ............. 4-6
X
D0301-014
LIST OF TABLES
Table Title Paqe
3-1 Input/Output Connectors ......... 3-4
4-1 MRIR Telemetry Unit Power Supply
Temperature Test at +60°C Ambient .... 4-2
4-2 MRIR Telemetry Unit Power Supply
Temperature Test at -10°C Ambient . 4-3
4-3 MRIR Telemetry Unit Analog/Digital
Conversion at +60oc Ambient Temperature
(Nominal Voltage) ............ 4-4
4-4 MRIR Telemetry unit Analog/Digital
Conversion at -10°C Ambient Temperature
(Nominal Voltage) ............ 4-5
xi
D0301-014
SECTION 1
INTRODUCT ION
The Engineering Model MRIR Telemetry Unit has been designed,
fabricated, functionally tested, and delivered. A final
engineering report covering the history, fabrication, and
testing of the completed subsystem is presented herein.
In addition, this report shall cover the Bench Test Equip-
ment which was modified for the NIMBUS "B" telemetry unit.
1.1 SCOPE
This final report contains the data which is pertinent to
the completed Engineering Model _._IR Telemetry Unit. The
report is intended to cover the electrical, mechanical,
and functional testing aspects of the completed subsystem,
provide recommendations for improvement on following units,
and to provide sufficient data for maintenance purposes.
Also, a functional and physical description of the modified
Bench Test Equipment shall be included in this report.
1.2 HISTORY OF CONTRACT NAS5-9699
A CPIF contract with an incentive clause for cost and
delivery was awarded to California Computer Products, Inc.,
i-i
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(CalComp) on 1 November 1965. The overall object of the
contract was to perform a design study on a Medium Re-
solution Infra-red (MRIR) Telemetry Unit which had been
designed by NASA for the NIMBUS "B" Spacecraft, to review
and recommend improvements in the design, and to generate
a pre-prototype engineering model based on the results
presented and agreed to in the design study review. In
addition to the telemetry unit, the contract required that
one set of NIMBUS "C" MRIR-PCM Bench Test Equipment (BTE)
be modified for use with the NIMBUS "B" Telemetry Unit.
Manuals to support the BTE for both operation and mainte-
nance purposes were also required as part of this contract.
The contract called for completion of the hardware fabri-
cation and final delivery on or before 31 March 1966.
The delivery of the Engineering Model MRIR Telemetry Unit
was fulfilled with a final sell-off demonstration test to
an authorized representative of the Government as appointed
by NASA on 1 April 1966.
To aid in the design study of the MRIR Telemetry Unit,
NASA shipped to California Computer Products, a breadboard
version of the design on 9 November 1965. The breadboard
consisted of two major parts, the power supply and the
telemetry unit logic section with associated drawings and
test aids. With the aid of the breadboard, careful analysis
and relying on the past experience of the NIMBUS "C" MRIR
Telemetry Unit, CalComp generated a design study report
which assessed the submitted design for the proposed
1-2
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telemetry unit. The design study report pointed out
potential trouble areas, recommended improvements, and
presented a hardware packaging concept with thermal and
mechanical analytical data.
The preliminary design study report was submitted to NASAon 31 December 1965 for their review. On 6 January 1966,
three representatives from NASA consisting of the contract-
ing officer, the technical officer, and the telemetry unit
designer met with CalComp representatives at CalComp to
discuss the recommendations set forth in the design study
report. At this meeting, it was determined what recommen-
dations would be adopted. It was also decided that all
suggested improvements which were adopted were within thescope of the original contract; therefore, no negotiations
were required to receive additional funding for work con-sidered to be beyond the intent of the original contract.
With the formal approval of NASA on 25 February 1966, Cal-
Comp initiated the orders to produce an engineering model
of the MRIR Telemetry Unit. Parts were ordered, artwork
for the printed circuit modules was completed, functional
test specifications were written, and supporting test
equipment was developed and fabricated. The BTE design
was firmed up as a result of the agreement reached on the
MRIR design recommendations.
All parts contained within the Engineering Model MRIR
Telemetry Unit were ordered from vendors with the exception
of the fl_t pack integrated circuits which were Government-
1-3
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furnished. The GFE IC's were functionally tested at
CalComp prior to being soldered to the printed circuit
boards.
On 2 March 1966, an interface agreement meeting conducted
by General Electric was held at Goddard Space Flight Center
in Greenbelt, Maryland. In attendance were representatives
from General Electric, Santa Barbara Research, California
Computer Products, Inc., and NASA. The purpose of the
meeting was to establish interface requirements among the
equipment suppliers. Since General Electric has the re-
sponsibility for system integration, General Electric
conducted the meeting. The final results of the meeting
were to be compiled into separate documents specifically
directed to the participating equipment manufacturers.
After the establishment of interface requirements, the
task at hand was to fabricate, assemble, and test the
Engineering Model MRIR Telemetry Unit. The telemetry unit
consists of a magnesium chassis and seven printed circuit
cards. The procurement of parts for the assembly did not
present delivery problems. The IC's were hand soldered to
the printed circuit boards even though a resistive solder-
ing machine was slated to be used for this job. Using the
soldering machine, a sample IC board was prepared with
dummy IC's which were attached to the printed circuit board.
The sample was submitted to NASA for review and tests.
NASA tests showed that the soldering was unsuitable at this
time; however, NASA recommended several improvements in
1-4
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using the soldering machine. The NASA laboratory report
indicated that once the right combination of heat, solder
content, solder deposition, and bonding pad area were
determined, the solder bond would be sufficient to fulfill
NASA soldering requirements.
As each printed circuit board was completed, it was sub-
jected to a comprehensive static test to ensure that no
damage occurred to the board or its components during the
assembly. At the completion of the board test, the boards
were inserted into the wire harness connectors contained
in the chassis to perform the system functional test with
the aid of the BTE. The functional test of the boards,
individually as well as combined within the system, un-
covered malfunctions for which corrective action was initi-
ated. The details of the malfunctions and new recommenda-
tions are contained in the main body of this report. Prior
to delivery, the engineering model was subjected to a
thermal cycle test which covered the range from minus 10°C
to plus 60°C. The results of this testing are contained
in Section 4. As it was stated before, the acceptance
test which constituted delivery was performed on 1 April
1966 at the C?iComp facility. On 5 April 1966, the engineer-
ing model was presented to the NASA technical officer at
the Goddard Space Flight Center. Power and input signals
were applied, and the Engineering Model MRIR Telemetry Unit
responded by presenting the correct data.
1-5
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From the start of the contract to the hardware delivery
of the Engineering Model MRIR Telemetry Unit, the total
time frame for the design review, fabrication, assembly,
and test of the telemetry unit was five months and one day.
1.3 ENGINEERING MODEL TELEMETRY UNIT GENERAL DESCRIPTION
The NIMBUS "B" MRIR Telemetry Unit interfaces with the
MRIR Radiometer Electronics Unit to convert analog data
to a serialized digital format. The logic circuitry
within the MRIR Telemetry Unit samples in sequence each
of five radiometer output channels. The analog information
is gated to an Analog-to-Digital (A/D) Converter Unit
where 34.7 A/D conversions per second are performed on
each channel input. The A/D conversion is performed with
an accuracy of 1 part in 256 (8 bit accuracy).
The output of the A/D Converter is formatted with a frame
synchronization word to produce a 28.8 millisecond frame
length. The serial bit-stream frame consists of one 8-bit
frame synchronization word (i0111000) and five 8-bit
digitized conversions of the analog radiometer data (one
word for each of the five channels). The formatted data
is transmitted in a split-phase waveform to a satellite
digital recorder at a 1.66-kc bit rate (208 cps data word
rate). The least significant bit for each word is trans-
mitted first.
1-6
D0301-014
1.4 BENCH TEST EQUIPMENT GENERAL DESCRIPTION
The MRIR Telemetry Unit Digital Subsystem Bench Test
Equipment is designed to facilitate the functional testing
of the Engineering Model MRIR Telemetry Unit. The Bench
Test Equipment generates the clock frequencies, analog
voltages, and primary power required by the telemetry unit.
By routing all interface signals through the test point
panel, an evaluation of the various input/output signals
can be made. The primary output of the telemetry unit
subsystem, a split-phase code modulated signal, is decom-
mutated and made available as a visual display.
Additional features, such as current monitoring facilities,
incremental voltage sources, and dummy loads are contained
in the test equipment, minimizing the accessory equipment
required for a thorough test.
The digital electronics contained in the test equipment is
mechanized from basic modules for ease of maintenance and
replacement. To aid in maintaining the test equipment,
miscellaneous remote controls and indicators are brought
to the front panel of the electronics drawer.
The d-c voltages required to operate both the test equipment
and the unit under test are provided by modular power supplies
housed in the test console.
1-7
D0301-014
SECTION 2
ELECTRONICREVIEW
2.1 PRINTED CIRCUIT BOARDS
The final design of the MRIR Telemetry Unit contains seven
(7) printed circuit boards (PCB's). Five of the PCB's con-
tain the electronics to initiate and perform the function
for converting the analog input information into a digital
format. The remaining two PCB's provide the necessary
secondary power levels which are generated from a primary
input voltage source of a nominal minus 24.5 volts. A
brief description of each module and its function is pre-
sented below.
a. Analog Input - 25-kc Generator
This board contains six MOS-FET devices (only
five are used) which gate the analog information
to the A/D Converter. A five flip-flop ring
counter provides the commutating control. In
addition, this board generates a 25-kc clock
signal by using three flip-flops to divide the
200-kc input by eight.
2-1
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b. A/D Converter
This board contains the precision voltage supply,
the comparator amplifier, constant current sources,
transistor switches, and a precision resistor-
ladder network to accomplish the analog-to-digital
conversion.
c. A/D Data Control
This board contains two 8-flip-flop registers.
One register retains the data after the A/D
conversion. The other register provides the
control signal to successively turn on each
current source. Depending on whether the analog
voltage is greater than or less than the voltage
generated by the ladder network, will determine
whether a selected current source should be left
on or turned off. This module also contains the
Frame Sync Inhibit logic which changes the least
significant bit to a "one" if analog data is
converted to have the same bit pattern as the
Frame Sync word.
d. Encode - Timing Generator
This board contains nine flip-flops which are
used to provide timing control. Six flip-flops
are used to divide a 10-kc input signal to
1.66 kc (one bit time) and 208 cps (one word
time). A transfer pulse is generated to gate
the converted information from the data register
2-2
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e .
f.
on the A/D Data Control board to an output data
shift register on the Frame Sync-Data Output
board. In addition to the transfer pulse, a
second timing pulse (ENCODE pulse) is generated.
The ENCODE pulse clears the A/D data register,
resets the A/D shift register, and starts the
A/D conversion of new input data.
Frame Sync - Data Output
This board generates the Frame Sync word (i0111000)
every sixth word time. The function of the Frame
Sync word is to provide a basis for synchronization
when decommutating the telemetry data transmitted
to a ground station. As was mentioned before, an
8-bit flip-flop shift register is contained on
this board to provide the serial data output to
two redundant data output buffer drivers. The
data is transmitted in a split-phase waveform as
shown in Figure 2-1.
DC/DC Converter No. 1
This board is one of two power supply boards
which provides the secondary voltage levels.
These levels are +3.2v, +6v, -6v, -12v, and -18v.
Contained on this board are the primary power
relay, flux oscillator, power transformer, and
secondary voltage diode rectifiers. The DC/DC
No. 1 board was designed so that all oscillating
signals would be confined on this board and not
be coupled into the wiring harness by sending the
oscillating signals to another board for condition-
ing.
2-3
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BINARY NUMBER
BINARY WAVEFORM
SPLIT-PHASE WAVEFORM
1II
OlI
I 0
II
I
I I I
I ' l i I II I i
'' I' ' II lI I i II i l I
t I
tl Ia Il
o I z I.I i
I1I
0I
tI
Ilk;
I_'-_ II NEGATIVE-GOING TRANSISTION REPRESENTS A "ONE"• z___I
Ilt I
POSITIVE-GOING TRANSISTION REPRESENTS A "ZERO"
TIME
FIGURE 2-1
Split-Phase Wave form
2-4
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g.DC/DC Converter No. 2
The second half of the two power supply boards
contains the input filter network, voltage
regulator, secondary level output filters, and
the telemetry point circuits.
Test equipment to test the PCB's on an individual basis
was designed and fabricated. To perform as complete a
test as possible on each PCB, functional test specifica-
tions were generated for each PCB with the exception of
the two power supply boards. These two boards are tested
as a unit; therefore, one functional test specification
covers both boards.
While performing the initial functional test on the PCB's,
several problems were uncovered. The necessary action to
solve these problems was initiated and the solutions have
been implemented. The malfunctions spoken of here are the
types which required printed circuit board modifications
and drawing changes. Other discrepancies which have been
found are of such a minor nature that they will not be
discussed. These discrepancies involved wrong value
components, failed parts, term exits on a pin other than
noted on the schematic, etc. The intent here is to review
each PCB type and comment on it. The electrical schematics
and assembly drawings for all PCB's are found in Appendix A.
2-5
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2.1.1 ANALOG INPUT - 25-KC GENERATORBOARD
Of the seven PCB's in the MRIR Telemetry Unit, the Analog
Input board presented the most problems. The major problem
was that noise feedback on the output of the first stage
of the commutation ring counter was sufficient to SET thesecond stage 300 microseconds after it was RESET. The
RESET should have been for a time duration of 4.8 milli-
seconds. The circuit showing the situation when the faultyoperation occurred is shown in Figure 2-2. The solution
to this problem for the engineering model is shown in
Figure 2-3. The gate which was contained on the board,
but unused, provided the isolation from the noise feedback
on the "zero" side output, while the collector provided
isolation on the "one" side output. The use of both the
collector output and the emitter-follower output on the
"one" output side is ordinarily not a good practice because
base drive for the emitter-follower output is reduced.However, in this instance, the emitter-follower fan-out
load is only eight. Its maximum fanout is fifteen. Since
the emitter follower is driving half its capacity, the
simultaneous use of the flip-flop collector output does
not divert enough base drive to hamper the emitter-follower
operation.
The second problem area on the Analog Input board was the
transformer isolation input filter network for the 200-kc
clock signal. This network as shown in Figure 2-4 provided
too much attenuation on the input clock, and the reduced
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C6 +3.2v
NOISE
FEEDBACK
C1 C1 +3.2v
C6I
II!!!
!
!--!
CLOCK
l
IlI
75
4 IC
1 *6 i0
5
1
3 7
IC
9 8
CLOCK
*Emitter-Follower Output-
FIGURE 2-2
First Stage Input Commutator
(Pre-Functional Test Design)
2-7
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m
Cl Cl RCl
+3.2v +3.2v
7 25
4
i6 i0
9
8
: - OTPI
_E
5 I(
4
18 9
_r
FIGURE 2-3
First Stage Input Commutator
(Engineering Model Fix)
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voltage was insufficient to drive the IC device. A
review of the NIMBUS "C" MRIR design which had the same
clock input requirement showed that this filter network
was redesigned to that indicated in Figure 2-5. For the
Engineering Model NIMBUS "B" MRIR Telemetry Unit, a com-
promise was made between the filter networks. The design
used on the present MRIR engineering model is shown in
Figure 2-6. However, for the subsequent prototype and
flight model MRIR's, the filter network shown in Figure 2-5
will be included on the board.
2 .1 .2 ANALOG/DIGITAL CONVERTER BOARD
The A/D board required some rework as a result of its
functional test. Because of the accuracies involved,
the A/D design is very sensitive. Extraneous noise was
sufficient to cause the A/D Converter to operate erroneously
To remedy this situation, the board required additional
components to eliminate the noise. One source of noise
was the VLAD test point output term which is directly
coupled through a 4700-ohm resistance to the comparator
input circuit. This integrated circuit has a high impedance
input and a very high gain. Any noise pickup on this line
was coupled to the comparator input and amplified. To
eliminate this action, the 4700-ohm resistor was replaced
with a 100-picofarad capacitor tied to signal ground.
The VLAD test point term has been eliminated and the noise
is now filtered to ground.
2-9
200KC
200KC GRD--
5.1K T1
470pf
C2 47pf III
D0301-014
GATE
FIGURE 2-4
200KC Input Filter Pre-Functional Test Design
1 .OK T1 200pf
il
470pf200KC GRD
i:i _I_
Q Select
FIGURE 2-5
GATE
200KC Input Filter Prototype - Flight Model Design
1 .OK T1
°°200KC GRD
100pf
,,11 GATE
FIGURE 2-6
200KC Input Filter Engineering Model Design
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The comparator amplifier required a frequency compensation
capacitor between IC pins one and eight. When the A/Dboard was laid out, no provisions were provided for this
compensation. Previous to the layout design, breadboard
tests on this IC showed that no frequency compensation
was required; however, when the board was fabricated and
tested, the operational amplifier broke into a 1-megacycle
oscillation when the null point between the actual data
input and the ladder network output were approximately
equal. A 10-picofarad capacitor was inserted between pins
one and eight on the IC comparator amplifier to prevent
this oscillation at the null point.
2.1.3 ANALOG/DIGITAL DATA CONTROL
The A/D Data Control logic board did not have any problems
associated with it during the board test and the subsystem
functional test. Prior to having the board fabricated, a
logic error was found on the Frame Sync Inhibit logic. The
logic was corrected, the artwork was updated, and the board
was fabricated correctly. Figure 2-7 shows the logical
representation for the correct mechanization. This mechani-
zation will change the LSB of the data word to a "one" if
the data word appears exactly as the Frame Sync word
(i0111000).
2-11
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D8
D7
D6
D5
D4
D3
IC26
8SN512
D2
D1
SN512
SN514
iC22
IC27
n
D1
FIGURE 2-7
Frame Sync Inhibit Logic
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2.1.4 ENCODE-TIMING GENERATOR
The Encode-Timing Generator board did not require any
changes.
2.1.5 FRAME SYNC AND DATA OUTPUT
The Frame Sync and Data Output boards did not require any
changes.
2.1.6 DC/DC CONVERTER NOS. 1 AND 2
The two boards which provide the secondary voltage levels
did not require any changes.
2.2 GROUNDING SCHEME AND VOLTAGE DISTRIBUTION
Figure 2-8 shows a signal flow diagram which contains the
grounding scheme and voltage distribution. The grounding
scheme in the MRIR was designed to avoid any ground loops.
The power ground and signal grounds are in reality the
same ground, but a difference is shown between the two.
The power ground pertains to the DC/DC Converter boards,
while the signal ground pertains to the other printed cir-
cuit boards. Chassis ground and telemetry ground are not
internally tied to any point within the engineering model.
2-13
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However, the telemetry points on the flight models will
have the temperature telemetry point referenced to telemetry
ground. The secondary power distribution is straight-
forward and presented no problems. The voltage distribution
can be determined on the pin chart contained in Appendix D.
2.3 TELEMETRY POINTS
There are only three telemetry points contained within the
Engineering Model MRIR Telemetry Unit. The points are used
to monitor that the primary power relay has switched on
command, that the minus 12 volt secondary level is main -
taining regulation, and what the internal temperature is
at the hottest point. A temperature sensitive component
(Sensistor) is used to monitor the temperature. The output
of the Sensistor as a function of voltage and temperature
is shown in Figure 2-9. This curve can be used for cali-
bration purposes. Appendix B gives the electrical informa-
tion on the other two telemetry point outputs.
2-15
i
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D0301-014
2.4 ELECTRICAL PRECAUTIONARY MEASURES
The use of MOS-FET devices has necessitated that extreme
care be used in their handling. The devices can be easily
damaged by static electricity or high positive voltage
spikes. CalComp used precautionary measures during the
board assembly as well as during functional test of the
printed circuit board, and testing at the completed system
level.
During the PCB assembly, the leads of the MOS devices were
shorted together before, during, and after the assembly.
A special 44-pin shorting plug was wired and attached to
the board to tie all the input leads of the MOS devices
to signal ground on that assembled module. At the system
level, the analog inputs were routed to the J4 Bench Test
connector so that a shorting plug (37-pin) provided pro-
tection when the MRIR telemetry was not connected. The
procedure for system integration or connecting to the BTE
is to install all cables to the other four connectors
before removing the shorting plug to install the last
cable, J4. The reverse procedure is used for cable removal.
2.5 ELECTRONIC DESIGN RECOMMENDATIONS
a . On the Encode-Timing Generator board, a fix
was made to isolate the emitter-follower outputs
from the outputs going to the next stage of the
2-17
D0301-014
b.
commutating ring counter. Instead of simultane-
ously using the collector output and emitter-
follower output on the Cl flip-flop, it is
recommended that a gate be added to eliminate
the use of the collector output. The mechaniza-
tion will then be as shown in Figure 2-10.
During the course of performing the functional
test at the board level and the completed system
level, three failed MOS transistors have been
encountered. The cause and nature of their failure
cannot be explained because other areas of the
board or system were under investigation and not
the MOS devices themselves. When the attention
was turned to the MOS transistors, the failures
were detected. The task of removing a multilead
TO-5 device from the PCB is a very tedious job
and in most cases pads are lifted. In addition,
there is the risk of causing a failure to the
new device being installed. The MOS-FET's used
in the MRIR Telemetry Unit contain two devices
within the same TO-5 can. The failure of any
one MOS device within the package requires that
the package be replaced. The waste here is that
one MOS device within the removed package is
still good but cannot be used elsewhere. Since
these MOS devices can be easily damaged in
handling, it is recommended that one MOS device
per package per analog input channel be used or
2-18
D0301-014
22 X
I0 6 8_ ,_ I'• I
n
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5
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18
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TP2
FIGURE 2-10
First Stage Input Commutator
(Prototype - Flight Model Design Recommendation)
2-19
D0301-014
that the present two MOS devices per package
be used except that the two devices be allocated
for one channel only. For the latter recommenda-
tion, the five analog input channels would each
have two MOS transistors (one package) each.
The interconnection on the PCB could be done so
that each channel input could be hardwired to
use either of the two MOS devices available within
the package. The mechanization for one channel
input is shown in Figure 2-11. In the present
layout, three M0S packages are used, but only
five of the six available MOS-FET devices are
wired into the circuit. The sixth is left hanging.
The proposed scheme requires that only two addi-
tional TO-5 packages be added. This recommenda-
tion provides economy, saves repair time, and
does not subject the PCB to damage which can be
caused during repair.
2-20
D0301-014
ANALOG
OUTPUT
ANALOG
INPUT
-18V
m
-18V
Dotted lines represent shorting wires.
Wire B dotted lines for B MOS-FET.
Wire A dotted lines for A MOS-FET.
NOTE: Only one MOS-FET circuit is wired in at any one time.
FIGURE 2-11
Two MOS-FET Per Analog Input Channel
2-21
D0301-014
SECTION 3
MECHANICAL DESIGN
3.1 ENGINEERING MODEL MRIR TELEMETRY UNIT
3.1.i PACKAGE LAYOUT
The layout of the Engineering Model MRIR Telemetry Unit
was changed from the layout initially presented in the
design study report to the layout shown in Figure 3-1.
The Analog Input - 25-kc Generator board was placed as
close as possible to the input/output connectors to keep
the analog input lines short. Shields were placed between
the analog input board and the input/output connectors to
protect against crosstalk. The shield between the DC/DC
Converter No. 1 board and the remaining logic modules was
to isolate the logic modules from the flux oscillator
circuit. The mechanical drawings containing the actual
design of the Engineering Model MRIR Telemetry Unit are
available in Appendix C.
No mechanical design problems were encountered when the
engineering model MRIR was assembled. The machined
magnesium parts were finished with the DOW 17 protective
coating. All parts fit without modifications. The
3-1
D0301-014
I---1 F---1J[""-_ I i ["--"_ I I J l I !
ANALOG INPUT - 25KC
A/D CONVERTER
A/D DATA CONTROL
ENCODE TIMING
FRAME S YNC - DATA OUTPUT
rllllJlll////lll l //I//l / JJl////I/f /lllll///llJ/I//I//_,_
DC/DC CONVERTER NO. 1
DC/DC CONVERTER NO. 2
SHIELD
SHIELD
FIGURE 3-1
Printed Circuit Board Allocation
3-2
D0301-014
mechanical design drawings pertaining to the chassis parts
are complete. The final package size was 2 over 0 or
6 x 4 x 6.5 inches. The housing contained five input/output
connectors which are labeled Jl through J5, and the type
and function of each connector is indicated in Table 3-1.
Each connector is different to prevent mismatching between
cables and connectors.
Internal to the housing are seven 44-pin printed circuit
board (PCB) connectors which are keyed to match a particular
PCB. The PCB's contain slots corresponding to the keys.
3.1.2 PHYSICAL PARAMETERS
3.1.2.1 Layout
The PCB layout of the Engineering Model MRIR Telemetry Unit
is shown in Figure 3-1.
3.1.2.2 Weiqht
The completed engineering model MRIR weighed 4.3 pounds
(unpotted). This weight included the shorting plug on
connector J4.
3.1.2.3 Power Dissipation
The measured power dissipation of the engineering model
3-3
D0301-014
TABLE 3-1
Input/Output Connectors
Connector Number of Pins Signals
J1 15-pin Plug Power Input and Commands
J2 9-pin Socket Output Signals
J3 15-pin Socket Input Signals
Telemetry and Bench Test
J4 37-pin Socket Equipment Test Point
J5 9-pin Plug Input Clock Signals
3-4
D0301-014
MRIR was 1.7 watts at minus 10°C. This figure represents
the maximum power dissipation.
3.1.3 CENTEROF GRAVITY
The dimensions of measured center of gravity of the
engineering model MRIR are shown in Figure 3-2.
3.1.4 MECHANICALDESIGN RECOMMENDATIONS
The mechanical design is sufficient as it stands for the
engineering model telemetry unit; therefore, prototype
and flight models will be mechanically fabricated in the
same manner as the engineering model.
3-5
D0301-014
I It_J
I C.6.
3. ZSS
II
FIGURE 3-2
MRIR Telemetry Unit
Engineering Model Center of Gravity3-6
D0301-014
3.2 BENCH TEST EQUIPMENT
3.2.1 PHYSICAL DESCRIPTION
The MRIR Telemetry Unit Bench Test Equipment is housed in
two single bay racks. One rack, called the display console,
houses the power supply drawer, test point panel, data
display drawer, and a console blower. See Figure 3-3.
The other rack, the auxiliary console, houses the remaining
commercial test equipment, which includes a Tektronix RM45A
oscilloscope, a Non-Linear Systems Model 484A digital volt-
meter, and an Exact Electronics Model 250 function generator.
In addition to a console blower, the latter bay is equipped
with a loose equipment drawer and a writing surface. This
unit is shown in Figure 3-4. A more comprehensive descrip-
tion can be obtained from the Bench Test E%uipment Document
D0106-004 entitled "Maintenance Manual for MRIR-PCM Bench
Test Equipment, NIMBUS B," dated 24 March 1966.
Convenience outlets are available at the power supply drawer
and the rear of the auxiliary console. Both consoles are
designed to be operated from single-phase, ll5-vac power.
The display console is protected by a 10-ampere circuit
breaker in the a-c line, with a 15-ampere breaker protecting
the auxiliary console. In addition, the d-c power supplies
are protected by a line fuse.
3-7
D0301-014
SECTION 4
SYSTEMTEST AND OPERATION
4.1 SYSTEM TEMPERATURE CYCLE TEST
The engineering model was placed into a temperature controlled
oven to test the effects of the unit at +60°C, and at -10°C.
The results of each test on a per channel basis are contained
in Tables 4-1, 4-2, 4-3, and 4-4. In all cases, the MRIR
unit was allowed to temperature soak (no applied power) for
approximately forty-five minutes. The internal temperature
of the unit was determined by monitoring the Sensistor.
4.2 MRIR TELEMETRY UNIT INTERFACE
The interface list for the Engineering Model MRIR Telemetry
Unit is contained in Appendix B. The list provides the
terms on each connector pin plus the equivalent voltages
and impedances on those pins which originate or terminate
on the telemetry unit.
4-1
D0301-014
4.3 MRIR TELEMETRY TIMING DIAGRAM
A timing diagram showing the relationship among the logic
signals within the MRIR Telemetry Unit is presented in
Figure 4-1 on page 4-6.
TABLE 4-1
MRIR Telemetry Unit Power Supply
Temperature Test at +60°C Ambient
Secondary Primary Power Input
Voltage
Levels -24.0 ± 0.02v -24.5 ± 0.02v -25.0 ± 0.02v
+0.23+3.2
-0.i0
+6 + 0.18
-6 = 0.18
-12 ± 0.36
-18 + 0.54
+3.189
+6.128
-6.154
-12.25
-18.42
+3.189
+6.127
-6.154
-12.25
-18.42
+3.189
+6.128
-6.154
-12.25
-18.42
4-2
D0301-014
TABLE 4-2
MRIR Telemetry Unit Power SupplyTemperature Test at -10°C Ambient
Secondary Primary Power InputVoltageLevels -23.5 ± 0.02v -24.5 ± 0.02v -25.5 ± 0.02v
+0.23+3.2 -0.i0
+6 ± 0.18
-6 ± 0.18
-12 ± 0.36
-18 ± 0.54
+3.117 +3.117
+5.907
-5.937
+5.907
-5.938
+3.118
+5.908
-5.939
-11.97
-18.05
4-3
D0301-014
TABLE 4-3
MRIR Telemetry Unit Analog/Digital
Conversion at +60°CAmbient Temperature
(Nominal Voltage)
Bit Channel
Channel 2 Channel 3 Channel 4
20 (25mv)
21 (50mv)
22 (100mv)
23 (200mv)
24 (400mv)
25 (800mv)
26 (1600mv)
27 (3200mv)
All
Bits 6375mv
Channel 1
-18mv
-45
-94
-194
-396
-797
-19mv
-45
-95
-195
-396
-797
-20mv
-45
-95
-195
-396
-797
-20mv
-45
-95
-196
-396
-797
-1596
-3197
-6372
-1596
-3197
-6372
-1596
-3197
-6372
-1596
-3197
-6372
Channel 5
-20mv
-45
-95
-196
-396
-797
-1596
-3197
-6372
4-4
D0301-014
TABLE 4"4
MRIR Telemetry, Unit Analog/Digital
Conversion at -10°C Ambient Temperature
(Nominal Voltage)
Bit Channel
Channel 1 Channel 2 Channel 3 Channel 5
20 -25mv
21 -50my
22 -100mv
32 -200mv
24 -400my
25 -800mv
26 -1600mv
27 -3200mv
-19mv
-44
-94
-194
-396
-796
-1596
-3197
-20mv
-45
-95
-196
-396
-796
-1596
-3197
-20mv
-45
-95
-196
-396
-796
-1596
-3196
-20mv
-45
-95
-196
-396
-796
-1596
-3196
_ll
Bits -6375mv -6372 -6372 -6372 -6372
4 Channel
-20mv
-45
-95
-196
-396
-796
-1596
-3196
-6372
4-5
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D0301-014
4.4 INTERCONNECTION DIAGRAM
Appendix D provides a combination wire list and inter-
connecting diagram. The JXXX numbers associated with the
connector terms indicate where the wire is going.
4-9
D0301-014
SECTION 5
NEWTECHNOLOGY
Throughout the performance of the contract NAS5-9699, a
continual review of the work performed was conducted by
a designated committee, including the Project Manager and
the Patent Counsel. The committee met periodically to
discuss all effort performed with a view to ascertaining
reportable items disclosed in performance of the contract,
both by the contractor and all subcontractors.
5.1 RESULTS OF CONTRACTOR'S REVIEW
The following are considered reportable items under the
"New Technology" clause:
a. Reportable Item: Analog-to-Digital Converter
Circuit.
Invention Status: Not reasonably patentable.
Apparent Use: An analog-to-digital converter.
Description: The analog-to-digital converter
for this contract is based
almost entirely on the design
submitted by NASA to the
contractor. The contractor
made some component changes
5-1
D0301-014
bo
in incorporating some new
integrated components which
the contractor bought as off-
the-shelf items from Fairchild
Semiconductor Corporation.
The design of the circuit was
slightly different due to the
requirements of the integrated
components. The complete
circuit is shown in this re-
port as drawing No. D-I0368-502.
Reportable Item: Interface Buffer Circuit.
Invention Status: Not reasonably patentable.
Apparent Use: A data output buffer circuit.
Description: The data output buffer circuit
for the frame sync and data
output is of standard design
utilizing integrated circuit
components. The circuit is
based on the design submitted
to the contractor by NASA.
The circuit is shown in
drawing No. 10354-502.
There were no subcontractors reportable under the "New
Technology" clause.
5-2
D0301-014
SECTION 6
BIBLIOGRAPHY
The following documents are directly related to the design
and development of the Engineering Model MRIR TelemetryUnit.
6.1 TECHNICAL REPORTS AND MANUALS
a. D0201-65/I18 - 21 September 1965
A technical proposal for a Medium Resolution IR
(MRIR) Experiment Engineering Model Digital
Electronics Telemetry Unit for NIMBUS "B."
b. D0301-013 - 31 December 1965
Reliability Assessment and Development Study
Report on MRIR-PCM Subsystem.
D0106-003 - i0 March 1966
Operator's Manual for MRIR-PCM Digital Subsystem
Bench Test Equipment, NIMBUS °'B. "
D0106-004 - 24 March 1966
Maintenance Manual for MRIR-PCM Bench Test
Equipment, NIMBUS "B. "
C •
d .
6-1
D0301-014
e .
f.
g .
h.
i .
j .
k.
i .
20101-01 - 23 November 1965
Engineering Model MRIR Telemetry Unit Telecon
Report.
20101-02 - 7 December 1965
Engineering Model MRIR Telemetry Unit Telecon
Report.
20101-03 - 9 December 1965
Engineering Model MRIR Telemetry Unit Telecon
Report.
20101-04 - 14 December 1965
Engineerlng Model MRIR Telemetry Unit DC/DC
Converter Analysis.
20101-05 - 20 December 1965
Engineering Model MRIR Telemetry Unit Telecon
Report.
20101-07 - 5 January 1966
Engineerlng Model MRIR Telemetry Unit Telecon
Report.
20101-08 - ii January 1966
Engineerlng Model MRIR Telemetry Unit Telecon
Report.
20101-09 - 18 January 1966
Engineerlng Model MRIR Telemetry Unit Telecon
Report.
6-2
D0301-014
m. 20101-010 - 19 January 1966
Stresses Caused by Module Clamps.
n. 20101-011 - 4 February 1966
Engineering Model MRIR Telemetry Unit Telecon
Report.
o. 20101-014 - 22 March 1966
Engineering Model MRIR Telemetry Unit Telecon
Report.
6.2 MONTHLY PROGRESS REPORTS
a. D0513-001 - 14 December 1965
Monthly Progress Report No. 1 for MRIR-PCM
Telemetry Unit, 1 November 1965 - 28 November 1965
b. D0513-002 - ii January 1966
Monthly Progress Report No. 2 for MRIR-PCM
Telemetry Unit, 29 November 1965 - 2 January 1966.
c. D0513-003 -8 February 1966
Monthly Progress Report No. 3 for MRIR-PCM
Telemetry Unit, 2 January 1966 - 31 January 1966.
d. D0513-004 - 7 March 1966
Monthly Progress Report No. 4 for MRIR-PCM
Telemetry Unit, 1 February 1966 - 28 February 1966.
e. D0513-005 - 14 April 1966
Monthly Progress Report No. 5 for MRIR-PCM
Telemetry Unit, 1 March 1966 - 31 March 1966.
6-3
D0301-014
6.3 FUNCTIONAL TEST SPECIFICATIONS
a. A0205-I01 - 29 April 1966
Functional Test Specification for Analog Input
and 25-KC Generator.
b. A0205-I02 - 5 May 1966
Functional Test Specification for Analog-to-
Digital Converter.
c. A0205-I03 - 29 April 1966
Functional Test Specification for Analog-to-
Digital Data Control.
d. A0205-I04 - 29 April 1966
Functional Test Specification for Encode-
Timing Generator.
e. A0205-I05 - 2 May 1966
Functional Test Specification for Frame Sync
and Data Output.
f. A0205-I06 - i0 May 1966
Functional Test Specification for DC-to-DC
Converter No. 1 and No. 2.
g. A0201-019 - 10 March 1966
Functional Test Specification for the MRIR-PCM
Digital Subsystem, NIMBUS "B."
6-4
D0301-014
APPENDIX A
MRIR TELEMETRYUNIT
ELECTRICAL SCHEMATICS
AND
PRINTED CIRCUIT BOARDASSEMBLYDRAWINGS
__ SNSI7
"rPT i T "
3"1"8
E 14
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TORS ARE _-NES04
}IERWISE SPECIFIED
| 10350- 507_.
REQD PART OR
--- IDENTIFYING NO.
UNLESS OTHERWISE SPECIFIED
DIMENSIONS ARE IN INCHES
TOLERANCES ON
DECIMALS I ANGLES.XX ±.03 ±0°30 "
.XXX ± .010
DRILLED HOLES
.040 TO .1285: + .00_-- .001
.136 TO .228:+.003,--.001
.234 TO .500:+ .004,--.001
.515 TO 350_ + .005,--..001
.765 TO 1.000:.+ .007,-- .001
1.015 TO 2.000:+ .010,-- .001
5CI4EIVl A'TI C I ] INOMENCLATURE OR I MATERIALDESCR PT ON SIZE. DESCRIPTION & SPECIFICATION
MST OF MATERIAL OR PARTS LIST
DRAWlIIo.ty)y,,P'_,,,li_-_-,.,
CHECII I_--
SURFACE ROUGHNESSPER MIL-STD-IO V
CALIFORNIA COMPUTER PRODUCTS INC.
305 MULLER, ANAHEIM, CALIFORNIA
SCHEMATIC-ANALOG INPUTSE
2.5 KC GENERATOR
IsiDENONE 10350-502
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SURFACE ROUGHNESSPER MIL-STD-IO V
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SURFACE ROUGHNESSPER MIL-STI_IO V
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SURFACE ROUGHNESSPER MIL-STO-IO V
CALIFORNIA COMPUTER PRODUCTS INC,
305 MULLER, ANAHEIM, CALIFORNIA
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D0301-014Append ix B
Input Connector Jl
Pin Term
1 Spare
Characteristics
2 -24.5 DRA Connected to the negative terminal
of the satellite primary regulated
supply. To be used by the radio-
meter drive amplifiers.
3 Spare pin
4 OFFCMD 65-ms pulse with a nominal ampli-
tude of +12 volts to the ON-OFF
relay. Input impedance is 160
ohms. Relay is turned off.
5 OFFCMDR Relay OFF command return line
6 Spare pin
7 GRD S MRIR signal ground
8 GRD P Power ground connected to the
positive terminal of the
satellite regulated supply.
B-I
D0301-014Append ix B
Input Connector Jl Icontinued)
Pin Term Characteristics
9 -24.5 M Connected to the negative terminal
of the satellite primary regulated
supply.
i0 -24.5 TM Connected to the negative terminal
of the satellite primary regulated
supply. To be used by the thermistor
Input impedance is nominal 2K ohms.
ii ONCMD 65-ms pulse with a nominal ampli-
tude of +12 volts to the ON-OFF
relay. Input impedance is 160
ohms. Relay is turned on.
12 ONCMDR Relay ON command return line.
13 Spare pin
14 GRD T Telemetry ground
15 GRD C Chassis ground
B-2
D0301-014Append ix B
Output Connector J2
Pin Term Characteristics
1 TRO 1 Tape Recorder Output No. 1
amplitude is +6.5 volts to +5.0
volts for the high state and 0
volts ± 0.6 volts for the low
state. Output impedance is 330
ohms.
2 Spare pin
3 GRD TRO 1 Tape Recorder Output No. 1
reference ground
4 GRD TRO 2 Tape Recorder Output No. 2
reference ground
5 GRD P Power ground
6 TRO 2 Tape Recorder Output No. 2
characteristics are same as TRO i,
Pin i.
7 GRD S Signal ground
8 GRD T Telemetry ground
9 GRD C Chassis ground
B-3
D0301-014Append ix B
input/output Connector J3
Pin Term Characteristics
1 -24.5 MR Negative terminal of the satellite
primary regulated supply. Primary
power is routed through the MRIR
unit to the radiometer.
2 -24.5 RDA Negative terminal of the satellite
primary regulated supply. Primary
power is routed through the MRIR
unit to the radiometer driver
amplifier.
3 Spare pin
4 CH 1 Radiometer Analog Input No. 1
voltage amplitude is 0 volts to
-6.4 volts at a frequency up to
8 cps. Input impedance is greater
than 150K ohms when the analog
gate is on.
5 CH 2 Radiometer Analog Input No. 2
(Same description as Pin 4.)
6 CH 3 Radiometer Analog Input No. 3
(Same description as Pin 4.)
7 GRD S Signal ground
B-4
D0301-014Append ix B
Input/Output Connector J3 (continued)
Pin Term
8 GRD P
Characteristics
Power ground connected to positive
terminal of the satellite primary
regulated supply.
9 ioo OA Output Phase A of a 2-phase, 100-cps,
square wave signal which is routed
through the MRIR unit to the radio-
meter. Amplitude is -1.5 k 1.0
volt for the high level and -23.0
± 1.5 volts for the low level.
i0 i00 _B Output Phase B of a 2-phase, 100-cps,
square signal which is routed
through the MRIR unit to the radio-
meter. Phase B leads Phase A by
90 ° . Amplitude same as Phase B.
ii
12 CH 4
13 CH 5
14 GRD T
Spare
Radiometer Analog Input No. 4
(Same description as Pin 4.)
Radiometer Analog Input No. 5
(Same description as Pin 4.)
Telemetry ground
15 GRD C Chassis ground B-5
D0301-014Append ix B
Output Connector J4
Pin Term
1 RLY TMP
2 TEM TMP
3
4 -18V TP
5 -12V TP
Characteristics
Relay Telemetry Point Output.
Voltage amplitude for on condition
is 8 + 1.5 volts and 0 + 0.6 volts
for the off condition. Output
impedance is 16.3K ohms.
Temperature Telemetry Point Output.
Voltage amplitude is variable
between -1.3 volts and -3.0 volts
over the temperature range of
-10°C to +65°C. Output impedance
is less than 3K ohms over the
temperature range. The output
voltage is derived from a separate
-24.5 volt supply.
Spare
MRIR -18 volts ±3 percent regu-
lated secondary supply. Provides
4.7K-ohm isolation resistor on
output.
MRIR -12 volts +3 percent regu-
lated secondary supply. Provides
4.7K-ohm isolation resistor on
output.
B-6
D0301-014Append ix B
Output Connector J4 (continued)
Pin Term Characteristics
6 -6V TP MRIR -6 volts +-3 percent regulated
secondary supply. Provides a 4.7K-
ohm isolation resistor on output.
7 +6V MRIR +6 volts +-3 percent regulated
secondary supply. Provides 4.7K-
ohm isolation resistor on output.
8 +3.2V MRIR +3.20 (+0.22V, -0.10V)
regulator secondary supply. Pro-
vides a 4.7K-ohm isolation resistor
on output.
Spare
i0 RB4 208-cps symmetrical square wave
output. Amplitude is +0.2 ± 0.i
volts for the 1 state and +2.0 ± 0.5
volts for the 0 state. Output
impedance is greater than 4.7K ohms.
ii RB5 Pulse output that occurs every 4.8
milliseconds. Pulse duration for
1 state (+0.2 ± 0.I volts) is i00
microseconds. For the remainder of
the time, the 0 state is +2.0 ± 0.5
volts. Output impedance is greater
than 4.7K ohms.B-7
D0301-014Append ix B
Output Connector J4 (continued)
Pin Term Characteristics
12 RB 1 1.66-kc symmetrical square wave
output. Amplitude for 1 state is
+0.2 ± 0.i volt and +2.0 ± 0.5
volts for the 0 state. Output
impedance is greater than 4.7K
ohms.
13 RN4 (ECD) 20-microsecond pulse output which
repeats every 4.8 milliseconds.
Output amplitude is +0.2 ± 0.i
volts for the 1 state and +2.0
± 0.5 volts for the 0 state.
Output impedance is greater than
4.7K ohms.
14 RK4 25-kc symmetrical square wave
output with an amplitude of +2.0
+ 0.5 volts for the high level
and +0.2 ± 0.i volts for the low
level. The output impedance is
greater than 4.7K ohms.
B-8
D0301-014Append ix B
Output Connector J4 (continued)
Pin Term Characteristics
15 RC6 Pulse output that repeats 33
times per second, pulse duration
is 4.8 milliseconds. Voltage
amplitude is +2.0 ± 0.5 volts
for the 0 level and +0.2 ± 0.i
volts for the 1 level. The out-
put impedance is greater than
4.7K ohms.
16 RCl Pulse output which occurs 30
milliseconds after C6 occurs.
The voltage amplitude and out-
put impedance characteristics
are the same as C6 on Pin 15.
17 CH5 Radiometer Analog Input No. 5.
This pin is provided for a pro-
tective purpose. During shipping
this point is shorted to signal
ground.
18 GRD S Signal ground
B-9
D0301-014Append ix B
Output Connector J4 (continued)
Pin Term Characteristics
19 GRD P
2 0 -12 TMP
21 CH4
22 RDI
23 RD--/
Power ground connected to the
positive terminal of the satellite
primary regulated supply.
-12 volt telemetry point output.
Nominal voltage output is -6 volts
±4 percent. The output impedance
is 2.8K ohm ±2 percent.
Radiometer Analog Input No. 5.
Same description as Pin 17 on
this connector.
LSB from the A/D data register.
Voltage amplitude is +2.0 ± 0.5
volts for the 0 state and +0.2
± 0.i volts for the 1 state.
Output impedance is greater than
4.7K ohms. Digital value is 2° .
21 Digital bit from the A/D data
register. Voltage and impedance
characteristics are the same as
D1 on Pin 22.
B-10
D0301-014Appendix B
Output Connector J4 (continued)
Pin Term Characteristics
24 RD32
2 Digital bit from the A/D data
register. Voltage and impedance
characteristics are the same as
D1 on Pin 22.
2 5 RD4 23 Digital bit from the A/D data
register. Voltage and impedance
characteristics are the same as
D1 on Pin 22.
m
26 RD5 24 Digital bit from the A/D data
register. Voltage and impedance
characteristics are the same as
D1 on Pin 22.
27 RD6 25 Digital bit from the A/D data
register. Voltage and impedance
characteristics are the same as
D1 on Pin 22.
28 RD--7 26 Digital bit from the A/D data
register. VQltage and impedance
characteristics are the same as
D1 on Pin 22.
B-II
D0301-014
Append ix B
Output Connector J4 (continued)
Pin Term Character is tic s
2 9 RD8 27 Digital bit from the A/D data
register. Voltage and impedance
characteristics are the same as
D1 on Pin 22.
30 CH3 Radiometer Analog Input No. 3.
Same description as Pin 17 on this
connector.
31 COMP OT Comparator output voltage. Voltage
output swings from +3.0 volts for
Vladder <Vinput to -6.0 volts for
Vladder >Vinput. Output impedance
is greater than 4.7K ohms.
32 V PREC Precision voltage output -I0.0
± 0.3 volts. Output impedance is
greater than 4.7K ohms.
33 Spare
34 CH2 Radiometer Analog Input No. 2.
Same description as Pin 17 on
this connector.
B-12
D0301-014Append ix B
Output Connector J4 (continued)
Pin Term Characteristics
35 CHI Radiometer Analog Input No. i.
Same description as Pin 17 on
this connector.
36 GRD T Telemetry ground
37 GRD C Chassis ground
B-13
D0301-014Append ix B
Input Connector J5
Pin Term Characteristics
1 i0 KC CLK 10-kc symmetrical square wave
input nominal voltage swing is
0 volts to -6 volts. Input
impedance is 3.3K +2 percent.
Spare
3 200 KC CLK 200-kc symmetrical square wave
input. Nominal voltage swing is
0 volts to -6 volts. Input
impedance is 24.7 ohms +i0 percent.
4 GRD 200 KC Provided as 200-kc input reference
ground.
5 GRD P Power ground connected to the
positive terminal of the satellite
primary regulated supply.
6 i00 _A Input Phase A, I00 cps, square
wave to be used by the radiometer
subsystem. Nominal voltage swing
is same as J3, Pin 9.
B-14
D0301-014
Appendix B
Input Connector J5 (continued)
Pi___n_n Term Char ac ter is tic s
7 zoo Input Phase B, i00 cps, square
wave to be used by the Radiometer
subsystem. Nominal voltage swing
is same as J3, Pin i0. Phase B
leads Phase A by 90 ° .
8 Spare pin
9 GRD S Signal ground
B-15
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