d75p 34 – hnc computer architecture week 5 memory maps. © c nyssen/aberdeen college 2003 all...

19
D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared 10/9/03

Upload: frank-lewis

Post on 04-Jan-2016

215 views

Category:

Documents


0 download

TRANSCRIPT

Page 1: D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared

D75P 34 – HNC Computer Architecture

Week 5

Memory Maps.

© C Nyssen/Aberdeen College 2003All images © C Nyssen/Aberdeen College except where statedPrepared 10/9/03

Page 2: D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared

When a computer is first booted up, the operating system and any device drivers are loaded from the Hard Drive into the

RAM.

Page 3: D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared

The OS and any drivers will “claim” bits of RAM for their own use. Any other

applications to be run from this point on, have to fit themselves in to the available

RAM space left.

Page 4: D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared

Memory is assigned to running applications by various algorithms –

First Fit - Take the first thing that comes along.

Best Fit - Allocate the block closest in size.

Worst Fit - Allocate the largest block (Reduces small holes)

Quick Fit - Make several lists, each has a common size block in it.

Page 5: D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared

The number of addresses, or bytes, that can be pointed to by the Address Bus is 2 width of bus.

An 8-bit bus can reference 28, or 256, addresses.If the locations are 1 byte in size, this is

equivalent to ¼ kilobyte addressable memory.The address numbers referenced will run from 0

– 255 (00h – FFh).

Page 6: D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared

Old 16-bit applications used 16-bit data paths, meaning that only the first 64KB of

memory could be addressed. The locations referenced would be

numbered 0 to 65535 (0-FFFFh). This is still a very

common configuration.

32-bit applications can use 4GB of addressable memory.

Page 7: D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared

What happens if a system can only

reference the first 64KB, but the

memory installed is much bigger?

The higher addresses have to

be referenced indirectly. This

means setting up a “stepping stone” within the range

that can be directly addressed.

Page 8: D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared

Sometimes it is essential to know which areas of

memory are “pre-claimed” by the boot

code, Operating System and peripheral drivers.

This information is particularly useful to

hardware manufacturers and assembly code

developers, especially when writing device driver

software. We depict this information graphically as a memory map.

Page 9: D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared

You will find many widely differing examples of

“memory maps” on the Internet, many written by

vintage computer enthusiasts.

A true memory map will show the whole of the

addressable memory, the spaces claimed and the

remaining free space. They are usually labelled in hexadecimal notation.

Page 10: D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared

When drawing your Memory Map for your Outcome question, you will be given the

following information.

The width of the address bus The width of the locations (it might not always

be 1 byte!) The spaces already claimed. You will be given the dimensions in either decimal or hexadecimal

notation or by the size in bytes.

Page 11: D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared

We will look at the specification of a very early business computer from Sharp, and draw a partial map of the processor chip.

Page 12: D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared

First work out the size of addressable memory using 2address bus width.

Draw a box and

mentally divide it up into that number of boxes. They will be

labelled from

0 to (2address bus width – 1).

Page 13: D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared

Now fill in the claimed space. We are told that the Stack and Monitor Working Store starts at 0 and extends for 4.5 kilobytes.

4.5 kb = 4608 bytes. As each location is 1 byte in size, this gives us 4608 locations. This section of claimed memory therefore occupies boxes 0 – 4607 (0 –11FFh).

Page 14: D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared

The disk system occupies the top 4KB of memory. This is 4096 bytes or locations.

The top address was 65535 (FFFFh). Counting down from 65535, this gives a starting address of 61440 (F000h).

We now fill in the disk system space.

Page 15: D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared

The I/O Ports and Timers start from E000h and are 64 bits wide.

64 bits is equivalent to 8 bytes or locations.

Counting up from E000h (or decimal 57344), the top address will be E007h (decimal 57351).

Page 16: D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared

RAM started from 18438 (4806h) and was 22KB (or 22528 bytes) in size. This gives us a top address of 40965 (A005h).

Immediately after this (no free space between) came 512 bytes of Video RAM.

Video RAM therefore starts from 40966 (A006h) and ends on 41477 (A205h).

Page 17: D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared

Note that if the space occupied is an even number of addresses, and it starts from an odd number, it must always end on an even one (and vice versa).

Page 18: D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared

Lastly, label all the used blocks and free space.

Page 19: D75P 34 – HNC Computer Architecture Week 5 Memory Maps. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared

Summary

Portions of the RAM will be claimed by the boot code, drivers and operating system on startup.

This can be graphically depicted as a Memory Map.

The top address will be (2address bus width – 1).

Fill in the used memory as directed in the question. Finally, label all the used blocks and

free space.