datasheet - stl38dn6f7ag - automotive-grade n-channel 60 …in order to meet environmental...

NG14G22D1D2RSS13S21

1

2

3

4 5

6

7

8

S1

S2

G1

G2

D1

D2

Drain on rear side

FeaturesOrder code VDS RDS(on) max. ID

STL38DN6F7AG 60 V 27 mΩ 10 A

• AEC-Q101 qualified• Among the lowest RDS(on) on the market• Excellent FoM (figure of merit)• Low Crss/Ciss ratio for EMI immunity• High avalanche ruggedness

Applications• Switching applications

DescriptionThis N-channel Power MOSFET utilizes STripFET™ F7 technology with anenhanced trench gate structure that results in very low on-state resistance, while alsoreducing internal capacitance and gate charge for faster and more efficient switching.

Product status

STL38DN6F7AG

Device summary

Order code STL38DN6F7AG

Marking 38DN6F7

Package PowerFLAT™ 5x6double island

Packing Tape and reel

Automotive-grade N-channel 60 V, 24 mΩ typ., 10 A STripFET™ F7 Power MOSFET in a PowerFLAT™ 5x6 double island package

STL38DN6F7AG

Datasheet

DS12506 - Rev 1 - March 2018For further information contact your local STMicroelectronics sales office.

www.st.com

http://www.st.com/en/product/stl38dn6f7ag

1 Electrical ratings

Table 1. Absolute maximum ratings

Symbol Parameter Value Unit

VDS Drain-source voltage 60 V

VGS Gate-source voltage ±20 V

ID (1) Drain current (continuous) at TC = 25 °C 10 A

ID (1) Drain current (continuous) at TC = 100 °C 10 A

IDM (2) (1) Drain current (pulsed) 40 A

PTOT Total dissipation at TC = 25 °C 57.7 W

IAV Avalanche current, repetitive or not repetitive (pulse width limited by Tjmax) 10 A

EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAV, VDD = 40 V) 50 mJ

Tstg Storage temperature range-55 to 175 °C

TJ Operation junction temperature range

1. Drain current is limited by package, the current capability of the silicon is 33 A at 25 °C and 23 A at 100 °C.2. Pulse width limited by safe operating area

Table 2. Thermal data

Symbol Parameter Value Unit

Rthj-case Thermal resistance junction-case 2.6°C/W

Rthj-pcb (1) Thermal resistance junction-pcb 32

1. When mounted on FR-4 board of 1 inch², 2oz Cu, t < 10 s

STL38DN6F7AGElectrical ratings

DS12506 - Rev 1 page 2/15

2 Electrical characteristics

(TC = 25 °C unless otherwise specified)

Table 3. On/off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

V(BR)DSSDrain-source breakdownvoltage ID = 250 μA, VGS = 0 V 60 V

IDSSZero gate voltage

drain current

VGS = 0 V, VDS = 60 V 1 µA

VGS = 0 V, VDS = 60 V,

TC= 125 °C (1)100 µA

IGSSGate-body leakage

currentVGS = 20 V, VDS = 0 V 100 nA

VGS(th) Gate threshold voltage VDS = VGS , ID = 250 μA 2 4 V

RDS(on)Static drain-source

on-resistanceVGS = 10 V, ID= 5 A 24 27 mΩ

1. Defined by design, not subject to production test.

Table 4. Dynamic


Ciss Input capacitanceVDS = 25 V, f = 1 MHz,

VGS = 0 V

- 380 - pF

Coss Output capacitance - 320 - pF

Crss Reverse transfer capacitance - 7.9 - pF

Qg Total gate charge VDD = 30 V, ID = 10 A,

VGS = 0 to 10 V

(see Figure 13. Test circuit forgate charge behavior)

- 7.9 - nC

Qgs Gate-source charge - 2.9 - nC

Qgd Gate-drain charge - 2.4 - nC

Table 5. Switching times


td(on) Turn-on delay time VDD = 30 V, ID = 5 A,

RG = 4.7 Ω, VGS = 10 V

(see Figure 12. Test circuit forresistive load switching timesand Figure 17. Switching timewaveform)

- 12 - ns

tr Rise time - 9 - ns

td(off) Turn-off delay time - 16 - ns

tf Fall time - 5 - ns

Table 6. Source-drain diode


VSD (1) Forward on voltage ISD = 10 A, VGS = 0 V - 1.3 V

STL38DN6F7AGElectrical characteristics

DS12506 - Rev 1 page 3/15


trr Reverse recovery time ISD = 10 A, di/dt = 100 A/µs

VDD = 48 V

(see Figure 14. Test circuit forinductive load switching anddiode recovery times)

- 21.5 ns

Qrr Reverse recovery charge - 8.5 nC

IRRM Reverse recovery current - 0.8 A

1. Pulsed: pulse duration = 300 µs, duty cycle 1.5%

STL38DN6F7AGElectrical characteristics

DS12506 - Rev 1 page 4/15

2.1 Electrical characteristics (curves)Figure 1. Safe operating area

GIPG210320180951SOA

10 1

10 0

10 -1 10 -1 10 0 10 1

ID (A)

VDS (V)

tp =100 µs

tp =1 ms

tp =10 ms

Operation in this area is limited by R DS(on)

single pulse

TJ≤175 °CTC=25 °C

Figure 2. Thermal impedance

GIPG210320180950ZTH

10 -1

10 -2 10 -5 10 -4 10 -3 10 -2 10 -1

K

tp (s)

0.05

0.02

Figure 3. Output characteristics

GIPG210320180948OCH

30

20

10

00 1 2 3 4 5 6

ID (A)

VDS (V)

VGS =7 V

VGS =5 V

VGS = 8, 9, 10 V

VGS =6 V

Figure 4. Transfer characteristics

GIPG210320180949TCH

30

20

10

00 2 4 6 8

ID (A)

VGS (V)

VDS = 2 V

Figure 5. Gate charge vs gate-source voltage

GIPG210320180950QVG

10

8

6

4

2

00 1 2 3 4 5 6 7 8

VGS (V)

Qg (nC)

VDS = 30 VID = 10 A

Figure 6. Static drain-source on-resistance

GIPG210320180944RID

26.5

25.5

24.50 2 4 6 8 10

RDS(on) (mΩ)

ID (A)

VGS = 10 V

STL38DN6F7AGElectrical characteristics (curves)

DS12506 - Rev 1 page 5/15

Figure 7. Capacitance variations

GIPG210320180949CVR

10 2

10 1 0 10 20 30 40 50 60

C (pF)

VDS (V)

CISS

COSS

CRSS

f = 1 MHz

Figure 8. Normalized gate threshold voltage vstemperature

GIPG210320180947VTH

1.1

1.0

0.9

0.8

0.7

0.6

0.5-75 -25 25 75 125 175

VGS(th) (norm.)

ID = 250 μA

Tj (℃)

Figure 9. Normalized on-resistance vs temperature

GIPG210320180945RON

1.75

1.25

0.75

0.25-75 -25 25 75 125 175

RDS(on) (norm.)

VGS = 10 VID = 10 A

Tj (℃)

Figure 10. Normalized V(BR)DSS vs temperature

GIPG210320180947BDV

1.02

1.00

0.98

0.96-75 -25 25 75 125 175

V(BR)DSS (norm.)

ID = 1 mA

Tj (℃)

Figure 11. Source- drain diode forward characteristics

GIPG210320180948SDF

1.1

1.0

0.9

0.8

0.7

0.6

0.50 2 4 6 8 10

VSD (V)

ISD (A)

TJ = -55 ℃

TJ = 25 ℃

TJ = 175 ℃

STL38DN6F7AGElectrical characteristics (curves)

DS12506 - Rev 1 page 6/15

3 Test circuits

Figure 12. Test circuit for resistive load switching times

AM01468v1

VD

RG

RL

D.U.T.

2200μF VDD

3.3μF+

pulse width

VGS

Figure 13. Test circuit for gate charge behavior

AM01469v1

47 kΩ1 kΩ

47 kΩ

2.7 kΩ

1 kΩ

12 V

IG= CONST 100 Ω

100 nF

D.U.T.

+pulse widthVGS

2200μF

VG

VDD

Figure 14. Test circuit for inductive load switching anddiode recovery times

AM01470v1

AD

D.U.T.S

B

G

25 Ω

A A

B B

RG

GD

S

100 µH

µF3.3 1000

µF VDD

D.U.T.

+

_

+

fastdiode

Figure 15. Unclamped inductive load test circuit

AM01471v1

VD

ID

D.U.T.

L

VDD+

pulse width

Vi

3.3µF

2200µF

Figure 16. Unclamped inductive waveform

AM01472v1

V(BR)DSS

VDDVDD

VD

IDM

ID

Figure 17. Switching time waveform

AM01473v1

0

VGS 90%

VDS

90%

10%

90%

10%

10%

ton

td(on) tr

0

toff

td(off) tf

STL38DN6F7AGTest circuits

DS12506 - Rev 1 page 7/15

4 Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK®packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitionsand product status are available at: www.st.com. ECOPACK® is an ST trademark.

4.1 PowerFLAT™ 5x6 double island WF type R package information

Figure 18. PowerFLAT™ 5x6 double island WF type R package outline

8256945_r16_typeR-WF

STL38DN6F7AGPackage information

DS12506 - Rev 1 page 8/15

http://www.st.com

Table 7. PowerFLAT™ 5x6 double island WF type R mechanical data

Dim.mm

Min. Typ. Max.

A 0.80 1.00

A1 0.02 0.05

A2 0.25

b 0.30 0.50

C 5.80 6.00 6.10

D 5.00 5.20 5.40

D2 4.15 4.45

D3 4.05 4.20 4.35

D4 4.80 5.00 5.10

D5 0.25 0.40 0.55

D6 0.15 0.30 0.45

D7 1.68 1.98

e 1.27

E 6.20 6.40 6.60

E2 3.50 3.70

E3 2.35 2.55

E4 0.40 0.60

E5 0.08 0.28

E6 0.20 0.325 0.45

E7 0.85 1.00 1.15

E8 0.55 0.75

E9 4.00 4.20 4.40

E10 3.55 3.70 3.85

K 1.275 1.575

L 0.725 0.825 0.925

L1 0.175 0.275 0.375

θ 0° 12°

STL38DN6F7AGPowerFLAT™ 5x6 double island WF type R package information

DS12506 - Rev 1 page 9/15

Figure 19. PowerFLAT™ 5x6 double island recommended footprint (dimensions are in mm)

8256945_FP_std_R16

STL38DN6F7AGPowerFLAT™ 5x6 double island WF type R package information

DS12506 - Rev 1 page 10/15

4.2 PowerFLAT™ 5x6 WF packing information

Figure 20. PowerFLAT™ 5x6 WF tape (dimensions are in mm)

1.50 0.0+0.1

Do4.0 0.1(II)Po

1.75 0.1E1

1.50 MIND1

2.0 0.05(I)P2

Y

YR0.30MAX

0.30 0.05T

SECTION Y-Y

Measured from centreline of sprocket holeto centreline of pocket.Cumulative tolerance of 10 sprocketholes is ± 0.20 .Measured from centreline of sprockethole to centreline of pocket.

(I)

(II)

(III)

Base and bulk qua ntity 3000 pcs

P1(8.00±0.1) Ao(6.70±0.1)

F(5.

50±0

.0.0

5)(II

I)

W(1

2.00

±0.1

)

Bo (5

.35±

0.05

)

Ko (1.20±0.1)

8234350_TapeWF_rev_C

Figure 21. PowerFLAT™ 5x6 package orientation in carrier tape

Pin 1 identification

STL38DN6F7AGPowerFLAT™ 5x6 WF packing information

DS12506 - Rev 1 page 11/15

Figure 22. PowerFLAT™ 5x6 reel (dimensions are in mm)

STL38DN6F7AGPowerFLAT™ 5x6 WF packing information

DS12506 - Rev 1 page 12/15

Revision history

Table 8. Document revision history

Date Revision Changes

21-Mar-2018 1 Initial release. The document status is production data.

STL38DN6F7AG

DS12506 - Rev 1 page 13/15

Contents

1 Electrical ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2

2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3

2.1 Electrical characteristics (curves). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7

4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

4.1 PowerFLAT™ 5x6 double island WF type R package information. . . . . . . . . . . . . . . . . . . . . . 8

4.2 PowerFLAT™ 5x6 WF packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14

Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

STL38DN6F7AGContents

DS12506 - Rev 1 page 14/15

IMPORTANT NOTICE – PLEASE READ CAREFULLY

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to STproducts and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. STproducts are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design ofPurchasers’ products.

No license, express or implied, to any intellectual property right is granted by ST herein.

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.

Information in this document supersedes and replaces information previously supplied in any prior versions of this document.

© 2018 STMicroelectronics – All rights reserved

STL38DN6F7AG

DS12506 - Rev 1 page 15/15

1 Electrical ratings2 Electrical characteristics2.1 Electrical characteristics (curves)

3 Test circuits4 Package information4.1 PowerFLAT™ 5x6 double island WF type R package information4.2 PowerFLAT™ 5x6 WF packing information

Revision historyContentsDisclaimer

datasheet - stl38dn6f7ag - automotive-grade n-channel 60 …in order to meet environmental...

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