dcs164

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

01 1.64

Overview for the DCS board

Company : KIP Uni-Heidelberg / Lindenstruth

A4

1 14

Title


Date: Sheet of

01 1.64



A4

1 14

Title


Date: Sheet of

01 1.64



A4

1 14

Editor : Dirk Gottschalk

ADC

JTAG I/O

IntelLXT971ALCEthernet Phy

AlteraEPXA1F484C3FPGA

FlashEPROM

SDRAM

Power Regulators

TTCrx andPLL ClockRecovery

DCS to ROB Connector

1,8 Volt 3,3 Volt

ADCInputs

JTAGconnectors

Ethernet andPowerConnector

OpticalLink

I²C Bus

4...6 Volt Main Power Supply

Page 2

Page 6

Page 3

0

Page 9Page 4

Page 5

Page 8

FPGA Decoupling on Page 11

2005.12.20 10:30

+5 Voltchargepump

CMC ConnectorPage 7

Page 4

CPLD serial shiftregistersfor slow I/Os. Page 8

ECC optional

Power Input

see grounding scheme on page 14 seePLL configuration table on page 13

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SDQ3

SD

Q11

SDQ14

SDQ5

SD

Q10

SD

Q7

SD

Q5

SD

Q15

SDQ2

SDQ11

SDQ1

SDQ7

SDQ9

SD

Q6

SD

Q8

SD

Q1

SD

Q2

SDQ0

SDQ6

SD

Q9

SD

Q14

SDQ4

SDQ10

SDQ15

SDQ13

SD

Q4

SD

Q3

SDQ12

SD

Q0

SD

Q13

SDQ8

SD

Q12

SDQ[15:0]

SDR_CKE

SDR_CLK

SDR_DQMHSDR_CS

SDR_RAS

SDR_SDR_

SDR_WESDR_DQML

3V33V3

3V3

3V3

GND

Title


Date: Sheet of

02 1.60

DCS SDRAM Interface


A3

2 14

Title


Date: Sheet of

02 1.60

DCS SDRAM Interface


A3

2 14

Title


Date: Sheet of

02 1.60

DCS SDRAM Interface


A3

2 14


2003.12.19 14:00

C91

10n

C91

10n

DQ0 2

DQ1 4

DQ2 5

DQ7 13

BA020

BA121

A1022

A023

A1135

A1236

CKE37

CLK38

DQMH39

DQ8 42

DQ9 44

DQ10 45

DQ11 47

DQ12 48

DQ3 7

DQ4 8

DQ5 10

DQ6 11

DQML15

WE16

CAS17

RAS18

CS19

A124

A225

A326

A429

A530

A631

A732

A833

A934

DQ13 50

DQ14 51

DQ15 53

VDD11

VDD214

VDD327

VDDQ13

VDDQ29

VDDQ343

VDDQ449

VSSQ16

VSSQ212

VSSQ346

VSSQ452 GN

D1

28

GN

D2

41

GN

D3

54

NC 40

IC5

MT48LC16M16_TSOP54

IC5

MT48LC16M16_TSOP54

R710kR710k

1 2 3 4

8 7 6 5

RN32

4x330R

RN32

4x330R

C94

47n

C94

47n

1 2 3 4

8 7 6 5

RN20

4x330R

RN20

4x330R

C12

10n

C12

10n

R810kR810k

SDA0 B17

SDA1 G16

SDA2 D16

SDA3 F16

SDA4 A19

SDA5 E16

SDA6 B18

SDA7 F17

SDA8 C17

SDA9 D17

SDA10 B19

SDA11 D18

SDA12 D19

SDA13-BA0 C19

SDA14-BA1 E18

DQ

0B

20

DQ

1C

20

DQ

2F1

8

DQ

3C

21

DQ

4E

20

DQ

5F1

9

DQ

6F2

0

DQ

7G

18

DQ

8H

19

DQ

9G

20

DQ

10E

22

DQ

11H

18

DQ

12G

21

DQ

13H

20

DQ

14H

17

DQ

15H

22

CLK C15

CASn A17

CLKE E15

DQM0 E21

DQM1 J20

RAS C14

WEn F14

CS-N0 G15

CS-N1 B16

DQS0 D22

DQS1 J17

CLKn J16

DDR-VS0 D21

DDR-VS1 G22

DDR-VS2 B15

DQM-ECCB13

DQS-ECCG13

DQ-ECC0D13

DQ-ECC1A15

DQ-ECC2F13

DQ-ECC3C13

DQ-ECC4E13

DQ-ECC5D14

SDRAM Interface

SDRAM Interface pins are notavailable as user I/Os!

These pins are reservedfor future functionallityand should be leftunconnected

IC1B

EPXA1F484C3

SDRAM Interface

SDRAM Interface pins are notavailable as user I/Os!

These pins are reservedfor future functionallityand should be leftunconnected

IC1B

EPXA1F484C3

C15

10n

C15

10n

C13

47n

C13

47n

C9

47n

C9

47n

1 2 3 4

8 7 6 5

RN38

4x330R

RN38

4x330R

1 2 3 4

8 7 6 5RN214x330RRN214x330R

C16

47n

C16

47n

C10

10n

C10

10n

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

TCK

Debug_EN

RSTn

nCfgIn

MTCK

ShdwnNext

E_MJTG

ShdwnNext

nCfgNext

MTDO

MTDI

Boot_Fl

AN_GND

JTAG_Drvr_Dis

MTDIn

MTDIp

TDOFn

TDOFp

TD_EF

MTDI

VErrIn

MTMS

TMS

3V3

3V3

3V3

1V8

3V3

3V3

3V33V3

3V3

3V3

3V3

3V3

1V8

RSTn

3V3

1V8

VERR

nShdwn

IO_C4

MRSTn

Dout1Dout2

Dout4Dout3

Dout5

TTC_rdy

TCK

AP1AP2ARstnACSn

ADMCLKADin

ADoutARdyn

IO_C2

IO_C5

IO_C1

IO_C3

IO_C0

IO_C6

ASclk

IO_C7

SCL

SDA

E_Pause

GND

TD_FC

TD_CE

TMS

CRSTI

CRSTO

Dout0

L1intTrig

Title


Date: Sheet of

03 1.62

DCS JTAG Interface


A3

3 14

Title


Date: Sheet of

03 1.62

DCS JTAG Interface


A3

3 14

Title


Date: Sheet of

03 1.62

DCS JTAG Interface


A3

3 14


power supply supervisorand watchdog timer

differential JTAGinterface receiver

differential JTAG interface driver

DEV-OE and DEV-CLRnwhere expected not to beused as dedicated pins

standart JTAG IF

optional

2005.02.18 13:40

to TTCrxpage 4

connected toTTCrx page 4

connected toADC page 10

connected toEthernet page 9

JTAG Input

JTAG Master Output

debug_en must be highto switch off internalwatchdog timer fortesting and debugging!

TTCrx page 4

AN_GND ( adjacentneibourhood board ground )

Shaded area showsdevices not used forKIP/TRD

IC29 acts as alevel translatorfrom 1V8 to3V3.

page 5 power

page 6 flash eprom

page 8 DCS-ROB con

page 4 TTCrx

page 8 DCS-ROB con

page 4 TTCrx

page 8 DCS-ROB con

page 8DCS-ROBcon

page 5 power

page 8 DCS-ROBcon

page 8 DCS-ROB con

R170100RR170100R

R172100RR172100R

C14910n

C14910n

C19010n

C19010n

TCK Y11

TDI T20

TDO J4

TMS U11

TRST J6

Proc-TCK G3

Proc-TDI G7

Proc-TDO G2

Proc-TMS H6

Proc-TRST G6

JSELECT H5

DEBUG-EN K6RDYnBSYK4

nSTATUSAB12

nCONFIGR4

MSEL0R5

MSEL1T3

INIT-DONEK7

CONF-DONEV12

nCEP19

nCEOH3

nCSN20

CSP17

nRSP16

nWSM21

DATA0P18

DATA1K3

DATA2J1

DATA3L5

Boot-Flash J5

DATA4L4

DATA5L6

DATA6L22

DATA7M18

DCLKR16

CLKUSRL7

nRESETH4

nPORH1

DEV-CLRn R20DEV-OE U16

EN_SELECT H2

Configuration pins and ports

*******

*

**

*

**

*

*

*

Pins with an (*) are available asuser I/O, too.

EN_SELECT is reserved for future use. Connect to GND.

IC1D

EPXA1F484C3

Configuration pins and ports

*******

*

**

*

**

*

*

*

Pins with an (*) are available asuser I/O, too.

EN_SELECT is reserved for future use. Connect to GND.

IC1D

EPXA1F484C3

C225

1n

C225

1n

C82

100n

C82

100n

R7710kR7710k

R121150RR121150R

R10210kR10210k

C109

10n

C109

10n

C76

10n

C76

10n

R88

0R

_Jm

pr

R88

0R

_Jm

pr

1

TP13MRSTnTP13MRSTn

1

23

4

OC5

LTV357T

OC5

LTV357T

1

TP25

PTRST

TP25

PTRST

1234

8765

RN42

4x10k

RN42

4x10k

R73150RR73150R

C77

100n

C77

100n

R83 100RR83 100R

A 1B 2GND 3Out4

VCC5

IC27

NC7SV86P5X

IC27

NC7SV86P5X

31

2

D16

BAR43A

D16

BAR43A

1

23

4

OC2

LTV357T

OC2

LTV357T

1234

8765

RN5 4x22RRN5 4x22R

R61 150RR61 150R

1 2 3 4

8 7 6 5

RN4

4x10k

RN4

4x10k

R563k3R563k3

1

TP29Test_PointTP29Test_Point

R21 100RR21 100R

C83

470n

C83

470n

1

TP21PTCKTP21PTCK

R55

10k

R55

10kR87

100k

R87

100k

1

2 3

4

OC3

LTV357T

OC3

LTV357T

C80

10n

C80

10n

R101

150R

R101

150R

1

TP2

WD_In

TP2

WD_In

C78

470n

C78

470n

12

LED6

green_0603

LED6

green_0603

C230

1n

C230

1n

R97 100RR97 100R

1

TP3 nSTATUSTP3 nSTATUS

R171100RR171100R

R173100RR173100R

C95

1n

C95

1n

R6710kR6710k

1

TP4Init_DoneTP4Init_Done

R65150RR65150R

1

TP22PTDITP22PTDI

31

2D19

BAR43A

D19

BAR43A

Out

1

-V2

+In

3-In

4

+V5

IC29LMV7239M5

IC29LMV7239M5

R159 10kR159 10k

R903k3R903k3

1 23 45 67 89 1011121314

CON5

Header_07x2x2mm

CON5

Header_07x2x2mm

R1150R_JmprR1150R_Jmpr

C26

1n

C26

1n

R9147kR9147k

C89

1n

C89

1n

1

23

4

OC4

LTV357T

OC4

LTV357T

R104 330RR104 330R

R1410kR1410k

1234

8765

RN6 4x22RRN6 4x22R

C227

10n

C227

10n

R98 2k2R98 2k2

R132

10k

R132

10k

1TP23

PTDO

TP23

PTDO

R2210kR2210k

OUTA2

OUTA3

OUTB6

OUTB5

OUTC10

OUTC11

OUTD14

OUTD13

VC

C16

GN

D8

G 12G 4

INA 1

INB 7

INC 9

IND 15

IC4

AM26LV31C_SO16

IC4

AM26LV31C_SO16

C148

10n

C148

10n

R154k7R154k7

12

34

56

78

910

CON4

Header_05x2x2mm

CON4

Header_05x2x2mm

C136

10n

C136

10n

C88

100n

C88

100n

C86

100n

C86

100n

C224

1n

C224

1n

R160 10kR160 10k

R244k7R244k7

1 23 45 67 89 1011121314

CON9

Header_07x2x2mm

CON9

Header_07x2x2mm

R116 10kR116 10k

R161

330R

R161

330R

R18100kR18100k


1

23

4

OC1

LTV357T

OC1

LTV357T

R117

10k

R117

10k

1

TP24PTMSTP24PTMS

OUTA3

OUTB13

OUTC5

OUTD11

VC

C16

GN

D8

INA 2

INA 1

INB 14

INB 15

INC 6

INC 7

IND 10

IND 9G4

G12

IC6

AM26LV32C_SO16

IC6

AM26LV32C_SO16

IO-137K19

IO-138K17

IO-139K18

IO-140K15

IO-141L19

IO-142L15

IO-143K20

IO-144L16

IO-145K21

IO-146L20

IO-147L17

IO-148 L21

IO-149L18 IO-150 M19

IO-151 M16

IO-152 M20

IO-153 M17

IO-154 N16

IO-155 M22

IO-156 P20

IO-157 N22

IO-158 P22IO-159 R22

Block 13 I/Os

IC1L

EPXA1F484C3

Block 13 I/Os

IC1L

EPXA1F484C3

Sense11

Sense22

PFI3

GND4 RST 5PFO 6WDI 7VCC 8

IC8

TPS3306-18DGK

IC8

TPS3306-18DGK

R81 100RR81 100R

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Brcst6SinErr

Brcst3BrcstStr1Brcst2SubAd7SubAd0DBErrSubAd1SubAd2SubAd4SubAd6

DoutStrSubAd3

SubAd5Dout7Dout6

BCntStrbBCnt8EvCntLStr

BCnt3BCnt4SerBChanBCnt0BCnt1

BCnt10EVCntRes

BCnt5Brcst5BCnt6BCnt7Brcst4Brcst7BCnt11EvCntHStr

BCnt2ClkL1AccBrcstStr2

BCnt9

GND_PLL

GND_PLL

Clo

ck40

Des

2

SCL

SDA

DoutStr

BCnt2

SubAd0

Brcst5

BCnt3Dout6

Brcst4

BCnt1

Brcst7

BCnt10

BCnt6

SubAd3

BCnt5

Dout4

BrcstStr2

EVCntRes

BCntStrb

Dout7

EvCntLStr

BCnt11 SubAd5

SubAd2

Sub

Ad[

7..0

]

SubAd7

Dout3

Brcst2

SubAd6

SubAd4

Brcst6

BCnt8

SinErr

Dout5

BrcstStr1

BCnt9

BCnt4

Clock40Des1

ClkL1Acc

SubAd1

Brcst3

BCnt7

BCnt0 Dout2

EvCntHStr

Dout1Dout0

VCC_PLL

PLL_ICLK

TTC_Rdy

SerBChan

DbErr

3V3

3V3

3V3

5V

3V3

3V3

1V8

3V3

3V33V3

3V3

3V3

3V3

3V3

3V3

SDA

SCL

3V3

5V

IO_A1

IO_A4IO_A5

IO_A3

IO_A0

SubAd1

SubAd4

SubAd6SubAd5

SubAd2

SubAd7

SubAd3

SubAd0

TTC_Rdy

BCnt0BCnt1BCnt2

BCnt4

BCnt7BCnt8BCnt9

BCnt10BCnt11

Brcst2Brcst3Brcst4

IO_A2

Dout0Dout1Dout2Dout3Dout4Dout5

BCntRes

Brcst5Brcst6Brcst7

BrcstStr1BrcstStr2

EVCntRes

Dout6Dout7

L1Accept

ClkVar1pClkVar1n

Trigger1pTrigger1nTrigger2pTrigger2n

40MHz1p40MHz1n

Clock1pClock1nClock2pClock2n

1V8

VregShdn 1VregShdn 2VregShdn 3

VCC_In

GND_TPLL

BCnt6

EvCntHStrEvCntLStrBCntStrb

ClkL1Acc

MRSTnDbErr

BCnt3

VregShdn 4

SinErr

DOutStr

TTC_DQ1

TTC_DQ3

SerBChan

TTC_DQ2

TTC_DQ0

GND

nShdwn

L1intTrig

Title


Date: Sheet of

04 1.64

Clock Regeneration and Distribution with TTCrx


A3

4 14

Title


Date: Sheet of

04 1.64



A3

4 14

Title


Date: Sheet of

04 1.64



A3

4 14


Lock2 Lock4

HFBR-2416may fit, too,but pulse widthdistortion isworth thanHFBR-2316T

2006.05.03

ROB connector page 8

AUX connectorpage 7

JTAG page 3

JTAG page 3

AUX connector page 7

ROB connector page 8

to ROB connector page 8

to ROB connectorpage 8

to JTAG page 3

if_PLL_EN_unused

if_P

LL_o

fffor HFBR2316

for HFBR2316

for TRR-1B43

Shaded area showsdevices not used forKIP/DCS

or HFBR-2316T

Keep these signalsas short as possible!

Keep <10mm

Voltage regulator IC28 only used if low supplynoise for PLL required.

clock lineseparation buffer

RN49, 50,51 and 52 are TTCrxstart up configuration resistors

populate R122 ifVreg not used

PLL frequency is defined by resistorsR68, R99, R100, R105 and R107 toR110. If the voltage regulator shutdownfeature is not needed the CPLD canconfigure the PLL via RN48 whichotherwise is not populated.

connect capacitors C44,C50 and C56 as close aspossible to PLL IC23!

*!

*! keep this GND connectionnear/between TTCrx and IC28 !

Please see grounding schemefor PLL layout on page 12.

TTCrx can shift Clock40Desn phasein 104ps steps between 0 and 25ns. JTAG page 3

for T

RR

-1B

43

for T

RR

-1B

43

for HFBR2316

for H

FBR

2316

HFBR-2316T TRR-1B43Pin

2

3

6

7

Out

VEE/GND

VCC

GND

Outn

Outp

GND

VCC

LP3988IMF-3.3 may beused too but C20 shouldbe left unpopulated then.

ROB con. page 8

TPC PLL configurationtable see page 13 !

leadfree: CFPS-73 40MHz

1R for CFPSoscillator !!

C97

470n

C97

470n

1234

8765

RN31 4x47RRN31 4x47R

1 2 3 4

8 7 6 5

RN504x10kRN504x10k

R168

0R

_Jm

pr

R168

0R

_Jm

pr

1 TP7 TTC_TCKTP7 TTC_TCK

C121

10n

C121

10n


R6451RR6451R

1234

8765

RN29 4x10kRN29 4x10k

1234

8765

RN48 4x0R_JmprRN48 4x0R_Jmpr

C100

10n

C100

10n

R33150RR33150R

R107 0R_JmprR107 0R_Jmpr

1 TP1 TTC_TDITP1 TTC_TDI

R123 2R2R123 2R2

Vin1 Vout 5

GN

D2

BP 4EN3

IC28

LP3985IM5-3.3

IC28

LP3985IM5-3.3

C188

100n

C188

100n

1

TP27Clk40TP27Clk40

R29

0R_Jmpr

R29

0R_Jmpr

C119

10n

C119

10n

R114 10kR114 10k

C92

100n

C92

100n

NC

11

Out

2

V_O

3

NC

24

NC

35

P2

6P

17

NC

48

OR1

TRR-1B43

OR1

TRR-1B43

C130

100n

C130

100n

1 2 3 4

8 7 6 5

RN494x10kRN494x10k

R13651RR13651R

C85

100n

C85

100n

C96

100n

C96

100n

R7210kR7210k

C50

100n

C50

100n

R11 2R2R11 2R2

1234

8765


R130150RR130150R

C101

10n

C101

10n

R6910kR6910k

C124

2uF2

C124

2uF2


1TP8

TTC_TRSTTP8

TTC_TRST


C105

100n

C105

100n

C66

10n

C66

10nA1

B2

GND3 Out 4

VCC 5

IC26 NC7SV86P5XIC26 NC7SV86P5X

IO-0U4

IO-1W3

IO-2T5

IO-3T4

IO-4V3

IO-5T6

IO-6W2

IO-7T7

IO-8U3

IO-9W1

IO-10T8

IO-11V2

IO-12U2

IO-13R3

IO-14P5

IO-15P4

IO-16R7

IO-17R2

IO-18P3

IO-19P6

IO-20 R1

IO-21 P7

IO-22 P2

IO-23 P1

IO-24 N5

IO-25 N4

IO-26 N6

IO-27 N3

IO-28 N2

IO-29 N7

IO-30 N1

IO-31 M5

IO-32 M4

IO-33 M3

IO-34 M6

IO-35 L1

IO-36 M7

IO-37 L2

IO-38 L3

Block 9 I/Os

IC1H

EPXA1F484C3

Block 9 I/Os

IC1H

EPXA1F484C3

R124 2R2R124 2R2

C93

470n

C93

470n

EN1

GND2 Out 3

VCC 4

OSC1

IQXO-71 40MHz

OSC1

IQXO-71 40MHz

C186

10n

C186

10n


C117

100n

C117

100n

12

LED1

gree

n_06

03 LED1

gree

n_06

03

C69

1n

C69

1n

R169

0R

_Jm

pr

R169

0R

_Jm

pr

1 TP5 TTC_TMSTP5 TTC_TMS

C122

100n

C122

100n

C20

10n NPO

C20

10n NPO


R7951RR7951R

C125

100n

C125

100n

R12

2R2

R12

2R2

C38

4uF7

C38

4uF7

R35

0R

_Jm

prR35

0R

_Jm

pr

C102

470n

C102

470n


R155do not populateR155do not populate

EN121

InA2

InB3

VCC4

GND5

InC6

InD7

EN348

OutAp 16

OutAn 15

OutBp 14

OutBn 13

OutCp 12

OutCn 11

OutDp 10

OutDn 9

IC10 SN75LVDS391PWIC10 SN75LVDS391PW

R312R2R312R2

R622k2R622k2

R128 330RR128 330R

R25100RR25100R


C120

10n

C120

10n

C114

470n

C114

470n

VD

D1

1V

DD

22

VD

D3

3C

LK2

4O

E2

5FB

CLK

6O

E1

7FB

IN8

ICLK

9

S3

10

S2

11

S1

12

S0

13

GN

D3

14

GN

D2

15

GN

D1

16

IC23ICS670M-01IC23ICS670M-01

R7110kR7110k

R167

0R

_Jm

pr

R167

0R

_Jm

pr

R92

51R

R92

51R

C56

470n

C56

470n

1234

8765


1 2 3 4

8 7 6 5

RN524x10kRN524x10k

R13 2R2R13 2R2

R910kR910k

1 TP6 TTC_TDOTP6 TTC_TDO

NC

21F4

NC

22F9

Clock40 H11

L1Accept J8

Dout0 B6

Dout1 C6

Dout2 B5

Dout3 C5

Dout4 D5

Dout5 A4

Dout6 B4

Dout7 C4

SubAddr0 E8

SubAddr1 E7

SubAddr2 B9

SubAddr3 A9

SubAddr4 C9

SubAddr5 A8

SubAddr6 D8

SubAddr7 F6

DQ0 B7

DQ1 A7

DQ2 C7

DQ3 D7

DoutStr A6

Serial_B_Channel K4

ClockL1Accept F8

SinErrStr E9

DbErrStr C12

Reset_b C2

TTC_Ready D2

JTA

G T

DI

H4

JTA

G T

MS

J3

JTA

G T

DO

J1

NC

44M

12N

C43

M11

D_V

DD

1A

5

D_V

DD

2B

8

D_V

DD

3D

1

D_V

DD

4E

12

D_V

DD

5E

3

D_V

DD

6H

9

D_V

DD

7H

1

D_V

DD

8J1

2

D_V

DD

9K

7

D_V

DD

10M

4

VD

DF5

D_VDD_C1 G10

D_VDD_C2 G9

D_VDD_C3 H12

AV

DD

1G

4A

VD

D2

G3

NC

1A

1

NC

2A

2

NC

3A

3

NC

4A

10

NC

5A

11

NC

6A

12

NC

7B

1

NC

8B

2

NC

9B

3

NC

10B

10

NC

11B

11

NC

12B

12

NC

13C

3

NC

14C

10

NC

15C

11

NC

16D

4

NC

17D

9

NC

18E

6

NC

19F2

NC

20F3

InF1

In_bG1

Clock40Des1 G12Clock40Des2 F12

SCLH3

SDAJ2

PromDC1

PromResetD3

PromClkE5

BCnt0L7

BCnt1M7

BCnt2G7

BCnt3K6

BCnt4M6

BCnt5L6

BCnt6J6

BCnt7J5

BCnt8M5

BCnt9L5

BCnt10L4

BCnt11H6

EvCntHStrJ7

EvCntLStrK8

BCntStrbL8

Brcst2D12

Brcst3D11

Brcst4J11

Brcst5J10

Brcst6K11

Brcst7K9

EvCntResL9

BCntResM9

BrcstStr1D10

BrcstStr2K12

JTA

G_T

RS

T_b

M2

JTA

G T

CK

K1

D_G

ND

1C

8

D_G

ND

2D

6

D_G

ND

3E

1

D_G

ND

4E

4

D_G

ND

5E

10

D_G

ND

6F7

D_G

ND

7G

5

D_G

ND

8H

10

D_G

ND

9K

5

GN

D1

E2

GN

D2

H2

GN

D3

M8

D_G

ND

_C1

E11

D_G

ND

_C2

G8

D_G

ND

_C3

G11

G_G

ND

G2

NC

23F1

0

NC

24F1

1

NC

25G

6

NC

26H

5

NC

27H

7

NC

28H

8

NC

29J4

NC

30J9

NC

31K

2

NC

32K

3

NC

33K

10

NC

34L1

NC

35L2

NC

36L3

NC

37L1

0

NC

38L1

1

NC

39L1

2

NC

40M

1

NC

41M

3

NC

42M

10

IC7

TTCrx 3.2

IC7

TTCrx 3.2

I11

GND2

I03 Out 4VCC 5S 6

IC24

NC7SV157P6X 2-in Mux

IC24

NC7SV157P6X 2-in Mux

R200R_Jmpr

R200R_Jmpr

R28150RR28150R


C129

10n

C129

10n

C103

100n

C103

100n

R122

0R_Jmpr

R122

0R_Jmpr

C98

100n

C98

100n

C261

470n

C261

470n

CLK1p U1

CLK2p R21

CLK3p V1

CLK4p P21

Lock2 U17

Lock4 Y22

CLKLK-ENA R6

CLKLK-out2p U22

CLKLK-FB2p N21

CLK-REFH7

Clocks and PLLs

IC1E

EPXA1F484C3

Clocks and PLLs

IC1E

EPXA1F484C3

R112 10kR112 10k

C118

100n

C118

100n

C128optional

C128optional

12

LED2

gree

n_06

03

LED2

gree

n_06

03

C112

100n

C112

100n

R12933RR12933R

C123

470n

C123

470n

C44

1n

C44

1n

A1

B2

GN

D3

Out

4

VC

C5

IC32

NC

7SV

32P

5X O

R-G

ate

IC32

NC

7SV

32P

5X O

R-G

ate

1 2 3 4

8 7 6 5

RN514x10kRN514x10k

C75

100n

C75

100n

R135 51RR135 51R

C90

10n

C90

10n

C126

10n

C126

10n


C62

10n

C62

10n

C116

100n

C116

100n

R632k2R632k2

C110

1n

C110

1n

EN121

InA2

InB3

VCC4

GND5

InC6

InD7

EN348

OutAp 16

OutAn 15

OutBp 14

OutBn 13

OutCp 12

OutCn 11

OutDp 10

OutDn 9

IC25

SN75LVDS391PW

IC25

SN75LVDS391PW

R26100RR26100R

R16

470R

R16

470R


R7010kR7010k

C127

10uF

C127

10uF

R322R2R322R2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

GND_PW

GND_PW

3V3

1V8

3V3

VERR

nShdwn

5V

GND_PW

GND_TPLL

GND_PW MVCC

VregTemp

GND_PW

VCC_In

Title


Date: Sheet of

05 1.63

DCS Board Voltage Regulators


A

5 14

Title


Date: Sheet of

05 1.63



A

5 14

Title


Date: Sheet of

05 1.63



A

5 14


1V8/1,5A

3V3/3A

Charge pump for the HFBR2316 optical link receiver

2005.02.14 13:20

All capacitors are 10 Volt minimum. Kelvin connections to caps preferred!

max. 5,5Volt Input


PGND*

Do not connect Power GND netsdirectly to the plane but route viathe voltage regulators and mainsupply decoupling capacitors(10uF and 22uF) !! Use plane keepout or whatever ....

Main Power Input 3.8 ... 4.3 Volt

TO220-5

TO263-5

<10mm !!

!*

!*

!*For the National semiconductorvoltage regulators the outputcapacitor ESR must be between0.2R and 5R !! See datasheet !

<10mm !!

Wel

wyn

LR

or e

qu.

VReg

GND layer traceto power inputconnectors

GND layertrace to boardground plane

VIAs

top layer toVreg GNDconnection

interrupt GND planehere. Route to toplayer. Connect allVReg capacitors tothis vias. Do notconnect capsdirectly to plane.

Welwyn LR or equ.

Connector for currentand input voltagemeasurement

CON10 is for voltage measurement bythe adjacent DCS board. Connect onlydifferentially to the ADC . Do notconnect the GND pins of one DCSboard here to GND of the other board.The GND pins must be connected toone of the differential ADC inputs.

TO220-5

C226

10n

C226

10n

Vin2

SD1

GN

D3

ERR 5

Vout 4

TAB

6IC12

LP3963ET-3.3

IC12

LP3963ET-3.3

R3710kR3710k

R150 20kR150 20k

+ C32

330uF/10V

+ C32

330uF/10V

+ C81

47uF/10V_Tant

+ C81

47uF/10V_Tant

C219

220n

C219

220n

11

22

CON3Header_02x1CON3Header_02x1

C139

10n

C139

10n

R106 2R2R106 2R2

31

2D18

BAT54C

D18

BAT54C

R1531kR1531k

R125330RR125330R

R3810kR3810k

C84

22uF

C84

22uF

C131

100n

C131

100n

+ C79

47uF/10V_Tant

+ C79

47uF/10V_Tant

C220

2uF2

C220

2uF2

R141 0.1R/1WR141 0.1R/1W

31

2

D15

BAR43A

D15

BAR43A

C140

100n

C140

100n

C106

22uF

C106

22uF

R60

0.2R/1W

R60

0.2R/1W

12

LED10

green_0603

LED10

green_0603

R154 10kR154 10k

R3910kR3910k

C142

10uF

C142

10uF

R12610kR12610k

C8

10n

C8

10n

C221

100n

C221

100n

1 23 45 67 89 10

CON8

Header_05x2

CON8

Header_05x2

+ C11

330uF/10V

+ C11

330uF/10V

C137

100n

C137

100n

Vin2

SD1

GN

D3

ERR 5

Vout 4

TAB

6IC11

LP3962ET-1.8

IC11

LP3962ET-1.8

R151 10kR151 10k

C133

10n

C133

10n

nc1

EN2

Vin3

GND4 PGND 5Cpn 6Cpp 7Vout 8

IC15

REG711EA-5

IC15

REG711EA-5

R36

10k

R36

10k

R147 20kR147 20k

NTC110kNTC110k

C222

470n

C222

470n

+ C14

330uF/10V

+ C14

330uF/10V

1

32

Q1BC859C

Q1BC859C

1 23 45 6

CON10

Header_03x2

CON10

Header_03x2

C180

100n

C180

100n

R1521kR1521k

C134

100n

C134

100n

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

A[19:0]

A7

DQ

9

DQ

12

A12

A20

A8

DQ5

DQ

3

DQ8

A19

A14

A1

A4

DQ2

A10DQ12

A8

DQ10

A7

A7

A6

DQ

7DQ3

A13

DQ0

DQ[15:0]

DQ

13

A16

DQ1

DQ

6

A12

A0

DQ

1

DQ

5

DQ

0

A1

A2

A4 DQ13

DQ3A18

DQ1

A9

A16

DQ7

A0

A11

A18

A5

A11A11

DQ9

DQ

2

A10

A12

A3

A0

A6

DQ

4

A5

DQ

8

DQ6

DQ13

A2 DQ4

DQ14

A20

DQ11

DQ8

A15

DQ

14

A5A6

A17

DQ

11

A3

DQ10

A14

DQ0

DQ9

DQ6

DQ15

A10

A1

A15

A3

A9

DQ

15

DQ7

A17

DQ11D

Q10

A2 DQ2

DQ14

DQ12

RDY_BSY

A9

A4

A8

A13

A19

DQ5DQ4

DQ15

3V3

3V3

3V3

3V3

3V3

RSTn

prog_Flash

IRQFL

BUSYFL

LockFL

IFcfgFL

GND

Title


Date: Sheet of

06 1.60

Expansion Bus Interface (EBI)


A4

6 14

Title


Date: Sheet of

06 1.60



A4

6 14

Title


Date: Sheet of

06 1.60



A4

6 14


EBIA0 :seeAlteraAN143

AT49BV322AT

AT49BV320AT

Am29DL640D

Am29LV320D

TE28F320C3TC90

M29W320DT90N1

MBM29DL164TD

R1 R2 R3Settings

X X

X

X

X X

X

X

X

X

MBM29DL32xTE

R95

X

X

X

X

X

XThere are two types of Flash Eproms.Pins 9, 13, 14 and 15 are connecteddisparately. Especialy adress pins 19and 21 are exchanged.

2004.11.23 16:30

ACK is claimed to beunreliable in Errata Sheet ver.1.2 Febr. 2003 page2 !! SoACK should not be used !

connected to FPGA onDCS-ROB connector page 8



R9610kR9610k

C4

100n

C4

100n

1234

8765RN1 4x10kRN1 4x10k


1TP16

EBI_Clk

TP16

EBI_Clk

R82 10kR82 10k

C6

10n

C6

10n

R510kR510k



RY/BY 15A1717

A718A619A520A421A322A223A124A025

CE26

GND1 27

OE28

DQ0 29

DQ8 30

DQ9 32

DQ10 34

DQ11 36

VCC37

DQ12 39

DQ13 41

DQ14 43

DQ7 44

DQ15/A-1 45

BYTE47

A1648A151A142A133A124A115A106A97A88

WE11RST12

DQ1 31

DQ2 33

DQ3 35

DQ4 38

DQ5 40

DQ6 42

GND2 46

A1816

A199

A2010

A2113

WP/ACC 14

IC2 AM29LV640D-TSSOP48IC2 AM29LV640D-TSSOP48

R950R_JmprR950R_Jmpr C7

100n

C7

100n

R7510kR7510k

R2

0R_Jmpr

R2

0R_Jmpr

RSTn1

CEn2

WEn3

OEn4

A125

A116

A107

A98

A89

A710

A611

VCC12

GND13

A514

A415

A316

A217

A118

A019

BHEn20

res121

IF_cfg22

Lockn23

ID024

GND2 48

IRQn 47

D15 46

D14 45

D13 44

D12 43

D11 42

D10 41

D9 40

D8 39

res2 38

VCCQ 37

GND3 36

D7 35

D6 34

D5 33

D4 32

D3 31

D2 30

D1 29

D0 28

busyn 27

ID1 26

GND4 25

Dis

kOnC

hip

Mill

eniu

m P

lus

16/3

2MB

IC3

MD2811-Dxx-V3

Dis

kOnC

hip

Mill

eniu

m P

lus

16/3

2MB

IC3

MD2811-Dxx-V3

C2

10n

C2

10n

EBI-A0 C5

EBI-A1 A4

EBI-A2 D7

EBI-A3 A5

EBI-A4 E7

EBI-A5 B6

EBI-A6 C7

EBI-A7 A6

EBI-A8 F8

EBI-A9 B7

EBI-A10 D8

EBI-A11 C8

EBI-A12 E8

EBI-A13 A7

EBI-A14 G9

EBI-A15 B8

EBI-A16 F9

EBI-A17 A8

EBI-A18 E9

EBI-A19 C9

EBI-A20 D9

EBI-A21 B9

EBI-A22 H10

EBI-A23 A9

EBI-A24 G10

EB

I-D

Q0

D10

EB

I-D

Q1

F10

EB

I-D

Q2

C10

EB

I-D

Q3

E10

EB

I-D

Q4

A10

EB

I-D

Q5

G11

EB

I-D

Q6

B10

EB

I-D

Q7

F11

EB

I-D

Q8

D11

EB

I-D

Q9

E11

EB

I-D

Q10

C11

EB

I-D

Q11

B11

EB

I-D

Q12

F12

EB

I-D

Q13

A12

EB

I-D

Q14

E12

EB

I-D

Q15

B12

EBI-WEn G8

EBI-OEn D2

EBI-BE0 D1

EBI-BE1 H9

EBI-CS0 C2

EBI-CS1 B3

EBI-CS2 D3

EBI-CS3 C4

EBI-ACK B4

EBI-CLK C3

Expansion Bus Interface (EBI) Block 6

EBI pins are not available as user I/Os

IC1C

EPXA1F484C3

Expansion Bus Interface (EBI) Block 6

EBI pins are not available as user I/Os

IC1C

EPXA1F484C3

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

3V3

EVCntLStrEVCntHStr

Dout7Dout6

DbErr

SinErrBrcst2Brcst3Brcst4

BCnt0BCnt1BCnt2BCnt3

BCnt4

SubAd0SubAd1SubAd2SubAd3

SubAd4SubAd5SubAd6SubAd7

SerBChanEVCntResBrcstStr2BrcstStr1

ClkL1AccBCnt11BCnt10

BCnt9BCnt8BCnt7BCnt6

3V3

ExtInt

DOutStr

Brcst5Brcst2Brcst6Brcst7

BCntStrb

IO_B0IO_B1IO_B2IO_B3

IO_B7IO_B6IO_B5IO_B4

Vre

gShd

n 1

Vre

gShd

n 2

Vre

gShd

n 3

Vre

gShd

n 4

Vre

gShd

n 6

Vre

gShd

n 5

Vre

gShd

n 11

Vre

gShd

n 12

Vre

gShd

n 13

Vre

gShd

n 14

Vre

gShd

n 15

Vre

gShd

n 16

Vre

gShd

n 18

Vre

gShd

n 17

Vre

gShd

n 19

Vre

gShd

n 20

Vre

gShd

n 21

Vre

gShd

n 22

Vre

gShd

n 23

Vre

gShd

n 24

GND_TPLL

Title


Date: Sheet of

07 1.60

DCS AUX Connector


A3

7 14

Title


Date: Sheet of

07 1.60

DCS AUX Connector


A3

7 14

Title


Date: Sheet of

07 1.60

DCS AUX Connector


A3

7 14


2004.11.23 16:55

to DCS to ROB connector page 8

to TTCrx page 4

to TTCrx page 4

Devices on thispage are not usedfor KIP/DCS

to DCS to ROB connector page 8


INT_EXT_PIN B5

IC1M

EPXA1F484C3

IC1M

EPXA1F484C3

1 2 3 4

8 7 6 5

RN17

4x47R

RN17

4x47R

1 2 3 4

8 7 6 5

RN13

4x47R

RN13

4x47R1

TP14

INT

TP14

INT

1357911131517192123252729313335373941434547495153555759

2468

1012141618202224262830323436384042444648505254565860

CON6

Header_30x2

CON6

Header_30x2

1 2 3 4

8 7 6 5

RN15

4x47R

RN15

4x47R

1 2 3 4

8 7 6 5

RN

16

4x47R

RN

16

4x47R

C182

100n

C182

100n

1 2 3 4

8 7 6 5

RN12

4x47R

RN12

4x47R

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AA

7

AB

15

LVD

Sup

1pLV

DS

up1n

LVD

Sup

2n

LVD

Sdo

wn6

nLV

DS

dow

n6p

LVD

Sdo

wn2

n

LVD

Sdo

wn1

pLV

DS

dow

n1n

LVD

Sup

2nLV

DS

up2p

LVD

Sup

1nLV

DS

up1p

Vre

gShd

n 13

Vre

gShd

n 14

Vre

gShd

n 15

Vre

gShd

n 16

Vre

gShd

n 17

Vre

gShd

n 18

LVD

Sdo

wn5

nLV

DS

dow

n5p

Vre

gShd

n 6

Vre

gShd

n 5

LVD

Sup

3n

LVD

Sdo

wn7

p

LVD

Sdo

wn1

nLV

DS

dow

n1p

Vre

gShd

n 24

Vre

gShd

n 23

Vre

gShd

n 21

VregShdn 8

IO_B1

IO_B0

IO_B7IO_B5

LVD

Sup

2p

IO_B

2IO

_B1

IO_B

0

IO_B2

Vre

gShd

n 22

LVD

Sdo

wn2

p

LVD

Sdo

wn2

p

AB

8A

B6

AA9

AA10

AB9

AB10IO_B6

LVD

Sup

8pLV

DS

dow

n8p

LVD

Sdo

wn8

n

LVD

Sdo

wn7

n

AUX4

AA

17A

A16

AA

15

AA14

AB14

AA

4

LVD

Sdo

wn2

n

AA

9A

B10

AA

10

AB

9

Y3

AA

3

Y2

LVD

Sup

7n

LVD

Sup

7p

LVD

Sup

5n

LVD

Sup

8n

LVD

Sdo

wn5

p

LVD

Sdo

wn6

n

LVD

Sdo

wn7

n

LVD

Sdo

wn5

n

LVD

Sdo

wn6

p

LVD

Sdo

wn8

pLV

DS

dow

n8n

LVD

Sdo

wn7

p

SRStr

SRShClkSROEn

SRDin

SRMRn

SRMRn

SRDin

VregShdn 9

TCK

SRIO

aux2aux1

SRIO

aux1

aux2

IO_D

5IO

_D7

IO_D

6IO

_D4

IO_D

2IO

_D0

IO_D3

IO_D2

IO_D1

IO_D0

IO_D5

IO_D7

IO_D4

AA

8

IO_B3AB4

SRDinSRShClkSROEnSRIO

AUX3

IO_D6

Vre

gShd

n 19

LVD

Sup

3p

TxD

LVD

Sdo

wn4

n

LVD

Sdo

wn3

n

Vre

gShd

n 20

LVD

Sup

4p

IO_D

3IO

_D1

LVD

Sup

4n

Vre

gShd

n 12

LVD

Sdo

wn3

p

LVD

Sdo

wn4

p

Vre

gShd

n 3

Vre

gShd

n 1

VregShdn 4

IO_B

5IO

_B6

IO_B

7

IO_B

3

IO_B4

IO_B

4

RxD

LVD

Sup

8n

LVD

Sup

7n

Vre

gShd

n 11

LVD

Sup

5p

LVD

Sup

6p

LVD

Sup

5n

LVD

Sup

6n

VregShdn 2

Vre

gShd

n 4

Vre

gShd

n 2

LVD

Sdo

wn3

nLV

DS

up3n

LVD

Sdo

wn4

nLV

DS

up4n

LVD

Sup

6n

AUX4

AUX3

aux5

aux5

aux4

aux3

AB

17

SRStr

SRShClk

SROEn

Vre

gShd

n 9

VregShdn 10

Vre

gShd

n 8

Vre

gShd

n 10

Vre

gShd

n 7

VregShdn 7

3V3

3V3

3V3

3V3

3V3 1V8

1V8

3V3

3V3

3V3

Clo

ck2n

Clo

ck1p

Clo

ck1n

Trig

ger1

pTr

igge

r2p

Trig

ger2

nTr

igge

r1n MV

CC

MRSTn

IO_C

7IO

_C6

IO_C

5IO

_C4

IO_C

3IO

_C2

IO_C

0IO

_C1

SC

L

AA

in8

AA

in7

AA

in2

AA

in1

TCK

TTC_DQ3BCntRes

TTC_DQ1

TTC_DQ0

TTC_DQ2L1Accept

prog_Flash

IO_A

5IO

_A4

IO_A

3IO

_A2

IO_A

1IO

_A0

LockFL

IFcfgFL

IRQFL

BUSYFL

IO_B1

IO_B0

IO_B2

IO_B6

IO_B5IO_B7

IO_B4

VregShdn 2

VregShdn 4

VregShdn 6

VregShdn 1

VregShdn 11

VregShdn 3

VregShdn 13VregShdn 14


VregShdn 18

VregShdn 19



VregShdn 17

VregShdn 12

VregShdn 5

TD_FC

VregShdn 22

1V8

IO_B3

Ext

Int

GND

Clk

Var

1pC

lkV

ar1n

TD_CE

CRSTICRSTO

TMS

GND_PW

Clo

ck2p

40M

Hz1

n40

MH

z1p

SD

A

3V3

SerBChan

Title


Date: Sheet of

8 1.60

DCS DIMM and LVDS port


A3

8 14

Title


Date: Sheet of

8 1.60



A3

8 14

Title


Date: Sheet of

8 1.60



A3

8 14


2005.02.14 12:00

connected toJTAG page 3

connectedto TTCrx onpage 4

connected toFlash page 6

to JTAG page 3

all VregShdn pins connected on AUX connectorpage 7. May be configured as PCI pins.

UART

GND_PW* -> Do not connect these GNDnets directly to the plane but route viathe voltage regulators and main supplydecoupling capacitors !

Shaded area showsdevices not used forTRD/DCS

to JTAG page 3

RN18 may connectVRegShdn pins 7 to 10directly to FPGA if the CPLDis not populated.

to Clock page 4

to Clock page 4

to C

lock

page

4to

Clo

ckpa

ge 4

to A

UX

con

nect

or p

age

7to

AU

X c

onne

ctor

pag

e 7

connected toJTAG page 3

to A

UX

con

nect

or p

age

7


C184

100n

C184

100n

R134

10k

R134

10k

1 2 3 4

8 7 6 5

RN464x47RRN464x47R


IO-39W11

IO-40T11

IO-41AB10

IO-42V10

IO-43AA10

IO-44W10

IO-45Y10

IO-46U10

IO-47AB9

IO-48T10

IO-49AA9

IO-50R10

IO-51Y9

IO-52W9

IO-53AB8

IO-54V9

IO-55AA8

IO-56AB6

IO-57U9

IO-58Y8

IO-59AA7

IO-60W8

IO-61AB5

IO-62 V8

IO-63 AA6

IO-64 AA5

IO-65 V7

IO-66 Y7

IO-67 W7

IO-68 Y6

IO-69 V5

IO-70 V4

IO-71 V6

IO-72 W5

IO-73 Y5

IO-74 U6

IO-75 Y4

IO-76 U7

IO-77 AA4

IO-78 AB4

IO-79 U8

IO-80 AA3

IO-81 T9

IO-82 Y3

IO-83 Y2

Block 10 I/Os

IC1I

EPXA1F484C3

Block 10 I/Os

IC1I

EPXA1F484C3

11

33

55

77

99

1111

1313

1515

1717

1919

2121

2323

2525

2727

2929

3131

3333

3535

3737

3939

4141

4343

4545

4747

4949

5151

5353

5555

5757

5959

6161

6363

6565

6767

22

44

66

88

1010

1212

1414

1616

1818

2020

2222

2424

2626

2828

3030

3232

3434

3636

3838

4040

4242

4444

4646

4848

5050

5252

5454

5656

5858

6060

6262

6464

6666

6868

6969

7070

CON14CON14

R66

51R

R66

51R

EN

121

InA

2In

B3

VC

C4

GN

D5

InC

6In

D7

EN

348

Out

Ap

16O

utA

n15

Out

Bp

14O

utB

n13

Out

Cp

12O

utC

n11

Out

Dp

10O

utD

n9

IC18

SN75LVDS391PW

IC18

SN75LVDS391PW

C153

100n

C153

100n

12

LED8

green_0603

LED8

green_0603

1234

8765

RN24

4x0R

_Jm

pr

RN24

4x0R

_Jm

pr

1234

8765

RN

26

4x0R

_Jm

pr

RN

26

4x0R

_Jm

pr

In1p

1

In1n

2

In2p

3

In2n

4

In3p

5

In3n

6

In4p

7

In4n

8

EN

1216

Out

115

Out

214

VC

C13

GN

D12

Out

311

Out

410

EN

349 IC19

SN

75LV

DT3

90P

W

IC19

SN

75LV

DT3

90P

W

1

TP12UDCDTP12

UDCD

1234

8765

RN

22

4x0R

_Jm

pr

RN

22

4x0R

_Jm

pr

C157

100n

C157

100n

C150

10n

C150

10n

C87

100n

C87

100n

1 2 3 4

8 7 6 5

RN34x47RRN34x47R

R13810kR13810k

EN

121

InA

2In

B3

VC

C4

GN

D5

InC

6In

D7

EN

348

Out

Ap

16O

utA

n15

Out

Bp

14O

utB

n13

Out

Cp

12O

utC

n11

Out

Dp

10O

utD

n9

IC17

SN

75LV

DS

391P

W

IC17

SN

75LV

DS

391P

W

R7451RR7451R

UART-CTSn F1

UART-DSRn G4

UART-RxD F2

UART-DCDn F6

UART-RIn F3

UART-TxD G5

UART-RTSn E2

UART-DTRn E6

IC1G

EPXA1F484C3

IC1G

EPXA1F484C3

1 2 3 4

8 7 6 5

RN43

4x0R

_Jm

pr

RN43

4x0R

_Jm

pr


1

TP26URI

TP26URI

R137

150R

R137

150R

1234

8765


11

33

55

77

99

1111

1313

1515

1717

1919

2121

2323

2525

2727

2929

3131

3333

3535

3737

3939

4141

4343

4545

4747

4949

5151

5353

5555

5757

5959

6161

6363

6565

6767

22

44

66

88

1010

1212

1414

1616

1818

2020

2222

2424

2626

2828

3030

3232

3434

3636

3838

4040

4242

4444

4646

4848

5050

5252

5454

5656

5858

6060

6262

6464

6666

6868

6969

7070

CO

N13

CO

N13

C151

100n

C151

100n

C154

10n

C154

10n

1 2 3 4

8 7 6 5

RN284x47RRN284x47R

1 23 45 6

CON1

Header_03x2

CON1

Header_03x2

IO-84Y16

IO-85W16

IO-86AA17

IO-87T15

IO-88AB17

IO-89U15

IO-90V15

IO-91AA16

IO-92W15

IO-93Y15

IO-94T14

IO-95AB16

IO-96U14

IO-97AA15

IO-98V14

IO-99 Y14

IO-100 R13

IO-101 W14

IO-102 T13

IO-103 AB15

IO-104 AA14

IO-105 U13

IO-106 Y13

IO-107 V13

IO-108 W13

IO-109 T12

IO-110 AB14

IO-111 AA12

IO-112 U12

IO-113 Y12

Block 11 I/Os

IC1J

EPXA1F484C3

Block 11 I/Os

IC1J

EPXA1F484C3R13910kR13910k


R165

10k

R165

10k

R164

10k

R164

10k

1234

8765

RN25

4x0R_Jmpr

RN25

4x0R_Jmpr

1234

8765

RN27

4x0R

_Jm

pr

RN27

4x0R

_Jm

pr

1234

8765

RN23

4x0R_Jmpr

RN23

4x0R_Jmpr

R163

10k

R163

10k

1 2 3 4

8 7 6 5

RN474x47RRN474x47R

C155

100n

C155

100nTDI1

A82

A103

A114

GND_B05

VCCO_B06

B157

B128

B109

TCK11

VCC112

GN

D1

13

B6

14

B4

15

B2

16

B0

17

CLK

1_in

18

C0

20

C1

21

C2

22

C4

23

C6

24

VCC2 36

TDO 35

D10 33

D12 32

D15 31

VCCO_B1 30

GND_B1 29

C11 28

C10 27

C8 26

TMS 25

A6

48

A4

47

A2

46

A1

45

A0_

GO

E0

44

CLK

3_in

42

D0_

GO

E1

41

D2

40

D4

39

D6

38

GN

D3

37

B810

CLK

2_in

19

D8 34

CLK

0_in

43

IC14

LC4064ZC-75T48

IC14

LC4064ZC-75T48

1 2 3 4

8 7 6 5

RN24x47RRN24x47R

C18

5

100n

C18

5

100n

R162

10k

R162

10k

12

LED9

red_0603

LED9

red_0603

R84150RR84150R

C178

10n

C178

10n


R13110kR13110k

FAST1 J2

FAST2 K5

FAST3 V11

FAST4 W12

Ded

icat

ed F

ast I

nput

s

IC1F

EPXA1F484C3

Ded

icat

ed F

ast I

nput

s

IC1F

EPXA1F484C3

1 2 3 4

8 7 6 5

RN44

4x0R

_Jm

pr

RN44

4x0R

_Jm

pr

12

LED7

green_0603

LED7

green_0603

C152

10n

C152

10n

C5

10n

C5

10n

C156

100n

C156

100n

In1p

1

In1n

2

In2p

3

In2n

4

In3p

5

In3n

6

In4p

7

In4n

8

EN

1216

Out

115

Out

214

VC

C13

GN

D12

Out

311

Out

410

EN

349 IC20

SN

75LV

DT3

90P

W

IC20

SN

75LV

DT3

90P

W

C223

100n

C223

100n

1 2 3 4

8 7 6 5

RN74x47RRN74x47R

R85 150RR85 150R

1234

8765


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

TPFIN

Tx+

E_TCK

E_TDI

E_TMS

TPFIP

E_TDO

MDintn

ERst

EClkExt

TPFOP

TPFONTPFOPTPFINTPFIP

Tx+Tx-

Rx-Rx+

Rx-

Rx+

Tx-

TPFON

3V3

3V3

3V3

3V3

3V3

3V3

3V3

3V3

E_Pause

GND_ETH

GND

Title


Date: Sheet of

9 1.64

Block 09 I/Os Ethernet


A3

09 14

Title


Date: Sheet of

9 1.64



A3

09 14

Title


Date: Sheet of

9 1.64



A3

09 14


Jumper R45...48will set slew rate.

2005.12.21 12:35

Slewrate Table

3,0ns

3,4ns

3,9ns

4,4ns

R45 R46 R47 R48

X XXX

XXX X

Ethernet Connector


place jumperclose to crystal.

keep signals short!

place resistors RN9..11 near output pins

keep

sig

nal s

hort!

C248

100n

C248

100n

C170

270p

C170

270p

R41 8R06R41 8R06

C

A

D7

MMSZ5228BT1G

C

A

D7

MMSZ5228BT1G

Ref

Clk

_XI

1

XO

2

MD

DIS

3

RS

T4

TxS

lew

05

TxS

lew

16

GN

D1

7

VC

CIO

18

NC

19

NC

210

GN

D2

11

AD

DR

012

AD

DR

113

AD

DR

214

AD

DR

315

AD

DR

416

RBIAS 17GND3 18TPFOP 19TPFON 20VCCA1 21VCCA2 22TPFIP 23TPFIN 24GND4 25SD/TP 26

TDI 27TDO 28TMS 29TCK 30TRST 31Sleep 32

RxD

048

RxD

147

RxD

246

RxD

345

NC

344

MD

C43

MD

IO42

GN

D7

41

VC

CIO

240

Pw

rDw

n39

LED

_Cfg

138

LED

_Cfg

237

LED

_Cfg

336

GN

D6

35

GN

D5

34

Pau

se33

MDint64 CRS63 COL62 GND961 TxD360TxD259 TxD158 TxD057 Tx_EN56 Tx_Clk55Tx_ER54 Rx_ER53 Rx_Clk52 VCCD51 GND850Rx_DV49

IC9

LXT971ALC

IC9

LXT971ALC

1 23 45 6

CON7

Header_03x2

CON7

Header_03x2

R45

0R

_Jm

pr R45

0R

_Jm

pr

IO-114 W22

IO-115V16 IO-116U21

IO-117U20

IO-118T18

IO-119U19

IO-120 W21

IO-121V17

IO-122V20

IO-123 Y21

IO-124U18

IO-125 W20

IO-126V18

IO-127 Y20

IO-128 AB19

IO-129 Y17

IO-130 AA20

IO-131W17

IO-132V19

IO-133 AA19

IO-134 Y19

IO-135W18

IO-136 Y18

Block 12 I/Os

IC1K

EP

XA

1F48

4C3

Block 12 I/Os

IC1K

EP

XA

1F48

4C3

C232

33p

C232

33p

C175

18p

C175

18p


1234

8765

RN9 4x22RRN9 4x22R

1

TP18ETMSTP18ETMS

C164

10n

C164

10n

R142 374RR142 374R

1234

8765

RN114x22RRN114x22R

R8051RR8051R

C160

100n

C160

100n

12

LED5

red_0603

LED5

red_0603

C249

100n

C249

100n

C246

33p

C246

33p

R8910kR8910k

C181 100nC181 100n



R4251RR4251R

1

TP19ETDOTP19ETDO

C233

33p

C233

33p

C176

18p

C176

18p

R118

2k2

R118

2k2

R52

0R_Jmpr

R52

0R_Jmpr

C

A

D10

MMSZ5228BT1G

C

A

D10

MMSZ5228BT1G

C171

10n

C171

10n

R143

590R

R143

590R

PwUp1

RGP12

InHi3

InLo4

RGP25 GND 6OutLo 7OutHi 8VPOS 9VOCM 10

IC22

AD8351ARM

IC22

AD8351ARM

C161

10n

C161

10n

R8651RR8651R

C172

10n

C172

10nR47

0R

_Jm

pr

R47

0R

_Jm

pr

1

TP20ETDITP20ETDI

C167

10n

C167

10n

R4351RR4351R

C

A

D9

MMSZ5228BT1G

C

A

D9

MMSZ5228BT1G

C236

47n

C236

47n

R53

0R_Jmpr

R53

0R_Jmpr

R59

0R_Jmpr

R59

0R_Jmpr

1 23 45 67 89 10

CON2

Header_05x2

CON2

Header_05x2

C166

100n

C166

100n

R144 51RR144 51R

R14851R

R14851R

1234

8765


R49

22k1_1%

R49

22k1_1%

C162

100n

C162

100n

C173

1n/2kV

C173

1n/2kV

12 LED3

red_0603

LED3

red_0603

R54100RR54100R

C158

10n

C158

10n

C169

270p

C169

270p

R44

0R_Jmpr

R44

0R_Jmpr

R40 8R06R40 8R06


C247

22uF

C247

22uF

C245

33p

C245

33p

1 2XTAL1

25MHz

XTAL1

25MHz

C168

100n

C168

100n

C

A

D8

MMSZ5228BT1G

C

A

D8

MMSZ5228BT1G

C237

47n

C237

47n

123

45

6789

1011

1213

141516

TR1Halo TG110-S050N2

TR1Halo TG110-S050N2

R146100RR146100R

R1033k3R1033k3


R14951RR14951R

R145 51RR145 51RR140100RR140100R

C177

not used

C177

not used

1 2 3 4

8 7 6 5

RN8

4x330R

RN8

4x330R

C174

1n/2kV

C174

1n/2kV

1

TP17ETCKTP17

ETCK

1

TP15PwrDown

TP15PwrDown

12 LED4

red_0603

LED4

red_0603

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

3V3

3V3

ADoutARdyn

ADin

ACSn

ASclkARstnAP1AP2

AAin7

AAin8

AAin1

AAin2

3V3

ADMCLK

GND_ADC

VregTemp

Title


Date: Sheet of

10 1.63

DCS ADC


A4

10 14

Title


Date: Sheet of

10 1.63

DCS ADC


A4

10 14

Title


Date: Sheet of

10 1.63

DCS ADC


A4

10 14


To ROB connector page 8

Please connect these analog ground to one pointnear voltage reference ! Do only connect to GNDplane here with multiple vias!

2004.11.16 12:30

GND_ADC

GND_ADC


keep all analog signals as short as possible

shield signals AAin1 .. 4 with GND tracesPlace jumper R10 near tocrystal. Keep trace short.

Keep thisline short!

Keep thissignals short!

Populate R122 ifAIN8 should measurevoltage regulatortemperature.

Current source for additionaltemperature sensor.

Populate R158 if AIN7should measuresystem temperature.

C189

10n

C189

10n

1234

8765

RN354x10kRN354x10k

R93

10R

R93

10R

C201

100n

C201

100n

1

32Q2

BC859CQ2

BC859C

C209

10n

C209

10n

C135

100n

C135

100n

Vout1

GND2Vin 3

IC21

AD1582ART

IC21

AD1582ART

R127 10kR127 10k

1234

8765


C199

100n

C199

100n


C217

10n

C217

10n

C196

10n

C196

10n

C193

470n

C193

470n

AIN71

AIN82

AVDD3

AGND14

RefIn1n5

RefIn1p6

AIN17

AIN28

AIN39

AIN410

AIN511

AINCOM12

RefIn2p13

RefIn2n14 AIN6 15P2 16

AGND2 17P1 18

RST 19SCLK 20

CS 21RDY 22

DOUT 23DIN 24

DGND 25DVDD 26

XTALout 27XTALin 28

IC13

AD7708BRU

IC13

AD7708BRU

R94 10RR94 10R

C207

33p

C207

33p

C212

10n

C212

10n

C195

10uF

C195

10uF

C216

10n

C216

10n

1234

8765RN33 4x47RRN33 4x47R

C197

10n

C197

10n

1 23 45 67 89 10111213141516

CON11

Header_08x2x2mm

CON11

Header_08x2x2mm

R15610kR15610k

1

23

4

XTAL2

32kHz

XTAL2

32kHz

C202

470n

C202

470n

C68

100n

C68

100n

C204

10uF

C204

10uF

R10

0R_Jmpr

R10

0R_Jmpr

C210

10n

C210

10n

1234

8765

RN41

4x10k

RN41

4x10k

C200

470n

C200

470n

C218

10n

C218

10n

C208

10n

C208

10n

1234

8765RN37 4x10kRN37 4x10k

C241

10n

C241

10n

C214

100n

C214

100n

1 2 3 4

8 7 6 5

RN404x10kRN404x10k

C213

10n

C213

10n

C132

100n

C132

100n

12

LED11

green_0603

LED11

green_0603

1 12 2

CON12

Temp2

CON12

Temp2

1234

8765RN36 4x10kRN36 4x10k

R1571kR1571k

C206

33p

C206

33p

C194

10n

C194

10n

C192

100n

C192

100n

C215

2uF2

C215

2uF2

1234

8765

RN39

4x10k

RN39

4x10k

C211

10n

C211

10n

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VCC_PLLF

VC

C_C

LKF

GND_PLLF

1V8

3V3

3V3

1V8

3V3

1V8

3V3

GND

GND_PLLF

Title


Date: Sheet of

11 1.60

FPGA Power Connections


A3

11 14

Title


Date: Sheet of

11 1.60



A3

11 14

Title


Date: Sheet of

11 1.60



A3

11 14


PLL Supply

FPGA Clock Supply

2003.12.19 14:30


Keep this traces as short aspossible short!

C47

100n

C47

100n

C64

10uF

C64

10uF

CF2

1n

CF2

1n

C43

10n

C43

10n

C22

10n

C22

10n

C60

2uF2

C60

2uF2

C39

1n

C39

1n

C18

1n

C18

1n

C72

100n

C72

100n

C115

100n

C115

100n

C35

100n

C35

100n

C107

100n

C107

100n

C52

10n

C52

10n

C67

10uF

C67

10uF

C31

10n

C31

10n

CF6

1n

CF6

1n

C48

1n

C48

1n

C27

1n

C27

1n

CF3

1n

CF3

1n

C23

100n

C23

100n

C61

100n

C61

100n

C40

10n

C40

10n

C73

2uF2

C73

2uF2

C19

10n

C19

10n

C57

1n

C57

1n

C36

1n

C36

1n

C1

1n

C1

1n

C65

10uF

C65

10uF

C108

100n

C108

100n

C53

100n

C53

100n

C49

10n

C49

10n

C63

10uF

C63

10uF

CF4

1n

CF4

1n

C28

10n

C28

10n

C45

1n

C45

1n

C24

1n

C24

1n

C41

100n

C41

100n

C74

470n

C74

470n

VCCint01H12

VCCint02H15

VCCint03H8

VCCint04J11

VCCint05J13

VCCint06J9

VCCint07K10

VCCint08K12

VCCint09K14

VCCint10L11

VCCint11L13

VCCint12L9

VCCint13M10

VCCint14M12

VCCint15M14

VCCint16N11

VCCint17N13

VCCint18N9

VCCint19P10

VCCint20P12

VCCint21P14

VCCint22P8

VCCint23R15

VCCint24R9

VCCIO2-01 A14

VCCIO2-02 A18

VCCIO2-03 A20

VCCIO2-04 C18

VCCIO2-05 C22

VCCIO2-06 D12

VCCIO2-07 D15

VCCIO2-08 E14

VCCIO2-09 E19

VCCIO2-10 F15

VCCIO2-11 F22

VCCIO2-12 G12

VCCIO2-13 G17

VCCIO2-14 G19

VCCIO2-15 H13

VCCIO2-16 H14

VCCIO2-17 H21

VCCIO2-18 J15

VCCIO2-19 J18

VCCIO2-20 J22

VCCIO3-01 K1

VCCIO3-02 L8

VCCIO6-01 A13

VCCIO6-02 A3

VCCIO6-03 C1

VCCIO6-04 F7

VCCIO7-01 G1

VCCIO7-02 J7

VCCIO9-01 M1

VCCIO9-02 M8

VCCIO9-03 T1

VCCIO10-01 AB11

VCCIO10-02 AB3

VCCIO10-03 AB7

VCCIO10-04 R11

VCCIO10-05 U5

VCCIO10-06 Y1

VCCIO11-01 AB13

VCCIO11-02 AB18

VCCIO11-03 R12

VCCIO12-01AB20

VCCIO12-02T16

VCCIO12-03V22

VCCIO13-01K22

VCCIO13-02M15

VCCIO13-03T22

VCC-CLK2R18

VCC-CLK4N17

VCC-CLK5E5

VCC-CLK6E4

VCC-CKout2T19

GND-CLK42N18

GND-CLK51D6

GND-CLK52D5

GND-CLK61F5

GND-CKout2T17

GND-CLK41N19 GND-CLK22R19 GND-CLK21R17

GND-CLK62F4

GN

D-0

1J3

GN

D-0

2A

1

GN

D-0

3A

11

GN

D-0

4A

16

GN

D-0

5A

2

GN

D-0

6A

21

GN

D-0

7A

22

GN

D-0

8A

A1

GN

D-0

9A

A11

GN

D-1

0A

A13

GN

D-1

1A

A18

GN

D-1

2A

A2

GN

D-1

3A

A21

GN

D-1

4A

A22

GN

D-1

5A

B1

GN

D-1

6A

B2

GN

D-1

7A

B21

GN

D-1

8A

B22

GN

D-1

9B

1

GN

D-2

0B

14

GN

D-2

1B

2

GN

D-2

2B

21

GN

D-2

3B

22

GN

D-2

4C

12

GN

D-2

5C

16

GN

D-2

6C

6

GN

D-2

7D

20

GN

D-2

8D

4

GN

D-2

9E

1

GN

D-3

0E

17

GN

D-3

1E

3

GN

D-3

2F2

1

GN

D-3

3G

14

GN

D-3

4H

11

GN

D-3

5H

16

GN

D-3

6J1

0

GN

D-3

7J1

2

GN

D-3

8J1

4

GN

D-3

9J1

9

GN

D-4

0J2

1

GN

D-4

1J8

GN

D-4

2K

11

GN

D-4

3K

13

GN

D-4

4K

16

GN

D-4

5K

2

GN

D-4

6K

8

GN

D-4

7K

9

GN

D-4

8L1

0

GN

D-4

9L1

2

GN

D-5

0L1

4

GN

D-5

1M

11

GN

D-5

2M

13

GN

D-5

3M

2

GN

D-5

4M

9

GN

D-5

5N

10

GN

D-5

6N

12

GN

D-5

7N

14

GN

D-5

8N

15

GN

D-5

9N

8

GN

D-6

0P

11

GN

D-6

1P

13

GN

D-6

2P

15

GN

D-6

3P

9

GN

D-6

4R

14

GN

D-6

5R

8

GN

D-6

6T2

GN

D-6

7T2

1

GN

D-6

8V

21

GN

D-6

9W

19

GN

D-7

0W

4

GN

D-7

1W

6

IC1A

EPXA1F484C3

IC1A

EPXA1F484C3

C58

10n

C58

10n

C37

10n

C37

10n

C70

1n

C70

1n

C3

10n

C3

10n

C111

100n

C111

100n

C54

1n

C54

1n

C33

1n

C33

1n

C99

100n

C99

100n

C29

100n

C29

100n

CF5

1n

CF5

1n

C46

10n

C46

10n

C25

10n

C25

10n

CF1

1n

CF1

1n

C42

1n

C42

1n

R119

10R

R119

10R

C21

1n

C21

1n

C59

100n

C59

100n

C71

10n

C71

10n

C17

100n

C17

100n

R120 10RR120 10R

C113

100n

C113

100n

C55

10n

C55

10n

C34

10n

C34

10n

C104

100n

C104

100n

C51

1n

C51

1n

C30

1n

C30

1n

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of

12 1.60

DCS Board Routing Hints

A4

12 14

Title


Date: Sheet of

12 1.60


A4

12 14

Title


Date: Sheet of

12 1.60


A4

12 14

Wednesday 2003.12.17 10:10 Editor : Dirk Gottschalk

2003.12.17 13:30

Routing Hints for the DCS Board

Place 10nF and 100nF capacitors as close as possibleto the devices. Place power vias as close as possible tothe related decoupling capacitors not to the relateddevice. This may not allways work with BGAs but shouldwork with all non BGA packages. See picture.

via*

via*

via*

via*

device

wrong okay

*via to supply or GND planes

Grounding scheme for PLL, TTCrx and 120MHz LVDS driver

QOsc40MHz

PLL 3V3Vreg

MUX1 PLL LVDSdriver

TTCrx

R124PLL_GND

PLL_GND

Board_GNDOptical LinkReceiver

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of

13 1.61

PLL Clock Configuration


A4

13 14

Title


Date: Sheet of

13 1.61



A4

13 14

Title


Date: Sheet of

13 1.61



A4

13 14


2005.05.02 10:00

TPCTRD

R68

R99

R100

R105

R108

R107

R109

R110

RN48

0R_Jmpr

0R_Jmpr

0R_Jmpr

0R_Jmpr

no device

no device

no device

no device

no device

defaultfrequency 120 MHz 40 MHz

10k

10k

10k

10k

no device

no device

no device

no device

4x0R_Jmpr

PLL Configuration Table for TPC and TRD

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

GND

GND_TPLL GND_PLLGND_ADC

GND

GND

GND

GND_PLLF

GND_ETH

GND_TPLL

GND_PW

GND_TPLL

GND_PLLF

GND_ADC

GND_ETH

GND

GND

GND

GND

Title


Date: Sheet of

14 1.60

DCS Ground Scheme


A

14 14

Title


Date: Sheet of

14 1.60

DCS Ground Scheme


A

14 14

Title


Date: Sheet of

14 1.60

DCS Ground Scheme


A

14 142005.05.02


1 2

J4

B2S

J4

B2S

1 2

J9

B2S

J9

B2S

1 2

J6

B2S

J6

B2S

1 2

J1

B2S

J1

B2S

1 2

J2

B2S

J2

B2S

1 2

J5

B2S

J5

B2S

1 2

J7

B2S

J7

B2S

1 2

J3

B2S

J3

B2S

1 2

J8

B2S

J8

B2S

dcs164

Documents

sheet of02

sheet of01

dcs boardcompany

dcs sdram interfacecompany

user ios

dirk gottschalk2003

volt main power supplypage

rob connector1