decoders and encoders

25
Decoders and Encoders Discussion DS-2.1

Upload: ulmer

Post on 28-Jan-2016

64 views

Category:

Documents


0 download

DESCRIPTION

Decoders and Encoders. Discussion DS-2.1. Decoders and Encoders. Binary Decoders Binary Encoders Priority Encoders. Decoders. 3-to-8 Decoder. A: in STD_LOGIC_VECTOR(2 downto 0); Y: out STD_LOGIC_VECTOR(0 to 7);. Behavior. for i in 0 to 7 loop - PowerPoint PPT Presentation

TRANSCRIPT

Page 1: Decoders and Encoders

Decoders and Encoders

Discussion DS-2.1

Page 2: Decoders and Encoders

Decoders and Encoders

• Binary Decoders

• Binary Encoders

• Priority Encoders

Page 3: Decoders and Encoders

Decoders

Page 4: Decoders and Encoders
Page 5: Decoders and Encoders

3-to-8 Decoder

Behavior

for i in 0 to 7 loop if(i = conv_integer(A)) then Y(i) <= ‘1’; else Y(i) <= ‘0’; end if;end loop;

A2 A1 A0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7

0 0 0 1 0 0 0 0 0 0 00 0 1 0 1 0 0 0 0 0 00 1 0 0 0 1 0 0 0 0 00 1 1 0 0 0 1 0 0 0 01 0 0 0 0 0 0 1 0 0 01 0 1 0 0 0 0 0 1 0 01 1 0 0 0 0 0 0 0 1 01 1 1 0 0 0 0 0 0 0 1

A2 A1 A0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7

0 0 0 1 0 0 0 0 0 0 00 0 1 0 1 0 0 0 0 0 00 1 0 0 0 1 0 0 0 0 00 1 1 0 0 0 1 0 0 0 01 0 0 0 0 0 0 1 0 0 01 0 1 0 0 0 0 0 1 0 01 1 0 0 0 0 0 0 0 1 01 1 1 0 0 0 0 0 0 0 1

A: in STD_LOGIC_VECTOR(2 downto 0);Y: out STD_LOGIC_VECTOR(0 to 7);

Page 6: Decoders and Encoders

library IEEE;use IEEE.STD_LOGIC_1164.all;use IEEE.STD_LOGIC_arith.all;use IEEE.STD_LOGIC_unsigned.all;

entity decode38 is port(

A : in STD_LOGIC_VECTOR(2 downto 0); Y : out STD_LOGIC_VECTOR(0 to 7)

);end decode38;

architecture decode38 of decode38 isbegin process(A) variable j: integer; begin

j := conv_integer(A);for i in 0 to 7 loop

if(i = j) then Y(i) <= '1'; else Y(i) <= '0'; end if;

end loop; end process;end decode38;

3-to-8 Decoder

Page 7: Decoders and Encoders

3-to-8 Decoder

Page 8: Decoders and Encoders

Decoder Networks

Page 9: Decoders and Encoders

4-input tree decoder

Page 10: Decoders and Encoders
Page 11: Decoders and Encoders

Decoder uses

Page 12: Decoders and Encoders
Page 13: Decoders and Encoders

Decoders and Encoders

• Binary Decoders

• Binary Encoders

• Priority Encoders

Page 14: Decoders and Encoders

Binary encoders

Page 15: Decoders and Encoders

A0 = D1 + D3 + D5 + D7

A1 = D2 + D3 + D6 + D7

A2 = D4 + D5 + D6 + D7

Page 16: Decoders and Encoders

Uses of binary encoders

Page 17: Decoders and Encoders

68000 Interrupt Logic

Peripheral

74148Encoder

74138Decoder

IP0IP1IP2

A0A1A2

IRQA

68000

Data Bus

IRQ

Page 18: Decoders and Encoders

Decoders and Encoders

• Binary Decoders

• Binary Encoders

• Priority Encoders

Page 19: Decoders and Encoders
Page 20: Decoders and Encoders

entity pencoder is

port (

x: in STD_LOGIC_VECTOR (7 downto 0);

E: in STD_LOGIC;

y: out STD_LOGIC_VECTOR (2 downto 0);

A: out STD_LOGIC

);

end pencoder;

8-to-3 Priority Encoder

Page 21: Decoders and Encoders

architecture pencoder_arch of pencoder isbegin pe: process(x,E) variable k: integer; begin y <= "000"; A <= '0'; if E = '1' then for j in 0 to 7 loop if x(j) = '1' then

y <= conv_std_logic_vector(j,3); A <= '1'; end if; end loop; end if; end process pe;end pencoder_arch;

Page 22: Decoders and Encoders
Page 23: Decoders and Encoders
Page 24: Decoders and Encoders
Page 25: Decoders and Encoders