decoders (digital logic design)

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    WHAT IS DECODER AND ITS TYPES

    Labels: DECODER  Posted by Abhishek Gupta

    DEFINITION OF DECODER: 

    Decoder is a combinational circuit that converts binary information f rom n coded inputs to amaximum of 2n unique outputs. If n-bit coded information has unused combinations, it mayhave less than 2n outputs.  The Decoders are called n-to-m lineDecoders, where m≤2n. In the logic d iagram of a 2-to-4 line Decoder , the two data inputs A andB are decoded into four outputs, each output representing one of the combinations Of thebinary input variables .The inverts provide the compliment of the inputs, and each of the four

     AND Gates generates one of the binary combinations. It has one enable input represented byEN. The decoder is enabled when EN is equal to 1 and disabled when EN is equal to 0 and thiscondition of enable input is called Active high enable input.  In Active low enable inputcondition, it is enabled when EN is equal to 0  and disabled when EN is equal to 1. The

    operation of the Decoder can be clarified using the truth table or function table. When theenable input is equal to 0, all the outputs are equal to 0 regardless of the values of the otherthree data inputs. The three crosses in the table designate do not care condition. When theenable input is equal to 1, it operates in a normal function. For each possible inputcombination, there are seven outputs that are equal to 0 and only one that is equal to 1, theoutput which is equal to 1 becomes active of its respective input . The truth of the abovedecoder is shown below. 

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    INPUT  OUTPUT 

    EN  A  B  Y0  Y1  Y2  Y3 

    1  0  0  1  0  0  0 

    1  0  1  0  1  0  0 

    1  1  0  0  0  1  0 

    1  1  1  0  0  0  1 

    0  X  X  0  0  0  0 

    USE OF DECODERS: 

    There is a definite signal or combination of signals at the decoder outputs to correspond toany signal or combination of signals at the inputs. This correspondence is determined by thestructure assigned during designing of the Decoder. Decoders are used in various dataprocessing and transmitting devices: in remote control, in computer technology, in radio

    engineering and measurement techniques and in telephone and telegraph communicationssystems. The purpose determines the structure and the number of inputs and outputs of thedecoder and the form and sequence of the input and output signals. In computer technologyDecoders are used for converting a code or codes into equivalent continuous quantities (forexample, electrical current, voltage, angle of rotation). In radio engineering, Decodersreconstruct the message transmitted from a radio signal whose parameters (amplitude,frequency, and phase) change accord ing to the message being t ransmitted and also does thereverse operation of an encoder. 

    TYPES OF DECODERS:  

    There are different types of Decoder available in the market e.g. 2-to-4 line decoder, 3-to-8 linedecoder  or 4-to-16 line decoder, where 2, 3, and 4 are the numbers of inputs to the decodersand 4, 8, and 16 are the number of output assigned to them. We can form a 3-to-8 line decoderby using two 2-to-4 line Decoders with enable inputs. Similarly, we can also form a 4-to-16 lineDecoder by cascading two 3-to-8 line Decoders or four 2-to-4 line Decoders. 

    DECODER CASCADING: 

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      By combining two or more Decoders and getting the logic circuit of another Decoder isknown as Decoder cascading. When we take two decoders and combine them into onedecoder this process is called cascading, now when we want to create a new decoder by themeans of cascading we have to take an extra input that joins the two enable inputs of eachdecoders and having an invert gate between them so that only one decoder is active at a timeWhen we want to combine four decoders in order to get a single decoder, we have to use a 2-to-4 line decoder to select a particular decoder one at a time and only that decoder generatesoutput and remaining decoders gives 0 as output whatever are the combination of their

    inputs.

    2-TO-4 LINE DECODER: 

    In a 2-to-4 line Decoder, there are two input lines and four output line, there is another inputwhich is called enable input that enables and disable the Decoder. In the picture given below

     A and B are two inputs of the Decoder and EN is the enable input. The outputs of the Decoderare as y0, y1, y2, and y3, only one output is active at a time as the input is given to it. As forexample if input is 00 then y0  is active, if input is given 01 to the decoder the output y 1 isactive, similarly for inputs 10 y2 is active and y3 wil l be active if inputs are 11. On the basis ofthe conditions of enable input and the output of a Decoder a 2-to-4 line Decoder can be of thefollowing types: 

    1.  When enable input is active high and output is also active high 2.  When enable input is active high and output is active low 3.  When enable input is active low and output is active high 4.  When enable input is active low and output is also active low 

    BLOCK DIAGRAM 

    Here, it is the logic diagram of a 2-to-4 line Decoder wi th active low

    enable input and active high enable output . In this logic diagram enable input is preceded by acircle that represent an invert gate, a low enable input is represented by EN having a bar overit. A and B are the two inputs and y0, y1, y2 and y4 are the four outputs for four combinations ofinputs A and B. 

    TRUTH TABLE AND CIRCUIT DIAGRAM 

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    The operation of the Decoder can be illustrated by means of truth table. Since the enableinputs is following active low logic therefore when enable input is 1 the output of the Decoderis 0 that means the Decoder does not respond to any combinations of inputs. The two X’srepresent don’t-care condition it means the input of Decoder may have any combination.When the enable input is 0 the Decoder responds to their specific combinations of inputs. Fortwo inputs the Decoder has four outputs and that are equal to 0 except one. That particularvariable which is equal to 1 is the output of the Decoder for that particular combination ofinputs.The circuit diagram of the Decoder is shown below to implement this circuit we need four ANDGates and each AND Gate has different outputs for two inputs A and B. each AND Gate hasthree data inputs. Two inputs are the normal inputs of Decoder and one input is enable input.The enable input enables each AND Gate when it is 0 and disables them when it is 1. The two

    inputs have two lines one line generates normal value and one line produces complement ofthat particu lar input. Only one AND Gate gets active at a time for its inputs.

    INPUT  OUTPUT 

    EN   A  B  Y0’   Y1’   Y2’   Y3’  

    1  0  0  0  1  1  1 

    1  0  1  1  0  1  1 

    1  1  0  1  1  0  1 

    1  1  1  1  1  1  0 

    0  X  X  1  1  1  1 

    2-TO-4 LINE DECODER CASCADING 

    The first thing we want to know is what is cascading, the cascading is a process of combiningmore Decoders to get a single Decoder. 2-to-4 line Decoder can be combined in such a waythat they can generate 3-to-8 line Decoder, 4-to-16 line decoder or 5-to-32 line Decoder etc.

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    IMPLEMENTATION OF 5-TO-32 LINE DECODER USING 2-TO-4LINE DECODER 

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      A 5-to-32 l ine decoder has been implemented here using 10 2-to-4 line decoders. A 5-to-32 linedecoder has five inputs and 32 outputs. The block diagram shown here has 10 decodersnamely D1, D2, to D10. A, B, C, D and E are the five inputs of this decoder. Here decoders D1and D2 are used as a switch which enables the rest of the 8 decoder one at a time. Fromdecoder D3 to D10 these 8 decoders give the output of a 5-to32 line decoder. Now input A isused to active either of the decoders D1 and D2 one at a time. When input A is 1 the D1 is

    active and D2 is inactive but when A is 0 then D2 is active and D1 is inactive. When D1 isactive the output line X0, X1, X2 and X3 will active their corresponding decoders for the inputcombinations o f B and C as for example if B and C are both 0 then output line X0 is active andother output l ines of D1 are inactive. Since X0 output line is active so i t actives the decoder D3Now the last two input lines D and E gives the final output for their respective values if D is 1and E is 0 then the output l ine Y2 is active and it gives output 1 and rest of the outputs are 0. Insort if A = 1, B = C = 0 and D = 1, E = 0 then Y 2 = 1. The truth table of 5-to-32 line decoder isshown below. 

    INPUTS  OUTPUTS 

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     A  B  C  D  E  Y 

    0  0  0  0  0  Y0 = 1 AND REST ARE ZERO 

    0  0  0  0  1  Y1 = 1 AND REST ARE ZERO 

    0  0  0  1  0  Y2 = 1 AND REST ARE ZERO 

    0  0  0  1  1  Y3 = 1 AND REST ARE ZERO 

    0  0  1  0  0  Y4 = 1 AND REST ARE ZERO 

    0  0  1  0  1  Y5 = 1 AND REST ARE ZERO 

    0  0  1  1  0  Y6 = 1 AND REST ARE ZERO 0  0  1  1  1  Y7 = 1 AND REST ARE ZERO 

    0  1  0  0  0  Y8 = 1 AND REST ARE ZERO 

    0  1  0  0  1  Y9 = 1 AND REST ARE ZERO 

    0  1  0  1  0  Y10 = 1 AND REST ARE ZERO 

    0  1  0  1  1  Y11 = 1 AND REST ARE ZERO 

    0  1  1  0  0  Y12 = 1 AND REST ARE ZERO 

    0  1  1  0  1  Y13 = 1 AND REST ARE ZERO 

    0  1  1  1  0  Y14 = 1 AND REST ARE ZERO 

    0  1  1  1  1  Y15 = 1 AND REST ARE ZERO 

    1  0  0  0  0  Y16 = 1 AND REST ARE ZERO 

    1  0  0  0  1  Y17 = 1 AND REST ARE ZERO 

    1  0  0  1  0  Y18 = 1 AND REST ARE ZERO 

    1  0  0  1  1  Y19 = 1 AND REST ARE ZERO 

    1  0  1  0  0  Y20 = 1 AND REST ARE ZERO 

    1  0  1  0  1  Y21 = 1 AND REST ARE ZERO 

    1  0  1  1  0  Y22 = 1 AND REST ARE ZERO 

    1  0  1  1  1  Y23 = 1 AND REST ARE ZERO 

    1  1  0  0  0  Y24 = 1 AND REST ARE ZERO 

    1  1  0  0  1  Y25 = 1 AND REST ARE ZERO 

    1  1  0  1  0  Y26 = 1 AND REST ARE ZERO 

    1  1  0  1  1  Y27 = 1 AND REST ARE ZERO 1  1  1  0  0  Y28 = 1 AND REST ARE ZERO 

    1  1  1  0  1  Y29 = 1 AND REST ARE ZERO 

    1  1  1  1  0  Y30 = 1 AND REST ARE ZERO 

    1  1  1  1  1  Y31 = 1 AND REST ARE ZERO 

    3-TO-8 LINE DECODER 

    In a 3-TO-8 line Decoder, there are three inputs and eight outputs. And there is one more inputthat is named as enable input that makes the decoder active and inactive. there are eight

    possible combinations of three inputs and these are 000,001,010,011,100,101,110 and 111.Theoutput are written as Y0 ,Y1 ,Y2 ,Y 3 ,Y 4 ,Y5 ,Y6 ,Y7 Only one output gets active at a time for itsspecific input . For 000 Y0 gets active, for 001 Y1 gets active, for 010 Y2 gets active, for011 Y 3  gets act ive, for 100 Y 4  gets active, for 101 Y5 gets active, for 110 Y6 gets active, for111 Y7 gets active.

     As we have classif ied the 2-to-4 line Decoder on the basis of different condit ions of enableinput and output , a 3-to-8 line can also be divided into four d ifferent categories. 

    1.  Whenenable input is active high and output is also active high 2.  Whenenable input is active high and output is active low 3.  Whenenable input is active low and output is active high 

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    4.  When enable input is active low and output is also active low  

    BLOCK DIAGRAM

    It is the block diagram of a 3-to-8 line Decoder which follows the active high logics of enableinput and output . A, B and C are three inputs to the Decoder EN is enable input and from y0 toy7 these are different output for different combinations of inputs. 

    TRUTH TABLE AND CIRCUIT DIAGRAM 

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     The operation of the 3-to-8 line decoder with active high enable input and active high outputcan be clarified using the truth table shown below. When the enable input of the Decoder is 0all the outputs of the Decoder are equal to 0 regardless of the values of the other three datainputs. The three X’s in the table shows don’t-care conditions. When the enable input is equato 1, the Decoder operates in a normal way. For each possible combination of three inputs,there are seven outputs that are equal to 0 and only one output is equal to 1. The output

    variable whose value is equal to 1 represents the octal number equivalent of the binarynumber  that is available in the input data lines. The circuit diagram of a Decoder is given below and it

    is constructed by using logic gates. AND gates and NOT gates are used to implement it. We use eight AND

    gates to generate eight outputs of the Decoder. Each input A, B and C have two inputs lines one for the

    normal value of inputs and one for the complement value. Each AND gate has four inputs which of them

    three are the regular inputs and one is enable input. Enable input is the input that makes the Decoder

    active. The four inputs for first AND gate are A = 0, B = 0, C = 0 and EN = 1 (we are taking EN = 1 because

    active high logic of enable input is used here) and output for these inputs is 0. Similarly for other seven AND

    gates, the inputs are as written 0011, 0101, 0111, 1001, 1010, 1101, 1111 the LSB (Least Significant Bit)

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    represent the value of EN and last three bits from left to right each bit represents the inputs A, B and C

    respectively. 

    INPUT  OUTPUT 

    EN   A  B  C  Y0  Y1  Y2  Y3  Y4  Y5  Y6  Y7 

    1  0  0  0  1  0  0  0  0  0  0  0 1  0  0  1  0  1  0  0  0  0  0  0 

    1  0  1  0  0  0  1  0  0  0  0  0 

    1  0  1  1  0  0  0  1  0  0  0  0 

    1  1  0  0  0  0  0  0  1  0  0  0 

    1  1  0  1  0  0  0  0  0  1  0  0 

    1  1  1  0  0  0  0  0  0  0  1  0 

    1  1  1  1  0  0  0  0  0  0  0  1 

    0  X  X  X  0  0  0  0  0  0  0  0 

    4-TO-16 LINE DECODER USING 3-TO-8 LINE DECODERS 

     A 4-to-16 line decoder can be implemented by cascading 3-to-8 line decoders wi th an act ivehigh enable input. Since a 4-to-16 line decoder have four inputs and 16 outputs so we have touse only two 3-to-8 decoder because each 3-to-8 line decoder have 8 outputs. Now from theabove diagram we can see that there are two 3-to-8 line decoders namely D1 and D2 and bothdecoder have same input line A, B and C respectively and active enable input EN serves asthe first input for 4-to-16 line decoder. The decoder D1  gives the output from Y0  to Y7  anddecoder D2 gives output from Y8 to Y15. Now the operation is done as when the enable input is1 the decoder D1  gets active (while D2  is inactive) and gives output from Y0  to Y7  for the

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    respective values of A, B and C and when it is 0 the decoder D2 gives output from Y8  to Y15while decoder D1 is inactive. The truth table for this block diagram is shown below. 

    INPUT  OUTPUT 

    EN   A  B  C  Y0  Y1  Y2  Y3  Y4  Y5  Y6  Y7  Y8  Y9  Y10  Y11  Y12  Y13  Y14  Y15 

    0  0  0  0  1  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0 

    0  0  0  1  0  1  0  0  0  0  0  0  0  0  0  0  0  0  0  0 

    0  0  1  0  0  0  1  0  0  0  0  0  0  0  0  0  0  0  0  0 

    0  0  1  1  0  0  0  1  0  0  0  0  0  0  0  0  0  0  0  0 0  1  0  0  0  0  0  0  1  0  0  0  0  0  0  0  0  0  0  0 

    0  1  0  1  0  0  0  0  0  1  0  0  0  0  0  0  0  0  0  0 

    0  1  1  0  0  0  0  0  0  0  1  0  0  0  0  0  0  0  0  0 

    0  1  1  1  0  0  0  0  0  0  0  1  0  0  0  0  0  0  0  0 

    1  0  0  0  0  0  0  0  0  0  0  0  1  0  0  0  0  0  0  0 

    1  0  0  1  0  0  0  0  0  0  0  0  0  1  0  0  0  0  0  0 

    1  0  1  0  0  0  0  0  0  0  0  0  0  0  1  0  0  0  0  0 

    1  0  1  1  0  0  0  0  0  0  0  0  0  0  0  1  0  0  0  0 

    1  1  0  0  0  0  0  0  0  0  0  0  0  0  0  0  1  0  0  0 

    1  1  0  1  0  0  0  0  0  0  0  0  0  0  0  0  0  1  0  0 

    1  1  1  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0  1  0 

    1  1  1  1  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0  1