department of electronics & communication engineering...

Department of Electronics & Communication

Engineering

Manual and Observation Book

Electronic Engineering Lab-1

K.Sridhar Raju www.engglabs.blogspot.com

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Department of Electronics & Communication Engineering

Electronic Engineering Lab -1

Name of the student : ___________________________________________

Class : ____________________________________________

Roll No: : ____________________________________________

Semester : ____________________________________________

Acad Year : ____________________________________________

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LIST OF EXPERIMENTS

1. Comparison of Semiconductor diodes (Ge, Si & Zener)

2. Static Characteristics of BJT (CE)

3. Static Characteristics of BJT (CB)

4. Static Characteristics of FET (CS)

5. Design of Half wave and Full wave rectifier without filters

6. Design of Half wave and Full wave rectifier with filters (L, C, L section,

Π Section)

7. Static Characteristics of SCR

8. Static Characteristics of UJT

9. Measurement of Phase, Frequency and Sensitivity using CRO

10. Biasing of BJT and FET

11. Frequency response of RC coupled Amplifier using BJT

12. Frequency response of RC coupled Amplifier using FET

13. Emitter Follower

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Department of Electronics & Communication Engineering

Electronic Engineering Lab -1 Name of the student:

Class B.E:

Roll No: Acad Year:

INDEXSlNo

Name of the Experiment DateConducted

Initials of staff

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Experiment: 1 Date:

CHARACTERISTICS OF SEMICONDUCTORDIODES (Ge, & Si.)AND ZENER DIODE

1. AIM: a) To obtain forward and reverse characteristics of the P-N junction diode (Ge and Si).

2. APPARATUS:

Sl No. Name of the device Range/ No Qty.

1. Ge Diode DR25 01Nos2. Si Diode I N 4007 01Nos3. D.C.Ammeter (0-50 mA) 01Nos4. D.C Ammeter (0-100 A) 01Nos5. D.C Power Supply (0-30V) 01Nos6. Connecting wires ------- 10Nos7. Resistor 1K 01Nos 8. D.C Volt meter (0 – 25V ) 01Nos

3.THEORY:

DIODE SPECIFICATIONS:

DR 25 - Alloy junction suitable for low voltage, low power rectifier applications such as batteryeliminator etc.

VRRM 25 V max IFAV 250 mA max IFRM I A max Ptot (upto 25 c) 250 mv max VF (IF = 250mA) V max Tj 90 C max

P-N junction diode is a two terminal solid state device. The Symbolic representation of a diode is shown below.

Anode(+) cathode (-)

The terminal K is called the cathode or the negative electrode. The terminal A is called the anodeor the positive terminal. We also refer the terminals as p-side and n-side terminals.

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A) FORWARD BIAS: When the terminal ‘K’ is connected to the negative terminal of the supplyand the terminal ‘A’ is connected to the positive of the power supply the diode is said to be“forward biased”. In other words when p-side of the junction diode is connected to thepositive and n-side is connected to the negative of the power supply the diode is connected inthe “forward” direction . The diode gets forward biased only whenVf > Vr. The forward biased diode is shown in figure (3). The atomic

voltage drop across the body of the device is zero under ideal conditions. In the forwardbiased diode the height of the “ potential energy barrier “ at the junction gets lowered by themagnitude of the forward bias VF. This disturbs the initial equilibrium between the forcestending to cause diffusion of “majority carriers” across the junction and the opposinginfluence of the potential energy barrier at the junction. Now “holes” cross the junction fromthe p-region to the n-region while the electrons cross the unction from the n-region to the p-region. Flow of both types of carriers causes conventional electric current from p-region to n-region and these components get added. Hence under forward biased condition (i.e Vf > vr)the following occur.

1. Resistance offered by the junction is low.2. P-N junction acts as a closed switch.3. Width of the depletion region is reduced.4. Drift current increases with increase in bias.

Cut-in Voltage V: Cut-in voltage is defined as the voltage at which 1% of the rated current flows.In practical terms, this is the voltage at which the diode may be considered to start the conduction. For Ge, V = 0.2v. For Si, V= 0.6v.

B) REVERSE BIAS CONDITION: a P-N diode with reverse bias condition i.e., with positiveterminal of the battery Vr connected to the n-side and negative terminal connected to the p-side. This reverse bias causes both holes in the p-region and electrons in the n-region to moveaway from the junction. Hence the region of negative charge density on the p-side and regionof positive charge density on the n-side become wider i.e., the width of the depletion regionincreases. Further the height of the potential energy barrier increases with increase in Vr, theapplied voltage. This increased barrier height serves to reduce the flow of majority carriers tothe other side i.e, holes from p-side to n-side and electrons from n-side to p-side. Howeverthe flow of minority carriers remains uninfluenced by the increased barrier height. Sincethese minority carriers fall down the potential energy barrier, nominally zero current flowsunder reverse bias condition as there are a few number of minority carriers. However a smallcurrent does flow in the reverse direction i.e., from n-region to p-region across the junction.This extremely small reverse current is called reverse saturation current (Io) The magnitude ofIo for Ge is about few A and for silicon it is a few nA. Hence under reverse biased condition.

1. The resistance of the diode increases2. The width of the depletion region increases.3. The current is extremely low.

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4. CIRCUIT DIAGRAM: FORWARD BIAS

REVERSE BIAS

5. PROCEDURE :

FORWARD CHARACTERISTICS:

1. Connect the circuit as shown in the corresponding circuit diagram.2. Increase the supply voltage from zero volts. Observe the corresponding value of current.3. For every value of forward voltage across the diode, observe the value of current and record

it.

NOTE: The graph should be drawn showing that the voltage Vf is an Independent parameter hence the supply voltage must be varied and corresponding value of current must be noted.

4. Observe the voltage across the diode where current If just starts flowing through the diode. Now record the values of voltage and current.

5. The cutin voltage should be clearly observed and noted.6. Increase the diode voltage in suitable steps without exceeding the maximum values indicated

after the cutin voltage to obtain a smooth curve.7. Repeat the above procedure for Si diode also observing some precautions.

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8. Plot the graphs and obtain the dynamic and static resistance from the V-I characteristics. Compare them with the expected values.

REVERSE BIAS CHARACTERISTICS:

1. Connections are to be made as per the corresponding circuit diagram.2. The independent parameter i.e., the diode voltage VR is varied from zero volts and

corresponding values of the reverse current IR is observed.3. Vary the supply voltage from zero volts. Note the values of

VR and IR.4. Tabulate all the observations.5. Repeat the above procedure for Si diode.6. Find the dynamic and static resistance from the graph.

6. OBSERVATIONS : For Ge diode

(a) For Forward Biased Condition :-

Sl.No Vs Vd (V) Id(mA)

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(b) For Reverse Biased Condition: -

Sl.No Vs Vd (V) Id (A)

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7. OBSERVATIONS : For Si. Diode

(a) For Forward Biased Condition :-

Sl.No Vs Vd (V) Id (mA)

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(b) For Reverse Biased Condition: -

Sl.No Vs Vd (V) Id (A)

8.EXPECTED GRAPH :

I(mA)

Ge Si

V- + V I(A)

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9. RESULT:-

10. VIVA QUESTIONS:

1. What do you understand by a junction diode?

2. Is the P-N junction diode a passive element or an active element?

3. What is the importance of the type number given to the various diodes?

4. What is meant by potential barrier across a P-N junction?

5. What is the significance of a diode as a device?

6. What is cut in voltage? What is the value of cutin voltage for Ge and Si diodes. What is the reason for the difference in cutin voltage of Ge and Si. 7. Explain physically how a P-N junction functions as a rectifier.

8. What is the expression for the total current in a P-N junction. How does it vary with the applied voltage?

9. What do you understand by a reverse saturation current? What are the typical values?

10. Why is the magnitude of the current in the forward biased diode greater than that in the reverse biased diode?

11. How does the reverse saturation current vary with temperature for Ge and Si diodes? Is it of significance while the circuit designer chooses a particular device in design?

12. What do you understand by dynamic and static resistance? How are these values obtained graphically?

13. Define the terms forward and reverse resistance of a P-N Junction diode.

14. Explain the capacitive effects in a junction.

15. What are the various applications of a P-N junction diode?

16. Name the various types of diodes available.

17. What is meant by breakdown of diodes?

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1. AIM: b) To obtain the volt-ampere characteristics of zener diode

2. APPARATUS:

S.No. Item Range/Specification Qty1 Zener diode ESZ 5.2 12 DC Ammeter 0-50 mA 13 DC Voltmeter 0-20 V 24 Resistor 2.2 k Half Watt 15 Regulated Power Supply 0-30 V 16 Decade Resistance Box 1 - 10 M 17 Patch cords / Connecting wires

3. THEORY:

Because of the existence of an electric field across a reverse biased junction, it is possible torupture covalent bonds. This can be done by exerting a strong force on the bound electrons sothat they are “torn away” from the bonds.

This process leads to additional electron-hole pairs. When additional electron-hole pairs aregenerated, the reverse current increases. This mechanism is called Zener Breakdown.

Avalanche Breakdown or Avalanche Multiplication is a process wherein, a carrier acquiresenough energy from the applied potential, to collide with a crystal ion and disrupt a covalentbond. When a bond is disrupted in this fashion, a new electron-hole pair is generated. Now, thesecarriers can also gain energy from the applied potential and go on to disrupt other covalent bonds.This process becomes cumulative leading to large reverse currents.

The strong field required for Zener Breakdown is reached in the range of 406V in highly dopeddiodes. The high doping concentration is required to have a sufficiently thin depletion region. If the depletion region is thin, then a strong field is produced that can rupture covalent bonds.Generally the doping concentration is around one impurity atom per 105 silicon atoms. Theelectric field at the junction is of the order of 106 V/cm.In the reverse characteristic of a Zener diode, the knee voltage is called the breakdown VoltageVz.

Generally, in lightly doped diodes, the depletion region is relatively thick; Avalanche Breakdownis predominant and occurs at higher voltages. (Above 8V).

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4. CIRCUIT DIAGRAMS:

For Reverse Bias:

For Forward Bias:

5. PROCEDURE:(For Reverse Bias)1) Connect the circuit as per th3 circuit diagram. Keep the voltage of the power supply at

minimum and switch it on.2) Starting from zero, increase the supply voltage in small steps. Each time, note the

corresponding vales of the Zener voltage Vz (as indicated by the voltmeter) and the current(as indicated by the ammeter).

3) Tabulate all readings and plot i versus Vz.

(For Forward Bias)1) Connect the circuit as per the circuit diagram. Ensure power-supply voltage knobs are in the

minimum position and switch it on.

2) Vary the supply voltage in small convenient steps. Note down the corresponding vales offorward voltage (as indicated by the voltmeter) and the current (as indicated by the ammeter).

3) Tabulate all readings. Plot i versus Vf.

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6. EXPECTED GRAPH:

7. TABULAR COLUMNS:

Forward Characteristics :

S.NO VZ (Volts) IZ (mA)

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Reverse Characteristics:

S.NO VZ (Volts) IZ (mA)

8. RESULT:

9. VIVA VOCE:

1) What are the typical applications of a Zener diode?

2) Why a Zener diode is generally not connected in forward bias?

3) Define the various types of breakdown possible in diodes.

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Experiment 2: Date:

CHARACTERISTICS OF BJT TRANSISTOR (CE)

1. AIM: b) To obtain the input & output characteristics of BJT in common emitter configuration.

2. APPARATUS:

S.No. Name Range/Specification Qty1 NPN BJT BC107 12 Resistor 1.8 kΩ 13 Resistor 86 kΩ 14 Voltmeter 0-10 V 15 Microammeter 0-200 μA 16 Milliammeter 0-10 mA 17 Dual Channel

RegulatedPower Supply

0-30V 1

3. CIRCUIT DIAGRAM:

VCE

1.8K

4. THEORY:

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1.8K


There are two sets of characteristics that can be drawn for a BJT in common emitterconfiguration. They are the input and the output characteristics. The input characteristicsare obtained from the following relation.

VBE =f(VCE,IB) Where VBE is the base to emitter voltage, VCE is collector to emitter voltage and IB stands forabase current.

The output characteristics are obtained from the following relation: IC =f(VCE,IB) where IC is the collector current

Input characteristics:For VCE = 0V the collector is effectively shorted to the emitter. The resulting structure is

nothing but a diode (p-n junction). The characteristic curve obtained (V BE Versus IB) ifessentially that of a junction diode.

In the case of input characteristics for VCE = 0V, If VBE = 0, the base current IB=0mA sinceboth the emitter and collector junctions are shorted.

For any non-zero value of a VCE the base current for VBE =0V is not zero. Its value isvery small to be observed. In general for constant VBE as VCE increases the base width increasesas per the Early effect (base width modulation) and this results in decreased recombination basecurrent.

Output characteristics:- The output characteristics can be divided into three parts . They are: (i) Active region (ii) cut off region (iii) saturation region.

Active region:- In the active region the emitter base junction (JE) is forward biased andcollector base junction(JC) is reverse biased. In the active region collector current respondsmore readily to any input signal. The operation of the common emitter stage is used as anamplifying stage only. Due to “Early Effect”, the current gain increases with increase in VCE.The large slope of the characteristic curve of the CE transistor signifies that the incrementaloutput impedance of the BJT in CE is lower that that in CB configuration

Cutoff region:- The transistor is said to be in cut off when emitter current is zero. For achievingthis condition, it is not enough to have the base current IB = 0, because even with IB =0, thecollector current IC=(1+β)IC0. So, in order to achieve cutoff condition, it is necessary to slightlyreverse-bias the emitter base junction, which can be achieved by applying 0.1 volt forGermanium and 0V for silicon. This will ensure the required conditions for cutoff i.e.

IE = 0, IC = IC0, IB = -IC = -IC0

Saturation region:- In saturation region both the junctions JE and JC are forward biased by atleast the cut in voltage. The voltage VBE (VBC) across forward biased emitter (collector)junction has magnitude of just a few tenths of a volt. Hence the saturation region lies extremelyclose to Zero voltage axis. This is the region where all curves merge and decline rapidly towardsthe origin. It may be observed that the saturation region begins at the “Knee” of the characteristiccurves.

5. PROCEDURE:

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INPUT CHARACTERISTICS:

1. Make the connections as per the circuit diagram.2. Ensure the voltage knobs of the power supplies are in the minimum position before switching

them on.3. Choose a value for VCE. Fix the power supply know VCC to get the desired value of VCE.4. Vary the voltage VBB in small steps. Each time, note down the value of VBE and the

corresponding value of IB.5. Choose another value for VCE and repeat the above steps.6. Tabulate all readings and plot IB versus VBE.

OUTPUT CHARACTERISTICS:

1. Use the same circuit as above for obtaining the output characteristics.2. Now maintain IB at some constant value. Vary VCC and observe the changes in IC due to

the changes in VCE.3. Initially keep IB=0 μA. Vary VCC from zero volts and note down the readings of IC & VCE. 4. Repeat the above procedure for a few other values of IB such as 100 μA. Tabulate all the

readings as per the tabular form.

6. TABULAR COLUMNS:

Input Characteristics:

VCE=0V VCE=2V VCE=6V

IB(μA) VBE(V) IB(μA) VBE(V) IB(μA) VBE(V)

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Output characteristics:

7. ExpectedGraphs:

OUT

PUT

CHARACTERISTICS:

IB=0 μA IB=15 μA IB=25 μA

VCE(V) IC(mA) VCE(V) IC(mA) VCE(V) IC(mA)

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INPUT CHARACTERISTICS :

VCE = 2V IB (μA)

VCE =0V VCE =6V

VBE (Volts)

8. RESULT:

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9. VIVA VOCE:1) What is a transistor? What is the difference between an NPN and a PNP Transistor?2) Draw the symbolic representations of NPN and PNP transistors.3) Explain physically how amplification is achieved in a transistor. Is it voltage

amplification or current amplification? Give an example of a device capable of givingany other type (voltage/current) of amplification. What is the origin of the name‘transistor’?

4) Give the physical arrangements of a PNP junction transistor and discuss how it providescurrent amplification.

5) Sketch the characteristics of a BJT in Common-Emitter Configuration. Why is it calledCommon-Emitter configuration?

6) For amplification, why is the CE mode of BJT preferred over other modes of operation?7) Is CE Configuration of BJT a current amplifier or a voltage amplifier? Does an

impedance transformation also take place?8) Why do we observe a phase-shift of the output with respect to the input in a common

emitter stage?9) What is a “load-line”? What is its significance? Differentiate between a.c. load line and

d.c. load line.10) Explain the output characteristics of BJT in Common Emitter Configuration with respect

to dc load line.11) What are h-parameters? What are they used for? Why are these h-parameters preferred

over other parameters?12) Write the typical values of h-parameters at IE = 1.3mA.13) Graphically obtain the h-parameters for BC-107 BJT at IC = 5mA and VCE = 2V.14) Give the values of VCE Sat, VCE Cutoff and VCE Active for the transistor BC107.15) What are the other applications of the common emitter configuration (other than as an

amplifier)?

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MVSR ENGINEERING COLLEGE, HYDERABAD.

Experiment 3: Date:

CHARACTERISTICS OF BJT TRANSISTOR (CB)

1. AIM: a) To obtain input and output characteristics of a common-base transistor.

2. APPARATUS:

Sl.No.Name of the device

Range /No Qty.

1. Ammeters 0 –10 mA 02

2. Resistor 2.2K 01

3. Transistor BC 107 01

4. Multi meter/Voltmeter ----- 01

3.CIRCUIT DIAGRAM:

4.THEORY:

The circuit shown in the figure above, is referred to as Common Base or CB configuration,since the base is common to both input and output circuits. For an NPN Transistor, thelargest current components are due to the electrons. The emitter-base junction is alwaysforward biased (the voltage being VEB)and the collector-base junction is reverse biased (thevoltage being VCB).

The various currents are related by the equation IE=IB+IC

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From the equation, we see that output current IC is completely determined by input current IE andthe output voltage VCB=VC. The output relation may be written in implicit form as

IC=f(VCB,IE)

Similarly, in implicit form, the input characteristic is given by VEB=f(VCB,IE)

The output characteristic is a plot of IC versus VCB with emitter current IE as a parameter.The input characteristic is a plot of IE versus VEB with VCB as a parameter.

Explanation of characteristics:

In common-base configuration, the emitter-base junction acts like a forward biased junction.Therefore, the input characteristics are nothing but the volt-ampere characteristics of this junctiondiode. As in a semiconductor diode, these characteristics also have a cutin voltage. An increasein the magnitude of VCB causes the magnitude of IE to increase with VEB held constant. Thisincrease is attributed to a phenomenon called base-width-modulation or Early Effect. Therefore,the curves shift leftwards with increasing VCB.In, the output characteristics, we can identify three regions. They are Active Region, SaturationRegion and Cutoff Region.In the active region, the collector junction is reverse biased and the emitter junction is forwardbiased. In the saturation region, both emitter and collector junctions are forward biased. And inthe cutoff region, both emitter and collector junctions are reverse biased.The characteristics are shown in the expected graphs.

5. PROCEDURE:

I/P Characteristics:

1. Make the connections as per the circuit diagram.2. Choose a value for VCB, say, 0V. 3. By maintaining VCB at the chosen value, vary the supply voltage VEE in small convenient steps. Each time, note the value of VEB and the corresponding value of IE.5. Tabulate all readings.6. Choose another value of VCB and repeat the above procedure.7. Plot IE versus VEB.

O/P Characteristics:

1. Connect the circuit as per the circuit diagram.2. Choose a value for IE, say, 1 mA. Vary the power supply VEE till the ammeter reads this value

of IE.3. Now, vary the power-supply VCC in small steps. Each time, note down the value of VCB and

the corresponding value of IC.4. Tabulate all observations.5. Choose another value for IE and repeat the above steps.

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6. Plot IC versus VCB.

6.OBSERVATIONS:

INPUT CHARACTERISTICS:

S. No VCB = 2V VCB = 4V

VEB(V) IE(mA) VEB(V) IE(mA)

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OUTPUT CHARACTERISTICS:

7. EXPECTED GRAPHS:

OUT PUT CHARACTERISTICS

IC (mA)IE = 6mA

S.No IE = 2mA IE = 4mA

VCB(V) IC(mA) VCB(V) IC(mA)

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IE = 4 mA

IE = 2mA

VCB (Volts)

INPUT CHARACTERISTICS

VCB = 4V IE (mA)

VCB = 2 VCB =6V

VEB (Volts)

8. RESULT:

9. VIVA VOCE:1) What do you understand by the term Bipolar Junction Transistor?

2) What are the various types of Transistors available. Are there any preferred types if so why?

3) What do you understand by input and output characteristics?

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4) Distinguish between active, saturation, cutoff regions and internal operations of a BJT?

5) Discuss the various doping levels in the emitter, base and collector regions?6) Explain the physical structure of a BJT?7) Discuss the current components in a BJT in CB configuration?

8) Explain why the base width is kept extremely small?

9) A PNP Transistor operating in the active region, extremely small no. of holes injected into thebase recombine with electrons in the narrow base region but the hole density at Jc becomes zero. Explain how?

10) Explain Early Effect?

11) Why does the emitter current increase with increase in reverse bias at the collector junction?

12) What is meant by collector reverse saturation current?

13) Write the collector current expression for BJT in CB configuration in 1. Cutoff region 2. Active region 3.saturation?

14) Discuss the shapes of CB static input and out put characteristics?

15) Explain why static o/p characteristics of a CB Transistor have slight upward slope?

16) What is bottoming effect?17) What are the values of VBE cutoff VBE sat, VBE active, VCB off,

VCB active ,VCB sat?

Experiment 4: Date:

CHARACTERISTICS OF JFET1.AIM:

To obtain the static characteristics (drain and transfer characteristics) of a Junction Field Effect Transistor in the Common Source Configuration.

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2.APPARATUS:

S.No. Item Range/Specification Qty1 n-channel JFET BFW10 12 DC Ammeter 0-10 mA 13 DC Voltmeter 0-20 V 24 Resistor 4.7 k Half Watt 15 Dual Channel Regulated Power

Supply0-30 V 1

3. CIRCUIT DIAGRAM:

4. THEORY:The common source drain characteristics for a typical n-channel FET are obtained by

plotting the drain current against VDS (the drain to source voltage) with VGS (the gate to sourcevoltage) as a parameter. The gate forms a PN junction with the channel. When a reverse bias isapplied to this junction, a space-charge region is formed. Since the gate is relatively heavilydoped, the space-charge region extends more into the channel than into the gate. Hence thechannel width is reduced as the reverse bias voltage VGS increases. Therefore, the value of thedrain current decreases

Firstly let us consider the condition for VGS = 0V. Now with VGS=0v there is no reverse bias at thegate and hence the channel between the gate junction is completely open. Under this conditionwhen VDS=0V there is no electric field applied across the drain and source. Therefore majoritycarriers (i.e. electrons in the case of an n-channel FET) do not conduct and the drain current ID=0with the application of a small voltage VDS at drain. The n-type semiconductor behaves like asingle resistor following Ohm’s law and definite drain current flows. This drain current ID varieslinearly with VDS. Therefore, ohmic voltage drop takes place across the bar. This voltage drop(which is non-uniformly distributed within the length of the bar) reverse biases the gate junctionresulting in narrowing of the channel. The depletion region is not uniformly distributed. It is moretowards the drain end rather than at the source end. As the magnitude of the drain voltage V DS isincreased progressively, a critical value of VDS is reached at which the channel gets almostconstricted i.e., more or less blocked. When VDS is further increased the drain current ID becomesconstant. The value of VDS for which the drain current reaches almost a constant value is calledthe pinch off voltage Vp, The region of the characteristic curve for which VDS>Vp is called theconstant current region or the pinch-off region. When a regulative voltage is applied at the gate,

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the reverse bias at the p-n junction is greater and pinch off occurs for smaller values of VDS. Alsothe maximum drain current Ids is lower when compared to the value of the saturation drain currentIdss at VGS=0V.

5. PROCEDURE:

DRAIN CHARACTERISTICS:

1) Connect the circuit as per the circuit diagram.2) Initially, choose VGS=0. Make VGG=0 so that VGS becomes 0.3) Vary the drain supply VDD starting from 0V. Note the voltage VDS and the corresponding

drain current Id.4) Tabulate all readings.5) Repeat steps 3 and 4 by taking different vales of VGS (say VGS=-1V, -3V etc).6) Plot Id versus VDS in each case.

TRANSFER CHARECTERISTICS:

1) Connect the circuit as per the circuit diagram.2) Choose a value for VDS, say, 4V.3) Vary the drain power supply VDD to get VD as the chosen voltage. This is kept unaltered

through the rest of the steps.4) Now, vary VGS from 0V onwards in small convenient steps. Note the corresponding value of

ID.5) Observe that ID is maximum when VGS=0 and ID becomes zero for some value of VGS.6) Tabulate all readings.7) Chose another value of VDS and repeat the above procedure.Plot ID versus VGS in each case

6. Expected Graph:

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DRAIN CHARACTERISTICS

7. TABULAR COLUMNS:

DRAIN CHARACTERISTICS:

VGS= -0.5 Volts VGS= -0.1 Volts

VDS (V) ID (mA) VDS (V) ID (mA)

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TRANSFER CHARACTERISTICS:

VDS = 2 Volts VDS = 6 Volts

VGS (V) ID (mA) VGS (V) ID (mA)

8.RESULT:

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9. VIVA VOCE:

1) What are the differences between a BJT and a JFET?

2) What is meant by a unipolar device? Why is a JFET known as a Unipolar Device?

3) What are the typical applications of a JFET?

4) What are the parameters of a FET? What are the relations between them?

5) What are n-channel and p-channel JFETs? How are they different from one another?

6) Give the names/numbers of a few commercially available JFET devices.

7) What are the various possible configurations in which a JFET can be connected? Whatare the typical applications of each?

8) What is a MOSFET? What are the possible types in a MOSFET ?

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Experiment 5: Date:

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RECTIFIERS WITHOUT FILTERS

1. AIM: To obtain ripple factor and regulation of a half wave and full wave rectifier withoutfilters.

2. APPARATUS:-

S.No. Name of the device Range/No Quantity

1. Diodes 1N 4007 2 No.

2. Milli ammeter 0 - 25m Amp. 1 No.

3. CRO 20 Mhz 1 No.

4. Center taped Transformer 6-0-6 V 1 No.

5. Patch cords

6. Voltmeter 0-20 V 1 No.

7. Decade Resistance Box 1Ω – 10 M Ω 1 No.

3. THEORY:Rectifiers perform the task of converting A.C. to D.C. Commonly used rectifiers are Half-Wave Rectifier and Full-wave Rectifier.

Half wave rectifier:The basic rectifying element is a diode. This device has essentially an infinite resistance(when it is reverse biased) to current flow in one direction and a very small resistance (when it is forward biased) for the current flow in the opposite direction.When the diode is forward biased, current flows through the load resistance, leading to the development of a uni directional output across it. When it is reverse biased, current is approximately zero, therefore voltage developed across the load is zero.Full-Wave Rectifier: As shown in the figure in a full-wave rectifier the transformer secondary has a center-tap and each half give a peak voltage of Vm. In each half there is one diode D1 and D2. The load resistanceRL is common to both halves. Hence a full-wave circuit comprises of two half-wave circuits. On the positive half cycle when the point A is +ve w.r.t B, the diode D1 conducts and current i1 flows through RL. During the negative half cycle the point C is +ve w.r.t to B and hence the diode D2

conducts and current i2 flows through RL.

4. CIRCUIT DIAGRAM:

HALF WAVERECTIFIER

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FULL WAVE RECTIFIER

5. PROCEDURE :- 1) Connect the circuit as per the circuit diagram.2) Choose an appropriate value for the load resistor, say, 10 k Ω.3) Observe the input and output waveforms on the CRO and verify whether they are as can be

expected.4) Measure the peak voltage Vm on the CRO screen. Using this value of Vm, the values of Irms

and Idc can be calculated.5) Measure the DC current and the DC voltage in the ammeter and the voltmeter respectively.6) Measure the peak voltage Vm (or the dc voltage Vdc, using the voltmeter) at the no load

condition.7) Make calculations according to formulae.

6. EXPECTED GRAPHS

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7. FORMULAE:HALF WAVE RECTIFIER:Im = Vm / (Rf + RL + R)

Idc = Im/2

Irms = Im/П

γ = [(Idc/Irms)2 – 1]1/2

Regulation = (Vno load – Vfull load)/Vfull load

FULL WAVE RECTIFIER:Im = Vm / (Rf + RL + R)

Idc = Im/1.414

Irms = 2Im/П

γ = [(Idc/Irms)2 – 1]1/2

8. RESULT:

9. VIVA VOCE:

1) What is the advantage of using a full wave rectifier over a half wave rectifier?

2) What is a bridge rectifier? What is the advantage of using it over a full wave rectifier?

3) What is the Peak Inverse Voltage in the case of full wave and half wave rectifiers?

4) Define regulation and ripple factor. What are the ideal values for these quantities? What arethe practical values?

5) How do we remove ripple from a rectifier output?

6) What is a filter? What is its use?

41


7) What is a regulator? Why is it required?

42


Experiment 6: Date:

RECTIFIERS WITH FILTERS

1. AIM: To obtain ripple factor of a full wave rectifier with filters.

2. APPARATUS:S.No. Name of the

deviceRange/ No Qty

1 Si diode IN4007 22 D M M 23 A.C power

supply230V,50Hz 1

4 Connecting wires

5 Resistor 1K 16 C R O 1

3. THEORY: A full wave rectifier converts a zero average value signal into a signal which is

unidirectional with some average value. The two diodes in the circuit are connected in sucha way that the conduction for one half cycle (+ve) takes place through one diode (say D)and the diode D2 is not conducting. In the next half cycle diode D1 is not conducting and D2

is conducting. The current flowing through the load is always in the same direction. Thecurrent flowing through the load is the sum of the load currents.

4.CIRCUIT DIAGRAMS:WITH INDUCTOR FILTER:

WITH CAPACITOR FILTER:

43


WITH L-SECTION FILTER:

WITH PI-SECTION FILTER:

44


4. PROCEDURE:

PART – A (Using an inductor filter)1) Connect the full wave rectifier circuit with an inductor filter

of value L = 10H and RL = 10K.The step down voltage output of the transformer is applied as input to the FWR circuit.

2) Measure the dc current flowing the circuit 3) Observe the output waveforms on the CRO.4) Measure the peak value of the input and output voltage using a CRO. Also measure the

ripple voltage.5) Calculate the regulation and ripple factor using the appropriate relations.6) Verify the results using theoretical calculations.

PART – B (Using a capacitor filter)1) Connect a capacitor filter to the full wave rectifier circuit.2) Observe the input and the output waveforms on the oscilloscope.3) Measure the DC current through the load.4) Measure the ripple voltage and the peak voltage of the output waveform from the

oscilloscope.5) Calculate the ripple and regulation using the appropriate relations6) Verify the results using theoretical calculations.

PART – C (Using L – Section Filter)1) Make the connections as per the circuit diagram.2) Connect an L-Section filter as shown.3) Observe the input and the output waveforms on the Oscilloscope 4) Measure the dc current flowing the circuit using the DC Ammeter.5) Measure the peak voltage and the ripple voltage of the output waveform.6) Measure the series resistance of the choke, (Rc) resistance of the

transformer winding (Rs) and the diode forward resistance (Rf)7) Calculate regulation and ripple factor using appropriate relations8) Verify the results using theoretical calculations.

PART – D (Using a - Section filter)1) Make the connections by connecting all the capacitors and

inductors in the circuit. 2) Observe the output wave form on the Oscilloscope.3) Measure the dc current (Idc) flowing through the circuit.4) Measure the peak voltage and the ripple voltage on the oscilloscope.5) Evaluate the ripple factor and regulation using the appropriate relations.6) Evaluate the results theoretically and verify.

45


5. FORMULAE:INDUCTOR FILTER:Ripple Factor:γ = [2 / (3 √2) ][1 / √(1 + 4ω2 L2 / RL

2)]If 4ω2L2 / RL

2 >> 1γ = RL/[3√2. ωL]Regulation :Vdc No Load = 2Vm / Vdc Full Load = 2Vm / - Idc R - (3)R – is the total resistance of the circuit exclusive of the loadi.e. R=Rf+RC+RS where Rf is the forward resistance of diode, RC is the choke resistance and RS isthe resistance of the secondary winding.

CAPACITOR FILTER:Vdc no load = Vm

Vdc full load = Vm – (Vr / 2) Where Vr is the total capacitor discharge voltage or the ripple voltatge.Ripple Factor:γ = Vrms / Vdc = 1 / (4 √3 fcRL )γ = (Vr/2)/(Vm –Vr/2)L – SECTION FILTER:Regulation:V dc no load = 2Vm / Vdc full load = 2 Vm / - Idc.(Rf+RC+RS)L-section filter:Ripple Factor:r = Vrms / Vdc = 2 x c / 3 x L = (√2) / (12ω2LC) - SECTION FILTER:Regulation:Vdc no load = Vm

Vdc full load = Vm – Vr / 2Ripple Factor: R.F= 1/(6 √2 ω2LC )

6. OBSERVATIONS:

IDC IAC VDC VAC Ripplefactor

InductorfilterCapacitorfilterL SectionFilter∏ filter

46


7. RESULT:

VIVA - VOCE

1. Why is the ripple frequency double the value of the supply Frequency in the case of a full wave rectifier.

2. Explain the importance of ripple and regulation in the case of a rectifier.

3. A capacitor filter provides nearly Vm volts at light load, but the voltage regulation is poor. Explain the reason for a poor regulation in the case of a FWR withcapacitor 1 filter.

4. Explain why only the inductor or the capacitor alone is not used as filters to a FWR circuit. Inother words discuss the Disadvantages of only C or only L filter.

5. Which filter circuit do you prefer in converting the rectified output Voltage to a pure dcvoltage. Give reasons. Consider the cases of a light load and large loads.

47


Experiment 7: Date:

STATIC CHARACTERISTICS OF SCR

48


1. AIM: To obtain the volt-ampere characteristics of SCR

2. APPARATUS:a) SCR experimental trainer kit with user manual and Patch chords.

b) 0 - 25V DC voltmeter.

c) 0 - 100mA DC ammeter.

d) Digital multimeter

3. THEORY:

The Silicon Controlled Rectifier (SCR) is a semi conductor device that is a member of a family ofcontrol devices called the thyristors.

The three terminals have been named as Anode(A), Cathode (K) and Gate (G).When Gate is open:When no voltage is applied across Gate, J2 is reverse biased while J1 and J3 are forward biased.No current flows and the SCR is Off. If the applied is gradually increased, a stage is reachedwhen J2, breaks down. Now, it is in ON state. The applied voltage at which SCR conductsheavily without Gate voltage is called break over voltage. When Gate is positive w.r.t cathode:The SCR can be made to conduct heavily at smaller applied voltage by applying a small potentialto the gate. J3 is now F.B. J2 is R.B. As soon as the Gate current flows, anode current increases.The increased anode current makes more electrons available at J2.This process continues and in asmall time, J2 breaks down and SCR conducts heavily. Once SCR starts conducting, the Gatelosses all control. Even if gate voltage is removed, the anode current does not decrease at all. Theonly way to stop conduction is to reduce the applied voltage to zero.

VOLT-AMPERE CHARACTERISTICS:

4. CIRCUIT DIAGRAMS:Basic characteristics of SCR:

Gate characteristics of SCR

49


5. PROCEDURE:Basic Characteristics of SCR:a) Connect the circuit as shown. Adjust some DC value and connect an Ammeter and

Voltmeter.b) Now short the gate terminal to the anode terminal.c) Then SCR fires and is indicated by the flowing of anode current. Voltage across anode to

cathode falls.d) Now, open the gate terminal and observe whether the SCR is ON or OFF.e) If the SCR is in the ON state, then the anode current is enough to keep the SCR in the ON

position. If SCR is OFF, the increase the DC voltage to some more value and repeat the above procedure.

f) Find out the approximate value of the holding current.Gate Characteristics of SCR:a) Connect the circuit as shown in the fig.b) Connect the ammeter and the voltmeter in the circuit.c) Adjust the Anode to cathode voltage of SCR to its full value.d) Make sure that the Gate voltage is in its min position. Voltmeter across SCR full voltage

applied and current meter shows no reading. This means that the SCR is in the OFF state.e) Now, vary the gate current of the SCR with voltage adjustment pot and current

adjustment pot until the SCR fires, which is indicated by the falling of the voltage across SCR and current flowing through the SCR.

6. TABULAR COLUMN:

Ig = 6.5mA

S.No VAK (Volts) IAK (mA)

2V

4V

6V

50


7. EXPECTED GRAPH:

8. RESULT :

9. VIVA QUESTIONS:

a) Explain the working of SCR.b) Define holding current.c) What are the specifications of the SCR used in the trainer?

51


Experiment 8: Date:

52


STATIC CHARACTERISTICS OF UJT

1. AIM: To obtain the volt-ampere characteristics of UJT

2. APPARATUS:e) UJT experimental trainer kit with user manual and Patch chords.

f) 0 - 15V DC voltmeter.

g) 0 - 10mA DC ammeter. h) Digital multimeter

3. THEORY:The Uni Junction Transistor is a three terminal semiconductor device with negative resistancecharacteristics. It consists of a bar of n-type silicon with a small p-type insert (emitter) near to oneof the ends. The two ohmic contacts at the ends of the n-type bar constitute two terminals Base-1and Base-2. The rectifying contact is called the Emitter. The device shows negative resistance characteristicsbetween its Emitter and Base -1 terminals.A fixed interbase potential VBB is applied between Base-1 and Base-2.The most important characteristic of UJT is that of the input diode between E and Base 1.If base-2 is open circuited, then, IB2=0,input V-I char is same as that of the normal p-n junction diode. For the fixed value of VBB, a negative resistance char is obtained.The principle application of UJT is that of a switch which allows rapid discharge of a capacitorconnected between emitter and Base-1. this is the principle of operation of a Relaxation Oscillatorusing UJT.Equivalent circuit of UJT:

Figure shows the equivalent circuit of UJT. RB1 and RB2 represent the resistance of the silicon bar from the junction to bases B 1 and B 2 respectively. R B1 is shown as a variable resistance, since its value depends on bias voltage V D . The diode represents the p-n junction formed between the emitter and the base.

VOLT-AMPERE CHARACTERISTICS:

53


4. CIRCUIT DIAGRAMS:

5. PROCEDURE:1. Connect the circuit diagram as shown in the Figure.

2. Make sure that the potentiometer is in its minimum position (anti clock wise direction) .. 3. Adjust the potentiometer in clock wise direction and noted down the values of the

voltmeter and milli ammeter.

4. Tabulate these values and draw graph between emitter voltage VE and current IE.

6. TABULAR COLUMN:

S.No Emitter Voltage (V) Emitter current(mA)

54


7. EXPECTED GRAPH:

8. RESULT :

9. VIVA QUESTIONS:

d) Explain the working of UJT.e) Define peak voltage.f) Define valley voltage.g) Explain the concept of Negative resistance

55


Experiment 9: Date:

56


STUDY OF CRO APPLICATIONS

1. AIM: To use a CRO (Cathode Ray Oscilloscope) for frequency and phasemeasurement.

2. APPARATUS:

Sl.No Name of the device Range /No Qty.

1. General purpose CRO 5Mhz 01 No

2. A.F. generators ---- 02 No

3. RF signal generators ---- 01 No

4. High pass circuit ---- 01 No

As scopes we have operate at 10Mhz and some up to 30 Mhz we should includemeasurement of frequencies of the order of 5 to 15 Mhz also.(For AF only Lissojoes figure).

CRO APPLICATIONS

3. THEORY:- By applying suitable alternating voltage to the two sets of deflection plates,

various figures is the form of straight line or one or more closed loops may be obtained on thescreen.

Let Vx and Vy be the instantaneous values of voltages applied to the x and y plates Ux = Vx sin Wxt

Uy = Vy sin (Wyt + )

Where Vx & Vy are the amplitudes of the voltages, Wx & Wy are the angular frequencies of thevoltages and is the phase angle of voltage Uy.

CONDITION 1. For Wx = Wy; = 0 Uy = Vy / Ux ; Ux Straight line

CONDITIONS 2. Wx = Wy, = /2 radians

Ux2 / Vx

2 + Uy2 / Vy

2 = 1

Ellipse.

CONDITION 3. Wx = Wy; = /2 radians, Vx = Vy = V Ux2 + Uy2 = U2 circle

CONDITION 4. If Wx and Wy are related by simple integers then

57


We obtain closed figures with multiple loops.

a) Wx = 2Wy

b) 2Wx = Wy

c) Wx = 3Wy

d) 3Wx = Wy

In general nx wx = ny wy give closed loop figures where nx and ny are integers.. nx and ny are thepoint of tangencies of the figure with horizontal and vertical axis respectively drawn at the edge(either top or bottom)Fx / fy = points of Tangency to a vertical line / points of tangency to a horizontal line = Wx / Wy.

To measure the frequency of an alternating voltage of sinusoidal wave shape, it is applied to oneset of deflection plates to the other set of deflection plates is applied the sinusoidal voltages froma variable frequency standard oscillator. The frequency of this oscillator is varied until. Singleloop stationary pattern is obtained. In this, the frequency of the sinusoidal voltage is the same asthe frequency of the oscillator voltage. Oscillator frequency may be found from the calibrated dialof the oscillator.

Or

A looped Lissajous figure may be used and frequency of alternating voltage may be calculatedusing the relation given in above equation.

PHASE MEASUREMENT: The phase difference between two sinusoidal voltages of the samefrequency can be measured using a CRO. The two voltages are applied to the two deflectionplates of the CRO simultaneously. The resulting Lissujous figures is an ellipse as shown in fig.The maximum displacement is the Y direction & the intercept of the ellipse with the Y – axis aremeasured. If the phase difference between the two voltages is then it can be shown that sin = B/A

The phase difference can also be calculated from the maximum horizontal displacement X1 andthe intercept on the x-axis x2. Thus Sin = X2 / X1

4. PROCEDURE FOR FREQUENCY MEASUREMENT:

PART-A1. Make the connections as per the figure. Feed a 1 khz signal from the AF generator. Adjust

sensitivity switch to convenient position so that one cycle can be measured from the screen.Frequency is given by 1/T (2F). Repeat for another 5 to 6 values, the above procedure. Take 5to 6 readings.

PROCEDURE PART-B

FREQUENCY MEASUREMENT OF AN UNKNOWN SINUSOIDAL SIGNAL:

1. To one set of deflection plates (say x) apply the known alternating signal. (known in the sensethat its frequency can be measured).

58


2. To the other set of deflection plates (y) apply the unknown alternating signal.3. Now adjust the frequency of the signal to such a value such that the figure observed on the

screen is a single loop.4. Now read the frequency of the signal given to the x plates from the oscillation. The frequency

of the unknown signal is equal to the known signal frequency.5. A looped Lissajoy’s figure may be obtained when the frequency of the unknown signal bears

some relation to the frequency of the known signal.6. The frequency of the unknown signal may be found from the equation given below. Fx/fy = points of tangencies to a vertical line / points of tangencies to a horizontal line.i.e. nx fx = ny fy

7. For two figures measure the frequency of the signal and tabulate the reading as per tabular columns.

PART C PROCEDURE FOR MEASURING THE PHASE OF A GIVEN SINUSOIDALSIGNAL.

1. Apply the sinusoidal signal from A.F generator to the plates (channel 1) and sinusoidal signal with some phase shift is feel tochannel 2 (X plates).

2. The necessary phase shift is obtained using a high pass (R.C) circuit.3. Now observe an ellipse on the screen.4. Measure the maximum displacement in the Y – direction and term it as ‘A’. also measure the

distance between the intercpets of the ellipse with the vertical axis. Term this distance as ‘B’.5. Evaluate sin –1 B/A = 6. Verify the value of theoretically. (The theoretical & practical values should tally)

= tan –1 XC / R

XC = 1 / 2 fc

59


5. TABULAR COLUMN S.No Time period Frequency

6. Result:

7. VIVA VOICE :-

1. List the structured details of a CRO.

2. What is the function of accelerating anode in a CRT?

3. What is the amount of potential to be applied at the final anode and state the reasons forapplying that voltage?

4. What is the nature of the signal applied to the horizontal and vertical deflection plates.

5. What are the various screen colours available. What is the chemical used for each of thecolour.

6. List the various applications of a CRO.

7. What are Lissajous figures. How are they formed?

8. How can you obtain an ellipse on a CRO screen?

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Experiment 10: Date:

BJT - BIASING1. AIM: a) To design a self-bias circuit for a Bipolar Junction Transistor and to verify its

working.

2. APPARATUS:S.No. Item Range/Specification Qty1 Npn transistor BC107 12 Resistors 4.7 k, 3.2k, 10K & 1k 1 each3 D.C. Ammeter or multimeter 0 to 20mA 14 D.C. Voltmeter or multimeter 0 to 20V 15 Dual Channel Regulated power

supply0-30V 1

3. THEORY:

Biasing is used to obtain a stable operating point against device variation. The operatingpoint depends upon transistor parameters and they in turn depend on temperature.The transistor parameters like change from one transistor to another, although they are of

similar type. i.e. the value of the parameters might be different for different devices belonging to the same type.

Even with the state of the art in Semiconductor Device Technology, transistors of a particular type still come with a wide spread variation in the values of some parameters.Thermal instability causes great changes in reverse current IC0. It doubles for every 10C rise in temperature. It in turn causes the collector junction temperature to rise, which in turn increases the value of IC0 further. As a result, the value of IC0 increases and there occurs a shift in the Q-point of the transistor.

The Emitter biased or the Self-biased circuit works in the following manner. If there is anincrease in the collector current IC, then, the voltage drop across the resistor Re increases. Because of this increase, the base current actually decreases. Because of this, the effect of the increase in the collector current is decreased. However, there is bound to be loss of AC signal gain due to the same reason. To avoid the loss of AC signal gain because of this, a capacitor is used to bypass the emitter resistor Re.

61


4. CIRCUIT DIAGRAM:

5. PROCEDURE:

1. Design the required circuit as per the requirements.2. After connecting the circuit as per the design, measure VCE, VBE, Ve, IC, IB and VC

using multimeters. Calculate the stability factor and the operation point. Verifytheoretically.

6. OBSERVATIONS AND CALCULATIONS:VCC =VC =VE = RC =VB =VCE =IC =

S =

=VCC = IC RC + VCE which impliesIC = (VCC - VCE)/RC

RB/RE = (1+)(S-1)/ 1+ – SV = IBRB + VE + VBE

Where V is the voltage of the Thevenin’s equivalent voltage source. V = (IC/)RB + VE + VBE

Then,

62


R1 = RB (VCC /V)

R2 = R1V /(VCC-V)

From the circuit, the current through R1 is given by:I1=VCC/(R1 + R2)

Therefore, the Voltage V2 developed across R2 is given by Voltage Division V2=VCC R2/(R1 + R2)By applying KVL to the base circuit V2 = VBE + VE = VBE + IE RE.

=> IE = (V2 – VBE) / RE.Now, applying KVL to the collector side circuit, we get

VCC = ICRC + VCE + IE RE = IC (RC + RE) + VCE (since IE IC)

=> VCE = VCC - IC (RC + RE)

7. RESULT:

8. VIVA VOCE:

1) Which transistor parameters vary with temperature?

2) What is meant by ‘load line’?

3) What is meant by the “operating point” of a transistor?

4) Why is a capacitor used to shunt the emitter resistor of self-biased transistor?

5) What is meant by thermal runaway?

6) What are the other biasing arrangements possible (other than self-bias)?

7) Why is the self-bias circuit preferred over other possible biasing circuits?

8) Define Stability factor and explain its significance.

9) What is the stability factor of a Common-base transistor circuit?

63


64


FET BIASING:1.AIM: To design a source self-bias circuit and verify its operation.

2.APPARATUS: S.No. Item Specification / range No.

1 n-JFET BFW10 1 2 Resistors 4.7k, 22k, 470 1 3 D.C. ammeter (0-100 ma) 1 4 D.C. voltmeter (0-20 V) 1 5 Connecting wires 3.THEORY:

As in all amplifiers consideration must be given to biasing the FET to place its operatingpoint within the linear portion of its active region. The factors governing selection of operatingpoint for a FET are similar to that for BJT.

Unlike a BJT a reverse bias voltage is to be applied across the gate to source junction in aFET. For a specified drain current, the corresponding Vgs can be obtained. Since the gate current is negligible, the required source resistance can be determined as ratio of Vgs to Id. A capacitor Cs having very large value is used to bypass the resistor RS so as to avoid the degenerative feedback for a.c. signals. The problem of biasing further is simplified by the fact that there exists a value Vgs for which the drain current does not change with temperature. Hence it is possible to bias a FET for zero drain current drift.

4.PROCEDURE: 1) Make the connections as per the circuit diagram.2) Apply a voltage of say 15V to the circuit.3) Measure drain current, Vds, Vgs.4) Determine the operating point.5) Design the values of biasing resistors.6) Verify the operation of circuit.

65


5.CIRCUIT DIAGRAM:

6.RESULT:

7. VIVA VOCE:

1) What is the advantage of a FET biasing circuit above BJT biasing?

2) What is the need for the capacitor CS?

3) Why are the coupling capacitors required?

4) What is meant by thermal stabilization?

5) Give examples of stabilization circuits

66



COMMON EMITTER BJT AMPLIFIER

1. AIM: To determine the frequency response of a Common-Emitter BJT amplifier.

2. APPARATUS: S.No. Name Range/Specification Qty1 NPN BJT BC107 12 Resistors 52K,15K,4.7K,100 OHM 1 each3 Capacitors 0.01μf,0.001μf4 Regulated Power

Supply0-30V 1

5 Cathode RayOscilloscope

Dual Trace (0-20 MHz) 1

6 AF Signal Generator 0-1000 kHz 17 Connecting

wires/probes

3. THEORY:In a single stage CE amplifier, the weak time-varying signal is applied to the base of thetransistor. Due to this, a small base current (which itself is time varying) starts flowing. Due tothe action of the transistor, a much larger current flows through the collector load. This current isactually about β times the base current. Therefore, a weak signal applied at the base appears in anamplified form at the output of the transistor circuit. It is in this fashion that the Common Emitteramplifier acts as an amplifier.

However, for the transistor to act as a good amplifier, there are certain requirements that mustbe met. Particularly, we need to study the circuitry that is associated with a practical amplifier.The following are the various circuit elements that are required.i) The biasing circuit: The resistors R1, R2 and Re form the biasing circuit for thetransistor. This arrangement is necessary to establish a proper operating point. If the transistor isnot properly biased, it may go into saturation for the positive half cycle or it may go into cutoff inthe negative half cycle.ii) Input Capacitor Cin: All practical signal sources have some output resistance. Ifnecessary steps are not taken, this resistance comes in parallel with R2 of the biasing circuit,disturbing the operating point. If a capacitor Cin is used in series with the source as shown, itallows only the ac component to pass through but isolates the signal source from R2. Generally,an electrolytic capacitor or appropriate capacity is used as Cin.

iii) Emitter Bypass Capacitor Ce: The presence of the emitter resistor Re in the biasingcircuit has the effect of reducing the gain of the amplifier. This happens because the currentflowing through the Re causes the emitter voltage to rise. To improve the gain of the amplifier,the resistor Re is bypassed by a capacitor Ce. This capacitor provides a low-impedance path forthe ac component, thereby improving gain.iv) Coupling Capacitor Cc: The coupling capacitor is connected between the output of onestage to the input of the second. In its absence, the Rc of the first stage comes in parallel to R1 ofthe second stage, disturbing the operating point of the second stage. Also, the capacitor serves toisolate the dc between the two stages.

67


Gain: The ratio of the output electrical quantity to the input of the amplifier is called its gain. Ifthe output and the input quantities are voltages, the gain is called the Voltage Gain of theamplifier.Frequency Response: The voltage gain of an amplifier varies with signal frequency. Thishappens because the reactance of the capacitors in the circuit changes with signal frequency. Aplot between the voltage gain and the signal frequency of an amplifier is called the frequencyresponse of the amplifier.Bandwidth: The range of frequency over which the gain is equal to or greater than about70.7% (1/√2 times) of the maximum gain, is known as the bandwidth of the amplifier.Decibel Gain: The voltage gain of an amplifier in decibel notation is given by 20 log10 Av whereAv is the voltage gain.3db Bandwidth: When the voltage gain attains a value of 1/√2 times the maximum gain, theDecibel voltage gain attains a value that is 3db less than the maximum decibel gain. Therefore,the bandwidth of an amplifier can also be defined as the range of frequency over which thedecibel gain is not less than the maximum decibel gain minus 3dB.

4. CIRCUIT DIAGRAM:

5. PROCEDURE:

1) Connect the circuit as per the circuit diagram. Keep the signal generator in the sinusoidalmode.

2) Choose a value for the amplitude of the input signal, say, 50 mV Peak-to-Peak.3) Apply a signal of frequency 20 Hz to the circuit. Observe the output waveform on the

CRO. Note the amplitude of the output sinusoid.4) Increment the frequency of the applied signal in small convenient steps. Each time,

adjust the input amplitude to the chosen value (50mV). Note the output amplitude.Repeat this step till a frequency of 200 kHz.

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5) Tabulate all readings. At each input frequency, calculate the gain as Av = Vo / Vi. Alsofind the value of the gain in decibel as 20 log Av.

6) Plot a graph between the input frequency (f) and the gain(in decibel) on a semi-log graphpaper.

7) On the graph, identify the 3dB points. The frequency range between the 3dB points isnothing but the bandwidth of the given amplifier.

6. TABULAR COLUMN:

Input Voltage (Vin = 50mV)S.No. Input Frequency Output Voltage

(Vout)Voltage GainAv= Vout/Vin)

Voltage Gain in db =20log(Av)

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7. EXPECTED GRAPH:

8. RESULT:

VIVA VOCE:

1) What is the significance of theemitter-bypass capacitor and the

coupling capacitor in the CE amplifier circuit?

2) Explain why reversal of phase occurs in a BJT CE Amplifier.

3) What is the significance of the operating point in the working of an amplifier?

4) What happens if an amplifier is biased at cutoff or at saturation?

5) What is a load line? How is the ac load line different from the dc load line?

6) What is the significance of the bandwidth of an amplifier?

7) What is meant by Gain-Bandwidth Product? What is its significance?


COMMON SOURCE FET AMPLIFIER

1. AIM: To study and obtain the frequency response of a common-source JFET Amplifier.

2. APPARATUS:

70


S.No. Name Range/Specification Qty1 n-channel JFET BFW10 12 Resistors 9K, 56K, 4.7K, 2.2K 1 each3 Capacitors 0.01 μF 34 Regulated Power

Supply0-30V 1



6 AF SignalGenerator

0-1000 kHz 1

7 Connectingwires/probes

3. THEORY:

The weak signal is applied between the gate and the source of the FET. The output isobtained between the drain and the source terminals. For proper operation, the gate mustbe negative with respect to the source, ie., the input circuit should always be reversebiased. This is achieved by the biasing arrangement.

A small change in the reverse bias on the gate produces a large change in drain current. Thisfact makes FET capable of raising the strength of a weak signal. During the positive half ofthe signal, the reverse bias on the gate decreases. This increases the channel width andhence the drain current. During the negative half-cycle of the signal, the reverse voltage onthe gate increases. Consequently, the drain current decreases. The result is the smallchange in voltage at the gate produces a large change in drain current. These largevariations in drain current produce large output across the load RL. Therefore, a FET actsas an amplifier.

Gain: The ratio of the output electrical quantity to the input of the amplifier is called its gain. Ifthe output and the input quantities are voltages, the gain is called the Voltage Gain of theamplifier.Frequency Response: The voltage gain of an amplifier varies with signal frequency. Thishappens because the reactance of the capacitors in the circuit changes with signal frequency. Aplot between the voltage gain and the signal frequency of an amplifier is called the frequencyresponse of the amplifier.Bandwidth: The range of frequency over which the gain is equal to or greater than about70.7% (1/√2 times) of the maximum gain, is known as the bandwidth of the amplifier.Decibel Gain: The voltage gain of an amplifier in decibel notation is given by 20 log10 Av whereAv is the voltage gain.

3db Bandwidth: When the voltage gain attains a value of 1/√2 times the maximum gain,the Decibel voltage gain attains a value that is 3db less than the maximum decibel gain.Therefore, the bandwidth of an amplifier can also be defined as the range of frequency overwhich the decibel gain is not less than the maximum decibel gain minus 3dB.

4. CIRCUIT DIAGRAM:

2.2 k

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5. PROCEDURE:


2) choose a value for the amplitude of the input signal, say, 50 mV Peak-to-Peak.3) Apply a signal of frequency 20 Hz to the circuit. Observe the output waveform on the

CRO. Note the amplitude of the output sinusoid.4) Increment the frequency of the applied signal in small convenient steps. Each time,

adjust the input amplitude to the chosen value (50mV). Note the output amplitude.Repeat this step till a frequency of 1MHz.

5) Tabulate all readings. At each input frequency, calculate the gain as Av = Vo / Vi. Alsofind the value of the gain in decibel as 20 log Av.



6. TABULAR COLUMN:

Input Voltage (Vin = 50mV)

9 k

56 k

4.7 k

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S.No. Frequency Output Voltage(Vout)

Voltage Gain(Vout/Vin)

Voltage Gain(dB)

EXPECTED GRAPH:

7. RESULT:

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8. VIVA VOCE:

1) Compare the operation and frequency response of a Common Source FET amplifier withthose of a Common Emitter BJT amplifier.

2) What are the advantages of using a FET instead of a BJT?

3) What is the typical range of bandwidth for the FET Common Source amplifier?

4) Why is a source bypass capacitor used in a FET Common Source amplifier?

5) Can we interchange the source and drain terminals in a FET circuit? Can we do the samewith the emitter and collector terminals of a BJT circuit?

6) What is a MOSFET? How is it different from a JFET? What are its typical applications?

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Experiment: 13 Date:

EMITTER FOLLOWER

1.AIM: To determine the frequency response, input impedance and output impedance of aCommon-Collector BJT amplifier (Emitter Follower).

2. APPARATUS: S.No. Name Range/Specification Qty1 NPN BJT BC107 12 Resistors 52K,15K,4.7K,100 OHM 1 each3 Capacitors 0.01μf,0.001μf4 Regulated Power

Supply0-30V 1



6 AF Signal Generator 0-1000 kHz 17 Connecting

wires/probes

3. THEORY:The common collector transistor Amplifier is also called as Emitter Follower because its

voltage gain is close to unity and hence a change in base voltage appears as an equal changeacross load at the emitter. The emitter follows the input signal. The input resistance is very highand the output resistance is very low . Hence the most common use of the CC circuit is as a bufferstage which performs the function of resistance transformation over a wide range of frequencies.The Emitter Follower increases the power level of the signali) The biasing circuit:The resistors R1, R2 form the biasing circuit for the transistor. Thisarrangement is necessary to establish a proper operating point. If the transistor is not properlybiased, it may go into saturation for the positive half cycle or it may go into cutoff in the negativehalf cycle.ii) Input Capacitor Cin: All practical signal sources have some output resistance. Ifnecessary steps are not taken, this resistance comes in parallel with R 2 of the biasing circuit,disturbing the operating point. If a capacitor Cin is used in series with the source as shown, itallows only the ac component to pass through but isolates the signal source from R2. Generally,an electrolytic capacitor or appropriate capacity is used as Cin.

iii) Coupling Capacitor Cc: The coupling capacitor is connected between the output of onestage to the input of the second. In its absence, the Rc of the first stage comes in parallel to R1 ofthe second stage, disturbing the operating point of the second stage. Also, the capacitor serves toisolate the dc between the two stages.Gain: The ratio of the output electrical quantity to the input of the amplifier is called its gain. Ifthe output and the input quantities are voltages, the gain is called the Voltage Gain of theamplifier.Frequency Response: The voltage gain of an amplifier varies with signal frequency. Thishappens because the reactance of the capacitors in the circuit changes with signal frequency. Aplot between the voltage gain and the signal frequency of an amplifier is called the frequencyresponse of the amplifier.

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Bandwidth: The range of frequency over which the gain is equal to or greater than about70.7% (1/√2 times) of the maximum gain, is known as the bandwidth of the amplifier.

4. CIRCUIT DIAGRAM:

5. PROCEDURE:


2) Choose a value for the amplitude of the input signal, say, 50 mV Peak-to-Peak.3) Apply a signal of frequency 20 Hz to the circuit. Observe the output waveform on the CRO.

Note the amplitude of the output sinusoid.4) Increment the frequency of the applied signal in small convenient steps. Each time, adjust

the input amplitude to the chosen value (50mV). Note the output amplitude. Repeat this steptill a frequency of 200 kHz.

5) Notice that there is no phase difference between the input and the output signal of theAmplifier.

6) Tabulate all readings. At each input frequency, calculate the gain as Av = Vo / Vi. Also findthe value of the gain in decibel as 20 log Av.



9) Calculation of Input impedance: 1K resistor is present between Vs and Vi. The current flowing through this resistor is the current flowing through the network. Ii = (Vs-Vi) / 1K ; input resistance Ri = Vi/Ii.

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10) Calculation of Output impedance: Apply 1 KHz, 50mV signal at the input node. Connect aDRB with all switches at min position. Across the output terminals and increase theresistance such that Vo = Vi/2.

The value of resistance in the DRB is equal to the output resistance of the Amplifier.

6. TABULAR COLUMN:

Input Voltage (Vin = 50mV)S.No. Input Frequency Output Voltage

(Vout)Voltage GainAv= Vout/Vin)

Voltage Gain in db =20log(Av)

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7. EXPECTED GRAPH:

8. RESULT:

VIVA VOCE:

1) What is the significance of thecoupling capacitor in the CCamplifier circuit?

2) Explain why reversal of phasedoes not occur in a BJT CC Amplifier.

3) What is the significance of the operating point in the working of an amplifier?

4) What happens if an amplifier is biased at cutoff or at saturation?

5) What is a load line? How is the ac load line different from the dc load line?

6) What is the significance of the bandwidth of an amplifier?

7) What is meant by Gain-Bandwidth Product? What is its significance?

8) Why is the Common Collector Amplifier called as Emitter Follower?

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