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  • 8/9/2019 Design Consideration for the Eddy County Static Var Compensator

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    EEE

    Transactions

    on

    Power

    Delivery Vol 9

    No.2

    April

    1994

    DESIGN CONSIDERATIONS FOR THE

    EDDY COUNTY STATIC VAR COMPENSATOR

    757

    H.

    K.

    Tyll, Member G. Huesmann K. Habur K.Stump,Sr. Member

    W. H.

    Elliott, Member

    F.

    E.Trujillo, Sr. Member

    Siemens AG Siemens E&A Southwestern Public Services

    ErlangeqGermany Atlanta, GA, USA Amarillo, TX, USA

    KEYWORDS

    SVC, thyristor controlled reactor (TCR), thyristor swit-

    ched capacitor (TSC), reactive power compensation,

    voltage control, filter design

    ABSTRACT

    This paper describes the steps for the design of the

    Static VAR Compensator (SVC) Eddy County. The

    specified system requirements on operating range, loss

    evaluation and harmonic performance led

    to

    an SVC

    configuration which contains one TSC branch, one TCR

    branch for continuous reactive power control and two

    double tuned filter branches. The system voltage

    of

    the

    SVC secondary bus was optimized to 8.5 kV based on thy-

    ristor equipment capabilities. The paper shows the voltage

    and current stresses of the thyristor valves taking into

    account system faults for the TCR branch and misfiring

    effects on the TSC branch. The approach for filter design

    considering the harmonic performance requirements and

    resulting component ratings are shown. The Eddy County

    SVC commenced commercial operation in April 1992.

    INTRODUCTION

    System studies conducted by Southwestern Public Ser-

    vice indicated the need for reactive compensation between

    50 MVAr (inductive) and

    +

    100 MVAr (capacitive). A Static

    VAR Compensator system covering this range has been

    designed and installed at the 230

    kV

    Eddy County sub-

    station located in the southwest corner of the SPS system.

    Figure 1 shows the SPS system in the area of Eddy Coun-

    ty. Significant features of the Eddy County substation are

    that it contains a back to back HVDC converter (rated 200

    MW)

    to

    transfer power between the

    SPS

    system and

    western New Mexico, it has a 345 kV connection

    to

    a

    major generating station at Tolk, and it has a 230 kV con-

    nection to generators in the Cunningham

    /

    Maddox area.

    The purpose of this SVC is

    to

    provide voltage support for

    the system and allow most efficient use

    of

    the generators

    in the system.

    This paper presents the SVC designed for the Eddy

    County substation and highlights the main SVC design con-

    siderations and procedures. The SVC secondary voltage is

    optimized

    to

    take full advantage of the thyristors as proven

    by type tests for the selected thyristor design. The circuit

    configuration and SVC physical layout are presented. Filter

    design considerations and techniques are discussed.

    93 SM

    450 7

    PWRD

    A

    paper recommended and approved

    by the IEEE Substations Committee of the IEEE Power

    Engineering Society for presentation at the IEEE/PES

    1993 Summer Meeting Vancouver B.C. Canada July

    18- 22 1993. Manuscript submitted August 28 1992;

    made available for printing April 5 1993.

    PRINTED IN USA

    NEW

    MEXICO

    \--- .

    Roswell

    Lubbock

    Eddy County Cunningham DenverCity

    To

    EPE

    Maddox

    TEXAS

    4

    A

      atisbad

    345 V

    230 kV

    115

    kV

    Legend: - - -

    - - -

    HVDC Ba ck-to-Back

    Station

    Fig. 1 Location of the Eddy County Substation

    NETWORK REQUIREMENTS

    System characteristics:

    Normal voltage

    Max. cont. voltage

    Min. cont. voltage

    Max. phase voltage unbalance

    Transient overvoltage

    Normal base frequency

    Normal frequency deviation

    Min. cont. frequency

    Max. cont. frequency

    Short circuit power range

    System harmonic requirements

    Individual Voltage Distortion

    Total Voltage Distortion (THD)

    230 kV

    1

    .O

    pu)

    242 kV (1.05 pu)

    219 kV (0.95 pu)

    2

    o

    345 kV (1.5 pu)

    60

    Hz

    20.02Hz

    59.5 Hz

    60.5 Hz

    1.1

    ...2.0

    GVA

    1.O

    1.5%

    SVC basic data requirements

    Design points

    Rated inductive power -50 MVAr 1

    .O

    pu voltage

    Rated capacitive power 1OOMVAr 1.O pu voltage

    Operating range

    Continuous cap. operation

    0.85

    to 1.1 pu voltage

    Continuous ind. operat ion

    0.9 to

    1.1 pu voltage

    Full inductive operation at voltages above

    1.1

    pu

    0885-8977/94/$04.00 993 IEEE

  • 8/9/2019 Design Consideration for the Eddy County Static Var Compensator

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    758

    The data listed above results in a V

    / I

    characteristic as

    shown in Figure

    2.

    Below

    0.85

    pu voltage the SVC shall

    operate at its capacitive limit. At voltages above

    1.1

    pu the

    SVC shall operate at its inductive limit. The operation at

    1.5

    pu voltage is a limited period of

    3

    cycles. Within the

    voltage range of

    0.85 to 1 . 1

    pu, any operating point else-

    where in the shadded area is permitted.

    I

    TSC+TCR+FC

    I

    I

    I

    I I I

    I

    I 1

    I

    I 1

    I I

    I 1

    100 50

    I

    I 1

    design point design point

    TCR+FC I

    I

    I

    I

    50

    Oprim

    in

    MVAr

    Continuous

    V

    operation

    4

    1 o 0.5

    0 0.5

    b r i m

    in PU+

    ~leurCaf ivofi

    -

    apacitive

    Operation

    Fig.

    2: V / I

    diagram of the SVC Eddy County

    as seen on the HV side

    4

    Capacitive

    Range

    SVC DESIGN

    Inductive

    Range

    Basic configuration

    Figure 3 shows a single line diagram of the SVC confi-

    guration selected

    to

    meet requirements outlined in the

    previous section. SVC capacitive requirements are met by

    a

    76

    MVAr TSC branch and a 24 MVAr filter. The filter is

    chosen to shunt away harmonic currents produced by the

    TCR

    so

    that the harmonic distortion limits

    of

    the system

    are satisfied. The TCR branch is rated for approximately 74

    MVAr to compensate the filter and absorb the required

    50

    MVAr from the system. The MVAr figures are referred

    to

    the

    230

    kV bus and include the effect of the

    12

    SVC

    transformer.

    The TSC branch includes two surge arresters. An arres-

    ter labeled CC in Figure

    is connected across the capa-

    citor to limit voltage in case the thyristor misfires at the

    worst possible time. A second surge arrester labeled SR in

    Flgure

    3

    connected across the TSC valve and reactor

    protects the thyristor against overvoltages. Neither of these

    arresters operate during normal SVC operation. They

    protec the TSC branch from faults and misfiring transients.

    Figure

    4

    shows the SVC operating diagram. There is an

    overlap range of approximately

    10

    degrees where the TSC

    may be either off or on depending upon past history. This

    overlap is controlled by a hysteresis type effect and avoids

    control instability at the TSC switching time even for the

    case of large system frequency deviations as specified.

    230 kV, 60 Hz

    TSC

    DF1

    A

    LTSC = 0.58 mH

    C T ~ C

    765 pF

    LI = 0.81 mH

    L2 = 73pH

    C1

    = 10000 pF

    Cp

    = 368pF

    I

    DF2

    TCR

    A

    L3 =

    0.20

    mH

    4 = 50pH

    C3

    = 1753 pH

    C4 = 441 pH

    R

    = 7.5 Q

    LTCR = 7.5 mH

    Fig. 3: Single line diagram and data

    of the SVC Eddy County

    Fig.

    4:

    Operating diagram of the SVC Eddy County

  • 8/9/2019 Design Consideration for the Eddy County Static Var Compensator

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    759

    The TCR reactors consists of two coils per phase in-

    stalled in a double stack arrangement. Reactors for the

    TSC are installed

    side by side. The filter arrangement

    consists of two double tuned filters (DF). The first is tuned

    to the 3rd and 5th harmonics and the second is tuned to

    the 7th and ll.5th harmonics. The second DF includes a

    resistance to achieve a high pass characteristic for the

    higher harmonics.

    Filter branches are tuned very accurately to keep the

    harmonic distortion to a minimum and within specified

    limits. Filter reactors have been designed with taps to

    enable the inductance to be adjusted. This allows initial

    mistuning due to reactor and capacitor manufacturing

    tolerances to be compensated. Filter reactors are installed

    in a triple stack arrangement. Hence, it is very important to

    consider the influence of mutual coupling between coils to

    achieve proper tuning. More information about the filter

    design procedure is given in the Filter Design section.

    Operatinq losses

    formula.

    The SVC losses are evaluated according

    to

    the following

    LOSS-Cost

    =

    $Cl

    x

    A + $C2 x B + $C3 x C

    A, B, C

    $C l, $C2, C3

    operating ranges

    /

    points

    cost figures for A, B, C

    $C1 = $1800

    $C2

    =

    $56

    $C3 = $56

    A Average power loss in kW for SVC output on 230 kV

    bus from max. inductive range to

    0

    MVAr

    B Maximum power loss in kW for SVC output on 230 kV

    from 0 MVAr to the net filter range

    C Average power

    loss

    in kW for SVC output on 230 kV

    from the net filter range to 100 MVAr.

    Figure 5 shows the operating losses of the SVC as a

    function of its reactive power output. The average losses of

    the overall operating range based on the nominal ca-

    pacitive power are 0.45%. The cost of losses evaluated

    according the given formula amounts to

    $

    0.5 Mio. A loss

    versus reactive power characteristic is shown in Figure 5

    as dorred line. Comparable average losses would amount

    to 0.43

    Y

    which is only slightly lower.

    But converted to loss cost according the given formula

    an amount of $ 1.1 Mio would arise. The difference of $

    0.6 Mio justifies the higher installation cost using a TSC

    branch.

    Losses

    1 F 100 Ind.

    00 80 60 40 20 20

    40

    60

    Reactive

    Power

    [MVAr]

    Fig. 5: Operating losses

    of

    the SVC Eddy County

    Physical Layout

    Figure 6 shows the physical layout of the SVC system.

    The branches (TCR, TSC and filters) are connected

    to

    the

    secondary bus by removable links. This arrangement

    allows failed branches to be disconnected

    so

    that SVC

    operation can be resumed in a degraded operating mode.

    Removable links used for branch connections allow a

    lower cost design than disconnect switches. In addition to

    lower hardware costs, removable links require less space

    in the station than switches. Total area for the SVC equip-

    ment is only 50

    m

    by 44.5 m.

    Filters

    k

    Fig. 6: Layout of the SVC Eddy County

    The SVC control building contains the open loop control

    (PLC), closed loop control (regulation)[4,5], protection

    system consisting of main and back-up protection, thyristor

    valves with Valve Base Electronic (VBE), cooling system

    for the thyriztor v&es and AC

    /

    DC distribution which

    includes a battery unit. In addition the building contains

    switchgear control cubicles and a transient fault recorder

    from the

    SPS

    Company. The control room is airconditioned

    and the thyristor valve rooms are ventilated to keep the

    temperature within the allowed limits.

    The thyristor valve cooling system is a single circuit

    cooling system with outdoor water

    /

    air recooler fan banks.

    To avoid freezing

    of

    the water during extreme cold weather

    conditions a water

    /

    glycol mixture is used. The glycol con-

    tent is approx. 30 . This will prevent the cooling system

    from freezing at temperatures down to 5 degree F when

    the SVC is not in operation. The cooling system includes

    redundant pumps

    (100

    o redundancy). Two water / air

    heat exchangers provide 100

    oo

    redundancy for

    temperatures up to 92 degree F.

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    760

    DesiQncalculations for the thyristor valves

    49.7 V.

    25 kV

    valve voltage

    - 25 kV1

    10 kA

    29.0 V'

    -

    22.5

    kA

    15.8 kV

    0 kV

    10

    kAr

    T 7

    Nominal secondary voltage for the SVC was chosen as

    8.5 kV to make optimum use of the thyristor capabilities.

    Three phase thyristor valves consist of three thyristor

    modules stacked one above the other. Figure 7 shows a

    three phase TSC valve. The Eddy County TSC valve con-

    tains

    14

    hyristor levels and the TCR valve contains

    7

    thy-

    ristor levels. The thyristors each have a current carrying

    capacity of

    4200

    Arms and a peak blocking voltage of

    5.6

    kV. In the Eddy County design, rated TSC current is 3200

    Arms

    and rated TCR current is

    3300

    Arms. These design

    ratings are below the

    4200

    Arms capability of the thyristors

    and allow for additional stress due

    to

    short time overloads

    and thyristor misfiring [l] In all cases, the junction

    temperature remains well below 120 degrees C.

    Thyristor modules applied in the Eddy County SVC

    design have been extensively type tested for other

    applications

    [2].

    est values are based on a draft paper of

    the ClGRE working group

    14.01

    TF

    02.

    hat proposes tests

    which are more applicable

    to

    real SVC valve stresses than

    those which have been proposed by IEC

    146.

    F r u n t

    v i e S i d e V i e w

    , W a t e r t u b e s

    n u b b e r c a p a c i t

    W a t e r o o l e d

    snubber

    r e s i s t

    Thyristor electronics

    Fig.

    7:

    Drawing of a three phase TSC valve

    Valve stresses in the Eddy County SVC have been cal-

    culated with the NETOMAC

    [3]

    digital electromagnetics

    program. Worst current, recovery voltage, and di

    /

    dt

    stresses for the TSC valves occur during a misfiring event.

    Misfiring calculations were based on the worst case

    sequence of events as follows:

    - The SVC is in full capacitive operation. This leads

    to

    the

    maximum voltage on the secondary side of the SVC

    transformer.

    During this operation the TSC valves are blocked and

    then the valve in the TSC leg with the highest capacitor

    voltage is misfired.

    -

    The instant of misfiring is chosen at the time of

    maximum blocking voltage across the TSC valve. This

    results in maximum current magnitude and highest di

    /

    dt stresses.

    Figure

    8

    shows the voltages and currents in the TSC

    branch for this misfiring. The magnitude of the current

    pulse was below 23 kA. Recovery voltage across the

    blocked valve remained below

    50

    kV. This is well below

    the blocking voltage of the

    14

    hyristor level TSC valve.

    -

    24.4 V

    20kVL

    I

    10 kA

    capacitor voltage

    i30.1 kV

    capacitor current, 22.5

    kA

    Fig. 8: Voltage and current stresses of a TSC branch

    due to a valve misfiring

    40 k V

    4 k q -valve current AB

    n

    n

    rq

    w v

    valve voltage

    AB

    9.35kA

    valve voltage

    CA

    Fig. 9: Voltage and current stresses of a TCR branch

    due to a three phase system fault

    The worst stresses for a TCR valve occurs during a three

    phase fault on the high voltage bus. Voltage and current

    stresses for this case are shown in Figure 9. Note that

    these traces show valve current when the valve is

    conducting and voltage when the valve is blocked. The

    sequence of events for Figure

    9

    were as follows:

    - Full inductive operation at 1.5per unit voltage

    - Fault initiation at the time when one TCR current is at a

    peak

    -

    Fault clearing between

    4

    and 5 cycles after initiation

    - TCR valve blocking at the first current zero after fault

    clearing.

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    761

    that components are rated properly and not overstressed

    in the extreme conditions.

    The network impedance as a function of frequency must

    be known for proper filter performance design. The

    impedance versus frequency characteristics

    of

    the Eddy

    County bus were computed for many system conditions.

    The following parameters were varied during the system

    impedance evaluation study:

    -

    range of generation

    -

    range of load

    - various steps of HVDC compensation

    - system configuration (lines out).

    Figure 12  shows the system impedance boundary that

    was determined from the impedance versus frequency

    calculations. For all frequencies and system conditions, the

    network impedance is somewhere within the shaded area.

    Data given on the figure quantitatively defines the network

    impedance region.

    equiv

    -

    The TCR currents decay on the long time constant of the

    TCR branches. Clearing of the fault at the most

    unfavorable time adds an additional peak to the thyristor

    currents in phases AB and CA. The TCR current in one

    phase (CA in Figure 9) may be prolonged because of

    delayed zero crossings. Junction temperature must remain

    below 120 degrees C in this extreme case for the thyristors

    to remain undamaged. Oscillation in the TCR current

    during the decay period is due

    to

    the natural frequency of

    the filters and the SVC transformer leakage inductance.

    Figures 10 and 11 are examples from the thyristor type

    tests which were performed at the CESl laborities in

    Milano, Italy [2]. Figure 10 shows the resutts of a fault test

    which is equivalent to a thyristor misfiring. Figure 11 shows

    the result of a DC trapped current decay test. These tests

    are more sever than the stresses computed for the Eddy

    County thyristors in the TSC and TCR branches.

    Calculation of the thyristor junction temperature verified

    that it remains below 120 degrees C at the end of current

    flow when the valve is required

    to

    withstand the recovery

    voltaae. Hence, it is concluded that the thyristor valves in

    Iv TCR

    -

    (Fault current test)

    Fig.

    11

    Test results of the TCR valve type test

    (DC trapped current)

    Filter desiqn

    Filter design is one of the most important steps in the

    SVC design process. The first step in proper filter design

    must ensure that the specified distortion limits are not

    exceeded. The second step in filter design is

    to

    ensure

    Fig. 12: Network impedance equivalent area

    The equivalent circuit for all harmonic calculations is

    shown in Figure 13. The TCR is represented as the

    harmonic current source. In parallel the SVC filter and TSC

    branches are connected. The TSC branch may be

    switched off according

    to

    the SVC operation conditions.The

    LV bus is connected via the transformer impedance

    to

    the

    230

    kV

    system. At the 230 kV bus the HVDC filters and the

    equivalent network impedance are represented. The HVDC

    filter branches can be regarded according to the HVDC

    operation.

    Fig. 13: Equivalent circuit for harmonic calculations

    At a first step without knowledge about the system

    impedance only a filter tuned

    to

    fifth harmonic was

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    762

    assumed. Afterwards a two double tuned filter arrangement

    had

    to

    be selected, but the total fundamental power for the

    filter branch was not changed.

    The worst resonance condition between the network

    impedance boundary and the harmonic filters was

    assumed for the calculation of the individual harmonic

    voltage distortion. Harmonic voltage distortion was also

    computed with the network circuit open. The total harmonic

    distortion (THD) was computed with the two highest

    individual harmonic distortion values from the worst case

    network resonance conditions and the remaining harmonic

    distortions determined with the network open circuited.

    This yields to the worst possible THD results.

    Harn

    nonic performance is based on:

    Nominal system voltage

    Maximum initial mistuning due

    to

    tolerances

    Detuning according temperature range

    Assuming ma . magnitudes of TCR harmonic current

    independant on firing angle

    Negative sequence voltage content which gives rise

    to generation of triple harmonics outside the delta

    Firing angle unsymmetry which results in generation

    of even harmonics

    Loss of capacitor units of up to alarm level

    Operating ranges of the TCR

    Rating calculations for the filter components are done

    seperately from the performance calculations. They are

    based on similar conditions as above with the addition that

    the following conditions are imposed:

    - Maximum system voltage of 1.1 pu

    - Increase of harmonic currents by 10°/~

    - Extended detuning effect due to loss of capacitor

    units up to trip level.

    I -

    Ambient harmonics

    In principal the same equivalent circuit was used. The

    limitation of the impedance area by the straight lines was

    increased to 80”. The maximum impedance was set to

    infinity. This leads to higher amplification factors and

    results in higher safety margins for the components. The

    influence

    of

    ambient harmonics on filter component rating

    is considered assuming the infeed of harmonics from the

    HVDC station at the 230 kV busbar.

    kV

    Fig. 14: Voltage and current stresses of the components

    in the parallel circuit of DF 3

    / 5

    Rating values of the components have also been

    checked for transient conditions of:

    - SVC energization

    - Three phase system fault and voltage recovery.

    -

    Saturation by neighbor transformers

    Figure 14 shows worst case stresses of the 3

    5

    DF

    components during the condition of a three phase fault and

    volta e recovery. Harmonic currents generated by the

    HVD8 and SVC transformer results in extreme high

    stresses for the filters. The voltage and current stresses of

    the parallel circuit of the DF in this case determine the

    actual rating values for these components.

    CONCLUSION

    A Static Var Compensator meeting the, -50 MVAr to

    +

    100 MVAr compensation range required by the

    Southwestern Public Service Company has been designed

    and installed at the Eddy County substation near Artesia,

    New Mexico. Basic requirements on voltage and reactive

    power were determined for Eddy County by computer

    studies and project ions of future SPS needs. Costumer

    load, fuel expense, voltage regulation, generation, energ

    losses, and system reliability were considered in the SV

    design specification.

    A basic configuration consisting of a TSC branch, a TCR

    branch and two double tuned filter branches has been

    designed to meet the system requirements. An econo-

    mical and efficient design has been achieved by applying

    thyristors with surge arrester protection, where necessary,

    that have been previously type tested for conditions more

    severe than those that can exist in the Eddy County SVC.

    Loss curves and evaluation has indicated favourable SVC

    efficiency. Filter branches in the SVC were designed to

    meet the SPS performance specifications and component

    ratings were selected to exceed stresses imposed by the

    system. Close working cooperation between Southwestern

    Public Service Company and the SVC supplier during all

    stages of the project (studies, design, installation and

    commissioning) made it possible to meet all SVC

    requirements and

    to

    put the SVC into commercial

    operation within the scheduled time frame.

    REFERENCES

    G.Thumm, H.Tyll, ”A Closer Look at Thyristors in

    SVC applications”, Siemens Energy and Automation,

    Vol. 1 pp. 12-17, 1989

    B. Endres, G . Thiele,

    I.

    Bonfanti, G. Testi, ”Design

    and Operational Testing on Thyristor Modules for the

    SVC Kemps Creek”, IEEE Transaction on Power

    Delivery, Vol.

    5,

    No

    3,

    July 1990, pp. 1321-1328

    W.Baver. K. H. Kruaer. D. Povh. B. Kulicke. ”Studies

    for HVDC and SVC ‘Using the NETOMAC Digital

    Program System”, IEEE CSEE Joint conference on

    High Voltane Transmission Systems in China, 1987,

    Paper 873C-32

    H. Tyll, K. Leowald, F. Labrenz, D. Mader, ”Special

    Features of the Control Svstem of the Brushv Hill

    SVC”

    ,

    Canadian Electrical Association, Power Sistem

    Planning and Operation Section, Spring meeting,

    Toronto 1989

    K. Bergmann, B. Friedrich, K. Stump, W. Elliot,

    Digital Simulation, Transient Network Analyzer and

    Field Tests of the Closed Loop Control of the Eddy

    County SVC”, IEEE 93

    -

    WM

    056 -

    2 PWRD

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    BIOGRAFIES

    763

    Frank E. Truiillo was born in Deming,

    New Mexico, on July 17, 1954. He

    William H. ( Bill ) Elliott was born in Bird

    City, KS on June

    1,

    1942. He received a

    bachelor of sience degree in electrical

    engineering from Kansas State

    University, Manhattan, Kansas in 1965.

    He joined Southwestern Public Service,

    Amarillo, TX in 1965. Mr. Elliott’s

    activities have been in the field of

    system and transmission operation,

    system engineering and planning.

    ~

    Currently he is working as Principal

    Engineer in Electrical Operation’s. Mr. Elliott is member of

    the Institute of Electrical

    &

    Electronic Engineers (IEEE), the

    Texas Society of Professional Engineers ( TSPE ) and the

    National Society of Professional Engineers NSPE

    ).

    Klaus Habur was born in Furth, Bavaria,

    Federal Republic

    of

    Germany on April 8,

    1952. He received his education at the

    Ohm-PolytechnikumiNurnbergand at the

    DAG-TechnikumMlurzburg. He joined

    Siemens AG 1980 as a design engineer

    for electrochemical plants. Previous to

    this work, he was with a consulting

    engineers company. In 1985 he joined

    the Reactive Power Compensation Sales

    Department and worked as a project

    engineer and project manager for various SVC projects.

    Gabriele Huesmann was born in

    Munster, Westfalia, Federal Republic of

    Germany on March 18, 1963. She joined

    Siemens in 1982 and received an

    education as engineers assistant. After

    two years work in the Transportation

    Systems department, she joined the

    network planning department. Since

    1986 she is active in the field of

    programming, SVC design and harmonic

    system analysis.

    Keith B. Stump was born in Richmond,

    Indiana, on February 12, 1941. He

    received a bachelor of Science de ree

    in electrical engineering from 8hio

    University in 1963, and a Master of

    Science degree in electrical engineering

    from Purdue University in 1965. He was

    employed by Allis-Chalmers Corp. in

    Milwaukee, WI, from 1965 through 1977.

    He then transferred to Siemens-Allis,

    Inc. in 1978 which became Siemens

    Energy &Automation, Inc., Atlanta,

    GA.

    Mr. Stump is

    currently working in the Power Systems Technology

    department in the area of system simulation and analysis.

    Mr. Stump is a member of the IEEE Power Engineering

    Society and vice chairman of the IEEE Surge Protective

    Devices Committee.

    received a Bachelor of Science Degree

    in Electrical Engineering from New

    Mexico State University, Las Cruses,

    New Mexico in 1976. He joined

    Southwestern Public Service, Amarillo,

    TX in 1977. Mr Trujillo’s activities have

    been in the field of system engineering.

    Currently he is working as Senior Design

    Engineer in the System Engineering

    group for SPS. Mr. Trujillo is a Senior member

    of

    IEEE.

    Heinz

    K.

    Tyll was born in Hof, Bavaria,

    Federal Republic of Germany on May

    15, 1947. In 1968 he graduated in

    Electrical Engineering from Coburg

    Polytechnikum. In 1974 he received the

    diplom degree from the Technical

    University of West-Berlin. After joining

    Siemens AG, he worked in their High

    Voltage Transmission Engineering

    Department since 1975 in the field of

    SVC system analysis with transient net-

    work analyzer and di ita1 programs. Since 1988 with the

    System Engineering &oup of the HVDC and SVC Sales

    Department he is responsible for SVC design and

    transmission system analysis. He is member of IEEE,

    ClGRE WG 38 TF 04 and 05 and also IEC WG 22F TF

    05.