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Design Issues of Flash-based SSD&

Hybrid Disks

Han-Lin Li

Dept. Computer Science and Information Engineering

National Taiwan University

Advisor: Prof. Chia-Lin Yang

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Outline Background

NAND vs. NOR Organization and characteristics of NAND flash memory Trend of NAND flash memory technology

Design Issues of Flash-Based SSD FTL design Efficient garbage collection Wear-leveling techniques Multi-Chip (bank) flash memory Flash memory as a swap device of virtual memory

Design Issues of Hybrid Disk Our current work

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Multi-Chip(bank) Flash Memory Use stripping and interleaving techniques to improve

performance (RTAS’02)

Bank 1

Bank 2

Sub-request

Sub-request

Bank 1

Bank 2

Request 1

Request 1Request 2

Stripping example

Interleaving example

Flash memory as a Swap Device of Virtual Memory Replacement policy design (CASES’06,

CODES+ISSS’06) Subpaging (ISLPED’06) HotCache (ISLPED’06) Duplication-Aware Garbage Collection (TVLSI’08)

Clean-First LRU The cost of swapping out a dirty page is much higher

than swapping out a clean page Splits the LRU list into

Working region Clean-first region

Selects a clean page to evict in the clean-first region first to save flash write cost

OneNAND XIP To reduce # of page faults

On page fault Only load frequently used code page to main memory Infrequently used code page use eXecution In Place (XIP)

How to identify frequently used code page? If # of occurrences of the missed page in the page history window

> a predefined threshold Frequency used code page

Subpaging Divide a virtual memory page into a set of subpages in the

granularity of flash page size Each subpage is associated with a dirty bit.

Memory Page

Clean Data

Dirty Data

Clean Data

Clean Data

One Write to Flash

Flash Page Size

0

1

0

0Dirty Bit

Flash Memory

HotCache

Flash MemoryFlash Memory

Physicaldevice

FTL layer

Command translationMTD layer

(f, 0, 0, 3)1 (f, 0, 1, 2)2 (s, -, 2, -)

LBA Physical address(f/s, bank, block, page)

……

address translation table

0

HotCacheManagement

GarbageCollection

HotCache Caching writes only Preserving intra-page

locality Capturing hot data

DDDDDDDD

CCCCCCCC

BBBBBBBB

Flash pages in one main memory page are written to flash memory back to back

A0 A1 A2 A3

A4 A5 A6 A7

B0 B1 B2 B3

B4 B5 B6 B7

C0 C1 C2 C3

C4 C5 C6 C7

D0 D1 D2 D3

D4 D5 D6 D7

Block X Block YA0

A1

A2

A3

A4

A5

A6

A7

Virtual page

Main memory

A0, A1, A2, A3, A4, A5, A6, A7

Swap_out(A)

What is Intra-page Locality?

After page A, B are swapped out

A A A AA A A A

A A A A

A A A A

B B B BB B B B

B B B B

B B B B

C C C CC C C C

C C C CC C C C

C C C CC C C C

C C C CC C C C

D D D DD D D D

D D D DD D D D

D D D DD D D D

D D D DD D D D

Block X Block Y Block X Block Y

Block X Block Y Block X Block Y

It affects the efficiency of garbage collection

Why is Preserving Intra-Page Locality Important?

DDDD

1DDDD

1

Exploit data redundancy between the main memory and flash memory to eliminate unnecessary live page copying during garbage collection

An invalided pageAn invalided page A free pageA free page

Duplication-Aware Garbage

Collection

0 BBBB

AAAA

Main Memory

0

Dirty Bit

Flash Memory Flash Memory

A A A AB B B BC C C C

C C C C

DDDD

1DDDD

11 B

BBB

AAAA

Main Memory

1

Dirty Bit

Duplication-Aware Garbage Collection

Design Issues of Hybrid Disk Using NAND flash as disk cache

Issues Saving power Improving performance Improving endurance

Saving Disk Power by Flash Cache Disk is a big energy consumer in mobile systems

Can we reduce disk power? If the disk is idle, we can change it to power saving mode But the disk idle time may be less than the break even time Could we extend the disk idle time?

Caching could reduce disk access Prefetching can move disk access time forward Write buffering can move disk access time backward

The energy consumption parameters for the Hitachi-DK23DA hard disk.

Disk access address

time

Caching

Prefetching

Write buffering

Disk idle time

Our Current Works Improve endurance through bit inversion Improve performance through parallel garbage

collection in a multi-bank flash system

Our Current Works Improve endurance through bit inversion Improve performance through parallel garbage

collection in a multi-bank flash system

Improving Endurance Probability to damage a flash cell should be

proportional to # of charge loss/gain in floating gates Only writing 0 or erasing a cell containing 0 will

charge/discharge a floating gate We may reduce # of “0” writes to improve flash life time

Storedelectrons

Erased = “1” Programmed = “0”

Control Gate

Floating Gate

SubstrateDrain Source

Tunnel Oxide

Bit Inversion If more than ½ bits in an inversion unit = 0

Invert all bits in the inversion unit Set flag = 1

Advantage Reduce # of 0 writes

Disadvantage Additional bit write & space requirement

Additional write is negligible (<0.1%) Put flag in spare area

1 0 0 0 0 1 0 1 0 0 1 1 1 0 1 1

0 1 1 1 1 0 1 0 0 0 1 1 1 0 1 11 0Inverted data

Flag

Original data

Inversion Unit 5*“0” 3*”1” 3*“0” 5*”1”

Bit Inversion When data are written to flash

Data will be stored in SRAM temporarily “0” counter count # of “0” in each inversion unit

Data will be written to flash latter after “write allocate” If # of “0” in an inversion unit > threshold,

Invert all bits in the inversion unit Set flag of the inversion unit = 1

When data are read from flash Read data from flash to SRAM

If the flag of an inversion unit = 1 Invert all bits in the inversion unit

Flash Memory Controller

Flash InterfaceInversion Logic

CPU CoreHost Interface

“0” Counter

SRAM

System Bus

Flash Memory Chips

Flash Memory Bus

Host Interface

# of 0 in different unit size in files

0

500

1000

1500

2000

2500

3000

3500

4000

4500

1 243 485 727 969 12111453169519372179242126632905314733893631 38734115435745994841508353255567

0

500

1000

1500

2000

2500

3000

3500

4000

4500

1 45 89 133 177 221 265 309 353 397 441 485 529 573 617 661 705 749 793 837 881 925 969 1013 105711011145

0

2000

4000

6000

8000

10000

12000

14000

16000

1 62 123 184 245 306 367 428 489 550 611 672 733 794 855 916 977 1038109911601221128213431404

0

2000

4000

6000

8000

10000

12000

14000

16000

1 10 19 28 37 46 55 64 73 82 91 100 109 118 127 136 145 154 163 172 181 190 199 208 217 226 235 244 253 262 271 280 289

Test case 1 : a MS word file Test case 2 : a JPEG file

2KB

512B

•Smaller inversion unit size => larger opportunity to reduce # of “0” writes

Parallel Garbage Collection Parallel live page copying to improve performance

Copy live pages to different bank/chip

Write live data

Victim block

BufferBuffer

Read live data

Flash Chips

Flash blocksErase the block

Read live dataWrite live data

Erase the block

Flash Chips

Read live page1 Write live page1 Erase the blockChip 1

Read live page1 Erase the blockChip 1 Write live page1Chip 2

Reference Park, S., Jung, D., Kang, J., Kim, J., and Lee, J. 2006. CFLRU: a replacement

algorithm for flash memory. In Proceedings of the 2006 international Conference on Compilers, Architecture and Synthesis For Embedded Systems (Seoul, Korea, October 22 - 25, 2006). CASES '06. ACM, New York, NY, 234-241

Energy-Aware Flash Memory Management in Virtual Memory System,L.-H. Lin, C.-L. Yang, H.-W., Tseng, to appear in IEEE Transactions on Very Large Scale Integration (VLSI) Systems

An adaptive striping architecture for flash memory storage systems of embedded systems, L.-P. Chang and T.-W. Kuo, RTAS’ 02

Joo, Y., Choi, Y., Park, C., Chung, S. W., Chung, E., and Chang, N. 2006. Demand paging for OneNAND™ Flash eXecute-in-place. In Proceedings of the 4th international Conference on Hardware/Software Codesign and System Synthesis (Seoul, Korea, October 22 - 25, 2006). CODES+ISSS '06. ACM, New York, NY, 229-234.

An Energy-Efficient Virtual Memory System with Flash Memory as the Secondary Storage, H.-W. Tseng, H.-L. Li, and C.-L. Yang, in Proceedings of IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED '06), Tegernsee, Germany, October, 2006

Chen, F., Jiang, S., and Zhang, X. 2006. SmartSaver: turning flash drive into a disk energy saver for mobile computers. In Proceedings of the 2006 international Symposium on Low Power Electronics and Design (Tegernsee, Bavaria, Germany, October 04 - 06, 2006). ISLPED '06. ACM, New York, NY, 412-417.

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