design of laser transmitter test circuit

7/31/2019 Design of Laser Transmitter Test Circuit

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A Training report on

Design of Laser Transmitter Test Circuit using AT89C2051

microcontroller for pseudo Simmer operation

.

Chapter-2

OVERVIEW OF MICROCONTROLLER (AT89C51)

2.1 MICROPROCESSOR AND MICROCONTROLLER BASICS

The past two decades have seen the introduction of a technology that has radically

changed the way in which we analyze and control the world around us. Born of parallel

development in computer architecture and integrated circuit fabrication, the

microprocessor, or computer on a chip, first become a commercial reality in 1971 with

the introduction of 4-bit 4004 by a small, unknown company by the name of Intel

Corporation. Other better established, semiconductor firms soon follow Intels pioneering

technology so that by the late 1970s one could choose from a half dozen or so

microprocessor types.

The microprocessor[1] has been with us for some 15-years now growing from an

awkward 4-bit chip to a robust 32-bit adult. Soon 64 and 128-bit wizards will appear to

crunch numbers, spreadsheets, and CAD CAM. The engineering community became aware

of, enamored with, the 8-bit microprocessor of the middle to late 1970s.

The 1970s also saw the growth of the number of personal computer users from a

handful of hobbyists and hackers to millions of business, industrial, governmental,

defense, educational, and private users now enjoying the advantages of inexpensive

computing.


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New technology makes possible, however, a better type of small computer-one with

not only the CPU on the chip, but RAM, ROM, Timer, UARTS, Ports, and other common

peripheral I/O functions also. The microprocessor has become the microcontroller[4]. A by-

product of microprocessor development was the microcontroller. The same fabrication

techniques and programming concepts that make possible the general purpose

microprocessor also yielded the microcontroller.

Microcontrollers are not as well known to the general public, or even the technical

community, as are the more glamorous microprocessor. The public is, however, very well

aware that something is responsible for all of the smart VCRs, clock radios washers, and

dryers, video games, telephones, microwaves, TVs, automobiles, toys, Vending machines,

copiers, elevators, irons, and a myriad of other articles that have suddenly become

intelligent and programmable. Companies are also aware that being competitive in this

age of microchip requires their products, or the machinery they use to make those products,

to have some smarts.

Some manufacturers, hoping to capitalize on our software investment, have brought

our families of microcontrollers that are software compatible with the older

microprocessor. Other, wishing to optimize the instruction set and architecture to improve

speed and reduce code size, produce totally new designs that had little in common with

their earlier microprocessors. Both of these trend continue.

Microprocessor:

A Microprocessor[4], as the term has come to be known is a general purpose digital

computer central processing unit (CPU). Although popularly known as a computer on a

chip, the microprocessor is in no sense a complete digital computer.

Figure 1 shows a block diagram of a microprocessor CPU, which containsarithmetic and logic unit (ALU), a program counter (PC), a stack pointer (SP), some

working registers, a clock timing circuit and interrupt circuits. The microprocessor contains

no RAM, no ROM, and no I/O ports on the chip itself.


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The key term in describing the design of microprocessor is general purpose. The

hardware design of a microprocessor CPU is arrange so that a small or very large system

can be configured around the CPU as the application demands. The internal CPU

architecture, as well as the resultant machine level code that operates that architecture, is

comprehensive but as flexible as possible.

Although the addition of external RAM, ROM, and I/O ports make these systems

bulkier and much more expensive, they have the advantage of versatility such that the

designer can decide on the amount of RAM, ROM, and I/O ports needed to fit the task at

hand

Accumulator

Working Register(s)

Interrupt

Circuit

Clock

Circuit

Program Counter Stack Pointer

Arithmetic and

logic unit


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Figure 2.1: A Block Diagram of a Microprocessor

Microcontroller:

A microcontroller[5] has a CPU (a microprocessor) in addition to a fix amount of

RAM, ROM, I/O ports, and a timer all on a single chip. In other words, the processor,

RAM, ROM, I/O ports, and timer are all embedded together on one chip; therefore, the

designer cannot add any external memory, I/O, or timer to it.

Figure 2 shows the block diagram of a typical microcontroller which is a true

computer on a chip. The design incorporates all of the features found in a

microprocessor CPU: ALU, PC, SP, and registers. It also has added the others featuresneeded to make a complete computer: RAM, ROM, parallel I/O, serial I/O, counters,

and a clock circuit.

Internal ROM

AccumulatorI/O Ports

Interrupt

Circuits

Registers

Timer/CounterI/O Ports

Clock

Circuit

ALU

Program Counter

Stack Pointer

Internal RAM


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Figure 2.2: A block diagram of a Microcontroller

Like the microprocessor, a microcontroller is a general purpose device, but one

which is meant to fetch data, perform limited calculations on that data and control it

environment based on those calculations. The prime use of a microcontroller is to

control the operation of machine using a fixed program that is stored in ROM and that

does not change over the life time of the system.

2.2 CHARACTERISTICS FEATURES OF AT89C51

AT89C51 is an 8-bit microcontroller from Atmel Corporation.


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Features

Compatible with MCS-51 Products

4K Bytes of In-System Reprogrammable Flash Memory

Endurance: 1,000 Write/Erase Cycles

Fully Static Operation: 0 Hz to 24 MHz

Three-level Program Memory Lock

128 x 8-bit Internal RAM

32 Programmable I/O Lines

Two 16-bit Timer/Counters

Six Interrupt Sources

Programmable Serial Channel

Low-power Idle and Power-down Modes

2.3 BLOCK DIAGRAM OF AT89C51

The AT89C51[6] is a low-power, high-performance CMOS 8-bit microcomputer

with 4K bytes of Flash programmable and erasable read only memory (PEROM). The

device is manufactured using Atmels high-density nonvolatile memory technology and is

compatible with the industry-standard MCS-51 instruction set and pinout. The on-chip

Flash allows the program memory to be reprogrammed in-system or by a conventional

nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a

monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a

highly-flexible and cost-effective solution to many embedded control applications.

The AT89C51 provides the following standard features: 4K bytes of Flash, 128

bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt


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architecture, full duplex serial port, on-chip oscillator and clock circuitry. In addition, the

AT89C51 is designed with static logic for operation down to zero frequency and supports

two software selectable power saving modes. The Idle Mode stops the CPU while allowing

the RAM, timer/counters, serial port and interrupt system to continue functioning. The

Power-down Mode saves the RAM contents but freezes the oscillator disabling all other

chip functions until the next hardware reset.


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Figure 2.3: Block Diagram of AT89C51

2.4 PIN DESCRIPTION OF AT89C51:


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PDIP: Plastic Dual Inline Package.

GND

VCC

PO.O(AD 0)

PO.1(AD 1)

PO.3(AD 3)

PO.4(AD 4)

PO.5(AD 5)

PO.6(AD 6)

PO.7(AD 7)

PO.2(AD 2)

EA/VPP

P2.7(AD 15)

P2.6(AD 14)

P2.5(AD 13)

P2.4(AD 12)

ALE/PROG

PSEN

P2.3(AD 11)

P2.2(AD 10)

P2.1(AD 9)

P2.0(AD 8)

P1.0

P1.2

P1.3

P1.4

P1.5

P1.6

P1.7

P1.1

RST

XTAL2

XTAL1

(RXD) P3.O

(TXD) P3.O

(INT0) P3.2

(INT1) P3.3

(T0) P3.4

(T1) P3.5

(WR) P3.6

(RD) P3.7


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Figure 2.4: Pin diagram of AT89C51

Pin description:

In the AT89C51 there are a total of four ports for I/O operations. Examining

Figure 5, note that of the 40 pins, a total of 32 pins are set aside for the four ports

P0, P1, P2, and P3, where each port takes 8 pins. The rest of the pins are designated

as Vcc, GND, XTAL1, XTAL2, RST, EA, ALE/PEOG, and PSEN.

VCC:

Supply voltage.

GND:

Ground.

I/O port pins and there functions:

The four ports P0, P1, P2, and P3 each use 8 pins, making them 8 bit ports.

All the ports upon RESET are configured as inputs, ready to be used as input ports.

When the first 0 is written to a port, it becomes an output. To reconfigure it as an

input, a 1 must be sent to the port.

Port 0:

Port 0 is an 8-bit open drain bidirectional I/O port. As an output port each

pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be

used as high-impedance inputs. Port 0 may also be configured to be the multiplexed


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low order address/data bus during accesses to external program and data memory.

In this mode P0 has internal pullups. Port 0 also receives the code bytes during

Flash programming, and outputs the code bytes during program verification.

External pullups are required during program verification.

Port 1:

Port 1 is an 8-bit bidirectional I/O port with internal pullups. The Port 1 output

buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are

pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins

that are externally being pulled low will source current (IIL) because of the internal

pullups. Port 1 also receives the low-order address bytes during Flash programming

and program verification.

Port 2:

Port 2 is an 8-bit bi-directional I/O port with internal pullups. The Port 2 output

buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are

pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins

that are externally being pulled low will source current (IIL) because of the internal

pullups. Port 2 emits the high-order address byte during fetches from external

program memory and during accesses to external data memory that use 16-bit

addresses (MOVX @ DPTR). In this application, it uses strong internal pull-ups

when emitting 1s. During accesses to external data memory that use 8-bit addresses

(MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port

2 also receives the high-order address bits and some control signals during Flash

programming and verification.


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Port 3:

Port 3 is an 8-bit bi-directional I/O port with internal pullups. The Port 3

output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins

they are pulled high by the internal pullups and can be used as inputs. As inputs,

Port 3 pins that are externally being pulled low will source current (IIL) because of

the pullups. Port 3 also serves the functions of various special features of the

AT89C51 as listed below:

Table 2.1

Port 3 also receives some control signals for Flash programming and verification.

RST:

Reset input. A high on this pin for two machine cycles while the oscillator

is running resets the device.


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ALE/PROG:

Address Latch Enable output pulse for latching the low byte of the address

during accesses to external memory. This pin is also the program pulse input

(PROG) during Flash programming.

In normal operation ALE is emitted at a constant rate of 1/6 the oscillator

frequency, and may be used for external timing or clocking purposes. Note,

however, that one ALE pulse is skipped during each access to external Data

Memory.

If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH.

With the bit set, ALE is active only during a MOVX or MOVC instruction.

Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect

if the microcontroller is in external execution mode.

PSEN:

Program Store Enable is the read strobe to external program memory.

When the AT89C51 is executing code from external program memory, PSEN is

activated twice each machine cycle, except that two PSEN activations are skipped

during each access to external data memory.

EA/VPP:

External Access Enable. EA must be strapped to GND in order to enable the

device to fetch code from external program memory locations starting at 0000H up

to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally

latched on reset. EA should be strapped to VCC for internal program executions.

This pin also receives the 12-volt programming enable voltage (VPP) during Flash

programming, for parts that require 12-volt VPP.


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XTAL1:

Input to the inverting oscillator amplifier and input to the internal clock

operating circuit.

XTAL2:

Output from the inverting oscillator amplifier.

Oscillator Characteristics:

XTAL1 and XTAL2 are the input and output, respectively, of an inverting

amplifier which can be configured for use as an on-chip oscillator, as shown in

Figure 6. Either a quartz crystal or ceramic resonator may be used. To drive the

device from an external clock source, XTAL2 should be left unconnected while

XTAL1 is driven as shown in Figure 7.

There are no requirements on the duty cycle of the external clock signal,

since the input to the internal clocking circuitry is through a divide-by-two flip flop,

but minimum and maximum voltage high and low time specifications must be

observed.


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Figure 2.5: Oscillator Connections Figure 2.6: External Clock Drive Configurations

Idle Mode:

In idle mode, the CPU puts itself to sleep while all the on-chip peripherals

remain active. The mode is invoked by software. The content of the on-chip RAM

and all the special functions registers remain unchanged during this mode.

The idle mode can be terminated by any enabled interrupt or by a hardware

reset. It should be noted that when idle is terminated by a hard ware reset, the

device normally resumes program execution, from where it left off, up to two

machine cycles before the internal reset algorithm takes control.

On-chip hardware inhibits access to internal RAM in this event, but access

to the port pins is not inhibited. To eliminate the possibility of an unexpected write

to a port pin when Idle is terminated by reset, the instruction following the one that

invokes Idle should not be one that writes to a port pin or to external memory.

Power-down Mode:

In the power-down mode, the oscillator is stopped, and the instruction that

invokes power-down is the last instruction executed. The on-chip RAM and Special

Function Registers retain their values until the power-down mode is terminated.

The only exit from power-down is a hardware reset. Reset redefines the SFRs but

does not change the on-chip RAM. The reset should not be activated before VCC is

restored to its normal operating level and must be held active long enough to allow

the oscillator to restart and stabilize.

Status of External Pins during Idle and Power-down Modes:


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Table 2.2

Other Pin Configurations:

PQFP/TQFP:

PQFP: Plastic Gull Wing Quad Flatpack.

TQFP: Thin Plastic Gull Wing Quad Flatpack.

2.5 8051 ADDRESSING MODES:

An addressing mode refers to how you are addressing a given memory

location. The addressing modes are as follows.

With an example of each:

Immediate Addressing MOV A, #20h

Direct Addressing MOV A, 30h

Indirect Addressing MOV A,@R0

External Direct MOV A,@DPTR

Code Indirect MOV A,@+DPTR


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Immediate Addressing:

Immediate addressing is so-named because the value to be stored in memory

immediately follows the operation code in memory. That is to say , the instruction

itself dictates what value will be stored in memory.

For example the instruction:

MOV A, #20h

This instruction uses immediate addressing because the Accumulator will be

loaded with the value that immediately follows, in this case 20 (hexadecimal).

Direct Addressing:

Direct addressing is so-named because the value to be stored in memory is

obtained by directly retrieving it from another memory location. For example:

MOV A, 30h

This instruction will read the date out of Internal RAM address30

(hexadecimal) and store it in the Accumulator. Direct addressing is generally fast

since, although the value to be loaded isnt included in the instruction, it is quickly

accessible since it is stored in the 8051s Internal RAM. It is also much more

flexible than Immediate Addressing since the value to be loaded is whatever is

found at the given address-which may be variable.

The obvious question that may arise is, If direct addressing an address

from 80h through FFh refers to SFRs, how can I access the upper 128 bytes of

Internal RAM that are available on the 8052? The answer is:

You cant access them using direct addressing. As stated, if you directly refer to an

address of 80h through FFh you will be referring to an SFR. However, you may

access the 8052s upper 128 bytes of RAM by using the next addressing mode,

indirect addressing.


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Indirect Addressing:

Indirect addressing is a very powerful addressing mode which in many

cases provides an exceptional level of flexibility. Indirect addressing is also the

only way to access the extra 128 bytes of Internal RAM found on an 8052. Indirect

addressing appears as follows:

MOV A,@R0

This instructing causes the 8051 to analyze the value of the R0 register. The

8051 will then load the accumulator with the value from Internal RAM which is

found at address indicated by R0. For example, lets say R0 holds the value 40h and

Internal RAM address 40h holds the value 67h. When the above instruction is

executed the 8051 will check the value of R0. Since R0 holds 40h the 8051 will get

the value out of Internal RAM address 40h (which holds 67h) and store it in the

Accumulator. Thus, the Accumulator ends up holding 67h. Indirect never refers to

Internal RAM; it never refers to an SFR. Thus, in a prior example we mentioned

that SFr 99h can be used to write a value to the serial port. Thus one may think that

the following would be a valid solution to write the value1 to the serial port:

MOV R0,#99h ; Load the address of the serial port

MOV @R0,#01h; Send 01 to the serial portWRONG!!

This is not valid. Since indirect addressing always refers to Internal RAM

these two instructions would write the value 01h to Internal RAM address 99h on

an 8052. On an 8051 these two instructions would produce an undefined result

since the 8051 only has 128 btes of Internal RAM.

External Direct:


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It is used to access external memory rather than internal memory. There are

only two commands that use External Direct addressing mode:

MOVXA,@DPTR

MOVX@DPTR,A

As you can see, both commands utilize DPTR. In these instructions, DPTR

must first be loaded with the address of external memory that you wish to read or

write. Once DPTR holds the correct external memory address, the first command

will move the contents of the external memory address into the Accumulator. The

second command will do the opposite: it will allow you to write the value of the

Accumulator to the external memory address pointed to by DPTR.

External Indirect:

This form of addressing is usually only used in relatively small projects that

have a very small amount of external RAM. An example of this addressing mode

is:

MOVX@R0,A

Once again, the value of R0 is first read and the value of the Accumulator is

written to that address in External RAM. Since the value of @R0 can only be 00h

through FFh the project would effectively be limited to 256 bytes of External RAM.

FLOWCHART FOR THE LASER TRANSMITTER TEST PROGRAM


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Check

Switch

presse

d

Start

Yes

HVC On

Delay 200 mSec

HVC Off

Initialize Flash Trigger Pulse

Delay 160 uSec

Initialize Flash Fire Pulse

Delay 280 mSec

Again Check

Switch

pressed

YesNo

End

CH1 : HV Converter ON Pulse

CH2 : Flash Lamp Trigger

pulse

CH4 : Flash Lamp Fire

Pulse


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Pseudo Simmer Operation

C3 C4

FLASH-LAMP

FIRE PULSE

T3

470

1K

FLASH-LAMP

TRIGGER

PULSE

T2

470

1 K

HVC ON/OFF

PULSE

T1

1.2 K

10 uF

.01uF

10K

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

+ 5 V + 5 V

AT89C2051

+ 5 V

+ 5 V

+ 5 V

470

Figure : Laser Transmitter Test Circuit


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In Pseudo simmer operation no additional power supply is required.

Simmer glow in Flash lamp is maintained for only 50 microseconds through a

resistance connected to energy storage condenser as shown in figure. Flash

lamp is triggered by shunt trigger circuit , to produce simmer by current

supplied form energy storage condenser through resistance R. The value of

this resistance R is such that about 30 mA current flows through lamp for about50 microsecond when a high current SCR -2 connected across resistor is fired,

allowing the energy storage condenser to be discharge through the lamp.

Operation efficiency with this operation remains same as with simmer

operation. The circuit is noisy as for each operation lamp is triggered.

Suppression of shunt trigger noise is required in case of Electro-optic Q

switching.

C3 C4

FLASH-LAMP

FIRE PULSE

T3 (2N2222)

470

1K

FLASH-LAMP

TRIGGER PULSE

T2 (2N2222)

470

1 K

HVC ON/OFF

PULSE

T1 (2N2222)

1.2 K

10 uF

.01uF

10K

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

+ 5 V + 5 V

AT89C2051

+ 5 V

+ 5 V

+ 5 V

HVC

50

uSe

c

SCR1

SCR2

Tr50

KFlas

h

Lam

p

.1 uF

.1 uF

.5 uF HV

Supply

470

Pseudo-Simmer Operation of Flash Lamp


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Flash Lamp :- A flashtube, also called a flashlamp, is an electric glow

discharge lamp designed to produce extremely intense, incoherent, full-

spectrum white light for very short durations. Flashtubes are made of a length

of glass tubing with electrodes at either end and are filled with a gas that,

when triggered, ionizes and conducts a high voltage pulse to produce the light.

Flashtubes are used mostly for photographic purposes but are also employed

in scientific, medical and industrial applications & Laser applications.

The electrodes of the lamp are usually connected to a capacitor, which is

charged to a relatively high voltage (generally between 250 and 5000 volts),

using a step up transformer and a rectifier. The Xenon gas, however, exhibits

extremely high resistance, and the lamp will not conduct electricity until the

gas is ionized. Once ionized, or "triggered", a spark will form between the

electrodes, allowing the capacitor to discharge. The sudden surge ofelectric

current quickly heats the gas to a plasma state, where electrical resistance

becomes very low.

HV Converter ON Pulse

Energy Storage Capacitor

Charging Wave shape

Flash Lamp Trigger Pulse

Flash Lamp Trigger: SCR

Switching Pulse

Flash Lamp Fire Pulse

Capacitor Discharge Pulse

+840V

+200V

+840V

TTL

90 ms

160

s

200 ms

Timing sequence of Laser Transmitter Test

Circuit
http://en.wikipedia.org/wiki/Electric_glow_dischargehttp://en.wikipedia.org/wiki/Electric_glow_dischargehttp://en.wikipedia.org/wiki/Coherence_(physics)http://en.wikipedia.org/wiki/Capacitorhttp://en.wikipedia.org/wiki/High_voltagehttp://en.wikipedia.org/wiki/Step_up_transformerhttp://en.wikipedia.org/wiki/Rectifierhttp://en.wikipedia.org/wiki/Electrical_resistancehttp://en.wikipedia.org/wiki/Ionizedhttp://en.wikipedia.org/wiki/Electrostatic_dischargehttp://en.wikipedia.org/wiki/Electric_currenthttp://en.wikipedia.org/wiki/Electric_currenthttp://en.wikipedia.org/wiki/Plasma_(physics)http://en.wikipedia.org/wiki/File:Flashlamp_ion_spectral_line_radiation_output.JPGhttp://en.wikipedia.org/wiki/Electric_glow_dischargehttp://en.wikipedia.org/wiki/Electric_glow_dischargehttp://en.wikipedia.org/wiki/Coherence_(physics)http://en.wikipedia.org/wiki/Capacitorhttp://en.wikipedia.org/wiki/High_voltagehttp://en.wikipedia.org/wiki/Step_up_transformerhttp://en.wikipedia.org/wiki/Rectifierhttp://en.wikipedia.org/wiki/Electrical_resistancehttp://en.wikipedia.org/wiki/Ionizedhttp://en.wikipedia.org/wiki/Electrostatic_dischargehttp://en.wikipedia.org/wiki/Electric_currenthttp://en.wikipedia.org/wiki/Electric_currenthttp://en.wikipedia.org/wiki/Plasma_(physics)


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Figure : Flash Lamp containing Xenon Gas

Simmer voltage triggering

Figure : A 3.5 microsecond flash, using external triggering.

Simmer voltage triggering is the least common method as the external triggering

method for Nd-YAG Laser used in LRF . In this technique, the capacitor voltage is not

initially applied to the electrodes, but instead, a high voltage spark streamer is maintained

between the electrodes. The high current from the capacitor is delivered to the electrodesusing a thyristoror a spark gap. This type of triggering is used mainly in very fast rise time

systems, typically those that discharge in the microsecond regime, such as used in high

speed stop-motion photography, ordye lasers. If external triggering is used, the sparkstreamers may still be in contact with the glass when the full current load passes through

the tube, causing wall ablation, or in extreme cases, cracking or even explosion of the

lamp. Some microsecond flashtubes are triggered by simply "over-volting", that is, byapplying a voltage to the electrodes which is much higher than the lamp's self-flash

threshold, using a spark gap.

LASER RANGE FINDER

A laser rangefinder is a device which uses laserenergy for determining the distance fromthe device to a place or object. Its principle of operation is analogous to radar: a pulse, or a

series of pulses, of energy are sent out, and the device measures the round-trip time for

them to return. Half that time, divided by the speed of light, is the range.

In keeping with the radar (Radio Detection and ranging) ancestry, laser rangefinderssometimes are called lidar for "light detection and ranging". There are a wide range of

applications, both civilian and military, for laser rangefinders, from things as benign as
http://en.wikipedia.org/wiki/Thyristorhttp://en.wikipedia.org/wiki/Triggered_spark_gaphttp://en.wikipedia.org/wiki/Rise_timehttp://en.wikipedia.org/wiki/Dye_lasershttp://en.wikipedia.org/wiki/Dye_lasershttp://en.wikipedia.org/wiki/Ablationhttp://en.citizendium.org/wiki/Laserhttp://en.citizendium.org/wiki/Radarhttp://en.citizendium.org/wiki/Speed_of_lighthttp://en.citizendium.org/wiki/Radarhttp://en.wikipedia.org/wiki/File:Xenon_high_speed_flash_and_external_triggering.jpghttp://en.wikipedia.org/wiki/Thyristorhttp://en.wikipedia.org/wiki/Triggered_spark_gaphttp://en.wikipedia.org/wiki/Rise_timehttp://en.wikipedia.org/wiki/Dye_lasershttp://en.wikipedia.org/wiki/Ablationhttp://en.citizendium.org/wiki/Laserhttp://en.citizendium.org/wiki/Radarhttp://en.citizendium.org/wiki/Speed_of_lighthttp://en.citizendium.org/wiki/Radar


25/30

warning that your car is about to back into the garage wall, to knowing the precise position

of a target to be hit with a ton of explosives.

For both technical and operational reasons, laser rangefinders usually use invisible infraredlight. Inexpensive and efficient solid-state lasers, and laser detectors, are widely available.

In a combat situation, the user of the rangefinder may want the target to be unaware of thepresence of the rangefinder or its user. The device may combine the rangefinder function

with the laser designatorfunction.

Some military targets have optoelectronics that can detect when laser energy is hitting

them, even if the beam, in the infrared light spectrum for most military devices, is invisible

to the human eye. They may try to jam the sensor looking for the laser rangefinder energy,perhaps by turning on infrared light or firing flares. Modern laser designators do not send a

simple continuous wave, or steady set of pulses, at the target, but send a complex,

changing, and unique pulse pattern. The rangefinder will look for its own pulse pattern, and

ignore all others.

A range finder is a device that allows you to find the distance from yourposition to an object without using a measuring tape. It measures the distanceof the target with the help of Measuring the time between transmission andreturn of a signal method.

All laserrangefinders operate by emitting laser energy and measuring the time it takes for the

energy to travel away from the sensor, strike a surface, and return. It uses the pulsed time-of-

flight .

For this method, the target range is:

d = (c t /2)

where t is the roundtrip time of the laser energy, and c is the speed of light.

Figure : pulsed time-of-flight

Measuring the time lag before the bounced signal returns to the detector (illustrated in figure )

would seem the most logical way of appraising distances. A 3-D laser scanner operates by
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sweeping a laser across the scene in two dimensions. At each pixel, the instrument measures the

time it takes for a laser beam to leave the sensor, strike a surface, and return. There are several

methods for measuring the time.

ALGORITHM FOR THE LASER TRANSMITTER TEST PROGRAM

STEP 1: START

STEP 2: Declare and Initialize temporary variables/memory spaces

STEP 3: Define Input port P1 for switch

STEP 4: Define P3 as output port

STEP 5: Check if the Switch is pressed or not.

STEP 6: Start to generate the three pulses if the switch is pressed

STEP 7: Generate time delay according to three different pulses.

STEP 8: STOP


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Code for Developing laser transmitter test using AT89C2051

microcontroller

org 00h ;

mov sp,#50h ;

clr p2.0 ; Trigger

clr p2.7 ; Fire

Start: jb p1.0,Start ;

Check: jnb p1.0,go ;

sjmp Start ;

go: call HV ;

call Trigger ;

call delay1 ;

call Fire ;

call delay2 ;

sjmp check ;


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HV: clr p0.0 ;

call delay ;

setb p0.0 ;

ret ;

Trigger: setb p2.0 ;

call delay3 ;

clr p2.0 ;

ret ;

Fire: setb p2.7 ;

call delay3 ;

clr p2.7 ;

ret ;

delay: mov r0,#10 ;

delaya: mov r1,#36 ;

delayb: mov r2,#255 ;

delayc: djnz r2,delayc ;

djnz r1,delayb ;

djnz r0,delaya ;

ret ;

delay1: mov r2,#54 ;

delay1a: mov r0,#255;


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delay1b: djnz r0,delay1b;

djnz r2,delay1a;

ret ;

delay2: mov r3,#10 ;

delay2a: mov r4,#54 ;

delay2b: mov r6,#255 ;

delay2c: djnz r6,delay2c;

djnz r4,delay2b;

djnz r3,delay2a;

ret ;

delay3: mov r0,#18;

delay3a: mov r5,#255 ;

delay3b: djnz r5,delay3b ;

djnz r0,delay3a ;

ret ;

end


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design of laser transmitter test circuit

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