DEVELOPMENT OF RF PEAK DETECTOR AND PHASE

MONITORING UNIT AT THE AUSTRALIAN SYNCHROTRON

THE NEED

2

• Existing system had insufficient Peak Detector accuracy

• Existing Peak Detector was also manifesting stability and/or noise issues

• Availability of spares - customized solution

• We needed phase monitoring system to improve diagnostic

• Possibility of saving space

Power comparator – very, very bad

example of reference voltage

100RR45

249kR46

+5.0100nF

C62

3

41

62

5

U17ADCMP608

Power Level 2

P7

+5.0

1k

R44

WHAT WE BUILD?

3

SPECIFICATION

4

• Isolation from mains and all auxiliary voltages derived from mains

• System should avoid earth loops

• Should be capable of continuous waveform (CW) or synchronised pulsed measurements

• Measurements between pulsed and CW mode should vary no more than 0.1dB

• The system shall be calibrated at nominal power and provide a linearity of better than ±

0.3 dB for a dynamic range of > 30dB

• Phase accuracy should be better than two degrees and phase resolution better than half

a degree at nominal power.

• The minimum frequency range for the system is from the MO reference frequency up to

six times the MO frequency.

• All phase measurements are relative to the reference signals.

• The maximum system input power level shall be:

500 MHz 11 dBm and

3 GHz 15 dBm

PROPOSAL OF SYSTEM ARCHITECTURE

5

True RMSAD8362

Adjustable LevelComparator

Latch and buffers

I/Q DemodulatorAD5380

DifferentialAmplifiers

Sample & Hold

Adjustable Delay &Pulse Generator

IsolationAmplifier

I

Q

I

Q

I

Q

I

Q

Trigger

RFin

LO

+5.0

Power Exceeded

I/Q DemodulatorAD5380

DifferentialAmplifiers

Sample & Hold IsolationAmplifier

I

Q

I

Q

I

Q

I

QRFin

True RMSAD8362

Adjustable LevelComparator

Latch and buffersPower Exceeded

+5.0

Reset

PEAK DETECTOR - POWER METER

6

Square Law Detector - output DC is voltage proportional to the input power

PEAK DETECTOR - POWER METER

7

Key Futures of AD8362 (square-law detector):

• Complete fully calibrated measurement/control system

• Accurate rms-to-dc conversion from 50 Hz to 3.8 GHz

• Input dynamic range of >65 dB: −52 dBm to +8 dBm in 50 Ω

• Waveform and modulation independent, such as GSM/CDMA/TDMA

• Linear-in-decibels output, scaled 50 mV/dB, Law conformance error of 0.5 dB

• All functions temperature and supply stable

• Operates from 4.5 V to 5.5 V at 24 mA

• Power-down capability to 1.3 mW

PEAK DETECTOR - POWER METER

8

INHI4

INLO5

PWDN7

DECL3

CHPF2

VPOS13

COMM1

COMM8

CLPF9

ACOM10

ACOM16

VREF15

VTGT14

VOUT12

VSET11

DECL6

U32

AD8362

100nFC119

1nFC139

1nFC140

1nFC117

1nFC118

180pFC112

6

4

1

3Tr6

TC1-1-13M+

100pFC161

+5.0

0R

R163

Power Level 2f100R

R177 L10

100pFC208

Power Level 2

Sig Ch2

33RR101

33RR108

33RR104

33RR102

33RR103

33RR100

To Power Comparator

To Front Panel Monitor

To Power Comparator

To I/Q Demodulator

• CLPF capacitor sets corner frequency of the filter. We had to experimentally select the

value to avoid overshoots creating false Power Exceeded trips.

• Additional Front Panel Output allow us to monitor power envelope of the signal.

• R177, L10 and C208 are output and EMC protection components.

• Resistive splitter provides signal to Power Meter and I/Q Demodulator

PEAK DETECTOR - COMPARATOR

9

• Fast comparator with additional hysteresis

• U12 Digital to Analog converter – 12 bits (212=4096)

• U13 – Reference Voltage – 4.096V

• U11 – Power exceeded latch.

• U10 – Few reset options.

D05

D16

D27

D38

D49

D510

D611

D712

D813

D914

D1015

D1116

Vref20

Vout19

DGND17

AGND18

VDD1

nSHDN2

nCS3

nRS4

AD7392ARU12

+5.0

+5.0+5.0

+5.0

10k

R28

12345678

16151413121110

9

S7

1234

8765

S8

nResPower Trig 2

10k

R29

10k

R30

10k

R31

10k

R32

10k

R33

10k

R34

10k

R35

10k

R36

10k

R37

10k

R38

10k

R39

1kR40

100nFC60

10uF/25VC65

100RR43

249kR42

+5.0100nF

C62

CL

R1

3

Q9

Q8

CLK11

D12

PR

10

U11BCD74HC74M

1

32

FDV301NQ2

3

41

62

5

U17ADCMP608

Power Level 2

+5.0

100nFC66

VIN12

GND4

Trim5

Vout6

U13

ADR444BRZ

100pF

C64

+5.0

10kR57

1

32

FDV301NQ7

1

32

FDV301NQ6

nLED Power Trig 2

PIN Power Trig 2L12

100pFC130

NFR180

100nFC137

1

24

53

NC7S08U10

nTrig Res

1 2 3

J6

+5.0

100nFC210

0RR179

+5.0

I/Q DEMODULATOR

10

Multiplier Phase Detector – Simple but which signal is first?

I/Q DEMODULATOR

11

• Amplitude modulation: s(t)= A(t)sin(ωt + φ)

sin(α + β ) = cos(α) cos(β ) - sin(α) sin(β );

• IQ Modulation: s(t)= I(t)cos(ωt + φ(t)) or s(t)=I(t)cos(ωt ) - Q(t)sin(ωt)

where: I(t)=A(t)cos(φ(t)) and Q(t)= A(t)sin(φ(t))

I/Q DEMODULATOR

12

Key Futures of ADL5380:

• Operating RF and LO frequency: 400 MHz to 6 GHz

• Input P1dB (IP1dB): 11.6 dBm @ 900 MHz

• Voltage conversion gain: ~7 dB

• Quadrature demodulation accuracy @ 900 MHz

• Phase accuracy: ~0.2°

• Amplitude balance: ~0.07 dB

• Demodulation bandwidth: ~390 MHz

• Baseband I/Q drive: 2 V p-p into 200 Ω

• Single 5 V supply

I/Q DEMODULATOR

13

+5.0

100nF

C68

Sig Ch1

1k

R62+5.0

100pFC71

100pFC72

100pF

C51

Supply = 5.25 Volts typ. 4.75 Volts min. @ 245mA

Output Voltage = +/- 2.5 volts

Rfin <= 15dBmLo <= +/-6dBm

Diff .Output Voltage = 1 volt

VCC16

VCC213

VCC324

GND12

GND15

GND214

GND217

GND31

GND318

GND320

GND323

GND411

GND48

RFIN21

RFIP22

QHI16

QLO15

ILO4

IHI3

ENBL7

LOIP9

LOIN10

ADJ19

NC12

GND25

U21

ADL5380

100pFC76

100pFC7733RR93

33RR99

33RR96

33RR94

33RR95

33RR92

6

4

1

3Tr1

TC1-1-13M+6

4

1

3

Tr2

TC1-1-13M+

2k49R123

3p3C54

4

31

U38A

AD8055

200RR111

NFR110

NFR113

2k49R115

3p3C48

1kR112

1k

R114

2k49R117

3p3C49

4

31

U39A

AD8055

200RR119

NFR118

NFR120

2k49R122

3p3C53

1kR116

1k

R121

0R

R124

NFC171

0R

R125

NFC83

100nF

C193

100pF

C194

+5.00RR157

100nF

C191

100pF

C192

+5.00RR156 0RR158

Sig Ch11

Q

I

• Differential amplifiers to extract I/Q signals and provide also filtering

• R124 and C171 additional low pass filter – if needed

• R110, R111 and R113 different options of loading outputs.

To I/Q Power Meter

To Sample and Hold

To Sample and Hold

CW and Pulsed RF measurements - Sample and Hold

14

I1

In2

Com3

Out8

S/nH7

V-

5V

+1

U19AD783

In3

L Ref7

Out5

S/nH8

V-

4V

+1

HC

6O

ffse

t2

U20LF398

100nFC67

100nFC73

100nFC70

100nFC74

10nF

C75

NFP1

NF

R60

123

J1

-5.0

+5.0+5.0

+5.0

-5.0

100pFC78

100pFC69

100pFC46

100pF

C79

TP4

I

Sample/Hold Strobe 1 Sample/Hold Strobe 2

KFEATURES of AD783

• High speed Sample and Hold Amplifier

• Acquisition Time to 0.01%: 250 ns

Typical

• Low Droop Rate: 0.02 mV/ms

• Fully Specified and Tested Hold Mode

Distortion

• Internal Hold Capacitor

KFEATURES of LF398

• Less than 10 μs acquisition time

• 0.5 mV typical hold step at Ch = 0.01 μF

• Low input offset

• 0.002% gain accuracy

• High supply rejection ratio in sample or

hold

To isolation amplifier

CW or Sample and Hold option

CW and Pulsed RF measurements - Sample and Hold

15

Sample

A9

B10

CLR11

Cext6

Rext/Cext7

Q5

Q12

74HCT221D

U30B

220pFC127

+5.0

+5.0

22nFC128

+5.0

+5.0

68pFC126

+5.0

123

J5

+5.0

520ns sample time

38us sample time

10uFC133

+5.0

+5.0nValid

50ms time

5 Volt @ 2mA

Supply = 5.5 Volts typ. 4.5 Volts min. @ 24mA

A9

B10

CLR11

Cext6

Rext/Cext7

Q5

Q12

74HCT221D

U31B

100R

R66

17k4R70

14k7R71

12k1R72

9k76R73

7k32R74

4k87R75

2k43R76 2k

R67

2kR68

7k15R87

1

32

FDV301NQ3

Sample GNDNFR128

50R termination provision

+5.0

100nFC173

BAV99D7

+5.0

NFR154

2k7R155

0.3us

0.2us0.4us0.6us0.8us1.0us1.2us1.4us 0.1us

6

4

1

3Tr7

TC1-1-13M+

A1

B2

CLR3

Cext14

Rext/Cext15

Q13

Q4

74HCT221D

U30A

A1

B2

CLR3

Cext14

Rext/Cext15

Q13

Q4

74HCT221D

U31A3

1

2

D6

BAT54C

2 4

53

U3474VHC1GT14

TP17

TP18

TP16

nTrig

1 2 3 4 5 6 7 816

15

14

13

12

11

10

9

S11

1k24R183

Sample/Hold Strobe 1

Sample/Hold Strobe 2

• U30B - option to delay trigger signal

• Switch programmable delay

• Extended trigger pulse for visualisation purposes (Front Panel)

• Sub-sequential sample and hold triggers - U30A and U31A

OPTICAL ISOLATION AND FILTERING

16

Q1

Q Ch1

8

2

36

1

U3AOPA27GU

BAV99D2

100R

R10 L15

100nFC9

100nFC15

100nFC10

100nFC16

GND116

GND28

15 7

V1+1

+V29

V1-2

-V210

U6ISO122JU

100nFC14

+12iso

-12iso

8

2

36

1

U44AOPA27GU

3k83

R11

10k7

R12

4n7C19

15k4R8

330pFC12

5k76

R13

13k7

R14

4n7C20

5k76R9

680pFC13

+12.0

-12.0

+12iso

-12iso

NFP8

NFR82

NFR83

+12iso

NFP7

NFR80

NFR81

+12.0 100R

R173 L16

100nFC123

Q Ch1f

NF

R187

Filer Type: MFB second orderFn=10 kHzR1 seed 10kR-E96, C-E6

In/out Voltage = +/- 12.5 typ. +/- 10 min.Gain = 1 v/v

Filer Type: MFB second orderFn=10 kHzR1 seed 10kR-E96, C-E6Gain of 4 Gain of 1

FEATURES

• 100% tested for high-voltage breakdown, rated 1500Vrms

• 0.010% max Nonlinearity

• Bipolar operation: VO = ± 10V

• The signal is transmitted digitally across capacitive barrier – requires filtering!!!

• Again outputs and EMC protection components – never enough!

TESTING 2ns responds to 0.6m

0.1ps responds to 30um!

TESTING – Dynamic Range

•The measured noise figures were excellent and achieved a resolution of

0.1 degrees and 0.02 dB respectively; and still remarkably 1 deg and

0.2 dB at -32 dB in pulsed mode.

•Both gains for CW and pulsed mode are equal without the need for

adjustment.

TESTING – Resolution

Input: 3 GHz, CW, 2.4 dBm

steps:0.1 dB/0.5 ps (0.54 deg)

scale: 17.5 mV/div

Input: 3 GHz, CW, -17dBm

steps: 0.1 dB/0.5 ps (0.54 deg)

scale:1.75/2.00 mV/div

Input: 3 GHz, SH, 2.4 dBm

steps:0.1dB 0.5ps (0.54 deg)

scale:20 mV/div

Input: 3 GHz SH -17dBm

steps: 0.2dB 1ps (1.08deg)

scale: 5 mV/div

PACKAGING - 3U CRATE (boards100x160)

PACKAGING - 3U CRATE (boards100x160)

PACKAGING - 3U CRATE (Backplain)

PACKAGING - 3U CRATE (boards100x160)

PACKAGING - 3U CRATE

PACKAGING - 3U CRATE (Patch panel)

PACKAGING - 3U CRATE (Patch panel)

PRACTICAL APPLICATION AND OUTCOMES

PRACTICAL APPLICATION AND OUTCOMES

KLYSTRON 1KLYSTRON 2

b

b

b

b

bbb

x6

ACCELERATOR

STRUCTURE 2ACCELERATOR

STRUCTURE 1 GUN

FBU

PBU

CU 9015 FO

PPA 10 – 400 BN PPA 69 – 500 FO

PPA 69 – 500 FOPPA 10 – 400 BN

WR 284 RF

DISTRIBUTION

SYSTEM

SPB

A

B A

B

500 MHz

LEGEND: b phase shiftervar. power splitter

(hybrid)amplifier coupler power splitter

ARC ARC

ARC

ARC

ACKNOWLEDGMENTS

29

K.L. Zingre,

G. LeBlanc,

R. Dowd,

A. Starritt,

R. LeGuen,

N. Basten,