dirk beernaert, european commission brussels, 16 december 2010 ic design challenges and...

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Dirk Beernaert, European Commission Brussels, 16 December 2010 IC design Challenges and opportunities Workshop

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Page 1: Dirk Beernaert, European Commission Brussels, 16 December 2010 IC design Challenges and opportunities Workshop

Dirk Beernaert, European Commission

Brussels, 16 December 2010

IC design Challenges and opportunities Workshop

Page 2: Dirk Beernaert, European Commission Brussels, 16 December 2010 IC design Challenges and opportunities Workshop

Semiconductors as key enabling industry

ElectronicsWW$1500B / Europa $315B

Automotive Industrial Defense

Medical Space

Semiconductors$256B /

Europa $41B

Service ProvidersWW$6300B / Europa $1600B

2007 World GDP=65200BUS$ (ppp based)

- Internet Services Providers- Games

- Broadcast- Telecom Operators

Semiconductors provide the knowledge & technologies that generate some 10% of global GDP.

Source: IMF, ESIA, WSTS, Decision

Page 3: Dirk Beernaert, European Commission Brussels, 16 December 2010 IC design Challenges and opportunities Workshop

The Supply Chain Today

Systems2008

~1430B$2009

~1380B$

Devices2008

~275B$2009

~250B$

Equipment2008

~31B$2009

~17B$

Material

~20B$

2010~1440B$

2010~280B$

2010~26B$

Global electronic market supply chain revenue

Source: Gartner, Ic Insights (2008-2009)Automotive

Industrial and Medical

Military, Civil Aerospace, Security

Consumer

Communications

Data Processing

Page 4: Dirk Beernaert, European Commission Brussels, 16 December 2010 IC design Challenges and opportunities Workshop

The evolving SC value chain / landscape

Academia,ScientificResearch

Institu-tions

Eq.& Materials

IDM

DISTI

(branded) OEM

Service providers(virtual) Network op.

(Consumer) Retail

Businesses, Consumers, Authorities

From a linear chain...

S/C MfgServices:• Foundry• SATS

Fabless

IP Providers:• IP blocks• Software

(firmware, stacks, middleware, OS)

• Design houses• EDA

DISTIODM EMS

(branded) OEM

Module makers

Service providers/(virtual) network op.

(Consumer) Retail

Distrib.

Content Industry:• Providers• Aggregators• Service prov.

Businesses, Consumers, Authorities

Academia,ScientificResearch

Institu-tions

Eq.& Materials

IDM

Logistics

service

providers

...to a networked model

Source: ESIA

Page 5: Dirk Beernaert, European Commission Brussels, 16 December 2010 IC design Challenges and opportunities Workshop

Global Consolidation: Number of Logic IDMs with Fabs.European Chip makers are moving up the value chain: From the hardware supply side into the final application

IBS 2009, ST 2010

Semi equipment

Semi materials

Wafer foundry

Software

Systemmgmt

Chip maker

Application

Contentprotection

Infrastructure

System integrator

Service provider

Contentprovider

Deliverynetwork

Gatewaymgmt

Legislatorregulations

Changing business models

Page 6: Dirk Beernaert, European Commission Brussels, 16 December 2010 IC design Challenges and opportunities Workshop
Page 7: Dirk Beernaert, European Commission Brussels, 16 December 2010 IC design Challenges and opportunities Workshop

-

Keep research, manufacturing, integration & system competence in Europe?

IP, lead markets, user-supplier relationships, regional innovation clusters, equipment, manufacturing, SMEs

Policy & more efforts to keep Europe attractive for investments in semiconductor research & manufacturing and

for their application in key lead markets High on EU 2020 Agenda

Nanoelectronics”Small, smaller, smarter”

Page 8: Dirk Beernaert, European Commission Brussels, 16 December 2010 IC design Challenges and opportunities Workshop

Nanoelectronics”Small, smaller, smarter”

- Advanced communication & computing components enabling pervasive applications -

Lower cost, higher performance and more

functionality

pe

rfo

rma

nc

e

Smart design and Smart manufacturing of Smart Components

Enabled by

•Power consumption

-

Mo

ore

’s L

aw:

Min

iatu

riza

tio

nB

asel

ine

CM

OS

: C

PU

, Mem

ory

, Lo

gic

130nm

90nm

65nm

45nm

32nm

22nm

Beyond

Moore

Analog/RF Passives HV Power SensorsActuators

Biochips

InformationProcessing

Digital content SoC

Interacting with people and environment

Non-digital SoC & SiP

Combining SoC and SiP: Higher Value Systems

More than Moore: Diversification

Digital Society

Page 9: Dirk Beernaert, European Commission Brussels, 16 December 2010 IC design Challenges and opportunities Workshop

Current FP7 R&D Work Programme

• To stimulate interaction of system and technology to better explore European system competences.

• To address energy efficiency needs for mobile applications

• Nanoelectronics products as system enablers and solution providers for global challenges as aging society, global warming, growing population or sustainable manufacturing.

• To prepare for “beyond” traditional shrinking (ITRS roadmap)

-

Mo

ore

’s L

aw:

Min

iatu

riza

tio

nB

asel

ine

CM

OS

: C

PU

, Mem

ory

, Lo

gic

130nm

90nm

65nm

45nm

32nm

22nm

Beyond

Moore

Analog/RF Passives HV Power SensorsActuators

Biochips

InformationProcessing

Digital content SoC

Interacting with people and environment

Non-digital SoC & SiP

Combining SoC and SiP: Higher Value Systems

More than Moore: Diversification

Page 10: Dirk Beernaert, European Commission Brussels, 16 December 2010 IC design Challenges and opportunities Workshop

Manufacturing, Equipment assessment and Access

– Access to nano-manufacturing and to advanced technologies to be assured in Europe.

– Access to world wide equipment market for European suppliers, especially SMEs, need to be stimulated.

– Access to design tools and multi-project wafers fabrication for education, PhD and SMEs.

Semiconductor Equipment for Wafer Bonding with Plasma Activation

EV Group, CEA-LETI, Soitec

3D Integration of Bulk Si WafersEV Group, CEA-LETI,

STMicroelectronics Crolles II

Low Energy and Dose Implant TestSEMILAB, Fraunhofer IISB,

ST Microelectronics Crolles II,NXP Crolles R&D

Ruthenium Atomic Vapor Deposition Competitiveness in Nanoelectronic

Device GenerationsAIXTRON, Fraunhofer IISB, Infineon

Munich

Metrology Using X-Ray TechniquesJordan Valley, CEA-LETI,

STMicroelectronics Crolles II,NXP Crolles R&D

Page 11: Dirk Beernaert, European Commission Brussels, 16 December 2010 IC design Challenges and opportunities Workshop

ENIAC Joint Undertaking as Public-Private Partnership

Industry and R&D actors

Commission and Public

Authorities

Executive Dir. and secretariat

He

alth

& th

e A

gin

g S

ocie

ty

En

erg

y Efficie

ncy

Sa

fety &

Se

curity

Au

tom

otive

& T

ran

spo

rt

Co

mm

un

icatio

n &

Dig

ital L

ifestyle

s

Design Technologies

Equipment, Materials & Manufacturing

Semiconductor Process & Integration

Newemphasis

Page 12: Dirk Beernaert, European Commission Brussels, 16 December 2010 IC design Challenges and opportunities Workshop

FP7-CIP/ICT/ENIAC Budget Profiles: 70% increase in period 2011-13

M€  2007 2008 2009 2010 2011 2012 2013 TOTAL

PF7 ICT 1.189 1.217 1.227 1.241 1.382 1.582 1.760 9.597

CIP 58 52 105 113 120 135 149 732

ENIAC JU (2/3nat’l + 1/3EC)

97 106 87 125 240 620 1275

Page 13: Dirk Beernaert, European Commission Brussels, 16 December 2010 IC design Challenges and opportunities Workshop

What’s next for nanoelectronics R&D in Europe?

• What are the challenges ahead in a globalized world?• What are the priorities?• How to measure impact and success?

What’s necessary to better exploit results in Europe?

What’s necessary to innovate and invest in Europe?

What’s next for nanoelectronics R&D in Europe?