distributed power system sa3100 power module interface ......link with the drive’s power module...

Distributed Power SystemSA3100 Power Module Interface (PMI) Regulator

Instruction Manual
S-3057-1

Throughout this manual, the following notes are used to alert you to safety considerations:

Important: Identifies information that is critical for successful application and understanding of the product.

!ATTENTION: Identifies information about practices or circumstances that can lead to personal injury or death, property damage, or economic loss.

!ATTENTION:Only qualified electrical personnel familiar with the construction and operation of this equipment and the hazards involved should install, adjust, operate, or service this equipment. Read and understand this manual and other applicable manuals in their entirety before proceeding. Failure to observe this precaution could result in severe bodily injury or loss of life.

ATTENTION:DC bus capacitors retain hazardous voltages after input power has been disconnected. After disconnecting input power, wait five (5) minutes for the DC bus capacitors to discharge and then check the voltage with a voltmeter to ensure the DC bus capacitors are discharged before touching any internal components. Failure to observe this precaution could result in severe bodily injury or loss of life.

ATTENTION:Only qualified Rockwell personnel or other trained personnel who understand the potential hazards involved may make modifications to the regulator configuration, variable configuration, and application tasks. Any modifications may result in uncontrolled machine operation. Failure to observe this precaution could result in damage to equipment and bodily injury.

ATTENTION: The user must provide an external, hardwired stop circuit outside of the drive circuitry. This circuit must disable the system in case of improper operation. Uncontrolled machine operation may result if this procedure is not followed. Failure to observe this precaution could result in bodily injury.

ATTENTION: The user is responsible for conforming with all applicable local, national, and international codes. Failure to observe this precaution could result in damage to, or destruction of, the equipment.

ATTENTION:The circuit boards of the PMI Regulator contain static-sensitive components. Do not touch the boards or their connectors without proper ESD handling equipment. When not installed, circuit boards should be stored in anti-static bags. Failure to observe this precaution could result in damage to, or destruction of, the equipment.

The information in this users manual is subject to change without notice.

AutoMax™ and Flex I/O™ are trademarks of Rockwell Automation

©1998 Rockwell International Corporation

CONTENTS

Chapter 1 Introduction

Chapter 2 PMI Regulator Motherboard2.1 Motherboard Mechanical Description .............................................................. 2-1

2.1.1 Fiber-Optic Ports ................................................................................... 2-12.1.2 Power Module Interface Connector....................................................... 2-22.1.3 Flex I/O Interface................................................................................... 2-22.1.4 Meter Ports............................................................................................ 2-22.1.5 Synchronous Transfer Port Connector.................................................. 2-32.1.6 LED Status Indicators ........................................................................... 2-3

2.2 Motherboard Electrical Description.................................................................. 2-72.2.1 PMI Processor Operation...................................................................... 2-82.2.2 AC Power Technology Circuit ............................................................. 2-102.2.3 Power Module Interface Connector Signals ........................................ 2-12

2.2.3.1 Digital Grounds ..................................................................... 2-132.2.3.2 Gate Drivers.......................................................................... 2-132.2.3.3 Motor Current Feedback ....................................................... 2-132.2.3.4 Motor Voltage Feedback....................................................... 2-142.2.3.5 DC Bus Voltage Feedback.................................................... 2-142.2.3.6 Ground Current Feedback .................................................... 2-152.2.3.7 DESAT .................................................................................. 2-152.2.3.8 AC Line Feedback ................................................................ 2-152.2.3.9 DC Bus Pre-Charge .............................................................. 2-162.2.3.10 EE ROM Signals ................................................................... 2-162.2.3.11 N-Contactor........................................................................... 2-162.2.3.12 Power Supply........................................................................ 2-16

2.2.4 Synchronous Transfer Port ................................................................. 2-17

Chapter 3 Resolver & Drive I/O Board3.1 Resolver & Drive I/O Board Mechanical Description ....................................... 3-13.2 Resolver & Drive I/O Board Electrical Description........................................... 3-2

3.2.1 Resolver Input ....................................................................................... 3-23.2.1.1 Resolver Feedback Precautions ............................................. 3-53.2.1.2 Resolver Calibration................................................................ 3-5

3.2.2 Analog Input .......................................................................................... 3-73.2.3 Drive I/O ................................................................................................ 3-8

Chapter 4 Flex I/O Interface4.1 Flex I/O Interface Mechanical Description ....................................................... 4-34.2 Flex I/O Interface Electrical Description .......................................................... 4-34.3 Flex I/O Error Detection................................................................................... 4-4

Table of Contents I

Chapter 5 Installation Guidelines5.1 Wiring Guidelines .............................................................................................5-15.2 PMI Regulator Motherboard Connections........................................................5-1

5.2.1 Fiber-Optic Cabling................................................................................5-25.2.2 Meter Port Wiring...................................................................................5-25.2.3 Connecting Flex I/O Modules ................................................................5-2

5.3 Resolver & Drive I/O Board Connections.........................................................5-35.3.1 Connecting Resolver Feedback and Analog Input ................................5-3

5.3.1.1 Resolver Input Connections ....................................................5-75.3.1.2 Analog Input Connections .......................................................5-7

5.3.2 Connecting Drive I/O ...........................................................................5-10

Chapter 6 Diagnostics and Troubleshooting6.1 PMI Regulator Faults (UDC Register 202/1202)..............................................6-1

6.1.1 DC Bus Overvoltage Fault (Bit 0) ..........................................................6-16.1.2 DC Bus Overcurrent Fault (Bit 1)...........................................................6-26.1.3 Ground Current Fault (Bit 2) ..................................................................6-26.1.4 Instantaneous Overcurrent Fault (Bit 3).................................................6-26.1.5 Isolated 12V Supply Fault (Bit 4) ...........................................................6-26.1.6 Charge Bus Time-Out Fault (Bit 6) ........................................................6-26.1.7 Overtemperature Fault (Bit 7) ................................................................6-36.1.8 Resolver Broken Wire Fault (Bit 8) ........................................................6-36.1.9 Resolver Fault (Bit 9) .............................................................................6-36.1.10Overspeed Fault (Bit 9)..........................................................................6-36.1.11AC Power Technology Fault (Bit 11) .....................................................6-36.1.12PMI Regulator Bus Fault (Bit 13) ...........................................................6-36.1.13UDC Run Fault (Bit 14)..........................................................................6-36.1.14Communication Lost Fault (Bit 15) ........................................................6-4

6.2 PMI Regulator Warnings (UDC Register 203/1203) ........................................6-46.2.1 DC Bus Overvoltage Warning (Bit 0) .....................................................6-46.2.2 DC Bus Undervoltage Warning (Bit 1) ...................................................6-46.2.3 Ground Current Warning (Bit 2).............................................................6-46.2.4 Voltage Ripple Warning (Bit 3) ..............................................................6-46.2.5 Reference In Limit Warning (Bit 4).........................................................6-46.2.6 Tuning Aborted Warning (Bit 5) .............................................................6-56.2.7 Overtemperature Warning (Bit 7)...........................................................6-56.2.8 Bad Gain Data Warning (Bit 8) ..............................................................6-56.2.9 Thermistor Open Circuit Warning (Bit 9)................................................6-56.2.10Flex I/O Communication Warning (Bit 13) .............................................6-56.2.11CCLK Not Synchronized Warning (Bit 14).............................................6-56.2.12PMI Regulator Communication Warning (Bit 15)...................................6-5

Chapter 7 Circuit Board Replacement Guidelines7.1 Replacing the PMI Regulator Assembly...........................................................7-37.2 Replacing the Resolver & Drive I/O Board.......................................................7-37.3 Replacing the LED Status Board .....................................................................7-47.4 Replacing the PMI Regulator Motherboard......................................................7-4

II PMI Regulator

Appendix A PMI Regulator Specifications ................................................................................A-1

Appendix B Resolver & Drive I/O Board Specifications ..........................................................B-1

Appendix C PMI Regulator / UDC Register Cross-Reference..................................................C-1

Appendix D PMI Regulator Replacement Parts ........................................................................D-1

Appendix E PMI Regulator Test Points .....................................................................................E-1

Table of Contents III

IV SA3100 Drive Configuration and Programming

List of Figures

Figure 1.1 – PMI Regulator Assembly ...................................................................... 1-5Figure 2.1 – PMI Regulator Motherboard ................................................................. 2-1Figure 2.2 – Meter Port Output Circuit...................................................................... 2-3Figure 2.3 – LED Status Indicators........................................................................... 2-3Figure 2.4 – PMI Processor Block Diagram.............................................................. 2-9Figure 2.5 – AC Power Technology Circuit Block Diagram .................................... 2-11Figure 2.6 – PMI Connector Pinout ........................................................................ 2-12Figure 2.7 – Synchronous Transfer Port Connector Pinout.................................... 2-17Figure 3.1 – Resolver and Drive I/O Board............................................................... 3-1Figure 3.2 – Resolver Feedback Connector Pinout.................................................. 3-2Figure 3.3 – Resolver Data Format (12-Bit Mode).................................................... 3-2Figure 3.4 – Resolver Data Format (14-Bit Mode).................................................... 3-3Figure 3.5 – External Strobe Input Circuit................................................................. 3-4Figure 3.6 – External Strobe Input Circuit Timing Diagram ...................................... 3-4Figure 3.7 – Analog Input Circuit .............................................................................. 3-8Figure 3.8 – Auxiliary Input Circuit............................................................................ 3-9Figure 3.9 – Run Permissive Input (RPI) Circuit....................................................... 3-9Figure 3.10 – MCR and Auxiliary Output Circuit..................................................... 3-10Figure 3.11 – Drive I/O Connector Pinout............................................................... 3-10Figure 3.12 – Resolver & Drive I/O Block Diagram ................................................ 3-11Figure 3.13 – Drive I/O Only Block Diagram........................................................... 3-12Figure 4.1 – Flex I/O Interface Block Diagram.......................................................... 4-3Figure 5.1 – Meter Port Connections........................................................................ 5-2Figure 5.2 – Terminal Block Connections for Resolver and Analog Input ................ 5-4Figure 5.3 – DIN Rail Connections for Resolver and Analog Input........................... 5-5Figure 5.4 – Terminal Block Connections for Analog Input Only .............................. 5-6Figure 5.5 – DIN Rail Connections for Analog Input Only ........................................ 5-6Figure 5.6 – Analog Input - Single-Ended Driven Off Ground .................................. 5-8Figure 5.7 – Analog Input - Single-Ended Grounded................................................ 5-8Figure 5.8 – Analog Input - Single-Ended Floating................................................... 5-9Figure 5.9 – Analog Input - Balanced Driven Off Ground ......................................... 5-9Figure 5.10 – Analog Input - Balanced Grounding ................................................... 5-9Figure 5.11 – Analog Input - Balanced Floating ..................................................... 5-10Figure 5.12 – Terminal Block Connections for Drive I/O ........................................ 5-11Figure 5.13 – DIN Rail Connections for Drive I/O................................................... 5-12Figure 7.1 – Terminal Block Locations ..................................................................... 7-2Figure E.1 – PMI Regulator Mother Board - Test Points ..........................................E-2

Table of Contents V

VI PMI Regulator

List of Tables

Table 1.1 – SA3100 Documentation (Binder S-3053) .............................................. 1-2Table 1.2 – SA3100 Power Structure Service Manual Cross Reference ................. 1-2Table 4.1 – Supported Flex I/O Modules .................................................................. 4-2Table 5.1 – Standard Resolver Connections ............................................................ 5-7Table 5.2 – Resolver Cables .................................................................................... 5-7

Table of Contents VII

VIII PMI Regulator

CHAPTER 1Introduction

Rockwell SA3100 AC drives operate under the control of the AutoMax™ Distributed Power System (DPS).

DPS is a programmable microprocessor-based control system that provides real-time control of AC and DC drives. Each Universal Drive Controller (UDC) module in the AutoMax rack is used to control one or two drives. Both AC and DC drives can be controlled from one UDC module. The UDC module communicates over a fiber-optic link with the drive’s Power Module Interface (PMI) Regulator. The control type (i.e., current for DC, vector with constant power or volts/hertz for AC) is determined by the operating system contained in the PMI.

On an SA3100 drive the PMI Regulator is mounted inside the Power Module. The PMI Regulator contains both the drive’s regulator circuitry and its communication interface. The SA3100 PMI Regulator (figure 1.1) consists of a large motherboard and a smaller Resolver & Drive I/O board that mounts on top of the motherboard. The motherboard contains the PMI processor, AC power technology circuitry, UDC interface, metering ports, status LEDs, and Flex I/O interface.

The PMI Regulator performs the following functions:

• Communicates with the UDC module in the AutoMax rack

• Executes the selected control algorithm

• Processes the feedback signals

• Updates the drive I/O and Flex I/O points

• Accumulates diagnostic data for transmission to the UDC module

This manual provides a description of the PMI Regulator hardware and related I/O modules. Regulator installation/replacement guidelines are also provided. Note that this instruction manual does not describe specific applications of the standard hardware and software.

The other instruction manuals in binder S-3053 describe the SA3100 power structure, software, and communications. The user should be familiar with the manuals in S-3053 before using the drive. Table 1.1 lists the document part numbers.

Introduction 1-1

Power structure replacement parts and service procedures are contained in the instruction manuals listed in table 1.2.

Table 1.1 – SA3100 Documentation (Binder S-3053)

Document Document Part Number

SA3100 Information Guide S-3054

Drive System Overview S-3005

Universal Drive Controller Module S-3007

Fiber Optic Cabling S-3009

SA3100 Drive Configuration & Programming S-3056

SA3100 PMI Regulator S-3057

SA3100 Power Modules S-3058

SA3100 Diagnostics, Troubleshooting, & Start-Up Guidelines

S-3059

Table 1.2 – SA3100 Power Structure Service Manual Cross Reference

AC Input Voltage

DC BusInput Voltage Nominal HP Frame Size

Use Service Manual 1336

Force-

200 VAC -

240 VAC[A]

310 VDC[Q]

001

B 6.11

003

007

010

015

020

C 6.12025

030

040

D 6.13050

060

075

E 6.14100

125

1-2 PMI Regulator

380 VAC -

480 VAC[B]

513 VDC-

620 VDC[R]

001

B 6.11

003

007

010

015

020

025

030

040C 6.12

050

060

D 6.13075

100

125

150

E 6.14200

250

300

F 6.14350

400

450

G 6.15500

600

800 H 6.15


AC Input Voltage



Force-

Introduction 1-3

Additional information about using the SA3100 drive is found in the wiring diagrams, prints, and other documentation shipped with each drive system. Always consult the prints shipped with your drive system for specific information about installing, operating, and maintaining your drive.

500 VAC -

600 VAC[C]

675 VDC-

800 VDC[W]

001

B 6.11

003

007

010

015

020

025

C 6.12030

040

050

060

075

D 6.13100

125

150

E 6.14200

250

300

350F 6.16

400

450

G 6.15500

600

650

800 H 6.15


AC Input Voltage



Force-

1-4 PMI Regulator

Figure 1.1 – PMI Regulator Assembly

PE

Introduction 1-5

1-6 PMI Regulator

CHAPTER 2PMI Regulator Motherboard

The motherboard on the PMI Regulator (figure 2.1) contains the PMI processor and AC power technology circuits. The PMI processor runs the motor control algorithm, monitors drive operation, and communicates with the AutoMax UDC module over the fiber-optic link. The AC power technology circuit provides the gate firing signals to the drive’s power devices and receives and conditions the power device feedback signals.

2.1 Motherboard Mechanical Description

The motherboard is a printed circuit board assembly that mounts internally in the Power Module. In addition to the PMI processor and AC power technology circuits, the motherboard contains the following ports and connectors:

2.1.1 Fiber-Optic Ports

Transmit and receive ports are provided on the motherboard for connection to the fiber-optic link with the UDC module in the AutoMax rack. The PMI Regulator is shipped with dust caps covering the fiber-optic ports. To prevent dust accumulation and the resulting loss of signal integrity, the dust caps should not be removed until the fiber-optic cables are installed, and should be replaced if the cables are disconnected.

Figure 2.1 – PMI Regulator Motherboard

PMI Regulator Motherboard 2-1

2.1.2 Power Module Interface Connector

The 50-pin Power Module Interface connector is used for drive feedback signals as well as for gate firing, power supply, and pre-charge contactor control signals. The connector and signals are described in detail in section 2.2.3.

2.1.3 Flex I/O Interface

The Flex I/O interface provides the hardware connection between the PMI processor and the Flex I/O modules that may be used to read and write analog and digital data to or from external devices. Flex I/O interfaces to the PMI Regulator via a 20-pin Mini D connector. The Flex I/O interface is described in chapter 4.

2.1.4 Meter Ports

The motherboard contains four analog output ports on a single connector labeled “METER PORTS.” The ports provide 8-bit resolution (7-bit plus sign) of internal processor data to the analog output over a +/-10 volt range.

Each port can be connected to a separate analog device (e.g., a meter or other data-logging device) located up to 4 meters (13 feet) from the drive. A removable terminal block connector is used to connect the analog devices to the PMI Regulator. All connections are made using 2.08-0.326 mm2 (14-22 AWG) wire.

Note that the four meter ports are not isolated from each other or from system common. There is one common for each port, but these are tied together as shown in figure 2.2. Maximum output current is 20 milliamps.

The meter ports can be set up off-line during parameter entry for the UDC module or on-line using the "Setup UDC" selection from the AutoMax Programming Executive’s Monitor menu. The outputs can be scaled so that a small portion of the total signal can be expanded to provide full scale output on the meter or other data-logging device. The current value of each variable is written to the analog output every minor loop scan. The ports default to "not used" and output zero volts.

Meter port configuration is described in the SA3100 Drive Configuration and Programming instruction manual (S-3056).

2-2 PMI Regulator

2.1.5 Synchronous Transfer Port Connector

The Synchronous Transfer Port connector is reserved for future use of the synchronous transfer function. However, connections may be made to three of its pins in order to measure real-time current feedback. See section 2.2.4.

2.1.6 LED Status Indicators

Figure 2.2 – Meter Port Output Circuit

OFFSETVOLTAGE

100pF

51.10.01uF

AGND

20K20K

+

-

100pF

51.10.01uF

AGND

20K20K

+

-

COM

+

+

COM

1

2

100pF

51.10.01uF

AGND

20K20K

+

-+

COM

3

100pF

51.10.01uF

AGND

20K20K

+

-+

COM

4

D/ACONVERTER

METEROUTPUT

PORT

AGND

FERRITE BEAD

PMI Regulator status is indicated by an LED board mounted above the motherboard. Five of the LEDs indicate the status of the PMI processor and the connected drive. The other nine LEDs indicate the status of the Resolver & Drive I/O board.

The LEDs are defined in the following descriptions. See the SA3100 Drive Configuration and Programming instruction manual (S-3056) for a complete description of the registers and status bits referred to in these descriptions.

Figure 2.3 – LED Status Indicators


PMI PROCESSOR AND DRIVE STATUS LEDs

OK (green) - When power is applied, this LED will turn on to indicate the PMI processor has passed its internal power-up diagnostics. After power-up, this LED will remain on while the Regulator is operating properly. It will turn off if an internal watchdog times out

COMM OK (green) - When lit, this LED indicates messages are being received correctly over the fiber-optic link from the UDC module. If this LED is off, it indicates there is a fault in the link or that the UDC module is unable to communicate.

If the PMI processor does not receive a message from the UDC module for two or more CCLK periods, or logs two consecutive communication errors of any type, the PMI processor will shut the drive down.

Detailed information about the communication link (e.g., number of messages sent and received, CRC error count) is displayed in the UDC/PMI Communication Status Registers (80-89/1080-1089) on the UDC module.

DRV RDY (green) - When lit, this LED indicates that all of the following conditions are met:

• All power supplies are at acceptable levels

• The on-board field programmable gate array (FPGA) has been configured

• The on-board watchdog timer is being updated by the PMI processor

• The operating system has been downloaded to the PMI processor

• The PMI processor has passed the power-up diagnostics

Corresponding UDC location: Register 202/1202, bit 11

If the PMI processor fails any of its power-up diagnostics, the motherboard must be replaced.

2-4 PMI Regulator

P.M. FLT (red) - When lit, this LED indicates that one of the hardware fault conditions listed below has been detected in the Power Module:

• DC bus overcurrent fault. The hardware detects that DC bus current exceeds 125% of the rated Power Module current.


• Instantaneous overcurrent fault (IET). An overcurrent is detected in one of the power devices. Register 204/1204 indicates which power device detected the overcurrent.


• Charge bus time-out fault. (Note that the EXT FLT LED will also be on.) This fault indicates one of the following conditions:

• The DC bus is not fully charged within 10 seconds after the bus enable bit (register 100/1100, bit 4) is turned on.

• The drive is on and feedback indicates that the pre-charge contactor has opened.

• DC bus voltage is less than the value stored in the Power Loss Fault Threshold (PLT_EO%) tunable variable.


• Over temperature fault. The heatsink temperature exceeds 100° C.


EXT FLT (red) - When lit, this indicates that the PMI Regulator has detected a fault external to the Regulator itself. One of the following fault conditions has occurred:

• DC bus over voltage. Hardware detects that DC bus voltage exceeds the rating of the unit.


• Ground current fault. Ground current exceeds the rating of the unit.



RESOLVER AND DRIVE I/O STATUS LEDs

EXT FLT (red) -

(continued)

• Charge bus time-out fault. (Note that the P.M. FLT LED will also be on.) This fault indicates one of the following conditions:

• The DC bus is not fully charged within 10 seconds after the bus enable bit (register 100/1100, bit 4) is turned on.

• The drive is on and feedback indicates that the pre-charge contactor has opened.

• DC bus voltage is less than the value stored in the Power Loss Fault Threshold (PLT_EO%) tunable variable.


• Over speed fault. The motor’s velocity exceeds the value entered as the Over Speed Trip (RPM) configuration parameter.


• The user’s application program has instructed the LED to turn on.


I/O FLT (red) - When lit, this LED indicates communication between a Flex I/O module and the PMI processor has been disrupted.

Registers 0-23 are available in the UDC module for Flex I/O configuration and diagnostic purposes. If an I/O communication problem is detected and logged in registers 10/22 or 11/23, then bit 13 in the Drive Warnings register (203/1203) will be set.

!ATTENTION:Flex I/O faults will not cause the drive to shut down. The user must ensure that the application task tests the Flex I/O fault registers (10/22 and 11/23) and forces appropriate action in the event of a fault.

FDBK OK (green) - When lit, this LED indicates that the Resolver & Drive I/O board is receiving feedback from the resolver and that no resolver feedback faults have been detected.

If the LED is off, it indicates a Resolver broken wire fault. The resolver sine and/or cosine signals are missing due to a broken wire, or the resolver gain tunable (RES_GAN%) has been set too low.

Corresponding bit location: Register 202/1202, bit 8

2-6 PMI Regulator

.

.

2.2 Motherboard Electrical DescriptionWhen power is applied to the PMI Regulator, the PMI processor will perform a series of internal diagnostics. If the diagnostics are passed, the OK LED will turn on and remain on.

The PMI processor will request its operating system from the UDC module as soon as communications are established over the fiber-optic link. After the operating system has been downloaded from the UDC module (a process that takes approximately 1/2 second), diagnostics are performed on the AC power technology circuit.

RPI (green) - When lit, this LED indicates that the run permissive input (RPI) signal is detected on pin A. The RPI signal typically originates from the drive’s coast-to-rest stop circuit.

Corresponding bit location: Register 201/1201, bit 0.

MCR (amber) - When lit, this LED indicates the MCR (motor control relay) output signal is being driven on (pin P). The MCR output is under the control of the PMI Regulator.

AUX IN1 (green) - When lit, this LED indicates the presence of a 115 volt signal on this input (pin C).


AUX IN2 (green) - When lit, this LED indicates the presence of a 115 volt signal on this input (pin E).


AUX IN3 (green) - When lit, this LED indicates the presence of a 115 volt signal on this input (pin H).


AUX IN4 (green) - When lit, this LED indicates the presence of a 115 volt signal on this input (pin K).


AUX IN5 (green) - When lit, this LED indicates the presence of a 115 volt signal on this input (pin M).


AUX OUT (amber) - When lit, this LED indicates the output signal has been turned on (pin S).



If any of these diagnostics fails, the DRV RDY LED will not turn on. If the diagnostics pass, the PMI processor will send a feedback message to the UDC module. The UDC module will respond with a command message and the configuration data. The configuration data contains the synchronization information for the PMI Regulator.

The UDC module and the PMI processor are both synchronized to the system CCLK signal so that a feedback message from the PMI processor arrives at the UDC module just before it begins scanning the UDC tasks. The PMI Regulator provides resolver-to-digital conversion for speed and position feedback. This data is sent to the UDC module for use in the UDC task. Speed feedback sampling in the PMI Regulator is synchronized to within 1 µsec of the UDC task scan.

The PMI Regulator also provides connections to digital drive I/O as well as digital and analog Flex I/O. The PMI processor scans the I/O ports while the control algorithm is running. This permits the I/O data to be integrated into the control algorithm as required.

The operating system in the PMI processor continuously performs diagnostic checks, displays the results on the LEDs, and stores them in memory locations in the UDC module.

If power to the PMI Regulator is lost, all data as well as the processor’s operating system will be lost. The PMI Regulator continuously monitors its power supply. When the voltages are at the required levels, the DRV RDY LED is on. If the PMI Regulator’s 5V line falls below 4.75V, an on-board monitor circuit generates a local power loss signal. This signal will remain on for a minimum of 40 msec regardless of the state of the 5V line. When this occurs, the processor shuts down, and the PMI Regulator enters a safe power down state. The local power loss signal will turn off 40 msec after the 5V line rises above 4.75V.

2.2.1 PMI Processor Operation

The PMI processor controls all communication within the PMI Regulator and executes the motor control algorithm (see appendices C and D in S-3056). The processor receives drive parameter data, command data, and gain values from the UDC and sends the flux and torque current reference values to the AC power technology circuit. The AC power technology circuit, in turn, performs the calculations required to generate the pulse-width modulated signals that fire the gates in the Power Module.

The PMI processor also transmits I/O values, speed feedback data, and the results of diagnostic tests over the fiber-optic link to the UDC module. In addition, a fixed set of variables can be output to the four ports provided on the motherboard for metering.

The processor contains an on-board watchdog timer that is enabled when power is applied to the PMI Regulator. After the processor has performed its internal diagnostics, the watchdog timer will become idle until it is activated again by the processor's operating system. Once re-activated, the on-board CPU must reset the watchdog timer within a specified time or the PMI processor will shut down. The MCR output on the Resolver & Drive I/O board will then be turned off under hardware control within 0.5 seconds. Power must be cycled to reset the watchdog timer.

Figure 2.4 shows a block diagram of the PMI processor.

2-8 PMI Regulator

Figure 2.4 – PMI Processor Block Diagram

BU

S IN

TE

RFA

CE

AN

D B

UF

FE

R

PR

OM

32 K

BY

16

2 W

AIT

STA

TE

S

RA

M

128

K B

Y 1

6

0 W

AIT

STA

TE

32 B

IT R

ISC

PR

OC

ES

SO

R

16 M

hz

STA

ND

AR

D

LED

IND

ICA

TO

RS

CO

MM

OK

P.M

.FLT

EX

T. F

LT

I/O F

LT

INT

ER

RU

PT

CO

NT

RO

LLE

R

CC

LK C

NT

R

SLO

TS

CO

MM

UN

ICA

TIO

NS

CC

LK C

OU

NT

ER

4 M

hz R

AT

E

1 -

6553

6

PR

ELO

AD

26-P

IN C

ON

N.

PR

OD

UC

TIO

N

TE

ST

PO

RT

INT

ER

RU

PT

S

CLO

CK

SU

BS

YS

TE

M

32 M

hz

16 M

hz

4 M

hz

5V M

ON

ITO

R

DM

A/P

RO

C. I

’FA

CE

CO

MM

.

INT

ER

-

RU

PT

D/A

CO

NV

ER

TE

R

8 B

IT

BIP

OLA

R

+/-

10V

@ 1

0ma

SO

FT

WA

RE

EN

AB

LE

8 -P

OS

ITIO

N

TE

RM

INA

L S

TR

IP

ME

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2.2.2 AC Power Technology Circuit

The AC power technology circuit provides the gate firing signals to control the six power devices in the AC Power Module. This circuit compares the flux current and torque current reference values received from the PMI processor to feedback data received from the Power Module to perform the calculations required to generate the pulse-width-modulated (PWM) signals that fire the gates in the AC Power Module.

The PMI processor sends the torque and flux current references (Iq and Id, respectively) to the AC power technology circuit every UDC scan. The AC power technology section uses these signals as references into two independent control loops (Proportional and Integral function blocks), one for Iq and one for Id. The output of these “PI” blocks can be read by the PMI processor for diagnostic and control purposes.

These current loops are adjusted by three tunable gains in the UDC task, STATOR_R_E4% (stator resistance), STATOR_T_E4% (stator time constant), and CML_WCO% (current minor loop crossover frequency). The output of the torque PI block produces a torque voltage reference, and the output of the flux PI block produces a flux voltage reference.

The torque and flux voltage reference values are used to create three-phase sine waves, which along with the triangle waveform generated by this circuit, are used to generate the PWM signals that fire the gates in the AC Power Module. Harmonic injection is performed to allow the line-to-line output voltage to be increased by 15% for a given input voltage. Interlock circuitry ensures that the upper and lower power devices of one phase (U, V, or W) are never turned on at the same time.

The AC power technology circuit includes a field-programmable gate array (FPGA) which is configured at power-up or after a reset signal has been asserted by the PMI processor. An FPGA configuration failure will prevent the DRV RDY LED from turning on. After the operating system has been downloaded from the UDC module, diagnostics are performed on the AC power technology circuit. If any of these diagnostics fails, the DRV RDY LED will turn off.

If any drive faults are detected, the gate signals are turned off. Gate power is also removed 0.5 seconds after the RPI signal to the Resolver & Drive I/O board is removed.

In addition, the circuitry monitors the Regulator board’s power supplies. If any of the power supplies drop below the required level, the gates are disabled, the pre-charge enable signal is removed, and the drive is shut down.

The power technology circuit includes a watchdog timer which is reset by the PMI processor. If the watchdog is not reset within a specified time, it will time out. If a time-out occurs, the gates are disabled. To recover from a watchdog time-out, power must be cycled to the PMI Regulator. Bit 11 of UDC dual port register 202/1202 is set if the watchdog times out

A functional block diagram of the AC power technology circuit is shown in figure 2.5.

2-10 PMI Regulator

Figure 2.5 – AC Power Technology Circuit Block Diagram

BU

SIN

TE

RFA

CE

LOG

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CA

RD

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2.2.3 Power Module Interface Connector Signals

The 50-pin Power Module Interface connector is used for drive feedback signals as well as for gate firing, power supply, and pre-charge contactor control signals. Figure 2.6 shows the pinout for the Power Module Interface connector. The signals are described in the following sections.

+5V 50 49 +5V

DGND 48 47 DGND

I12V_RTN 46 45 ISO_12V

+24V 44 43 -15V

-15V 42 41 +15V

+15V 40 39 +5V

+5V 38 37 +5V

CVERIFY 36 35 PILOT

EE_CS 34 33 EE_SK

EE_IO 32 31 /CHARGE

AC_LINE 30 29 DESAT

GND_SHRT 28 27 POS_BUS

NEG_CAP 26 25 NEG_BUS

DGND 24 23 W_VOLTS

V_VOLTS 22 21 U_VOLTS

W_AMPS– 20 19 W_AMPS+

U_AMPS– 18 17 U_AMPS+

W_NEG– 16 15 W_POS–

V_NEG- 14 13 V_POS–

U_NEG– 12 11 U_POS–

W_NEG+ 10 9 W_POS+

V_NEG+ 8 7 V_POS+

U_NEG+ 6 5 U_POS+

DGND 4 3 DGND

DGND 2 1 DGND

Figure 2.6 – PMI Connector Pinout

2-12 PMI Regulator

2.2.3.1 Digital Grounds

2.2.3.2 Gate Drivers

The power technology circuit provides the gate firing signals to control the six IGBTs in the Power Module. Gate firing is controlled by two complimentary signals (e.g., U_POS+ and U_POS–), which are the inverse of each other. The positive and negative sets of signals fire the gates for the upper and lower IGBTs, respectively.

If any drive faults are detected (register 202/1202), the gate signals are turned off. The +5V gate power is switched so that if the power technology circuit malfunctions or the watchdog times out, the power to the gates is removed. Gate power is also removed 0.5 seconds after the RPI signal on the Resolver & Drive I/O board is removed.

2.2.3.3 Motor Current Feedback

Motor current feedback is used for the following purposes:

• Torque loop feedback

• Id and Iq current minor loops

• IET fault input

• Current limit detection

Pin 1: DGND

Pin 2: DGND

Pin 3: DGND

Pin 4: DGND

Pin 24: DGND

Pin 47: DGND

Pin 48: DGND

Pin 5: U_POS+ Phase U positive gate firing signal

Pin 6: U_NEG+ Phase U negative gate firing signal

Pin 7: V_POS+ Phase V positive gate firing signal

Pin 8: V_NEG+ Phase V negative gate firing signal

Pin 9: W_POS+ Phase W positive gate firing signal

Pin 10: W_NEG+ Phase W negative gate firing signal

Pin 11: U_POS– Phase U inverse positive gate firing signal

Pin 12: U_NEG– Phase U inverse negative gate firing signal

Pin 13: V_POS– Phase V inverse positive gate firing signal

Pin 14: V_NEG– Phase V inverse negative gate firing signal

Pin 15: W_POS– Phase W inverse positive gate firing signal

Pin 16: W_NEG– Phase W inverse negative gate firing signal

Pin 17: U_AMPS+ AC output current - Phase U

Pin 18: U_AMPS– AC output current - Phase U Common

Pin 19: W_AMPS+ AC output current - Phase W

Pin 20: W_AMPS– AC output current - Phase W Common


Circuitry on the PMI Regulator converts the current feedback from three-phase sinusoidal currents (Iu, Iw) to DC quadrature torque (Id) and flux (Iq) currents. The AC-to-DC hardware conversion eliminates the need for the PMI processor software to do this calculation.

The maximum rated current will result in a 2.5 volt (peak) feedback signal. A 5 volt feedback signal indicates an instantaneous overcurrent fault (IET). Bit 3 of Drive Fault register 202/1202 will be set if an overcurrent fault is detected.

The measured RMS motor current feedback is displayed in amps in UDC register 210/1210 (I_FB%) and in counts in register 211/1211 (I_FBN%). The Id (magnetizing current) component of the current feedback is displayed in counts in register 212/1212 (ID_FBN%). The Iq (torque-producing) component of the current feedback is displayed in counts in register 213/1213 (IQ_FBN%).

2.2.3.4 Motor Voltage Feedback

Motor voltage feedback is used for the following purposes:

• Diagnostics

• Flux minor loop

The line-to-line motor voltage signals are conditioned by precision analog integrators and scaled for use in the regulator’s A/D converter. The PMI processor calculates the flux reference using the integrated motor voltage feedback when the programmer selects constant power during parameter entry. The measured RMS motor voltage is scaled in volts and stored in register 209/1209 of the UDC module’s dual port memory.

2.2.3.5 DC Bus Voltage Feedback

DC bus voltage feedback is used for:

• DC bus overvoltage detection

• DC bus undervoltage detection

• DC bus voltage ripple detection

• User’s applications

The system provides DC bus overvoltage protection through both hardware and software. If the DC bus voltage exceeds the value of the local tunable OVT_E0%, the system will set bit 0 in the Drive Warning register (register 203/1203). If the power technology circuit detects that DC bus voltage exceeds 396V for 230 VAC Power Modules, 789V for 460 VAC Power Modules, or 986V for 575 VAC Power Modules, the drive is shut down and bit 0 is set in the Drive Fault register (register 202/1202).

Pin 21: U_VOLTS Motor voltage - phase U

Pin 22: V_VOLTS Motor voltage - phase V

Pin 23: W_VOLTS Motor voltage - phase W

Pin 25: NEG_BUS Voltage on the negative side of the DC bus

Pin 26: NEG_CAP Not Applicable

Pin 27: POS_BUS Voltage on the positive side of the DC bus

2-14 PMI Regulator

The system also warns of a DC bus undervoltage condition if the DC bus voltage drops below the value of local tunable UVT_E0%. The system will set bit 1 in the Drive Warning register (203/1203) if an undervoltage condition is detected.

A drive fault is generated (register 202/1202, bit 6) and the drive is shut down if the DC bus voltage drops below the value stored in the Power Loss Fault Threshold local tunable (PLT_E0%).

DC bus voltage ripple is monitored to detect an input phase loss in the rectifier section of a three-phase AC input. However, this function can also be used with a common bus supply. If the ripple exceeds the value stored in local tunable VRT_E0%, bit 3 will be set in the Drive Warning register (register 203/1203).

The DC bus voltage is displayed in volts in UDC register 206/1206 (BUS_VDC%).

Bus voltage is measured across the bus capacitors and is resistively isolated before it is sent to the power technology circuit.

2.2.3.6 Ground Current Feedback

The power technology circuit monitors the analog ground current feedback signal through hardware and software to determine if the ground current is at a warning or a fault level. The input signal is fed into a hardware comparator which will generate a drive fault (register 202/1202, bit 2) and shut down the drive if the ground current exceeds 20A for Power Modules A001/Q001 and A003/Q003, or 100A for all other Power Modules.

The signal is also converted to a digital value and compared to the ground fault warning threshold (GIT_E1%) local tunable. A drive warning is issued (register 203/1203, bit 2) if this threshold is reached.

Ground current feedback is displayed in amps in register 208/1208 (GI_FB%).

2.2.3.7 DESAT

The DESAT signal is used to indicate an overcurrent in one of the output power devices (IGBTs). If an overcurrent is detected, the gate driver will shut off the IGBT to prevent its destruction. Register 204, bit 6 (Inverter Power Device Fault) and register 202, bit 3 (Instantaneous Overcurrent Fault) will be set.

2.2.3.8 AC Line Feedback

The AC_LINE signal is used on drives larger than 30 HP to indicate the presence or absence of the incoming AC line voltage.

Pin 28: GND_SHRT Ground current

Pin 29: DESAT

Pin 30: AC_LINE AC line voltage


2.2.3.9 DC Bus Pre-Charge

The DC bus pre-charge enable signal is used to control the phase advance SCRs in large AC input units to limit the rate of charge on the bus capacitors. This signal is also used to close the pre-charge contactor (SCR) when the bus voltage is greater than the undervoltage threshold level and has reached a steady state.

0V commands the pre-charge to close. +5V commands the pre-charge to open.

2.2.3.10 EE ROM Signals

These signals are used for Power Module parameter storing EE ROM.

2.2.3.11 N-Contactor

PILOT is driven high to pick up an external N-contactor.

2.2.3.12 Power Supply

These voltages are supplied to the PMI Regulator by the gate driver/power supply board.

Pin 31: /CHARGE Pre-charge Enable

Pin 32: EE_IO Not Applicable

Pin 33: EE_SK Not Applicable

Pin 34: EE_CS Not Applicable

Pin 35: PILOT Not Applicable

Pin 36: CVERIFY Not Applicable

Pin 37: +5V

Pin 38: +5V

Pin 39: +5V

Pin 40: +15V

Pin 41: +15V

Pin 42: -15V

Pin 43: -15V

Pin 44: +24V

Pin 45: ISO_12V Isolated 12V power supply

Pin 46 I12V_RTN Isolated 12V power supply return

Pin 49: +5V

Pin 50: +5V

2-16 PMI Regulator

2.2.4 Synchronous Transfer Port

The synchronous transfer port is reserved for future use of the synchronous transfer function. However, connections may be made to three pins in order to measure real-time current feedback. Figure 2.7 shows the pinout for the Synchronous Transfer connector.

Pins 7 and 8 are resistor-isolated copies of the analog motor current feedback signals. These signals may be temporarily connected to an oscilloscope or high-speed strip chart recorder to aid in start-up, tuning, or troubleshooting. Pin 4 is connected to circuit common and should be used as the ground reference. These signals are not isolated and pin 4 connects directly to the internal circuit common. Keep lead lengths short and use isolated instruments to avoid introducing noise into the Regulator.

Important: These signals should not be permanently connected and should not leave the cabinet.

Do not connect anything to pins 1, 2, 3, 5, and 6. These pins are reserved for future functionality. Connecting to them may cause improper system operation.

!ATTENTION:Do not connect anything to pins 1, 2, 3, 5, and 6 of the Synchronous Transfer Connector. Connecting to these pins could result in improper system operation. Failure to observe this precaution could result in damage to equipment and bodily injury.

Figure 2.7 – Synchronous Transfer Port Connector Pinout

COM

BC

AB

IN

COM

VW

UV

IU

IW

O

U

T

SEE ATTENTION

SEE ATTENTION

SEE ATTENTION

SEE ATTENTION

SEE ATTENTION

GROUND

PHASE U CURRENT MONITOR

PHASE W CURRENT MONITOR

1

2

3

4

5

6

7

8


2-18 PMI Regulator

CHAPTER 3Resolver & Drive I/O Board

The Resolver & Drive I/O board (B/M O-60067) converts analog sine and cosine resolver feedback signals into digital format for use within the application program. An external strobe input is also provided to permit a user-generated signal to latch the resolver position data. The board self-tunes to compensate for varying lengths and types of resolver wiring. Distributed Power Systems are designed to be used with the standard resolvers described in Appendix B.

The Resolver & Drive I/O board provides an analog input connection that can be used for an analog tachometer or other user input device. It also provides digital I/O connections which can be used for standard drive-related signals, such as motor thermal overload.

For applications using the V/Hz regulator, the board may be supplied with Drive I/O funtionality only (B/M O-60068).

The following sections provide mechanical and electrical descriptions of the Resolver & Drive I/O board. Figures 3.12 and 3.13 at the end of this chapter show functional block diagrams of the two versions of the board.

3.1 Resolver & Drive I/O Board Mechanical Description

The Resolver & Drive I/O board is a printed circuit board assembly that mounts on standoffs above the PMI Regulator motherboard. The board consists of the resolver and drive I/O circuitry, a 48-pin DIN style backplane connector that interfaces to the PMI Regulator motherboard, and two connectors for the resolver and drive I/O. The board is fastened to the standoffs at its four corners. Board dimensions are listed in Appendix B.

Figure 3.1 – Resolver & Drive I/O Board

DRIVE I/OCONNECTOR

RESOLVER FEEDBACKCONNECTOR

BACKPLANECONNECTOR

Resolver & Drive I/O Board 3-1

The 14-pin Resolver Feedback connector is used to bring the resolver signal into the PMI Regulator. This connector will also accept a signal from an analog tachometer or other analog field device as long as the signal is within the correct voltage range. In addition, there is a 24V digital input that serves as a strobe for latching the resolver position externally.

Both a resolver and an analog tachometer may be connected to the board. However, only the resolver can be used for speed feedback. The speed feedback type is selected during UDC parameter configuration. (See the SA3100 Drive Configuration and Programming instruction manual, S-3056.)

The 18-pin Drive I/O connector is used to attach drive-related or other digital I/O devices to the PMI Regulator. Six digital inputs and two digital outputs are provided. Five of the inputs and one of the outputs are user-programmable.

Refer to chapter 5 for information on cables and cable part numbers.

The status of the resolver feedback signal and the drive I/O is displayed in the UDC’s I/O Status register (201/1201) and on the nine LEDs listed below. The indications given by these LEDs are described in section 2.1.6. Refer to the SA3100 Drive Configuration and Programming instruction manual for a description of the I/O Status register.

3.2 Resolver & Drive I/O Board Electrical Description

The Resolver & Drive I/O board receives its power from the PMI Regulator motherboard. The board contains a fuse on its 5V input. If this fuse blows, the board has failed and must be replaced. Bit 9 of the Drive Fault register (202/1202) will be set if an open fuse is detected.

The following sections provide electrical descriptions for the resolver input, analog input, and digital drive I/O circuitry.

3.2.1 Resolver Input

The Resolver Feedback connector is used for both resolver input and analog input signals. The Resolver Feedback connector pinout is shown in figure 3.2.

• FDBK OK • RPI • MCR • AUX IN1 • AUX IN2

• AUX IN3 • AUX IN4 • AUX IN5 • AUX OUT

3-2 PMI Regulator

The Resolver & Drive I/O board contains a tracking ratiometric resolver-to-digital (R/D) converter that outputs a 12- or 14-bit digital number indicating the absolute electrical position of the resolver shaft. The resolution of the R/D converter is selected during parameter entry. A two-bit revolution counter extends operation over four electrical revolutions. The counter is reset whenever power is turned on to the system or a system reset command is asserted by the PMI processor. When 12-bit mode is selected, the resolver data format will be as shown in figure 3.3. Figure 3.4 shows the resolver data format when 14-bit mode is selected.

The Resolver & Drive I/O board produces a nominal 26 volt rms 2381 Hertz sine wave reference output signal which is capable of driving a 500 ohm load. The stator signals (sine and cosine) are input through a matched isolation transformer pair. The transformers are matched for gain and phase shift. The ratio of the sine and cosine amplitudes is then converted to an angular position. Position data is sent to the UDC module by the PMI processor before every scan of the UDC task. The UDC task calculates speed using this position data.

Figure 3.2 – Resolver Feedback Connector Pinout

Figure 3.3 – Resolver Data Format (12-Bit Mode)

Figure 3.4 – Resolver Data Format (14-Bit Mode)

Reference Out (+)

Reference Out (-)

Sine Input (+)

Cosine Input (+)

External Strobe Input (+)

External Strobe Input (-)

Not Used

Not Used

Analog Input (+)

C

F

K

N

R

A

B

D

E

H

J

L

M

P

Sine Input (-)

Cosine Input (-)

Key Pin

Analog Input (-)

Analog Input Shield

1

1

1

1

1

1

1

1

1. These signals are not used on the Drive I/O only (no feedback) board.

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0bits

revolution counter

resolver data 0 0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0bits

revolution counter

resolver data


The Resolver & Drive I/O board supports two methods of sampling the digital position of the resolver. In the first method, the position is sampled once per UDC task scan at the rate defined in the SCAN_LOOP control block in the UDC task. This block tells the UDC task how often to run based on the CCLK signal on the AutoMax rack backplane. The PMI processor sends the position data to the UDC module immediately before it is needed by the UDC module for the next UDC task scan. Position data measured using this method is stored in the UDC module’s dual port register 215/1215 in the format shown in figure 3.3 or 3.4.

The second method allows position sampling between scans or when an external event occurs by using an external strobe. The Resolver & Drive I/O board provides an isolated 24 volt DC input with a relatively high degree of filtering (approximately 800 Hz). The external strobe input circuit is shown in figure 3.5.

Figure 3.6 shows the relationship between the time the external strobe is detected and the point at which the resolver position is sampled. Response time is subject to temperature, component tolerance, and input voltage level. Note that the input signal pulse width should be greater than 300 µsec and the frequency should be less than 1000 pulses per second.

Figure 3.5 – External Strobe Input Circuit

+

-EXTERNALSTROBEINPUT

300

300.33uF

2.55K

1.24K

5K

Vcc

681K 10K

TOMICRO-PROCESSOR

14K

.01uF

681K 475K

Figure 3.6 – External Strobe Input Circuit Timing Diagram

EXT. STROBEINPUT

RESOLVERPOSITIONLATCHCOMMAND

24 V NOM

Tpw

Td

Td

Tper

Td - 250 mSEC TYP.Tpw - 300 mSEC MIN.Tper - 1000 mSEC MIN.

3-4 PMI Regulator

Strobe input detection is enabled by setting bits 8 and/or 9 in UDC register 101/1101. The resolver position can be sampled on the strobe input’s rising edge, falling edge, or both. Latched data is sent to the UDC module immediately before it is needed by the UDC module for the next UDC task scan. Note that the PMI operating system detects only one edge per UDC scan. If you choose to have the resolver position sampled on both edges of the strobe’s input, the leading edge will be detected in one scan and the falling edge in the next scan. Position data measured using this method is placed in UDC register 216/1216 in the format shown in either figure 3.3 or 3.4.

Bit 8 of UDC register 201/1201 is set to indicate that the strobe signal has been detected. This bit is set for only one scan to allow a strobe to be detected every scan. The UDC task must check this bit each scan to ensure the validity of the strobe data in register 216/1216. Bit 9 of register 201/1201 is set or cleared when the external strobe is detected and indicates whether the strobe level was rising (1) or falling (0). Both methods of sampling resolver position (i.e., time-driven and event-driven) may be used simultaneously.

3.2.1.1 Resolver Feedback Precautions

The user must determine the maximum safe operating speed for the motor, connected machinery, and material being processed. Then the user must either verify that the system is incapable of reaching that speed, or ensure that the correct overspeed parameter value has been entered during configuration.

Loss of Resolver Feedback

If resolver feedback is lost, induction motors will rotate close to their slip frequency. But because the PMI Regulator is receiving no speed feedback, it will continue to provide current to the motor, which will not appear to be responding. It is recommended that the programmer use the THERMAL OVERLOAD control block in the UDC task to provide additional protection against overheating of the motor that can result from loss of resolver feedback. This block can also protect against overheating of the Inverter’s Power Module due to sudden increases in current. Refer to the Control Block Language instruction manual, J-3676, for more information.

Resolver Restrictions

The Resolver & Drive I/O board cannot discriminate between X1, X2, and X5 resolvers. It only detects electrical rotations. One mechanical rotation is equivalent to one electrical rotation for an X1 resolver, two electrical rotations for an X2 resolver, and five electrical rotations for an X5 resolver. The practical limit of electrical speed that the board can detect is dependent both upon the resolver selected and upon the resolution selected during drive parameter configuration. See Appendix B.

3.2.1.2 Resolver Calibration

The resolver input can be used with X1, X2, and X5 resolvers with cable distances as shown in chapter 8 chapter 5 of this manual without having to externally tune the cable. Cable recommendations are given in chapter 5.

!ATTENTION:The user is responsible for ensuring that driven machinery, all drive train mechanisms, and the material in the machine are capable of safe operation at maximum speeds. Failure to observe these precautions could result in bodily injury and in damage to, or destruction of, the equipment.


The Resolver & Drive I/O board contains circuitry to synchronize the reference waveform to within 10 degrees of the returning waveforms. This synchronization corrects for any phase shift which can occur between the reference and stator signal (i.e., stator signals lagging the reference) and can increase as the cable length increases. This is done automatically at power up after the PMI processor receives the configuration data from the UDC module informing it that a resolver has been selected for speed feedback.

The Resolver & Drive I/O board incorporates calibration procedures to adjust the gain to the proper level and balance the sine/cosine waveforms. These procedures should be initiated during initial system installation, if the resolver is replaced, or if the resolver cabling is changed (e.g., the cable is lengthened, shortened, or a different cable type is used). After the calibration procedures are performed, the gain and balance values are sent, along with other feedback data, to the UDC module to be stored for use at subsequent power ups. The values are stored in local tunables with the reserved names RES_BAL% and RES_GAN%.

Note that Distributed Power Systems are designed to be used with the standard resolvers described in Appendix B. The validity of the results of these calibration procedures is not guaranteed if resolvers other than those described in Appendix B are used.

Gain Calibration

The gain calibration is performed when the value stored in RES_GAN% equals zero (i.e., at initial system start up or by setting the value to zero). This procedure may be performed while the resolver is turning or stationary. Do not perform this procedure while the minor loop is running (i.e., bit 0 of register 200/1200 is set) or a drive fault will be generated (register 202/1202, bit 8). The procedure adjusts the gain to bring the stator voltages to a nominal 11.8 VAC at the board’s input. The range of the gain adjustment is 0-37 VAC at the rotor with a resolution of 0.15V. The nominal value is 26 VAC. When the gain calibration procedure is completed, bit 6 of UDC register 201/1201 will be set, and the gain value will be stored in RES_GAN%. Large gain values (close to 255) may indicate a problem with the resolver wiring or connections. Always check the value stored in RES_GAN% after the gain calibration procedure has been completed.

Note that the resolver must be connected to the motor in order for this procedure to be completed. If the system determines a maximum gain value (255) and detects a broken wire (indicated by bit 8, register 202/1202) while attempting to tune the gain, it will assume that a resolver is not connected. When the broken wire bit is cleared by the operating system (indicating that a resolver has been connected), the gain calibration will automatically re-start. If bit 6 of register 201/1201 is not set, then the calibration procedure has not been completed.

Balance Calibration

The balance calibration procedure is initiated by setting UDC register 101/1101, bit 6 (RES_CAL@) after turning the drive on. It takes from a few seconds to one minute to complete. This procedure must be performed while the resolver is rotating at one-half base speed ( 5 RPM minimum speed; speed does not have to be constant). The faster the resolver is turning, the faster the calibration procedure will be performed. Balance calibration compensates for different cable lengths or characteristics. One twisted-pair wire can yield more or less capacitance than another twisted-pair wire of the same length. Therefore, one channel could have more or less voltage on it than the other. If each stator has different capacitance on it, different response curves result. These curves should be equal for optimum performance.

3-6 PMI Regulator

The balance calibration procedure minimizes oscillations that occur due to imbalances between channels by adding capacitance to the sine or cosine channel. The board calculates the capacitance value which yields the smallest velocity variations with sine/cosine magnitudes within 1% of each other. Due to the characteristics of the cable or to noise problems, it is possible that the magnitudes will not be within 1% of each other. In this case, the board will calculate the capacitance value that minimizes velocity variations. When the balance calibration procedure is completed, bit 7 of UDC register 201/1201 will be set, and the balance value will be stored in RES_BAL%. If the sine/cosine magnitudes are not within 5% of each other, bit 5 of UDC register 203/1203 (Tuning Aborted Warning) will also be set.

Checking Calibration Procedure Results

As described previously, bits 6 and 7 of UDC register 201/1201 will be set to indicate the gain and balance calibration procedures, respectively, have been completed. These bits do not indicate that the procedures were successful or that the resulting values are valid. After each test, check the value stored in the local tunables RES_GAN% and RES_BAL%. If the value is near or at its maximum value, it may indicate a problem. Refer to the SA3100 Drive Configuration and Programming instruction manual (S-3056) for more information about these local tunables.

After the balance test, check the Tuning Aborted Warning bit (bit 5, UDC register 203/1203). This bit will be set if the balance calibration procedure was unsuccessful or yielded unexpected results. Failures may be caused by leaving the resolver unconnected during the procedure or using cable runs beyond the recommended lengths (see chapter 5). Calibration procedure failures will not prevent the operation of the drive.

3.2.2 Analog Input

The Resolver Feedback connector is used for both resolver input and analog input signals. Refer to figure 3.2 for the connector pinout.

The analog input operates over the range of +/-10V differential (+/-30V common mode). It is the user’s responsibility to ensure that the input signal is scaled to conform to this range. The input is bandwidth-limited to 300 Hz nominal. The resolution of the input is 12 bits (11 bits plus sign) or 4.88 mV per bit. The input impedance is 1.3 megohms and is resistively isolated. If an analog tachometer is not used, the input may be used for other purposes as long as the signal is within the correct voltage range. The PMI processor sends the analog input data to the UDC module immediately before it is needed by the UDC module for the next UDC task scan. The analog input data is stored in UDC register 214/1214. The value may range from -2047 (-10 volts) to +2047 (+10 volts).


3.2.3 Drive I/O

The digital drive I/O operates with 115VAC (50/60Hz) nominal line voltage. All input and output channels have isolated commons with an isolated voltage rating limited to 150VAC. All inputs and outputs have isolation voltage ratings of 1500 volts between the I/O and the PMI Regulator’s power supplies. See figures 3.8 through 3.10 for the input and output circuit diagrams.

The RPI input and the MCR output are interlocked in hardware on the board. The MCR output is activated only when the RPI is asserted and the MCR output is being commanded on by the PMI processor. The PMI Regulator will begin the process to turn off the MCR output when any of the following conditions occurs:

• The RPI input signal is removed

• A drive fault occurs

• The torque control algorithm is turned off (TRQ_RUN = 0)

Figure 3.7 – Analog Input Circuit

+

–

312K

+12 V

20K

ANALOG+

1.04M

312K

1.04M

ANALOG -

AGND

TO A/DSUBSYSTEM

6800 pF

ANALOG SHIELD

.1 uF

-12 V

DGNDAGND

.33 uF

10K

THESE COMPONENTSARE ON THE PMIBACKPLANE

THIS CONNECTIONIS MADE CLOSETO POWER SUPPLYAGND

3-8 PMI Regulator

After any of these events, the PMI processor will wait until it detects that current feedback is less than 2% of rated motor current multiplied by the motor overload ratio. If this current level has not been reached within 300 msec, the PMI processor will turn off the MCR output regardless.

If the RPI signal is removed, the MCR output will be turned off and gate power will be removed under hardware control within approximately 0.5 second to provide an additional level of protection.

The user has the option of having an M-contactor on the output of the drive (i.e., an output contactor). This option is available during UDC parameter configuration. The M-contactor is controlled by the MCR output, which is under the control of the PMI processor. If the choice is made to connect the MCR to the output contactor, the contacts must be wired to the AUX IN1/MFDBK input. The system will then wait for MFDBK to turn on before executing the control algorithm. If this configuration choice is not made, the AUX IN1 input can be used for any user-designated purpose.

The status of the drive I/O is indicated in UDC register 201/1201 and by eight of the PMI Regulator status LEDs. In the event of a power loss or a system reset command initiated by the PMI processor, all outputs are turned off.

Figure 3.8 – Auxiliary Input Circuit

Figure 3.9 – Run Permissive Input (RPI) Circuit

330 15K

182

AUX INPUTS

DIGITALOUT TOMICROPROCESSOR

.1uF

13K

RPI INPUT

.0033uF

2.2uF

12mA Pk+

–

DIGITAL OUTTO MICROPROCESSORAND MCR RELAY

.0033uF

100


The Drive I/O connector pinout is shown in figure 3.11

Figures 3.12 and 3.13 show block diagrams of the Resolver & Drive I/O board (B/M O-60067) and the Drive I/O only board (B/M O-60068).

Figure 3.10 – MCR and Auxiliary Output Circuit

Figure 3.11 – Drive I/O Connector Pinout

.0033uF

+

–

.0033uF

DELAYED RPIMICROPROCESSOR

MCR AND AUX OUTPUTS

1K

.1uF 1 M

RPI IN (+)

AUX IN2 (+)

AUX IN1/MFDBK (+)

AUX IN3 (+)

AUX IN4 (+)

AUX IN5 (+)

MCR OUT (+)

AUX OUT (+)

Key Pin

A

C

E

H

K

M

P

S

U

B

D

F

J

L

N

R

T

V

RPI IN (-)

AUX IN1/MFDBK (-)

AUX IN2 (-)

AUX IN3 (-)

AUX IN4 (-)

AUX IN5 (-)

MCR OUT (-)

AUX OUT (-)

Not Used

3-10 PMI Regulator

Figure 3.12 – Resolver & Drive I/O Block Diagram

BA

CK

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3

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4

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5

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Figure 3.13 – Drive I/O Only Block Diagram

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3-12 PMI Regulator

CHAPTER 4Flex I/O Interface

The Flex I/O interface provides the hardware connection between the PMI processor and the Flex I/O modules that are used to read and write analog and digital data to or from external devices. Flex I/O plugs into a terminal base and is mounted on DIN rails. The terminal bases plug into each other to connect and daisy-chain power and communication signals.

Module numbering is used to determine where in the UDC memory map the I/O data is placed. Modules 0 and 1 must be digital I/O. Module 2 can be digital or analog I/O. Module numbering is determined by the physical location on the DIN rail. Cable connection from the PMI Regulator to the Flex rail is at the right side of the rail. Module numbering is done right to left on the DIN rail.

The farthest right (closet to the cable) digital I/O module is Module 0, the next digital I/O module to the left is Module 1. Only one analog I/O module can be used, and it is always Module 2. Module 2 is always the farthest module from cable. If an analog module is used it MUST be the farthest module from the cable connection. When the operating system reads an analog module, it will not read any more modules.

Shown below are four possible legal physical location combinations and their module numbering:

LEGAL COMBINATIONS OF FLEX I/O:

Interface Cable Interface Cable

MOD 2 MOD 1 MOD 0 MOD 1 MOD 0

DIGITALI/O

DIGITALI/O

DIGITALI/O

DIGITALI/O

DIGITALI/O



ANALOGI/O

DIGITALI/O

ANALOGI/O

DIGITALI/O

DIGITALI/O

Flex I/O Interface 4-1

Shown below are two examples of illegal physical location combinations and their module numbering:

ILLEGAL COMBINATIONS OF FLEX I/O:

The Flex I/O modules supported by the SA3100 PMI Regulator are listed in table 4.1. Refer to the appropriate Flex I/O instruction manuals for specific information about the Flex I/O modules used in your system.



DIGITALI/O

ANALOGI/O

DIGITALI/O

DIGITALI/O

ANALOGI/O

Module 1 will not be read. Module 0 will not be read.

Table 4.1 – Supported Flex I/O Modules

Module Type Catalogue Number Publication Number

Digital 24V DC

16 Point DC Sink Input 1794-IB16 1794-5.4

16 Point DC Source Output 1794-OB16 1794-2.3

16 Point DC Source Input 1794-IV16 1794-5.28

16 Point DC Sink Output 1794-OV16 1794-5.29

10 Input / 6 Output DC Combo 1794-IB10XOB6 1794-5.24

Digital 120V AC

8 Point AC Input 1794-IA8 1794-5.9

8 Point AC Output 1794-OA8 1794-5.10

Analog

8 Point Analog Input 1794-IE8/B 1794-5.6

4 Point Analog Output 1794-OE4/B 1794-5.5

4 Input / 2 Output Analog 1794-IE4XOE2/B 1794-5.15

Relay

8 Point Relay Output 1794-OW8 1794-5.19

4-2 PMI Regulator

4.1 Flex I/O Interface Mechanical Description

The Flex I/O interface consists of:

• A serial bus master (SERBUS) chip that controls the operation of the Flex I/O module via software commands from a main processor. This IC performs all the controlling functions occurring on the Flex I/O module. It also contains a dual-port memory, which provides both the PMI processor and the Flex I/O modules access to the same memory locations.

• EMI, ESD filtering and suppression components for each signal entering or exiting the Flex I/O module through the I/O cable connector.

• A 20-pin sub-miniature D-shell connector for the Flex I/O cable that connects to the Flex I/O modules.

• A Generic Array Logic (GAL) chip for miscellaneous logic functions.

4.2 Flex I/O Interface Electrical Description

The transfer of data between the Flex l/O modules and the PMI Regulator dual-port memory is coordinated by the serial bus master (SERBUS) IC. The SERBUS addresses an I/O module, transfers data first from the I/O module to the dual-port memory, and then from the dual-port memory to the I/O module. The SERBUS then moves on to the next available I/O module. This process is repeated until all I/O modules have been serviced, at which point the entire cycle is repeated, beginning again with the first module. If one or more of the I/O modules is missing, the SERBUS will simply move on to the next available I/O module.

A block diagram of the Flex I/O interface is shown in figure 4.1.

Figure 4.1 – Flex I/O Interface Block Diagram

ASIC

PROCESSORCONNECTOR

FLEX BUSCONNECTOR

MISC.LOGIC

ADDR,DATA, CNTRL

DISCRETEFILTER &PULLUP

COMPONENTS

FLEX I/O INTERFACE

+5VDC @ 1A

Flex I/O Interface 4-3

4.3 Flex I/O Error Detection

The PMI Regulator’s I/O Fault LED (I/O FLT) will light to indicate that communication between Flex I/O and the PMI processor has been disrupted, or that Flex I/O has been configured but is not plugged in.

Registers 0-23 in the UDC module are used for Flex I/O configuration and diagnostics. Register 10/22 provides Flex system status, as well as Module 0 and Module 1 status and error codes. Register 11/23 provides Flex Module 2 error codes. If a Flex I/O communication problem is detected, bit 13 in the Drive Warning register (203/1203) will be set.

Flex I/O errors do not cause the drive to shut down. The user must ensure that the application task tests the Flex I/O error code registers and forces appropriate action in the event of a Flex I/O error. In case of error, check wiring and connections. Replace the Flex I/O module if errors reoccur.

Refer to the SA3100 Drive Configuration and Programming instruction manual (S-3056) for a description of the Flex I/O status and error bits.

4-4 PMI Regulator

CHAPTER 5Installation Guidelines

This section provides guidelines for wiring and cabling and for installing I/O modules and peripherals. This section provides general guidelines only. Always refer to the wiring diagrams supplied with your system for specific installation information.

5.1 Wiring Guidelines

The user must ensure that the installation of wiring conforms to all applicable codes. To reduce the possibility of noise interfering with the control system, exercise care when installing wiring from the system to external devices. For detailed recommendations, refer to IEEE Standard 518.

5.2 PMI Regulator Motherboard Connections

Observe the guidelines described in the following sections when making connections to the PMI Regulator’s motherboard.

!ATTENTION:Only qualified electrical personnel familiar with the construction and operation of this equipment and the hazards involved should install, adjust, operate, or service this equipment. Read and understand this manual and other applicable manuals in their entirety before proceeding. Failure to observe this precaution could result in severe bodily injury or loss of life.

ATTENTION:DC bus capacitors retain hazardous voltages after input power has been disconnected. After disconnecting input power wait five (5) minutes and check the voltage of the DC bus to ensure the DC bus capacitors are discharged before touching any internal components. Failure to observe this precaution could result in severe bodily injury or loss of life.

ATTENTION:The user is responsible for conforming with all applicable local, national, and international codes. Failure to observe this precaution could result in damage to, or destruction of, the equipment.

ATTENTION:The circuit boards of the PMI Regulator contain static-sensitive components. Do not touch the circuit boards or their connectors without proper ESD handling equipment. When not installed, circuit boards should be stored in anti-static bags. Failure to observe this precaution could result in damage to, or destruction of, the equipment.

Installation Guidelines 5-1

5.2.1 Fiber-Optic Cabling

Refer to the Distributed Power System Fiber-Optic Cabling instruction manual (S-3009) for the procedure required to install and test the fiber-optic cable between the PMI Regulator and the UDC module.

The PMI Regulator is shipped with dust caps covering the fiber-optic ports. The dust caps should not be removed until the fiber-optic cables are installed and should be replaced if the cables are disconnected.

5.2.2 Meter Port Wiring

A removable terminal block connector is used to connect analog devices to the PMI Regulator. Disconnect the terminal block connector from the module and use 2.08 – 0.326 mm2 (14-22 AWG) twisted wire to connect the devices to the terminal block. Common leads may be tied together or run separately. The maximum wire length is 4 meters (13 feet). Figure 5.1 illustrates the meter port connections.

5.2.3 Connecting Flex I/O Modules

Flex I/O is connected to the PMI Regulator’s Flex I/O connector using an I/O Interconnect Cable (Cat. # 4100-CCF3). The Flex I/O modules mount on a DIN rail and connect together in a daisy-chain arrangement using built-in connectors. Refer to the instruction manuals accompanying your Flex I/O modules for the specific installation and wiring procedures for your equipment.

!ATTENTION:Turn off, lock out, and tag power to both the rack containing the UDC module and to its corresponding PMI Regulator before viewing the fiber-optic cable or transmitter under magnification. Viewing a powered fiber-optic transmitter or connected cable under magnification may result in damage to the eye. For additional information refer to ANSI publication Z136.1-1981.

Figure 5.1 – Meter Port Connections

5-2 PMI Regulator

5.3 Resolver & Drive I/O Board Connections

Two cables are provided with your system for connection to the Resolver Feedback and Drive I/O connectors. The cable part numbers are stamped onto the cables and should be compared to the wiring diagrams shipped with your system. The following sections describe the connections to the Resolver & Drive I/O board.

5.3.1 Connecting Resolver Feedback and Analog Input

Resolver and Analog Input cable #612426-S is provided for connection between the resolver feedback connector and eight- or six-point terminal blocks. The eight-point terminal block is used for resolver connections. The six-point terminal block is used for analog input connections. Connector cable #612568-S is available for terminal block connections for analog input only.

For DIN rail connection, cable #612570-S is provided for resolver feedback and analog input. Cable #612569-S is available for analog input only.

The supplied cable has a 14-pin connector on one end for connection to the resolver feedback connector and is divided into two smaller cables, which are labeled “ANALOG” and “RESOLVER.” The cable labeled “ANALOG” connects to the three-point terminal block. The cable labeled “RESOLVER” connects to the eight-point terminal block. Near the connector, the cable is labeled “C3-P1”.

The cable connector is secured to the Resolver & Drive I/O board with two screws. When attaching the cable, alternately tighten each screw a few turns at a time until the connector is securely attached. Follow the same procedure to loosen the screws when removing the connector.

Refer to figure 5.2, 5.3, 5.4, or 5.5 for the appropriate cable connections for your system.


Figure 5.2 – Terminal Block Connections for Resolver and Analog Input

1

2

3

ANALOG

ANALOG INPUT

ANALOG INPUT

SHIELD

1

2

3

4

5

6

7

2

3

RESOLVERREFERENCE OUT

REFERENCE OUT

SINE INPUT

1

2

3

4

5

6

7

8

9

10

4

5

6

7

8

SINE INPUT (–)

COSINE INPUT

COSINE INPUT

EXT. TRIGGER

EXT. TRIGGER

(–)

(–)

(–)

(–)

(+)

(+)

(+)

(+)

(+)

1

1

7

8

WIRENUMBER

WIRECOLOR

1 BRN

2 WHT/BRN

3 RED

4 WHT/RED

5 ORG

6 WHT/ORG

7 YEL

8 WHT/YEL

1 BLK

2 CLEAR

3 DRAIN (SHIELD)

RESOLVER

ANALOG

Cable No. 612426-xxxS(where xxx is length in inches)

5-4 PMI Regulator

Figure 5.3 – DIN Rail Connections for Resolver and Analog Input

REFERENCE OUT (-) - LOWER LEVEL

REFERENCE OUT (+) - UPPER LEVEL 1

2

ANALOG INPUT (+) - UPPER LEVEL

ANALOG INPUT (-) - LOWER LEVEL

SHIELD 3

2

1

ANALOG

SINE INPUT (-) - LOWER LEVEL

SINE INPUT (+) - UPPER LEVEL

4

3

COSINE INPUT (+) - UPPER LEVEL

COSINE INPUT (-) - LOWER LEVEL 6

5

EXT. TRIGGER (-) - LOWER LEVEL

EXT. TRIGGER (+) - UPPER LEVEL

8

7

RESOLVER

TERMINAL BLOCKS AND END MOUNTSSHOWN SEPARATED FOR CLARITY

WIRENUMBER

WIRECOLOR

1 BRN

2 WHT/BRN

3 RED

4 WHT/RED

5 ORG

6 WHT/ORG

7 YEL

8 WHT/YEL

1 BLK

2 CLEAR

3 DRAIN (SHIELD)

RESOLVER

ANALOG



Figure 5.4 – Terminal Block Connections for Analog Input Only

Figure 5.5 – DIN Rail Connections for Analog Input Only

1

2

3 ANALOG

ANALOG INPUT

ANALOG INPUT

SHIELD

1

2

3

4

5

6

(–)

(+) 1

WIRENUMBER

WIRECOLOR

1 BLK

2 CLEAR

3 DRAIN (SHIELD)

ANALOG


WIRENUMBER

WIRECOLOR

1 BLK

2 CLEAR

3 DRAIN (SHIELD)

ANALOG


5-6 PMI Regulator

5.3.1.1 Resolver Input Connections

Standard resolver input connections are shown in table 5.1.

Typical voltage levels associated with the resolver are as follows:

• Reference: This is a 2381 Hz sine wave with a typical amplitude of approximately 26V RMS. When measuring any of the resolver signals, make sure that the meter used can respond to 2381 Hz accurately or use an oscilloscope.

• Sine or cosine feedback: This is a 2381 Hz signal with an amplitude that varies with the rotation of the shaft. Maximum amplitude (as the shaft turns) should be approximately 11.8V at the resolver module. Voltages may be different depending on the installation. The system adjusts the signal levels to develop 11.8V maximum at the module input.

Table 5.2 lists the cables that may be used for resolver connection.

5.3.1.2 Analog Input Connections

Use 0.823 - 0.326 mm2 (18-22 AWG) twisted pair shielded cable to connect the analog device to the terminal block. Connect the shield to the SHIELD terminal. Typical field connections are shown in figures 5.6 to 5.11. Note that Vc may appear as induced noise voltage on otherwise floating inputs.

Table 5.1 – Standard Resolver Connections

Resolver Resolver & Drive I/O Board

Connector Pin

ResolverWinding 613469-1,-2

800123, 800123-1 800123-2 TB

Faceplate Conn Pin Resolver Module

Ref. Input R1+R2–

AB

12

AB

12

AB

+–

Ref. Output

Sine Output S1+S3–

CD

34

DF

34

DC

+–

Sine Input

Cosine Output

S2+S4–

EF

56

GE

56

FE

–+

Cosine Input1

78

HJ

+–

Ext. Strobe1

1. Connections listed give a positive speed signal for counter-clockwise motor rotation (when facing the end opposite the output shaft). To reverse the polarity of this signal, interchange the cosine input leads (terminals 5 and 6).

Table 5.2 – Resolver Cables

Part No. 417900-

No. of Twisted

PairsLengthof Twist

Twists Per Inch

Size mm2

(AWG)

Recommended MaximumDistance Per Resolver Type

X1 X2 X5

-207CG 3 12.7(8.5 mm) 2(3) 0.823 (18) 255 m (850 ft) 240 m (800 ft) 150 m (500 ft)

-76EAD 1 12.7(8.5 mm) 2(3) 1.31 (16) 320 m (1050 ft) 310 m (1025 ft) 190 m (625 ft)


Figure 3.7 in chapter 3 shows the analog input circuit. Note that the input impedance has a finite value of approximately 1.3 megohms. This must be taken into account when connecting to sources with a high output impedance such as an analog tachometer scaling board.

Take steps to reduce noise pickup and the possibility of ground loops. In the case of grounded sources, note the common mode voltage limit. Avoid migrating a remote ground into the PMI Regulator. Use the differential connections to reduce noise. Keep input cable lengths as short as possible and ground shields at the source’s earth ground.

Figure 5.6 – Analog Input - Single-Ended Driven Off Ground

Figure 5.7 – Analog Input - Single-Ended Grounded

+

-Zout

Vs

Vc Vcom

-

+

G

Vcom + Vc MUST BE LESS THAN 30 VOLTSVs MUST BE LESS THAN 10 VOLTS

+

-

Zout

Vs

Vcom

-

+

G

Vcom MUST BE LESS THAN 30 VOLTSVs MUST BE LESS THAN 10 VOLTS

5-8 PMI Regulator

Figure 5.8 – Analog Input - Single-Ended Floating

Figure 5.9 – Analog Input - Balanced Driven Off Ground

Figure 5.10 – Analog Input - Balanced Grounding

+

-

Zout

Vs

-

+

G

Vs MUST BE LESS THAN 10 VOLTS

+

-Zout

Vs

Vc

-

+

G

Zout

+

-Zout

Vs

Vc Vcom

-

+

Vcom + Vc MUST BE LESS THAN 30 VOLTSVs MUST BE LESS THAN 10 VOLTS

Zout

+

-Zout

Vs

Vcom

-

+

G

Vcom MUST BE LESS THAN 30 VOLTSVs MUST BE LESS THAN 10 VOLTS

Zout


5.3.2 Connecting Drive I/O

Drive I/O Cable #612401-T is provided for connection between the Drive I/O connector and a 16-point terminal block. Cable #612571-S is provided for connection between the Drive I/O connector and a row of two tier DIN rail mounted terminal blocks. These cables have an 18-pin connector on one end for connection to the Drive I/O Connector. Near the connector, the cable is labeled “C3-P2.” Near the terminal block or DIN rail connections, the cable is labeled “I/O.” Refer to figure 5.12 or 5.13.

Figure 5.11 – Analog Input - Balanced Floating

+

-Zout

Vs

-

+

G

Vs MUST BE LESS THAN 10 VOLTS

Zout

5-10 PMI Regulator

Figure 5.12 – Terminal Block Connections for Drive I/O

I/O

RPI (HI)

RPI (LO)

AUX IN 1 (HI)

1

2

3

4

5

6

WIRENUMBER

WIRECOLOR

1 BRN2 WHT/BRN3 RED4 WHT/RED5 ORG6 WHT/ORG7 YEL8 WHT/YEL

11 BLU12 WHT/BLU13 VIO

AUX IN 3 (HI)

AUX IN 3 (LO)

AUX IN 4 (HI)

7

8

9

10

11

12

13

14

15

16

AUX IN 1 (LO)

AUX IN 2 (HI)

AUX IN 2 (LO)

AUX IN 4 (LO)

AUX IN 5 (HI)

AUX IN 5 (LO)

MCR (HI)

MCR (LO)

AUX OUT (HI)

AUX OUT (LO)

910

GRNWHT/GRN

14 WHT/VIO15 GRY16 WHT/GRY

16

15

14

13

12

10

11

9

8

6

7

4

5

1

2

3

12

13

14

15

Cable No. 612401-xxxT(where xxx is length in inches)


Figure 5.13 – DIN Rail Connections for Drive I/O

(TERMINAL BLOCKS AND END MOUNTSSHOWN SEPARATED FOR CLARITY)

WIRENUMBER

WIRECOLOR

1 BRN2 WHT/BRN3 RED4 WHT/RED5 ORG6 WHT/ORG7 YEL8 WHT/YEL

11 BLU12 WHT/BLU13 VIO

910

GRNWHT/GRN

14 WHT/VIO15 GRY16 WHT/GRY


5-12 PMI Regulator

CHAPTER 6Diagnostics andTroubleshooting

Operation of the SA3100 drive is monitored by the PMI processor. Fault and warning registers (202/1202 and 203/1203) in the UDC must be used when the system detects a fault or a warning.

The fault conditions reported in the Drive Fault register result in turning off the drive. The UDC task is not stopped automatically when a drive fault occurs unless it is specifically instructed to do so in an application task. The user must ensure that the AutoMax application task tests register 202/1202 and takes appropriate action if a fault occurs.

The warnings indicated by the Drive Warning register cause no action by themselves. Any resulting action is determined by the application task. The user must ensure that the AutoMax application task monitors register 203/1203 and takes appropriate action if any of these conditions occurs.

Refer to instruction manual the SA3100 Drive Configuration and Programming instruction manual (S-3056) for further details on using the Drive Fault and Drive Warning registers.

6.1 PMI Regulator Faults (UDC Register 202/1202)

If the PMI processor detects a fault, it will disable the gates of the power devices, and the motor will begin a coast-to-rest stop. The PMI processor will turn off the MCR output when it detects that motor current is less than 2% of the rated motor current, or within 300 msec of the occurrence of a fault, even if the 2% current level has not been reached.

Most faults are signaled by one of the LED indicators on the PMI Regulator. The bits in the Drive Fault register (202/1202) should be examined to determine the cause of the fault. If a fault occurs the identifying bit will set. The fault will also be recorded in the error log for the UDC task in which it occurred.

6.1.1 DC Bus Overvoltage Fault (Bit 0)

LED indicator: EXT FLT

The DC Bus Overvoltage fault bit is set if the DC bus voltage exceeds the rating of the Power Module. Error code 1018 will be displayed in the error log of the UDC task in which the fault occurred.

Diagnostics and Troubleshooting 6-1

6.1.2 DC Bus Overcurrent Fault (Bit 1)

LED indicator: P.M. FLT

The DC Bus Overcurrent fault bit is set if the DC bus current exceeds 125% of the rated Power Module current. Error code 1020 will be displayed in the error log of the UDC task in which the fault occurred.

6.1.3 Ground Current Fault (Bit 2)


The Ground Current Fault bit is set if ground current exceeds the rating of the Power Module. Error code 1021 will be displayed in the error log of the UDC task in which the fault occurred.

6.1.4 Instantaneous Overcurrent Fault (Bit 3)


The Instantaneous Overcurrent Fault bit is set if an overcurrent is detected in one of the power devices. Register 204/1204, bits 0-5, indicate which power device detected the overcurrent. Error code 1017 will be displayed in the error log of the UDC task in which the fault occurred.

6.1.5 Isolated 12V Supply Fault (Bit 4)


The Isolated 12V Supply Fault bit is set if the voltage level of the 12V Pulse/Tach power supply or the external LEM power supply falls below 8V. Error code 1022 will be displayed in the error log of the UDC task in which the fault occurred.

6.1.6 Charge Bus Time-Out Fault (Bit 6)

LED indicator: EXT FLT and P.M. FLT

The Charge Bus Time-Out Fault bit is set if any of the following conditions occurs:

• The DC bus is not fully charged within 10 seconds after the bus enable bit (register 100/1100, bit 4) is set

• The drive is on and feedback indicates that the pre-charge contactor has opened

• DC bus voltage is less than the value stored in the Power Loss Fault Threshold (PLT_E0%) tunable variable.

• The lack of 115VAC or 24V DC applied to the precharge module on common bus units (C through H-frames)

Error code 1024 will be displayed in the error log of the UDC task in which the fault occurred.

If this bit is set, verify that incoming power is at the appropriate level. If the power level is correct, the problem is in the Power Module.

6-2 PMI Regulator

6.1.7 Overtemperature Fault (Bit 7)


The Overtemperature Fault bit is set if the internal temperature of the Power Module’s heatsink exceeds 100° C. Error code 1016 will be displayed in the error log of the UDC task in which the fault occurred.

6.1.8 Resolver Broken Wire Fault (Bit 8)

LED indicator: FDBK OK

The FDBK OK LED is turned off, and the Resolver Broken Wire Fault bit is set if a sine or cosine signal from the resolver is missing due to a broken wire or the resolver gain tunable (RES_GAN%) has been set too low.

6.1.9 Resolver Fault (Bit 9)

LED indicator: N/A

The Resolver Fault bit is set if a blown fuse is detected on the Resolver & Drive I/O board. This indicates the Resolver & Drive I/O board must be replaced.

6.1.10 Overspeed Fault (Bit 9)


The Overspeed Fault bit is set if the motor’s velocity exceeds the value entered as the Overspeed Trip (RPM) configuration parameter.

6.1.11 AC Power Technology Fault (Bit 11)

LED indicator: DRV RDY

The DRV RDY LED is turned off, and the AC Power Technology Fault bit is set to indicate that an error occurred in the PMI Regulator’s AC power technology circuitry. Power should be recycled to allow the Regulator to clear itself and reboot. If the DRV RDY LED remains off after repeated cycling of power, check the Diagnostic Fault Code register (222/1222) for specific information.

6.1.12 PMI Regulator Bus Fault (Bit 13)

LED indicator: N/A

This fault indicates that the Resolver & Drive I/O board and the AC power technology circuitry do not respond to requests from the PMI processor. This indicates a hardware failure in the PMI Regulator.

6.1.13 UDC Run Fault (Bit 14)

The UD Run Fault bit is set if the UDC task stops while the minor loop is running in the PMI Regulator.


6.1.14 Communication Lost Fault (Bit 15)

LED indicator: COMM OK

The COMM OK LED is turned off, and the Communication Lost Fault bit is set if the fiber-optic communication between the PMI processor and the UDC module is lost due to two consecutive errors of any type.

6.2 PMI Regulator Warnings (UDC Register 203/1203)

The PMI processor will check for conditions that are not serious enough to shut down the drive, but may affect its performance. If the PMI processor detects any of the following PMI Regulator warning conditions, it will set the appropriate bit in the UDC Drive Warning Register (203/1203), but it will not shut down the drive. The bits in this register should be examined by the application task to determine the cause of the warning. Any resulting action is determined by the application task. No LED indicator or UDC error code is provided for drive warnings.

6.2.1 DC Bus Overvoltage Warning (Bit 0)

The DC Bus Overvoltage Warning bit is set if the D-C bus voltage rises above the configured overvoltage threshold value. The torque is automatically limited to avoid an overvoltage fault. Bit 4 of the Drive Warning Register will also be set to indicate the torque is being limited by the system.

6.2.2 DC Bus Undervoltage Warning (Bit 1)

The DC Bus Undervoltage Warning bit is set if the D-C bus voltage drops below the configured undervoltage threshold value. The torque is automatically limited to avoid a further drop in the DC bus voltage. Bit 4 of the Drive Warning Register will also be set to indicate the torque is being limited by the system.

6.2.3 Ground Current Warning (Bit 2)

The Ground Current Warning bit is set if ground current exceeds the configured ground fault current level.

6.2.4 Voltage Ripple Warning (Bit 3)

The Voltage Ripple Warning bit is set if the ripple on the DC bus exceeds the configured voltage ripple threshold value. This can be used to detect an input phase loss in the rectifier section, or for a common bus supply.

6.2.5 Reference In Limit Warning (Bit 4)

The Reference in Limit Warning bit is set if the reference to the regulator exceeds the maximum value permitted (+/- 4095), or is being limited by the system in response to an overvoltage or undervoltage warning.

6-4 PMI Regulator

6.2.6 Tuning Aborted Warning (Bit 5)

The Tuning Aborted Warning bit is set if any of the automatic tuning procedures (e.g., resolver balance and gain calibration) is not successful.

6.2.7 Overtemperature Warning (Bit 7)

The Overtemperature Warning bit is set if the internal temperature of the Power Module’s heatsink exceeds 90° C.

6.2.8 Bad Gain Data Warning (Bit 8)

The Bad Gain Data Warning bit is set if an invalid local tunable variable or drive parameter has been loaded.

6.2.9 Thermistor Open Circuit Warning (Bit 9)

The Thermistor Open Circuit Warning bit is set if an open is detected in the thermistor circuit.

6.2.10 Flex I/O Communication Warning (Bit 13)

The Flex I/O Communication Warning bit is set if a Flex I/O communication problem is detected and logged in UDC registers 10/22 or 11/23.

6.2.11 CCLK Not Synchronized Warning (Bit 14)

The CCLK Not Synchronized Warning bit is set if the CCLK counters in the PMI Regulator and the UDC module are momentarily not synchronized.

6.2.12 PMI Regulator Communication Warning (Bit 15)

The PMI Regulator Communication Warning bit is set if a fiber-optic communication error is detected is detected between the PMI processor and the UDC module. Communication errors in two consecutive messages will cause a drive fault.


6-6 PMI Regulator

CHAPTER 7Circuit Board Replacement

Guidelines

Always perform the following steps when replacing Regulator circuit boards or performing any other work on the drive:

Step 1. Turn off and lock out all incoming power.

Step 2. Wait five minutes to allow the DC bus voltage to dissipate.

Step 3. Open the drive cabinet and/or remove the drive’s cover as required to access the drive.

Step 4. Measure the DC bus potential with a voltmeter before working on the drive.

Measure the voltage across the DC+ and DC- terminals (DC brake terminals) on Power Module terminal block TB1 (see figure 7.1 for location). When the DC bus potential is down to less than 5 volts, touch a 50 ohm, 50 W or larger resistor across the test points for twenty seconds to allow any remaining DC bus voltage to dissipate.

Remove the resistor and re-measure the DC bus potential. It should now be 0V.

Note that circuit boards are exposed when they are out of the drive. Wear a ground strap and handle the boards by their edges only. When not in use, circuit boards should be stored in anti-static bags.

!ATTENTION:Only qualified personnel familiar with the construction and operation of this equipment and the hazards involved should install, adjust, operate, or service this equipment. Read and understand this manual and other applicable manuals in their entirety before proceeding. Failure to observe this precaution could result in severe bodily injury or loss of life.

ATTENTION:DC bus capacitors retain hazardous voltages after input power has been disconnected. After disconnecting input power wait five (5) minutes and check the voltage of the DC bus to ensure the DC bus capacitors are discharged before touching any internal components. Failure to observe this precaution could result in severe bodily injury or loss of life.

ATTENTION:The circuit boards of the PMI Regulator contain static-sensitive components. Do not touch the circuit boards or their connectors without proper ESD handling equipment. When not installed, circuit boards should be stored in anti-static bags. Failure to observe this precaution could result in damage to, or destruction of, the equipment.

Circuit Board Replacement Guidelines 7-1

Figure 7.1 – Terminal Block Locations

Frames B, C Frame D

Frame F

TB4

TB1

TB1

TB4

TE

TB1Location

TB1

TB4

TB1Location

Frame E

TB1

TB4

TE

TB1Location

BrakeTerminals

TE

Frame G

TB4

TB1Location

TE

PEGround

TB1

R,S,T

Frame H

TB4

TB1Location

TE

PEGround

TB1

+,–

TB1 Power Terminal BlockTB4 24V DC Auxiliary InputTE Shield Terminals

1

1. Terminal block TB4 is an auxiliary 24V input that can be used to power the PMI Regulator when incoming AC or DC power is removed.

TE

7-2 PMI Regulator

7.1 Replacing the PMI Regulator Assembly

Perform the following steps to replace the PMI Regulator assembly:

Step 1. Disconnect all connector cables from the PMI Regulator motherboard and the Resolver & Drive I/O board. Use care when removing connectors to avoid bending the connector pins. Refer to figure 1.1, 2.1, or 3.1 for the locations of these connectors:

a. Resolver Feedback cable and Drive I/O cable on the Resolver & Drive I/O board.

b. 50-pin PMI interface connector

c. NTC thermistor cable

d. Fiber-optic port connectors

e. Flex I/O connector (if used)

f. Meter port connector (if used)

g. PMI Regulator ground wire

Step 2. Remove the seven (7) M4 x 8 mounting screws that fasten the PMI Regulator to its mounting plate.

Step 3. Lift the motherboard up and off the four key pins.

Step 4. To install the new PMI Regulator, align the four key holes on the motherboard with the four key pins on the mounting plate and slide the motherboard into position over the pins. Fasten the PMI Regulator to the mounting plate with the seven (7) M4 x 8 mounting screws.

Step 5. Attach the connectors removed in step 1 to the new PMI Regulator. Use care when connecting to avoid bending the connector pins.

Note that the PMI operating system will not download to the PMI Regulator if the circuit boards are not properly installed.

7.2 Replacing the Resolver & Drive I/O BoardPerform the following steps to replace the Resolver & Drive I/O board:

Step 1. Disconnect the Resolver Feedback cable and Drive I/O cable from the Resolver & Drive I/O board. Refer to figure 1.1 or 3.1 for the locations of these connectors:

Step 2. Remove the four (4) M3 x 6 mounting screws and insulator from the standoffs used to mount the Resolver & Drive I/O board to the motherboard.

Step 3. Slide the Resolver & Drive I/O board out from the backplane connector board. Support the connector board while disconnecting the Resolver & Drive I/O board and take care to avoid bending the connector pins.

Step 4. To install the new Resolver & Drive I/O board, reverse the previous three steps.

Circuit Board Replacement Guidelines 7-3

7.3 Replacing the LED Status BoardPerform the following steps to replace the LED status board:

Step 1. Remove the two (2) M3 x 6 screws that fasten the LED board to the standoffs on the motherboard.

Step 2. Carefully pull the LED board straight out off its connector pins.

Step 3. Align the connector on the new LED board with the connector pins on the motherboard and carefully push the board into position. Inspect the installation to make sure the pins are inserted correctly.

Step 4. Replace the two M3 x 6 screws removed in step 1.

7.4 Replacing the PMI Regulator Motherboard

Perform the following steps to replace the PMI Regulator motherboard:

Step 1. Remove the Resolver & Drive I/O board and insulator as described in section 7.2.

Step 2. Remove the LED status board as described in section 7.3.

Step 3. Remove the PMI Regulator motherboard as described in section 7.1. Replace with the new motherboard.

Step 4. Re-install the LED status board on the new motherboard.

Step 5. Re-install the Resolver & Drive I/O board and insulator removed in step 1.

7-4 PMI Regulator

APPENDIX APMI Regulator Specifications

Ambient Conditions

• Storage temperature: -30° C (-22° F)

• Operating temperature: 0 to 60° C (32 to 140° F)

• Humidity: 5-95%, non-condensing

Maximum Power Dissipation

• 11 W

Power Requirements

• 5V @ 1.3A

• +15V @ 120mA

• -15V @ 120 mA

Analog Output Specifications

• Number of outputs: 4

• Number of commons: 4

• Operating range: -10 to +10 VDC

• Maximum output current: 20 mA

• Resolution: 8 bits binary

• Non-linearity: +/- 1 LSB maximum

• Accuracy: 2.4% of maximum at 25° C

• Thermal drift: 120 ppm/degree C

• Type of converter: 4 DACs with output buffer amplifiers and interface logic on a monolithic IC

• Speed of conversion: Scan dependent

• Output settling time: 20

• Minimum load resistance: 500 Ω

• Maximum load capacitance: 10,000 pF

PMI Regulator Specifications A-1

Fiber Optic Port

• Transmitter: 1

• Receiver: 1

• Data rate: 10 Mbd

• Coding: Manchester

• Protocol: HDLC (compatible with UDC module)

Flex I/O Interface

• Coding: Proprietary

• Channels: 1

• Scan rate: Dependent on UDC Module scan rate

A-2 PMI Regulator

APPENDIX BResolver & Drive I/O Board

Specifications

Ambient Conditions

• Storage temperature: -30° C (-22° F)

• Operating temperature: 0 to 60° C (32 to 140° F)

• Humidity: 5-95%, non-condensing

Maximum Power Dissipation

• 6 W

Power Requirements

• 5V @ 300 mA

• +15V @ 150 mA

• -15V @ 150 mA

Resolver Interface

• Resolution: 12 or 14 bits (software-selectable)

• Required resolver accuracy (electrical)

• 12-bit configuration: 5 arc minutes (typical)

• 14-bit configuration: 1 arc minute

• External strobe input:

• Input signal: 24 volt positive pulse

• Maximum pulse frequency: 1 kHz

• Minimum pulse width: 300 µsec

• Typical transport delay: 250 µsec

Resolver & Drive I/O Board Specifications B-1

Resolver Specifications

Analog Input

• Differential input range: +/-10 volt peak

• Common mode input range: +/-30 volt peak

• Input impedance: >1 megohm

• Bandwidth: 1200 hertz

• Resolution: 4.88 millivolts

• Accuracy: 2%

• Resistive isolation: 1 megohm (not operating)

Digital Input Specifications

• Number of inputs: 6

• Maximum operating voltage: 132 volts rms

• Minimum turn-on voltage: 92 VAC RMS

• Maximum turnoff voltage: 22 VAC RMS 50/60 Hz

• Maximum off-state current: 3 mA

• Minimum turn on current (except RPI): 14 mA

• Minimum RPI turn on current: 12 mA

• Input to ground isolation: 1500 volts AC

• Input to input isolation: 150 volts AC

• Input current at 115V 60 Hz: 23.5 mA

• Maximum input delay @50 Hz: 35 msec

• Maximum input delay @60 Hz: 26 msec

ResolverPart No.

Resolver Type

AccuracyMax. Error

Spread(Electrical)

Resolver Mechanical

Max.Speed

Resolver & Drive I/O Module Interface

Limitation

Resulting Effective Resolver Max.

Speed 1

12-bit 14-bit 12-bit 14-bit

613469-1R,-2R x1 16 arc minutes 8,000 RPM 10,000 RPM 4,200 RPM 8,000 RPM 4,200 RPM

613469-1S,-2S x2 10 arc minutes 5,000 RPM 5,000 RPM 2,100 RPM 5,000 RPM 2,100 RPM

800123-R,-1R,-2R x1 10 arc minutes 5,000 RPM 10,000 RPM 4,200 RPM 5,000 RPM 4,200 RPM

800123-S,-1S,-2S x2 10 arc minutes 5,000 RPM 5,000 RPM 2,100 RPM 5,000 RPM 2,100 RPM

800123-T,-1T,-2T x5 5 arc minutes 5,000 RPM 3,360 RPM 840 RPM 3,360 RPM 840 RPM

1. Use this value to determine what resolver type to use in DPS applications.

B-2 PMI Regulator

Digital Output

• Number of outputs: 2 contact closure

• Contact rating: 2 amps

• Maximum operating voltage: 132 volts rms

• On state voltage drop at rated current: 1.5 volts

• Peak inrush (1 sec): 5 amps

• Maximum leakage current: 4.8 mA

• Output to ground isolation: 150 volts AC

Resolver & Drive I/O Board Specifications B-3

B-4 SA3100 Power Modules

APPENDIX CPMI Regulator / UDC Register

Cross-Reference

PMI Motherboard

Description Register Bit

Flex I/O data 0-9/12-21

Flex I/O errors 10-11/22-23

PMI-UDC communication status 80-89/1080-1089

PMI meter port output 106/1106

DRV RDY LED

AC Power Technology Fault 202/1202 11

P.M. FLT LED

DC bus overcurrent fault 202/1202 1

Instantaneous overcurrent fault 202/1202 3

Charge bus time out fault 202/1202 6

Over temperature fault 202/1202 7

EXT FLT LED

DC bus overvoltage fault 202/1202 0

Ground current fault 202/1202 2

Charge bus time out fault 202/1202 6

Over speed fault 202/1202 10

Application program control 101/1101 2

I/O FLT LED

Flex I/O communication error 203/1203 13

PMI Regulator / UDC Register Cross-Reference C-1

Resolver & Drive I/O Board

Description Register Bit

Resolver scan position data 215/1215

Resolver strobe position 216/1216

Enable external strobe 101/1101 8

Enable external strobe falling edge 101/1101 9

External strobe detected 201/1201 8

External strobe level 201/1201 9

Enable resolver balance calibration test 101/1101 6

Resolver gain calibration test complete 201/1201 6

Resolver balance calibration test complete 201/1201 7

Tuning aborted 203/1203 5

Analog input data 214/1214

Drive I/O control 101/1101

Drive I/O status 201/1201

Resolver fault 202/1202 9

FDBK OK LEDResolver broken wire 202/1202 8

RPI LEDRPI input 201/1201 0

MCR LEDN/A N/A N/A

AUX IN1 LEDAux input 1/MFDBK 201/1201 1

AUX IN2 LEDAux input 2 201/1201 2




AUX OUT LEDAux output 101/1101 4

C-2 PMI Regulator

APPENDIX DPMI Regulator Replacement

Parts

Please see publication SA3100-6.0 for spare parts information.

PMI Regulator Replacement Parts D-1

D-2 PMI Regulator

APPENDIX EPMI Regulator Test Points

The following figure illustrates the PMI Regulator test points that may be used for diagnostic purposes. Note that this figure is a basic overview only. Refer to the prints, wiring diagrams (W/Ds), and other documentation shipped with your drive system for specfic information.

CON7 = V-U Volts

CON8 = V-V Volts

CON9 = V-W Volts

CON10 = U Current

CON11 = V Current

CON12 = W Current

CON13 = DC Bus Current

CON14 = DC Bus Voltage

CON15 = ID

CON16 = IQ

CON17, 18, 19 = Analog Ground

CON20, 21, 22 = Digital Ground

U CURR V CURR W CURR

SA3100 Power Module

PMI Regulator Test Points E-1

Figure E.1 shows the test point arrangement on the PMI regulator mother board.

Figure E.1 – PMI Regulator Mother Board - Test Points

CON21

DGND

CON11

Iv FBK

CON20

DGND

CON17

AGND

P8

PE

P7

PE

P6

PE

CON13

BUS CUR

CON14

BUS VOLT

CON10

Iu FBK

CON19

AGND

CON12

Iw FB

CON15

Id

CON16

Iq

CON18

AGND

CON7

V-UVOLT

CON8

V-VVOLT

CON9

V-WVOLT

CON22

AGND

E-2 PMI Regulator

INDEX

AAC power technology circuit, 2-10 to 2-11

block diagram, 2-11Analog input

connections, 5-7 to 5-10description, 3-7 to 3-8

Analog input circuits, 3-8, 5-8 to 5-10balanced driven off ground, 5-9balanced floating, 5-10balanced grounding, 5-9single-ended driven off ground, 5-8single-ended floating, 5-9single-ended grounded, 5-8

Analog input onlyDIN rail connections, 5-6terminal board connections, 5-6

AutoMax, 1-1Auxiliary input circuit, 3-9

CCalibration

balance calibration, 3-6 to 3-7checking calibration procedure results, 3-7gain calibration, 3-6

Circuit board replacement guidelines, 7-1 to 7-4LED status board, 7-4motherboard, 7-4regulator assembly, 7-3resolver & drive I/O, 7-3

Cross referencePMI regulator/UDC register, C-1 to C-2

DDESAT, 2-15Diagnostics and troubleshooting, 6-1 to 6-5Distributed Power System, 1-1Documentation, 1-2Drive I/O, 3-8 to 3-12

block diagram, 3-12connector, 3-2connector pinout, 3-10DIN rail connections, 5-12specifications, B-2 to B-3terminal board connections, 5-11

EExternal strobe input circuit, 3-4

timing diagram, 3-4

FFaults, 6-1 to 6-4

AC power technology (bit 11), 6-3charge bus time-out (bit 6), 6-2communication lost (bit 15), 6-4DC bus overcurrent (bit 1), 6-2DC bus overvoltage (bit 0), 6-1ground current (bit 2), 6-2instantaneous overcurrent (bit 3), 6-2isolated 12V supply (bit 4), 6-2overspeed (bit 9), 6-3overtemperature (bit 7), 6-3PMI regulator bus (bit 13), 6-3resolver (bit 9), 6-3resolver broken wire (bit 8), 6-3UDC run (bit 14), 6-3

Fiber-optic portscabling, 5-2description, 2-1

Flex I/O interface, 2-2connecting modules, 5-2

IInstallation guidelines, 5-1 to 5-12

analog input, 5-3 to 5-10drive I/O, 5-10 to 5-12fiber-optic cabling, 5-2Flex I/O, 5-2meter ports, 5-2motherboard, 5-1 to 5-2resolver, 5-3 to 5-7resolver & drive I/O, 5-3 to 5-12

Introduction, 1-1 to 1-5

LLED status indicators, 2-3 to 2-7

PMI processor and drive status, 2-4 to 2-6resolver and drive I/O, 2-6 to 2-7

Index Index-1

MMCR and auxiliary output circuit, 3-10Meter ports, 2-2

connector, 5-2output circuit, 2-3wiring, 5-2

Motherboard, 2-1 to 2-17electrical description, 2-7 to 2-17mechanical description, 2-1 to 2-7

PPMI connector, 2-2PMI connector signals, 2-12 to 2-16

AC line feedback, 2-15DC bus pre-charge, 2-16DC bus voltage feedback, 2-14 to 2-15DESAT, 2-15digital grounds, 2-13gate drivers, 2-13ground current feedback, 2-15motor current feedback, 2-13 to 2-14motor voltage feedback, 2-14pinout, 2-12power supply, 2-16

PMI processorblock diagram, 2-9operation, 2-8

RRegulator assembly, 1-5Regulator specifications, A-1 to A-2Regulator test points, E-1Related publications, 1-1 to 1-4Replacement parts, D-1Resolver

cables, 5-7calibration, 3-5connections, 5-7data format, 3-3feedback connector, 3-2 to 3-3feedback precautions, 3-5

input, 3-2 to 3-7loss of feedback, 3-5restrictions, 3-5specifications, B-2

Resolver & drive I/O board, 3-1 to 3-12block diagram, 3-11electrical description, 3-2 to 3-12mechanical description, 3-1 to 3-2specifications, B-1 to B-3

Resolver and analog inputDIN rail connections, 5-5terminal board connections, 5-4

Run permissive input (RPI) circuit, 3-9

SService manual cross reference, 1-2 to 1-4Specifications

PMI regulator, A-1 to A-2resolver & drive I/O board, B-1 to B-3

Synchronous transfer port, 2-3, 2-17connector pinout, 2-17

TTerminal block locations (Power Module), 7-2

WWarnings, 6-4 to 6-5

bad gain data (bit 8), 6-5CCLK not synchronized (bit 14), 6-5DC bus overvoltage (bit 0), 6-4DC bus undervoltage (bit 1), 6-4Flex I/O communication (bit 13), 6-5ground current (bit 2), 6-4PMI regulator communication (bit 15), 6-5reference in limit (bit 4), 6-4thermistor open circuit (bit 9), 6-5tuning aborted (bit 5), 6-5voltage ripple (bit 3), 6-4

Wiring guidelines, 5-1

Index-2 PMI Regulator

Rockwell Automation / 24703 Euclid Avenue / Cleveland, Ohio 44117 / (216) 266-7000

Printed in U.S.A. S-3057-1 July 1999

distributed power system sa3100 power module interface ......link with the drive’s power module...

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