DME Interference Mitigation through Blanking

Pranav P Ginde, Nikhil M Anand, Harish A H, Ashwitha L S Accord Software and Systems Private Limited

Bangalore, India

Abstract—The IRNSS Standard Positioning System (SPS)

signals will be transmitted on both L5 (1176.45 MHz) and S1 (2492.028 MHz) band. Like any other GNSS signal present in the L5 Band, IRNSS L5 signal too is prone to the pulsed interference from the DME signals, which occupy the frequency band from 960 MHz to 1215 MHz. DME signals are Gaussian shaped pulse pairs with a certain repetition rate which depends on the air traffic conditions of the region. Due to tailing of these pulses, it becomes difficult to clearly distinguish between an L5 signal and interference pulse in the time domain. This paper describes an easy to implement time-domain Digital Pulse blanking algorithm for the mitigation of DME like pulsed RF interference signals. The basic principle of this algorithm is to average out the noise or the desired signal samples and determine the envelope of the interference signal. This averaging process reduces the noise variance due to which, the interference signal tailing begins to reveal itself. This revelation can be used to set the threshold values more accurately, improving the performance of the blanking algorithm. The performance of the proposed algorithm is tested using Accord’s IRNSS L5 receiver and Multi-channel IRNSS Simulator. The analysis and simulation results are presented along with the results obtained in the actual hardware setup. The algorithm is found to work very well for a moderate to high DME interference levels as is evident from the results shown in the paper.

IndexTerms— Pulse blanking; IRNSS; DME; pulsed interference.

I. INTRODUCTION

DME (Distance Measurement Equipment) are a combination of ground based transponders responding to the air borne interrogators with ranging pulses in the frequency band 960 MHz-1215 MHz. DME pulse pairs are Gaussian in nature, with half amplitude pulse width of 3.5 us and with separation of 12 us between the pulses as shown in the Fig.1. A number of DME stations in India transmit at frequencies which cause in-band interference to the IRNSS SPS L5 signal. Since 99.4% of SPS signal power is contained in the 14 MHz bandwidth, DME interference mitigation is necessary for the IRNSS receiver operation in these areas.

The mitigation of DME interference basically consists of pulse detection and subsequent blanking. Both analog and digital blanking methods are reported in literature [1][2]. The digital Pulse blanking is easy and convenient to implement in the hardware. The Blanking algorithm is usually run on the ADC output samples after comparing against certain threshold. The assumption made is that the pulses are short and detectable against the noise floor [3].

Fig.1. DME pulse pair

The detection threshold is a function of the variance of the

thermal noise floor. The quantized ADC output sample is blanked if it is above this threshold value. The Fig.2 shows 8-bit ADC output distribution in the presence and absence of the pulsed interference.

Fig.2. ADC output distributions (a) Without pulsed interference (b) with

pulsed interference

If the Pulsed interference is too strong, the ADC gets

saturated and the peaks are seen at the either ends of the distribution. Setting the threshold value as that of standard deviation of thermal noise floor, as shown in the Fig.2(b) works very well. But when the pulsed interference is weak, the variance of the noise floor increases, making it difficult to distinguish between the interference samples from useful signal samples. In this case, setting the threshold too low will blank a portion of the useful signal and setting it too high will allow the interference to creep in into the system. Therefore, the performance of time domain digital pulse blanking is relatively poor against weak pulsed interference. Even in the presence of a strong pulse, due to tailing of the Gaussian shaped pulse, some of the residual interference signal remains in the blanked signal.

In the proposed algorithm in this paper, an attempt is made to alleviate the problem aforementioned, by block averaging the absolute value of each of the ADC output samples. The

threshold for detection is then derived from the distribution of these transformed output samples.

The algorithm and its implementation aspects are detailed in the section III. The Hardware setup used for the generation of DME pulses and collection of data for the analysis is described in the section II. Section IV presents the test results. The paper ends with summary and conclusions in the section V.

II. HARDWARE TEST SETUP

The hardware setup used to validate and test the Digital Pulse Blanking (DPB) Algorithm is as shown in the Figure 3. The DME interference is generated at a frequency of 1176.42 MHz, which coincides with the IRNSS SPS L5 center frequency. The number of pulse pairs is limited to 3000 pp/s and the duty cycle is varied from 10% to 90%. The DME Interference signal is combined with the output of Accord’s multi-channel IRNSS Simulator and fed to an IRNSS L5 Receiver.

A. Generation of DME Interference Signal

The DME – Gaussian pulses is generated in the Matlab using (1) and the sample values fed to an Arbitrary Waveform Generator (AWG).

( ) ( )2 22 2

6

11 2

( )

12

4.5

t t t t

DMEP t e e

t e

e s

(1)

The output of AWG was earlier up-converted to 1176.42 MHz by mixing it with the signal of same frequency from a signal generator as shown in the Fig.4 (a). During setup validation, it was found that there was a small DC offset in the AWG output. Due to which the carrier was found to leak in the output creating a DME source with both pulsed and continuous interference. This setup is rectified by two stageup conversion as shown in the Fig.4(b), where the AWG is used to generate a modulated DME signal at 20 MHz. This AWG output is then up converted to 1176.42 MHz by mixing it with a frequency of 1156.42 MHz and then filtering with a Cavity filter at 1176.42MHz of bandwidth 30 MHz. Thus creating a DME, pulsed interference only source.

Figure 3: Block diagram of Hardware setup for validating DPB algorithm.

Fig.4. DME Pulse Generation (a) Architecture 1- Direct Modulation

(b) Architecture 2- two-stage up-conversion.

B. Accord’s IRNSS simulator and Receiver

Accord’s GNSS Simulator is a configurable, multichannel, multi-frequency, and multi constellation GNSS RF signal Simulator. This Simulator was configured and used to simulate 7-channels of IRNSS SPS signal. A scenario for the User at a static position was used for testing.

The IRNSS Receiver used is again an Accord’s L5, 7-channel receiver. The data used for analysis, development and testing was collected using this receiver. The DPB algorithm was implemented in the Correlator-FPGA part. The details of the algorithm and implementation specific details are covered in the section that follows.

III. ALGORITHM AND IMPLEMENTATION

As explained earlier in the traditional time-domain Digital Pulse blanking algorithm, it is difficult to clearly distinguish the desired signal samples from the interference signal samples due to the tailing of the Gaussian shaped pulse [4]. Because of this tailing, a part of the interference signal gets buried in the noise. Therefore some residual interference signal always remains in the signal after blanking. This problem is alleviated by the algorithm presented in the Fig.6.

The basic principle of this algorithm is to average out the noise or the desired signal samples and determine the envelope of the interference signal. This averaging process reduces the noise variance and the interference signal tailing begins to reveal itself as shown in the Fig.5. This revelation can be used to set the threshold values more accurately, thus improving the performance of the blanking algorithm. The Fig.5 shows a possible blanking threshold TH with traditional time domain blanking algorithm and threshold set after taking a moving average of the |x(n)|with the mean value subtracted. There is a marked improvement in the threshold value calculation, which is close to the start of the Gaussian interference pulse. Moving average is used here for the illustration purpose only, whereas, in the proposed algorithm Block averaging is used in order to detect the envelope of the interference signal more accurately.

The Algorithm is described here with reference to the receiver hardware. As shown in the Fig.6, the output of ADC is split into two signal paths inside the FPGA (Spartan 3 -

XCS35000). In one path, 2-bits are derived out of 8-bit ADC output and sent to the correlator for further processing. In the parallel path, the DPB algorithm is implemented of which the Block averaging filter, Distribution generation, Threshold estimation and the Comparison and Blanking are the main constituent blocks.

Fig.5. Comparison of thresholds for traditional DPB and proposed algorithm

Fig.6. Block Diagram of the proposed DPB Algorithm

A. Block averaging filter

The absolute value of each of the quantized 8-bit ADC output samples is taken first and then passed through a block-averaging filter of N samples. Block averaging is achieved by an N-sample moving average filter and then down sampling the output of the filter by N samples. The Fig.7shows input x(n) to the FPGA and corresponding signal at the output of the Block averaging filter z(n)for a strong DME pulsed interference for N=8.

1-NNp

Npn|x(n)|

N

1z(n)

Where, ..2,1,0p

(2)

The samples were collected over 4 ms at sampling frequency of 30.1 MHz. As seen in theFig.7, the envelope of the DME pulse becomes clearer against the averaged noise floor. The samples of this envelope are compared against the estimated threshold value in real time.

B. Distribution Generation

The threshold value is calculated from the distribution of the detected envelope samples. This distribution is again generated inside the FPGA from z(n) by the Distribution generation block and periodically read by the DSP for user display and calculation of the threshold. The assumption made in the calculation of the threshold is that the DME interference

environment does not change drastically over the period of calculation of threshold.

Fig.7. (a) Input signal x(n) and its zoomed version (b) Output z(n)and its

zoomed version

The distribution of z(n) can also be directly calculated from the distribution of x(n). This will avoid the |x(n)| operation and Block averaging filter block in the FPGA. Assuming that the PDF of x(n) is Gaussian with mean zero and standard deviation

, the distribution of y(n) in the Fig.6, is a half normal distribution given by (3).

0,2

exp2

)(2

2

y

yyfY

where,

2

(3)

From (2) where and assuming each sample value y(n) to be independent and identically distributed with the PDF of the PDF of z(n), ) is (N-1) times convolution of with itself, scaled by N. The calculated and theoretical PDFs of z(n) are as shown in theFigure 8(a). Figure 8(b) shows the distribution of z(n) in the presence of a strong DME interference.

Figure 8: (a) PDF of z(n) , (b) PDF of z(n) with pulsed interference

C. Threshold calculation

The threshold calculation involves finding the tail end of the distribution of z(n) as shown in the Figure 8(b), and then subtracting the mean of this distribution from this value. This task is performed in the DSP. Since the |x(n)|operation is performed and then block averaging is carried out, the envelope gets shifted by an amount equal to the mean of the distribution. Therefore the mean needs to be subtracted to set the threshold value accurately.

(4)

D. Comparison block:

The samples of the detected Interference envelope z(n) are compared against this thresholdThin real time. If z(n) exceeds this value a detection pulse is generated which is used to stall the Accumulator in the Correlator section of the FPGA. In the Fig.6, an alternate path is shown for the ADC outputs from which 2-bits are generated and sent to the Correlator section for further processing. The delay between the two paths is matched so that the detection pulse stalls the Accumulator exactly at the instant the DME interference sample is at the input of it. Thus the blanking part is achieved by stalling the Accumulator (Fig.6).

IV. TEST RESULTS

Using the setup as described in the section II and with the proposed algorithm (described in section III) implemented in the FPGA and DSP of the IRNSS receiver, tests were conducted to record the CNR degradation at different duty cycles of the Pulsed interference and at different power levels. The results are as plotted in the Fig.9. The results are compared against the theoretical degradation curve equation given in [1]. It is seen that for a strong to moderate DME signal interference levels, the algorithm performs really well. The Acquisition plots in Fig.10(a) and Fig.10(b) further validate this and TABLE 1 quantifies the acquisition performance of the proposed algorithm.

Fig.9. CNR degradation with varying duty cycles and Interference power

levels

Fig.10. (a) Acquisition plot before Pulse Blanking, (b) Acquisition plot after

Pulse Blanking.

TABLE 1. ACQUISITION PERFORMANCE

Sl No Signal Condition Peak to Average

Correlation value

1. IRNSS signal without Pulsed interference

5.3797

2. IRNSS signal with Pulsed Interference

2.7243

3. IRNSS signal + Pulsed Interference +Pulse Blanking enabled

5.0778

The Fig.11 shows a snapshot of the DME signal captured at IF in the receiver triggered with respect to the Pulse detection output of Comparison block in the FPGA. The detection pulse is in excellent coherence with the DME pulse. The slight delay observed is attributed to the propagation delay of the signal from input of ADC to the comparison block output in the FPGA.

Fig.11. Output Observed in digital Oscilloscope.

V. SUMMARY AND CONCLUSIONS

A time domain digital pulse blanking was presented along with the implementation details. The results presented were obtained on an actual hardware, which show that the proposed algorithm works very well for a moderate to high DME interference signal. The tests were conducted with the AGC disabled. The authors are presently working on a method to make use of the DME pulse detection signal in order to control the AGC gain. They also plan to explore the wavelet based methods and feasibility of implementing the methods in hardware for weak pulsed interference mitigation.

REFERENCES

[1] Hegarty, C., A.J. Van Dierendonck, D. Bobyn, M. Tran, T. Kim, J.

Grabowski, “Suppressing of Pulsed Interference through Blanking.”

Proceedings of Proceedings of the IAIN World Congress, San Diego,

CA, June 2000

[2] Grabowski, J, Hegarty, C, “Characterization of L5 Receiver

Performance Using Digital Pulse blanking”, Proceeding of The Institute

of Navigation GPS Meeting, Portland, OR, Sept 2002

[3] Bastide, F., Akos, D., Macabiau, C., Roturier, B., "Automatic Gain

Control (AGC) as an Interference Assessment Tool," (ION GPS/GNSS

2003), Portland, OR, September 2003, pp. 2042-2053.

[4] Grace XingxinGao, “DME/TACAN Interference and its Mitigation in

L5/E5 Bands”, ION Global Navigation Satellite Systems Conference

2007, Fort Worth, Texas, September 2007