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Wire Length Prediction-based Technology Mapping and
Fanout Optimization
Qinghua Liu
Malgorzata Marek-Sadowska
VLSI Design Automation Lab
UC-Santa Barbara
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Outline Motivation and previous work Pre-layout wire length prediction Technology mapping with wire-length
prediction Fanout optimization with wire-length
prediction Experimental results Conclusions and future work
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Motivation
Traditional logic synthesis does not consider accurate layout information
Placement quality depends on netlist structure placement algorithm
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Previous work Logic and physical co-synthesis
Layout-driven logic synthesis Local netlist transformations Metric-driven structural logic synthesis
Adhesion Distance
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Pre-layout wire-length prediction Previous work
Statistical wire-length prediction Lou Sheffer et al. “Why Interconnect Prediction Doesn’t
work?” SLIP’00
Individual wire-length prediction Qinghua Liu et al. “Wire Length Prediction in Constraint
Driven Placement” SLIP’03
Semi-individual wire-length prediction Predict that nets have a tendency to be long or short
Qinghua Liu et al. “Pre-layout Wire Length and Congestion Estimation” DAC’04
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Summary of the semi-individual wire length prediction technique Predict lengths of connections
Mutual contraction
Predict lengths of multi-pin nets by Net range
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Mutual contractionB.Hu and M.Marek-Sadowska, “Wire length prediction based clustering andits application in placement” DAC’03
uu
vv
xx
yy
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Relative weight of a connection
uu
vv
xx
yyWr(x, y) = 0.5
Wr(u, v) = 0.71
EQ1
EQ2
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EQ3Cp(x, y) = Wr(x, y) Wr(y, x)
xx
yyj
Wr(x, y) = 0.71
Wr(y, x) = 0.6
Cp(x, y) = 0.426uu
vvi
Wr(u, v) = 0.71
Wr(v, u) = 0.33
Cp(u, v) = 0.234
Mutual contraction of a connection
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Predictions on connections
(a) (b)
Mutual contraction vs. Connection length
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Net range
0 1 2 3 4 5 6 7 8 9 10 11
Example of net range
Circuit depth
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Net range vs. average length for multi-pin nets
Predictions on multi-pin nets
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Technology mapping with wire-length prediction (WP-Map) Node Decomposition Technology Mapping
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Gabc
ab
c
a
bc
Node decomposition
T.Kutzschebauch and L.Stok, “Congestion aware layout driven logic synthesis”, ICCAD’01
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CurrentPinNum=CurrentPinNum-1
CurrentPinNum=n
Decompose(G,n1,n2)Remove n1 and n2,
insert new net
Y
DoneN
Decompose n-input gate G with wire length prediction
CurrentPinNum>2?
(n1,n2)=two input netswith largest
mutual contraction
Updatemutual contraction
Greedy node decomposition algorithm
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Correlation between mutual contraction and interconnection complexity
Average mutual contraction vs. Rent’s exponent
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Technology mapping
EQ4
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Fanout optimization with wire-length prediction (WP-Fanout) Net selection
Select all large-degree nets Select small-degree nets with large net range
Net decomposition
Circuit depth LT-tree Balanced tree
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Experiment setting LGSyn93 benchmark suite
Optimized by script.rugged Mapped with 0.13um industrial standard cell
library
Placement is done by mPL4 Global routing is done by Labyrinth
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Experimental results Compare with the traditional area-driven
technology mapping algorithm implemented in SIS
Results of the WP-Map algorithm Results of combined WP-Map and WP-
Fanout algorithm
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Compare WP-Map with SIS
1 1 1
0. 93
1. 09
1. 03
0. 85
0. 9
0. 95
1
1. 05
1. 1
1. 15
p #gate area
SI SWP- Map
Compare mapped netlists
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Compare WP-Map with SIS (cont.)
Average cut number distribution of C6288
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Compare WP-Map with SIS (cont.)
Results after placement and global routing
1 1 1 1
0. 97
0. 95
0. 9
1. 01
0. 84
0. 86
0. 88
0. 9
0. 92
0. 94
0. 96
0. 98
1
1. 02
TWL ave_con peak_con cr i _path
SI SWP- Map
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Compare WP-Map + WP-Fanout with SIS
Results after placement and global routing
1 1 1 10. 97
1
0. 83
0. 99
0. 910. 93
0. 86
0. 98
0. 75
0. 8
0. 85
0. 9
0. 95
1
1. 05
TWL ave_con peak_con cri _path
SI SWP-Map+WP-Fanout(B- tree)WP-Map+WP-Fanout(LT- tree)
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ConclusionsWire length can be predicted in structural
level Mutual contraction Net range
Wire length prediction technique can be applied into technology mapping and fanout optimization 8.7% improvement on average congestion 17.2% improvement on peak congestion
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Future work Logic extraction with wire-length and
congestion prediction Timing-driven technology mapping with
wire-length prediction