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ESD Suppression
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Introduction/Circuit Protection
Voltage Transients - Emphasis on ESD ESD Suppression Technologies
Usage of ESD Suppressors - In Applications
Board Layout Considerations
Overview:
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OVERCURRENT
PROTECTION
OVERVOLTAGE
PROTECTION
CIRCUIT PROTECTION
Circuit Protection Overview
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ESD
Suppressor
Fuse/PTC CircuitryPower
Source
PowerInput
Fuses/PTCsSeries devices that open
to break overload currents.
Digital Waveform
Littelfuse ESD SuppressorsParallel devices that shunt
damaging transients to ground.
Fault Current
Signal
Input
ESD
Pulse
Circuit Protection Comparison
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A sudden change in the electrical condition of any circuit
will cause a transient voltage to be generated from the
energy stored in circuit capacitance and inductance.
Effective transient overvoltage protection requires that the
impulse energy be dissipated in the added suppressor at a
voltage low enough to ensure survival of the circuit
components.
What is an Electrical Transient?
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ESD (Electro-Static Discharge)
Lightning Strike
Inductive Load Switching
Commutative Spikes
Automotive Load Dump
Examples of Voltage Transients
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75% of field equipment failure are caused by Electrical
Over-Stress (EOS)!!!
Semiconductor devices are becoming increasingly
Intolerant to voltage transients
ALightningstrike several miles away can induce
transients in your equipment
Power distribution transformers susceptibility impacts
clean power condition
ESD failures can occur in CMOS at 2kV common,
where as most EOS occurrences are at 8kV or higher
Did You Know?.
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EMC REQUIREMENTS
ESD
EFT SURGES
WHITE GOODS
LINE TRANSFORMER
PROTECTION
LIGHTNING INDUSTRIAL
PANELS
TVSS APPLICATIONS
UL 1449, BSS 587
ANSI C62.1
PORTABLE ELECTRONIC
EQUIPMENT
ESD
TELECOM
EQUIPMENT
AUTOMOTIVE
ISO 7637
GM 9105
LOAD DUMP
PROTECTION OF
INDUCTIVE LOADS
TRANSIENT BURSTS
Suppression
Where is Transient Protection Needed?
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DEFINITION: The rapid transfer of
electrostatic charge between objects.
Discharges below 3,000V are usually not
perceived by humans Discharges can exceed 15,000V
Not lethal to humans, but can damage or kill
electronic devices during production or in the
field
ESD exists EVERYWHERE
What is ESD (ElectroStatic Discharge)?
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The human body is a good generator of ESD
The potential between a human body & an object canexceed 35,000 volts.
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Typical ESD values
Means of Static Generation ESD @ 10 20%Relative Humidity
ESD @ 65 90%Relative Humidity
Walking across carpet 35,000 V 1,500 V
Walking over vinyl floor 12,000 V 250 V
Worker at bench 6,000 V 100 V
Vinyl envelope 7,000 V 600 V
Work chair padded withpolyurethane 18,000 V 1,500 V
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DEVICES ARE GETTING MORE SENSITIVE:
SMALLER FEATURES, DENSER IC GEOMETRIES
Lower Operating Voltages
Higher Operating Speeds
Greater Functionality
ESD ACCOUNTS FOR 30% OF ALL FIELD
FAILURES
DEMANDING NEW STANDARDS
LIMITATIONS OF EXISTING DEVICES
The Need for ESD
Protection is Increasing
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Vline
Transient Event
Crowbar Suppression Device:
e.g Surgector
Vline
Trigger Voltage
Reset Time
Crowbar Devices
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Multi Layer Varistor (MLV)
Designed for Low-Voltage DC Applications;
3.5V to 120V
Applications can include:
ML and MLE Series: Low Voltage, Board Level
Products (Hand-Held/Portable devices, Computer/EDP,
Instrumentation, Medical Electronics, etc.)
AUML and ML Series: Automotive Electronics
(Antilock brake systems, Wiper Modules, Airbag control
systems, etc.)
ML and MLE Series: Telecommunications Products(Cellular/Cordless Phones, Modems, Line Cards, etc.)
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SurgeArray Multi layer Varis to r
Network The SurgeArray network is a set offour independent Multilayer Varistors in a
single surface mount package (1206).
SurgeArray Networks were designed to meet the needs ofthe Battery Operated, Portable / Handheld, Automotive, andIndustrial Markets.
The SurgeArray network helps your customers meetmandatory EMC requirements by suppressing ESD, EFT andother potentially damaging transients either generated orexperienced by their systems.
The inherent capacitance of Littelfuses Multilayer VaristorTechnology provides filtering capability to eliminate the needfor an additional capacitors.
SurgeArray networks increase component density, thusreducing board space, assembly placement costs, partscount, and system reliability
Direct upgrade for AVX(Multiguard) and Epcos (CA06 series).
=
4 0603s = 1 SurgeArray
MLV Networknot to scale
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The SP72X..A Family of Silicon Bipolar Diode / SCRIC Arrays Designed for Suppression of ESD and Other
Transients !
SP Series Diode/SCR Arrays
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Connect Input (IN) to SensitiveLine Needing Protection
Lower Pair: Clamps at 0.7Vbelow V-
SP Series Diode/SCR Arrays
Upper Pair: Clamps at 0.7Vabove V+
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Applications can Include:
Data Lines ( Parallel Ports, I/O lines, High Speed
Logic, Serial lines / USB, Switches )
Signal Lines ( Op Amps, Sensors, Comparators,
A-D lines, Receiver / Transceivers ) Control Lines ( Motor, Alarms, Pumps, Robotics )
Discrete Component Input ( MOSFET, Drivers )
SP Series Diode/SCR Arrays
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Surface Mount Avalanche
Diode Arrays
Family of avalanche diode arrays designed and testedspecifically for Transient Voltage Suppression (TVS) andEMC requirements.
Targeting applications with working voltages of 5 volts andbelow, including 3.3V systems.
Configured to protect 2, 3, 4, 5 and 6 data or signal lines inultra small SOT-23, TSSOP and MSOP packages
NAFTA represents 45% of world Avalanche Diode marketmaking this a great play for North American Distribution
Littelfuse TVS diode expansion continues with Chip Scale
Packaging in June, and more Rail Clamps in July The new Avalanche family enhances our portfolio of the
widest selection of TVS and ESD Technologies in the knownGalaxy.
Avalanche Diode Market Size
NAFTA45%
Asia28%
$350M
Europe27%
Total World WideAvalanche Diode
Avalanche DiodeSAM
$120M
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Substrate
Copper
Plating
Nickel
Plating
Tin
Plating
The Gap
Voltage Variable Material
Coating
PulseGuardVVM ESD Suppressors
Lowest Capacitance (0.050pF)
Uses polymer voltage variablematerial (VVM) instead of
electroceramic of MLVs
Supplements the on-board TVS
protection of ICs and ASICs
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Cu/Ni Electrode
Polymer binder
Cu/Ni Electrode
Metallic particleSemiconductor particle
Controlling PulseGuard1) Change VVM formula
2) +/- width of electrodes
3) +/- width of gap
Voltage Variable Material
Polymer binder
+ Metallic particles
+ Semiconductor particles
Electrode
Width
The Gap
PulseGuardVVM ESD Suppressors
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Benefit
Compatible with pick-and-place
technologies, and reflow and wave
solder processes.
< 1pF (0.055 pF); PulseGuard does
not interfere with high speed signals.
< 100 pA; PulseGuard pulls virtually
no current from battery in portable
applications, does not interfere with
high input impedance circuits.
Minimizes new product lead-time.
Custom products can be turned
around quickly.
Feature
Surface Mountable
Low Capacitance
Low Leakage Current
Configurability
PulseGuardVVM ESD Suppressors
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Computer
Desktop Laptops/Notebooks
Peripherals (Monitor/Display, Printer, Scanner, Plotter)
Network Hardware
Electronic
Personal Digital Assistants (PDAs) Flat Panel Displays
Digital Set Top Boxes
Industrial/Process Controllers
Multimedia Interface Hardware
Medical and Test Equipment
Telecom Cell Phone Data Ports
Secondary side of Network Interface Products
Target App l icat ions
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Target Appl icat ions
ESD Protection for signal, data and control linesCellular Phones
PDAs
Digital Cameras
Printers
Set-top boxes
Cable ModemDSL Modem
Laptop Computers
Cable Modem
Cell Phone
PDA
Digital Camera
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STRAY CAPACITANCE CONSIDERATION
.... Goal is to minimize/eliminate signal distortion
Time
Voltage
Desired Digital Wave Shape
Distorted Wave Shape
LOW LEAKAGE CURRENT
. Compatible with low-power portable equipment
and High-Impedance analog circuits
Key Characteristics of ESD Suppressors
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Capacitance Key:
V5.5MLA0603 - 660 pFSMD Capacitor - 390 pF
V18MLE0603 - 100 pF
PGB0010603 - 0.05 pF
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FAST RESPONSE TIME
LOW CLAMPING VOLTAGE
HIGH CURRENT HANDLING
.... These features give the suppressor the ability to protect
sensitive components against multiple severe ESD events
TVS
IC with Internal TVS Structures
Rs
SMALL SIZE -- There are no Diodes or MOVs that can provide low capacitance in the 0603 size!!
LF
ESD
Key Characteristics of ESD Suppressors
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ESD Suppressor Usage - General Overview
Integrated Circuitry
(To be protected)
Data/Signal Interface
Human/User Interface
AC/DC
Power
Input
USB, FireWire, DSub, RJ (Ethernet), Antenna, etc
Keyboard, Keypad, Speaker, Mouse, etcExamples
Computer (networks, peripherals)
Flat Panel DisplaysPersonal Digital Assistants (PDAs)
Cell phones, pagers
Set top boxes (satellite and cable)
Medical Equipment
Test Instrumentation
The speed of the signals found on theinterface (I/O) lines will help determine
which ESD technology to use.
- MultiLayer Varistors, SCR/Diodes, PulseGuard
ESD Suppressor(s)
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D+
D-
VBUS
Signal
Ground
USB
Port USBController
OutsideW
orld
PGB0010603
Note: ESD suppressor must be installed as close
to the connector as possible to minimize overshoot
D+
D-
VBUS
Signal
Ground
Via to
VBUS
Plane
PGB0010603
PTC - 1812L260
MLV - V5.5MLA0603
MLV - V5.5MLA0603
Via to
Signal Ground
Plane
Via to
Signal Ground
Plane
Application Example - USB2.0 BusUSB2.0, up to 480 Mbps
Signal
GroundShield/Chassis
Ground
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USB
Ports
OutsideWor
ld
USB
Controller
1D+
1D -
VBUS
Ground
1812L150
1 2
6
3
5 4 SP0505BAHT
2D+
2D -
USB
Port 1
USB
Port 2
Dual Port Universal Serial Bus (USB)
SMT Avalanche Diode App l icat ion Examples
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D+(1)
D-(1)
VBUS
Signal
Ground
1394b
Port 1394bController
OutsideWorld
PGB0010603
Note: ESD suppressor must be installed as close
to the connector as possible to minimize overshoot
PGB0010603
D-(2)
D+(2)PGB0010603
PGB0010603
PTC - 1.5A, 33V
MLV - V33MLA1206
Application Example - IEEE 1394b Bus1394b, up to 1.6 Gbps
Signal
GroundShield/Chassis
Ground
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Antenna
- 800 - 1800 MHz
- PGB0010603
Keypad- low speed
- V9MLA0603
- V18MLN41206
I/O Connector
- medium to high speed
- V9MLA0603- V18MLN41206
- PGB0010603
- PGB008CA10
Cell Phone Application Example
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Minimize Distance Between the ESD Event
and the ESD Suppressor
Maximize Distance Between the ESD
Suppressor and the I/C to be Protected
Minimize Impedance between the ESD
Suppressor and Ground
Board Layout Considerations
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Keep the trace lengths from the I/O line to
the Suppressor and from the Suppressor to
the Ground plane as short as possible
Minimize bends in board traces
Minimize Suppressor-Ground Impedance
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TVS
D1 D2
Due to fast rise time of ESD transient,
lengths (trace and lead) becomeextremely important. They will affect
the voltage that is ultimately seen by
the IC to be protected.
Two Key Design Parameters
Issue Solution
TVS to use Surface Mount; close to I/O line (D3 is small)
Placement of TVS Minimize distance to source (D1 is small)
I/O Line
D3
Signal
Ground
Minimize Suppressor-Ground Impedance