![Page 1: Abstraction :Managing Design Complexity through High-Level C-Model Verification Mike Andrews Mentor Graphics Yuan-Shiu Chen 2003.10.3 present](https://reader036.vdocument.in/reader036/viewer/2022082415/5a4d1b3d7f8b9ab05999f6f7/html5/thumbnails/1.jpg)
Abstraction:Managing Design Complexity through High-Level C-Model Verification
Mike AndrewsMentor Graphics
Yuan-Shiu Chen 2003.10.3 present
![Page 2: Abstraction :Managing Design Complexity through High-Level C-Model Verification Mike Andrews Mentor Graphics Yuan-Shiu Chen 2003.10.3 present](https://reader036.vdocument.in/reader036/viewer/2022082415/5a4d1b3d7f8b9ab05999f6f7/html5/thumbnails/2.jpg)
OutlineUsing abstract C_Modeling to see architectural developments
Optimizing Bus Arbitration Using Seamless with C-Bridge
Example (simple picture displayer)
![Page 3: Abstraction :Managing Design Complexity through High-Level C-Model Verification Mike Andrews Mentor Graphics Yuan-Shiu Chen 2003.10.3 present](https://reader036.vdocument.in/reader036/viewer/2022082415/5a4d1b3d7f8b9ab05999f6f7/html5/thumbnails/3.jpg)
Introduction
ObjectiveReduce system verification runtimesVerification earlier
MethodologyVerify system components in high-level C modelsBuilt around an ARM 926 embedded processorSeamless C-Bridge co-verification environment
![Page 4: Abstraction :Managing Design Complexity through High-Level C-Model Verification Mike Andrews Mentor Graphics Yuan-Shiu Chen 2003.10.3 present](https://reader036.vdocument.in/reader036/viewer/2022082415/5a4d1b3d7f8b9ab05999f6f7/html5/thumbnails/4.jpg)
Abstraction C-ModelingCreate and simulate faster than RTL modelVerify the design during the early stages
Less costly, accomplishing tasks early, boost design productivityReduce time to debug problems at detail levelDevote more time to improving their designs
![Page 5: Abstraction :Managing Design Complexity through High-Level C-Model Verification Mike Andrews Mentor Graphics Yuan-Shiu Chen 2003.10.3 present](https://reader036.vdocument.in/reader036/viewer/2022082415/5a4d1b3d7f8b9ab05999f6f7/html5/thumbnails/5.jpg)
Optimizing Bus Arbitration Using Seamless with C-BridgePerformance analysis (Version 5)
Better understanding of the performance characteristics of their designImmediate feedback of design change
C-Bridge allows the hardware to be an abstract C-modelMix-and-match C and HDL models written at different abstraction levels
![Page 6: Abstraction :Managing Design Complexity through High-Level C-Model Verification Mike Andrews Mentor Graphics Yuan-Shiu Chen 2003.10.3 present](https://reader036.vdocument.in/reader036/viewer/2022082415/5a4d1b3d7f8b9ab05999f6f7/html5/thumbnails/6.jpg)
Example: picture displayer
Purpose : to see whether the system still functions correctly after additional timing information
A basic block diagram for a simple picture displayer
![Page 7: Abstraction :Managing Design Complexity through High-Level C-Model Verification Mike Andrews Mentor Graphics Yuan-Shiu Chen 2003.10.3 present](https://reader036.vdocument.in/reader036/viewer/2022082415/5a4d1b3d7f8b9ab05999f6f7/html5/thumbnails/7.jpg)
Example: picture displayer (cont.)
Seamless Version 5 Performance Profiler bus loading view.
Fix the problem by modifying the arbitration scheme dynamically, without leaving the simulation.
Change dynamically by sending a command to the arbiter model
![Page 8: Abstraction :Managing Design Complexity through High-Level C-Model Verification Mike Andrews Mentor Graphics Yuan-Shiu Chen 2003.10.3 present](https://reader036.vdocument.in/reader036/viewer/2022082415/5a4d1b3d7f8b9ab05999f6f7/html5/thumbnails/8.jpg)
Example: picture displayer (cont.)
Seamless Version 5 Performance Profiler arbitration delay view.
0~10 (ms) : attempt to display a picture10~20 (ms) : picture display process where the maximum value of 16 is used for arbiter parameter20~30 (ms) : parameter reduce to 4
![Page 9: Abstraction :Managing Design Complexity through High-Level C-Model Verification Mike Andrews Mentor Graphics Yuan-Shiu Chen 2003.10.3 present](https://reader036.vdocument.in/reader036/viewer/2022082415/5a4d1b3d7f8b9ab05999f6f7/html5/thumbnails/9.jpg)
ConclusionAbstract modeling and the Seamless performance analysis engine reduce overall verification times
Contribute to the creation of optimal designs
Increases design productivity, boosts confidence in the design of complex system.