Download - Ch 8 CPU Organization
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Final Review
Dr. Lalit Kumar Tyagi
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Binary selector input
1) MUX A selector(SELA) : to place the
content of R2 into BUS A
2) MUX B selector
(SELB) : to place thecontent of R3 into BUS B
3) ALU operation
selector (OPR) : to
provide the arithmetic
addition R2 + R3
4) Decoder selector
(SELD) : to transfer the
content of the output bus
into R1
321 RRR
GENERAL REGISTER ORGANIZATION
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Stack Organization Stack: A storage device that stores
information in such a manner that the item
stored last is the first item retrieved.
Also called last-in first-out (LIFO) list.Useful for compound arithmetic operations
and nested subroutine calls.
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8.3 Stack Organization Stack pointer (SP): A register that holds
the address of the top item in the stack.
SP always points at the top item in thestack
Push: Operation to insert an item into thestack.
Pop: Operation to retrieve an item from thestack.
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REGISTER STACK A stack can be
organized as a
collection of a finitenumber of registers.
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In a 64-word stack, thestack pointer contains 6 bits.
The one-bit register FULLis set to 1 when the stack isfull;EMPTY register is 1 whenthe stack is empty. The data register DR holdsthe data to be written into orread from the stack.
REGISTER STACK
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Initialization
SP 0,EMPTY 1,FULL 0
PUSH Operation
SP SP + 1M[SP] DRIf (SP = 0) then (FULL 1)
Note that SP becomes 0 after 63
EMPTY 0
The following are the micro-operations
associated with the stack
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DR M[SP]SP SP - 1If (SP = 0)
then(EMPTY 1)FULL 0
POP Operation
The following are the micro-operations
associated with the stack
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STACK OPERATIONS
REVERSE POLISH NOTATION (postfix) Reverse polish notation :is a postfix
notation (places operators after operands)
(Example)Infix notation A + B
Reverse Polish notation AB+
(also called postfix notation)
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STACK OPERATIONS
REVERSE POLISH NOTATION (postfix)A stack organization is very effective for
evaluating arithmetic expressions:
A * B + C * DAB * CD * +
( 3 * 4 ) + ( 5 * 6 )
34 * 56 * +
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STACK OPERATIONS
REVERSE POLISH NOTATION (postfix)n Evaluation procedure:
n 1. Scan the expression from left to right.2. When an operator is reached, perform the operation with thetwo operands found on the left side of the operator.3. Replace the two operands and the operator by the resultobtained from the operation.
n (Example)infix 3 * 4 + 5 * 6 = 42postfix 3 4 * 5 6 * +
n 12 5 6 * +12 30 +42
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STACK OPERATIONS
REVERSE POLISH NOTATION (postfix) Reverse Polish notation evaluation with a stack.
Stack is the most efficient way for evaluatingarithmetic expressions.
stack evaluation:Get valueIf value is data: push dataElse if value is operation: pop, popevaluate and push.
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STACK OPERATIONS
REVERSE POLISH NOTATION (postfix) (Example) using stacks to do
this.3 * 4 + 5 * 6 = 42
3 4 * 5 6 * +
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The most common fields in instruction formats are:
1. Mode field: Specifies the way the effective address is determined
2. Operation code: Specifies the operations to be performed.
3. Address field: Designates a memory address or a processor
register
Mode Opcode Address
Instruction Formats
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8.4 Instruction Formats Zero address instruction: Stack is used. Arithmetic operation
pops two operands from the stack and pushes the result.
One address instructions: AC and memory. Since the
accumulator always provides one operand, only one memoryaddress needs to be specified.
Two address instructions: Two address registers or twomemory locations are specified, one for the final result.
Three address instructions: Three address registers or
memory locations are specified, one for the final result.It is also called general address organization.
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Zero address instructions
Instruction: ADDPush and pop operations need to specify one address involved indata transfer.
Instruction: POP XEvaluateX = ( A + B ) * ( C + D )
Stack-organized computer does not use an address field forthe instructionsADD, and MUL
PUSH, and POP instructions need an address field tospecify the operand
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Zero address instructions
PUSH A
PUSH B
ADD
PUSH C
PUSH D
ADD
MUL
POP X TOSX
BADCTOS
DCTOS
DTOS
CTOS
BATOS
BTOS
ATOS
)()(
)(
)(
Advantages: No memory addresses needed during the operation.Disadvantages: Results in longer program codes.
X = ( A + B ) * ( C + D )
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One address instructions
One address can be a register name or memoryaddress.
SINGLE ACCUMULATOR ORGANIZATION
Since the accumulator always provides one operands,only one memory address needs to be specified.Instruction: ADD X
Micro-operation: AC AC + M[X]
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One address instructions
LOAD A
ADD BSTORE T ACTM
BMACAC
AMAC
][][
][
All operations are done between the AC register and memory operand
Advantages: Fewer bits are needed to specify the address.
Disadvantages:Results in writing long programs.
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Two address instructions
Assumes that the destination addressis the same as that of the first operand.
Can be a memory address or a registername.
Instruction: ADD R1, R2Micro-operation: R1 R1 + R2
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Two address instructions
MOV R1, A
MOV R2, B
ADD R1, R2
MOV X, R1 1][
211
][2
][1
RxM
RRR
BMR
AMR
most common in commercial computers
Each address fields specify either a processor register or amemory operand
Advantages: Results in writing medium size programs
Disadvantages: More bits are needed to specify two addresses.
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Three address organization
GENERAL REGISTER ORGANIZATION
Three address instructions: Memory addresses for
the two operands and one destination need to be specified.Instruction: ADD R1, R2, R3Microoperation: R1 R2 + R3
Advantages: Results in writing short programsDisadvantages: More bits are needed to specify three addresses.
ADD R1, R2, R3 321 RRR
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EXAMPLE: Show how can the following operation be
performed using:
a) Three address instruction
b) Two address instruction
c) One address instruction
d) Zero address instruction
X = (A + B) * (C + D)
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Three-Address Instructions
(General Register Organization)
ADD R1, A, B R1 M[A] + M[B]
ADD R2, C, D R2 M[C] + M[D]
MUL X, R1, R2 M[X] R1 * R2
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Two Address Instructions(General Register Organization)
MOV R1, A R1 M[A] ADD R1, B R1 R1 + M[B]
MOV R2, C R2
M[C] ADD R2, D R2 R2 + M[D] MOV X, R2 M[X] R2 MUL X, R1 M[X] R1 * M[X]
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One Address Instructions
LOAD A AC M[A]
ADD B AC AC + M[B] STORE T M[T ] AC LOAD C AC M[C] ADD D AC AC + M[D] MUL T AC AC * M[T ] STORE X M[X] AC Store
Z Add I t ti
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Zero-Address Instructions(stack organization)
Push value
Else If operator is encountered: Pop, pop, operation,push
Pop operand pop another operand then perform anoperation and push the result back into the stack.
PUSH A TOS A Push PUSH B TOS B ADD TOS (A+B) PUSH C TOS C PUSH D TOS D ADD TOS (C+D) MUL TOS (C+D)*(A+B) POP X M[X] TOS
(*TOS stands for top of stack)