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Integrated Circuit Technology(Course Code: EE662)
Lecture 1: Introduction
Indian Institute of Technology Jodhpur, Year 2015‐2016
Course Instructor: Shree Prakash Tiwari, Ph.D.
Email: [email protected]
Office: 3106, Phone: 0291‐244‐9096
Webpage: http://home.iitj.ac.in/~sptiwari/Course related documents will be uploaded on http://home.iitj.ac.in/~sptiwari/IC_Technology/
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Note: Note: The information provided in the slides are taken mainly form text of Silicon VLSI Technology (Plummer, Deal, and Griffin) and Design(Jan M. Rabaey), and from other resources from internet; for teaching/academic use only
What is this course all about?Course Objectives:• Understanding of the fabrication methods and unit processes for device and circuit fabrication and issues in current ULSIand issues in current ULSI – Unit Processes– Emerging CMOS technologies
• Learning the scientific principles associated with the technologies used in VLSI fabrication.
• Exposure to the processing for newer t h l itechnologies
• Outcome:Understanding of fabrication processes and technology associated with it
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BooksText Books:
• James D Plummer, Michael D Deal, Peter B. Griffin, Silicon VLSI Technology‐ Fundamentals, Practice And Modelling, Pearson (2009)(2009)
• S.M.Sze, VLSI Technology, Tata McGraw‐Hill, 2003.
• Stephen Campbell, The Science and Engineering of Microelectronics Fabrication, Oxford University Press, 1996
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EvaluationTheory
• Midterm Exam 1 20%
d• Midterm Exam 2 20%
• Final Exam 35%
• Lab/Assignment 25%
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ENIAC ‐ The first electronic computer (1946)
Dawn of the Transistor Age
1947: Bardeen and Brattain create point-contact transistor w/two PN junctions. Gain = 18
1951: Shockley develops junction transistor which can be manufactured in quantity.
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Introduction
Co‐recipient of Nobel prizein physics in 2000
First Point contact Transistor (1947 Bell
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Bardeen, Brattain, and Shockley (Seated) @ Bell Laboratories, 1948. The Nobel prize was given in 1956.
Transistor (1947, Bell Labs) with Germanium semiconductor, and two gold contacts separated by 50 micron.
First IC, Developed independently byJ. Kilby (Texas Instruments) andR. Noyce, J. Hoerni (FairchildSemiconductor), 1958.
Evolution of Electronic Devices
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1959: Planar Technology
• Developed at Fairchild Semiconductor
• Planar Technology (Jean gy (Hoerni): base region is diffused into collector (substrate) and emitter region into the base
• Integrated Wiring (Robert Noyce): By covering the planarNoyce): By covering the planar transistor with an oxide, a layer of aluminum can be used on top to wire the device(s)
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1961: First Commercial Planar ICs
• Based on the planar process by Hoerni and Noyce, Fairchild developed family of logic chips p y g pcalled resistors‐transistor logic(RTL)
• Example shown is flip flop with 4 bipolar transistors and five
i tresistors
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Practice Makes Perfect
1961: TI and Fairchild introduced first logic IC
(cost ~ $50 in quantity!). This is a dual flip‐flop with 4 transistors.
1963: Densities and yields improve. This circuit has four flip‐flops.
The First Integrated Circuits
Bipolar logic1960’s
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ECL 3-input GateMotorola 1966
Digital Integrated Circuits, 2nd Ed., Rabaey.
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Practice Makes Perfect
1967: Fairchild markets the first semi‐custom chip. Transistors (organized in columns) can be easily rewired to create different circuits. Circuit has ~150 logic gates.
1968: Noyce and Moore leave Fairchild to form Intel1968: Noyce and Moore leave Fairchild to form Intel. By 1971 Intel had 500 employees;
By 2004, 80,000 employees in 55 countries and $34.2B in sales.
The Big Bang
1970: Intel starts lli 1k bit RAMselling a 1k bit RAM,
the 1103.
1971: Ted Hoff at Intel designed the first microprocessor. The 4004 had 4‐bit busses and a clock rate of 108 KHz. It had 2300 transistors and was built in a 10 um process.
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Exponential Growth
1972: 8080 introduced.
Had 3,500 transistors supporting a byte‐wide data path.
19 d i f h 80881974: Introduction of the 8088.
Had 6,000 transistors in a 6 um process. The clock rate was 2 MHz.
From 4 Transistors to 300‐mm WafersBatch Fabrication
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•In 2006
Intel Core 2 Microprocessor
•143 mm2
•3 GHZ operation•65 nm CMOS technology
•291 mln transistors
Integrated Circuits
22 nm CMOS
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Moore’s Law
In 1965 Gordon Moore noted that theIn 1965, Gordon Moore noted that the number of transistors on a chip doubled every 18 to 24 months.
He made a prediction that semiconductor h l ll d bl ff
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technology will double its effectiveness every 18 months
Moore’s Law
1,000,000K 1 Billion Transistors 1 Billion Transistors
!!!!!!
100,000
10,000
1,000
10
100
8086
80286i386
i486Pentium®
Pentium® ProPentium® II
Pentium® III
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11975 1980 1985 1990 1995 2000 2005 2010
8086Source: IntelSource: Intel
ProjectedProjected
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Transistors on Lead Microprocessors double every 2 years
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The Ever Shrinking Transistor
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Using 45 nm technology, ≈ 400 transistors fit on a red blood cell!
Design Hierarchy
SYSTEM
+
CIRCUIT
GATE
MODULE
n+n+S
GD
DEVICE
CIRCUIT
22Digital Integrated Circuits, 2nd Ed., Rabaey.
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Complementary MOS Transistors (CMOS)
• Fabricate PMOS and NMOS devices on the same substrate to build complementary MOS (CMOS)
• This is solved by using a p‐tub diffusion to create the background for the n‐channel devices
p
VDD
n
GND
A Y = A'
[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]
Advantages of CMOS
• Very low power consumption.
R il t il lt• Rail‐to‐rail voltage.
• Modular design.
• Reliable and robust.
Choice of the industry!
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Not only Conventional CMOS
Yoo et al. High performance CMOS-compatible super-junction FINFETs for Sub-100V Applications (IEDM 2010)
Tsai et al. 2013 (http://spie.org/)
25 nm thick organicsemiconductor
Au source electrode
Au Drain electrode
Xie et al. Breakdown Voltage Enhancement Technique for RF Process Compatible Power AlGaN/GaN HEMTs (ISPSD 2012)
Al GatePEN substrate
3.6 nm thick AlOx
(gate dielectric)
1.7 nm thick HC14‐PA (SAM)
(30 nm)electrode (30 nm)
S. Bisoyi et al., Organic Electronics. 15, 3173 (2014)
Evolution of Electronics
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Summary
• CMOS will be continuing for next many years
• Proper understanding and Training for CMOS and VLSI is requiredand VLSI is required
• Research for new device designs and materials is necessary
• Exploratory work should also be encouraged for new technologies
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For researchers…. • New Circuit Design Techniques• Novel Device Structures
Double gate MOSFETs– Double gate MOSFETs– FinFETs
• New materials for electronics– Graphene– Carbon nanotubes (CNTs)– Organic semiconductors
• Cost reduction and large area circuits/systems– Organic/Flexible/printed Electronics
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Along with training and manpower building, exploratory research is necessary
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Lab assignment
• http://www.siborg.ca/microtec.html
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