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Hardware
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Microcontroller Unit (MCU)
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Multiple components in same chip CPU
Volatile memory (e.g. RAM)
Persistent memory (e.g. Flash)
Analog-to-Digital Converters
Timers (alarms, stop-watches)
Peripheral interfaces
Radio
…
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System Clock
Inputs:
Low-frequency crystal (kHz range)
High-frequency crystal (MHz range)
Internal oscillator
Outputs:
Master Clock
Sub-Main Clock
Auxiliary Clock
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Power Operating Modes
5 Low-Power Modes in total
Active Mode: CPU active, all clocks active
LPM0: CPU disabled, SMCLK and ACLK active
LPM3: CPU disabled, ACLK active
LPM4: CPU, all clocks disabled
5 Image: Texas Instruments
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Timer Module
16-bit counter connected to either SMCLK or ACLK
Counts number of clock cycles
Measure elapsed time
Timestamp events
Set alarms at specific points
Continuous/Up-down mode
Overflow
Capture/Compare Module
Read counter when an event occurs
Generate event when counter reaches specific value
6 Image: Texas Instruments
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Watchdog Timer
Similar to Timer Module, except
Microcontroller resets when alarm is triggered
Clear counter periodically to avoid it (i.e. ‘feed the watchdog’)
Useful to reset microcontroller to a known state
The watchdog is enabled by default after reset
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General Purpose Input/Output Pins (GPIO)
Input Pin
High voltage reads ‘1’ – low voltage reads ‘0’
High – MCU supply voltage minus Δ
Low – 0V plus Δ
Output Pin
Write ‘1’ sets voltage high – write ‘0’ sets voltage low
Interrupt capable Pin
Interrupt program flow when input value changes
E.g. press button to make voltage go low
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Analog-to-Digital Converter (ADC)
12-bit ADC
Measure input voltage as a fraction of the reference voltage
Comparator
Compare voltage between two analog signals
DAC
Digital-to-Analog Converter
9 Image: Texas Instruments
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External communication
GPIO pin
Turn peripherals on/off, configure peripherals
Manually transmit 1 bit at a time – ‘bit banging’
Universal asynchronous receiver/transmitter (UART)
Speed: 115 kbit/s
10 Images: Wikipedia
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1-Wire Bus (Timer Module)
1 signal line, multiple devices (master/slaves) Designed for parasitic power
64-bit unique serial number/address
Speed: 16.3 kbit/s
Length: 300 m
Protocol Reset, 8-bit command, read/write
11 Images: Wikipedia
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Inter-Integrated Circuit (I2C Module)
2 signal lines, multiple devices (masters/slaves)
SCL – clock line (for timing)
SDA – data line
Speed: 400 kbit/s (although 3.4 Mbit/s standard exists)
7-bit or 10-bit address space (1-bit used to signal read or write)
Protocol
Start bit, address (w/r), read/write, stop bit
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Serial Peripheral Interface Bus (SPI Module)
3+1 signal lines, multiple devices (master/slaves)
Clock
MISO – master in, slave out
MOSI – master out, slave in
Slave select (enable slave when line is low)
Full duplex
Protocol
Clock polarity: base high/low
Clock phase: capture rising/falling edge
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Telosb Block Diagram
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External Flash
1MiB non-volatile storage
64 KiB sector size
256 B page size
Flash operations
Erase: set all bits to ‘1’ – sector-wide operation
Write: set matching bits to ‘0’ – bit-wide operation
Write operations take longer time if sector needs to be erased first
Wear-leveling
Circular buffer
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Radio ‘CC2420’
IEEE 802.15.4 (ZigBee, 6lowPAN)
2.4 GHz (16 channels)
250 kbit/s
Auto acknowledgement and address recognition
Auto CRC and AES encryption
MPDU: 127 bytes
Frame payload: Max. 122 bytes
16 Image: Texas Instruments
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Software
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Embedded Programming
“Normal” applications vs. embedded systems
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Normal
applications
Embedded
Systems
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Blocking/Threading (vs. Event Driven) Function call that do not return until complete
External events can make this arbitrary long
… wget(www.google.com)
… getKey();
… read(file);
… write(file);
Non-Embedded Programming
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Blocking/Threading vs. Event driven
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read(file)
getKey()
write(file)
OS Maintenance
/ Sleep
<I/O done>
<key pressed>
Thread 1 Thread 2 Idle
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Non-blocking calls
Multiple concurrent function calls
Explicit sleep
Blocking/Threading vs. Event driven
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read(file)
write(file)
<read done>
<key pressed>
Main
getKey()
sleep()
sleep()
<write done>
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Polling vs. interrupts
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End
Get character
Is there a
character?
Start Rx
Wait
Yes
No
Start Rx Interrupt
End Rx Interrupt
Get character
Sleep
Interrupt
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SP – Stack Pointer
TOS – Top of the stack
PC – Program Counter
SR – Status Register
Interrupt Vector
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read(file)
getKey()
write(file)
<I/O done>
<key pressed>
Main
getKey()
Source: Texas Instruments
Priority Address Module Register
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Race conditions
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Problem:
Accessing the same variables in both main program and asynchronous interrupt context
Images: Frank Duignan
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Race conditions
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Disable interrupts during atomic operations
Might miss interrupts!
Images: Frank Duignan
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Memory Map
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Memory Mapped I/O
Peripheral modules are accessed as regular variables (pointers)
Flash read, extension of RAM
Flash write, ‘peripheral module’
Pros and cons
Global variables, no overhead
Buffer swapping
No memory protection
Images: Doina Bucur
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Data types
Common data types:
char, short, int, long, float, etc.
But, the MSP430 is a 16-bit CPU
How big is a short? int? long? float? double?
Determined by the compiler
Specific data types (stdint.h): int8_t, uint8_t, int16_t, uint16_t, int32_t, uint32_t, int64_t, uint64_t
E.g. 12-bit ADC reading uint16_t
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#include <msp430x14x.h> static char string1[] = { "Hello World\n\r" }; char i; void main(void) { WDTCTL = WDTPW + WDTHOLD; // Stop watchdog P3SEL = 0x30; // P3.3,4 = USART0 TXD/RXD // Control registers ME1 |= UTXE0 + URXE0; // Enable USART0 module UCTL0 |= CHAR; // 8-bit character UTCTL0 |= SSEL0; // UCLK = ACLK UCTL0 &= ~SWRST; // Initialize USART state machine // Speed registers UBR00 = 0x03; // 9600 baud UBR10 = 0x00; // UMCTL0 = 0x4A; // IE1 |= URXIE0 + UTXIE0; //Enable RX/TX interrupt IFG1 &= ~UTXIFG0; // Clear initial flag on POR while(1) _BIS_SR(LPM3_bits + GIE); // Enter LPM3 w/ interrupt }
Hello World\n\r // UART0 TX ISR #pragma vector=USART0TX_VECTOR __interrupt void usart0_tx (void) { if (i < sizeof string1-1) TXBUF0 = string1[i++]; } // UART0 RX ISR #pragma vector=USART0RX_VECTOR __interrupt void usart0_rx (void) { if (RXBUF0 == 'u') // 'u' received? { i = 0; TXBUF0 = string1[i++]; } }
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Code: Texas Instruments
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Meet sensor network characteristics AND run on mote-class device
TinyOS
Event driven
Two-level scheduling: Tasks and events
Scalable hardware/software boundary
No blocking functions or polling
(No dynamic memory)
Embedded OS
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Interfaces
Provides (up)
Uses (down)
Mutators
Call command (down)
Signal event (up)
Tasks
Low priority
Functions, command calling, event signaling
Asynchronous events
High priority
Hardware interrupt handler
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Components
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Component Graph
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Concurrency
Tasks run atomically with regard to other tasks
Race conditions can be detected at compile time
Split-phase operation
Commands are non-blocking
E.g. call command ‘start’, signal event ‘startDone’
Modular
Code reuse
Flexible hardware/software boundary
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TinyOS
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Radio
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Physical Layer
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PHY Layer Motivation
Nodes communicate over wireless channel
Characteristics of wireless channel and transceiver have impact on all upper layer protocols
Transmission range
Loss rate
Energy consumption
Why?
Understand performance of existing systems
Guide design of future systems
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Bit Error Rate
Noise can corrupt received signal to the point that it is incorrectly decoded
Bit errors
For a given modulation scheme, bit error rate (BER) is a function of Signal-to-Noise ratio (SNR)
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Signal to Noise Ratio
Noise of power N0 arrives at the sensor
SNR= Pr / N0
Usually measured in decibels: SNRdB= 10logSNR
When SNR drops below threshold signal cannot be detected
How can we increase detection range?
Quadrupling the power doubles the range
Double the carrier wavelength
Improve detection algorithm
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Link Layer
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MAC and its Classification
Medium Access Control (MAC)
When and how nodes access the shared channel
Classification of multiple access MAC protocols
Scheduled protocols
Schedule nodes onto different sub-divisions
Examples: Time (TDMA), Frequency (FDMA), Code (CDMA)
Contention-based protocols
Nodes compete in probabilistic coordination
Examples: ALOHA (pure & slotted), Carrier Sense (CSMA)
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MAC Attributes
Collision avoidance
Basic task of a MAC protocol
Energy efficiency
Scalability and adaptivity
Network size, node density and topology change
Channel utilization
Latency
Throughput
Fairness
Primary
Secondary
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Energy Efficiency in MAC Design
What causes energy waste?
Packet collisions
Control packet overhead
Overhearing unnecessary traffic
Long idle time
Bursty traffic in sensornet applications
Idle listening consumes 50—100% of the power for receiving
Terminology
Wakeup period (time between wakeups)
Duty Cycle = listen period/Wakeup period
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Scheduled Protocols
TDMA
Advantages
No collisions
Energy efficient — easily support low duty cycles
Disadvantages
Bad scalability and adaptivity
Difficult to accommodate node changes
Difficult to handle inter-cluster communication
Requires time synchronization
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CSMA — Carrier Sense Multiple Access
Listening before transmitting
Collisions can still occur
Examples
IEEE 802.11 – CSMA/CA
Collision Avoidance – random back-off time
Problem
Solution Explicit Request-to-Send and Clear-to-Send (RTS/CTS) packets
Contention-Based Protocols
a b c
Hidden terminal: a is hidden from c’s carrier sense
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Case Study: S-MAC
S-MAC — by Ye, Heidemann and Estrin
Tradeoffs
Increase latency and decrease fairness to improve energy efficiency
Major components in S-MAC
Periodic listen and sleep
Collision avoidance
Overhearing avoidance
Message passing
From “Medium Access Control With Coordinated Adaptive
Sleeping for Wireless Sensor Networks” by Ye et al.
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Principle
Node periodically wakes up, turns radio on and checks channel
Wakeup time fixed, “Check time” variable
If energy is detected, node powers up in order to receive the packet
Noise floor estimation used to detect channel activity during LPL
Low Power Listening (B-MAC)
45 From “Versatile Low Power Media Access for Wireless Sensor Networks” by Polastre et al.
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X-MAC
Preamble contains destination ID Other receivers can
return to sleep
Strobed preamble Receiver sends ACK after
receiving short preamble
Receiver stays awake after packet reception Transmissions from
pending senders can proceed without additional preambles
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From “X-MAC: A Short Preamble MAC Protocol for
Duty-Cycled Wireless Sensor Networks” by
Buettner et al.
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Scheduled Channel Polling (SCP-MAC)
SCP synchronizes neighbor’s channel polling time A short wake up tone wakes up receiver
It is efficient for both unicast and broadcast packets
From “Ultra-Low Duty Cycle MAC with Scheduled Channel Polling”
by Ye et al.
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Receiver Initiated MAC
Goal:
Reduce idle overhearing in dense networks
RI-MAC
Sender does the idle listening
Receiver transmits beacons
48 From “RI-MAC: A Receiver-Initiated Asynchronous Duty Cycle MAC Protocol for Dynamic
Traffic Loads in Wireless Sensor Networks” by Sun et al.
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Low Power Probing
Receiver Initiated Wakeup
Nodes send periodic beacons while sleeping
After each beacon, nodes listen for acknowledgement
Node remains awake when acknowledgement is received
Nodes that are awake acknowledges other beacons
One node initializes network wide wakeup by acknowledging the other nodes’ beacons
Result: wakeup spreads like flood wave from origin
Benefits:
Nodes can collect neighborhood information from beacons
Use neighborhood information to detect missing nodes
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Routing
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Network Layer
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Radio
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Range
Unit Disc (simplification)
MAC
Broadcast
Unicast
Link
Asymmetric
A
B
C
D
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Multi-hop Routing
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B
A?
C?
Routing: A B Problems:
Optimal route?
Metric?
Route discovery?
Network changes?
Asym. links?
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Hop Count is a bad metric
Reception rate deteriorates quickly as transmission range grows
Hop count tends to pick long links lossy links
Instead, one should select high quality links
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Estimating Link Quality
What link characteristics can we measure?
Hardware (radio dependent):
RSSI: Received Signal Strength Indication
Energy (dbm)
SNR: Signal-to-Noise Ratio
LQI: Link Quality Indicator
Packet correctness confidence
Software
PRR: Packet Reception Ratio
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Metric Idea #2: Avoiding static thresholds
Using a static PRR threshold for selecting links can lead to disconnections, suboptimal performance
Ideally we want to dynamically select the links with the highest PRRs
ETX metric:
Expected number of Transmissions required to successfully send a packet over link/path
Proposed in “A High-Throughput Path Metric for Multi-Hop Wireless Routing” by DeCouto et al. (MobiCom 2003)
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Metric idea #4: : Use information from multiple
layers
4-bit Link Estimator Physical layer
If white bit is set, medium quality is high during reception Used to quickly decide whether a
link should be even considered
Link layer Ack bit is set when an
acknowledgement is received Increases frequency of ETX
estimation
Network layer Set pin bit for entries that are
important
Compare bit indicates whether new neighbor is better than one of the current entries
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RPL: IPv6 Routing Protocol for Low power
and Lossy Networks
Nodes form a Destination Oriented Directed Acyclic Graph (DODAG) using RPL control ICMPv6 messages
Very similar to CTP
Trickle-timer reduces maintenance overhead
Exponentially growing resend timer
Timer resets when “disagreement” occur
“Objective functions” determine the rank of a node in the DODAG
ETX, hop-count, etc.
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Energy
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Power Management
Where does all my power go?
Simulation
Collect power measurements during deployment
Collect run-time traces from deployment
What is the most efficient way to use the available power?
Fixed lifetime requirement?
Local power usage policy
Global energy optimization
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Mote Power Supply
Switching Regulator
Takes variable input voltage Vin and changes it into stable Vout
Charge-discharge cycle
Analogy: filling and emptying a bucket of water
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Energy Profiling
Combine application profiling with energy measurements
Log power state changes
Log power consumption in each stage
Log application profile
Estimate each components power consumption by solving linear equations: XΠ = Y
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Virtual Battery
Energy Reserve Manager = Bank
Each task requests an account with conditions
W – fraction of real battery allocated
N – number of energy installments
L – expected lifetime of the task
C – credit line, fraction of remaining energy
B – maximum energy burn rate
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Lance Architecture
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Solar Power
Photovoltaic (PV) panels
200 mA, $50
Diurnal generation (predictable)
Cloud dependent (unpredictable)
Plan after expected sun hours
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Wind Power
Wind turbine
65 mA, $75
Moving parts maintenance
Minimum and maximum wind speed
Plan after expected wind conditions
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Air 30, Southwest Windpower
Hymini, Miniwiz
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Other Sources
Kinetic Energy Recovery System
Hybrid cars!
Self-charging watch
Radio waves
RFID
Wireless power
Steam
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nPower Peg, www.npowerpeg.com
Qi Wireless Power
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Energy Storage Problem
Energy harvesting output is variable Solar and wind follow diurnal cycles
Store surplus energy in battery Limited lifetime: ~1,000 cycles
Variable efficiency: 70-99%
Slow charging
(Super)capacitors Long lifetime: ~1,000,000 cycles
Constant efficiency: ~90%
Fast charging
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Wireless Identification and Sensing Platform
RFID meets MCU
Convert RF signal to DC voltage
Receive: Amplitude Modulated signal
Send: Change antenna characteristic reflected energy
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“I don’t need luck, I got ammo” - Wrex
Good Luck!
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Schedule
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Week 1: Introduction and Hardware
Week 2: Embedded Programming
Week 3: Medium Access Control
Week 4: Link Estimation and Tree Routing
Week 5: IP Networking
Week 6: JHU Special feat. Doug Carlson
Week 7: (seminar, no lecture)
Week 8: Energy Management and Harvesting
Week 9: Review and Midterm
Week 10: Time Synchronization
Week 11: Localization
Week 12: TBD
Week 13: (seminar, no lecture)
Week 14: TBD