L02: Memory & Data I CSE351, Winter 2017
CSE351:Memory,Data,&AddressingICSE351Winter2017
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http://xkcd.com/138/
L02: Memory & Data I CSE351, Winter 2017
Administrivia
v Start-of-Coursesurveyduetomorrowat5pmv Lab0dueMondayat5pm
§ Whotriedit?
v ConsidertakingCSE391(SystemandSoftwaretools)
v Allcoursematerialscanbefoundonthewebsite§ Calendarlinkfixed,subscribetoit!§ Sectionmaterialssidebar§ Readings:trytodothembeforeclass§ Slidespostedweekendbeforeclasses.Inksaved.§ Book:Sorry,reallyneed3rd edition.
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L02: Memory & Data I CSE351, Winter 2017
Roadmap
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car *c = malloc(sizeof(car));c->miles = 100;c->gals = 17;float mpg = get_mpg(c);free(c);
Car c = new Car();c.setMiles(100);c.setGals(17);float mpg =
c.getMPG();
get_mpg:pushq %rbpmovq %rsp, %rbp...popq %rbpret
Java:C:
Assembly language:
Machine code:
01110100000110001000110100000100000000101000100111000010110000011111101000011111
Computer system:
OS:
Memory & dataIntegers & floatsMachine code & Cx86 assemblyProcedures & stacksArrays & structsMemory & cachesProcessesVirtual memoryMemory allocationJava vs. C
L02: Memory & Data I CSE351, Winter 2017
Hardware:LogicalView
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CPU Memory
Disks Net USB Etc.
Bus
L02: Memory & Data I CSE351, Winter 2017
Hardware:PhysicalView
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CPU(emptyslot)
USB…
I/Ocontroller
StorageconnectionsMemory
L02: Memory & Data I CSE351, Winter 2017
Hardware:351View (version0)
v CPUexecutesinstructions;memorystoresdatav Toexecuteaninstruction,theCPUmust:
§ fetchaninstruction;§ fetchthedatausedbytheinstruction;and,finally,§ executetheinstructiononthedata…§ whichmayresultinwritingdatabacktomemory
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Memory
CPU
?data
instructions
L02: Memory & Data I CSE351, Winter 2017
Hardware:351View (version1)
v TheCPUholdsinstructionstemporarilyintheinstructioncachev TheCPUholdsdatatemporarilyinafixednumberofregistersv Instructionandoperandfetchingishardware-controlledv Datamovementisprogrammer-controlled(inassembly)v We’lllearnabouttheinstructionstheCPUexecutes–
takeCSE/EE470tofindouthowitactuallyexecutesthem 7
Memory
data
instructions
CPU
take470…
registers
i-cache
L02: Memory & Data I CSE351, Winter 2017
Hardware:351View (version1)
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Memory
data
instructions
CPU
take470…
registers
i-cache
v TheCPUholdsinstructionstemporarilyintheinstructioncachev TheCPUholdsdatatemporarilyinafixednumberofregistersv Instructionandoperandfetchingishardware-controlledv Datamovementisprogrammer-controlled(inassembly)v We’lllearnabouttheinstructionstheCPUexecutes–
takeCSE/EE470tofindouthowitactuallyexecutesthem
Howaredataandinstructionsrepresented?
Howdoesaprogramfinditsdatainmemory?
L02: Memory & Data I CSE351, Winter 2017
Memory,Data,andAddressing
v Representinginformationasbitsandbytesv Organizingandaddressingdatainmemoryv ManipulatingdatainmemoryusingC
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L02: Memory & Data I CSE351, Winter 2017
Question1:
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Memory
data
instructions
CPU
take470…
registers
i-cache
Howaredataandinstructionsrepresented?
L02: Memory & Data I CSE351, Winter 2017
BinaryRepresentations
v Base2numberrepresentation§ Abase2digit(0or1)iscalledabit§ Represent35110 as00000001010111112 or1010111112
v Why?
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Leadingzeros
L02: Memory & Data I CSE351, Winter 2017
BinaryRepresentations
v Base2numberrepresentation§ Abase2digit(0or1)iscalledabit§ Represent35110 as00000001010111112 or1010111112
v Electronicimplementation§ Easytostorewithbi-stableelements§ Reliablytransmittedonnoisyandinaccuratewires
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0.0V0.5V
2.8V3.3V
0 1 0
Leadingzeros
L02: Memory & Data I CSE351, Winter 2017
Review:NumberBases
v Keyterminology: digit(d)andbase(B)§ InbaseB,eachdigitisoneofBpossiblesymbols
v Valueof𝑖-th digitis𝑑×𝐵% where𝑖 startsat0andincreasesfromrighttoleft§ n digitnumberdn-1dn-2 ...d1d0§ value=dn-1´Bn-1+dn-2´Bn-2 +...+d1´B1 +d0´B0
§ Inafixed-width representation,left-mostdigitiscalledthemost-significant andtheright-mostdigitiscalledtheleast-significant
v Notation: Baseisindicatedusingeitheraprefixorasubscript
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L02: Memory & Data I CSE351, Winter 2017
DescribingByte Valuesv Binary(000000002 – 111111112)
§ Byte=8bits(binarydigits)
v Decimal(010 – 25510)v 10isnotapowerof2L.
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0 0 1 0 1 1 0 10*27 0*26 1*25 0*24 1*23 1*22 0*21 1*20
32 8 4 1 = 4510
LSBMSB
L02: Memory & Data I CSE351, Winter 2017
DescribingByte Valuesv Binary(000000002 – 111111112)
§ Byte=8bits(binarydigits)
v Decimal(010 – 25510)v Hexadecimal(0016 – FF16)
§ Byte=2hexadecimal(or“hex”orbase16)digits§ Base16numberrepresentation§ Usecharacters‘0’to‘9’and‘A’to‘F’§ WriteFA1D37B16 intheClanguage
• as0xFA1D37B or0xfa1d37b
v Moreonspecificdatatypeslater…15
0 0 00001 1 00012 2 00103 3 00114 4 01005 5 01016 6 01107 7 01118 8 10009 9 1001A 10 1010B 11 1011C 12 1100D 13 1101E 14 1110F 15 1111
0 0 1 0 1 1 0 10*27 0*26 1*25 0*24 1*23 1*22 0*21 1*20
32 8 4 1 = 4510
LSBMSB
L02: Memory & Data I CSE351, Winter 2017
Question2:
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Memory
data
instructions
CPU
take470…
registers
i-cache
Howdoesaprogramfinditsdatainmemory?
L02: Memory & Data I CSE351, Winter 2017
Byte-OrientedMemoryOrganization
v Conceptually,memoryisasingle,largearrayofbytes,eachwithauniqueaddress (index)
v Thevalueofeachbyteinmemorycanbereadandwrittenv Programsrefertobytesinmemorybytheiraddresses
§ Domainofpossibleaddresses=addressspace
v Butnotallvalues(e.g.,351)fitinasinglebyte…§ Storeaddressesto“remember”whereotherdataisinmemory§ Howmuchmemorycanweaddresswith1-byte(8-bit)addresses?
v Manyoperationsactuallyusemulti-bytevalues
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• • •
L02: Memory & Data I CSE351, Winter 2017
MachineWords
v Wordsize=addresssize=registersizev Wordsizeboundsthesizeoftheaddressspaceandmemory§ wordsize=𝑤 bits→ 2𝑤 addresses
v Currentx86systemsuse64-bit(8-byte)words§ Potentialaddressspace:𝟐𝟔𝟒 addresses264 bytes» 1.8x1019 bytes=18billionbillionbytes=18EB(exabytes)=16EiB (exbibytes)
§ Actualphysicaladdressspace:48bits
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L02: Memory & Data I CSE351, Winter 2017
Aside:UnitsandPrefixes
v Herefocusingonlargenumbers(exponents>0)v Notethat103 ≈210
v SIprefixesareambiguousifbase10or2v IECprefixesareunambiguouslybase2
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L02: Memory & Data I CSE351, Winter 2017
Word-OrientedMemoryOrganizationv Addressesspecify
locationsofbytesinmemory§ Addressofword
=addressoffirstbyteinword§ Addressesofsuccessivewords
differbywordsize(inbytes):e.g.,4(32-bit)or8(64-bit)
§ Addressofword0,1,…10?
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0x000x010x020x030x040x050x060x070x080x090x0A0x0B
32-bitWords
Bytes
0x0C0x0D0x0E0x0F
64-bitWords
Addr=??
Addr=??
Addr=??
Addr=??
Addr=??
Addr=??
Addr.(hex)
L02: Memory & Data I CSE351, Winter 2017
Word-OrientedMemoryOrganizationv Addressesstillspecify
locationsofbytes inmemory§ Addressofword
=addressoffirstbyteinword§ Addressesofsuccessivewords
differbywordsize(inbytes):e.g.,4(32-bit)or8(64-bit)
§ Addressofword0,1,…10?§ Alignment
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32-bitWords
Bytes64-bitWords
Addr=??
Addr=??
Addr=??
Addr=??
Addr=??
Addr=??
0000
0004
0008
0012
0000
0008
0x000x010x020x030x040x050x060x070x080x090x0A0x0B0x0C0x0D0x0E0x0F
Addr.(hex)
L02: Memory & Data I CSE351, Winter 2017
APictureofMemory(64-bitview)
v A“64-bit(8-byte)word-aligned”view ofmemory:§ Inthistypeofpicture,eachrowiscomposedof8bytes§ Eachcellisabyte§ A64-bitpointerwillfitononerow
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0x000x0x0x0x0x0x0x0x0x
0x04 0x05 0x06 0x070x00 0x01 0x02 0x03
oneword
Address
L02: Memory & Data I CSE351, Winter 2017
APictureofMemory(64-bitview)
v A“64-bit(8-byte)word-aligned”view ofmemory:§ Inthistypeofpicture,eachrowiscomposedof8bytes§ Eachcellisabyte§ A64-bitpointerwillfitononerow
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0x0D 0x0E 0x0F0x0C
0x000x080x100x180x200x280x300x380x400x48
Address
0x09 0x0A 0x0B0x08
oneword
0x04 0x05 0x06 0x070x00 0x01 0x02 0x03
L02: Memory & Data I CSE351, Winter 2017
AddressesandPointers
v Anaddress isalocationinmemoryv Apointer isadataobjectthatholdsanaddress
§ Addresscanpointtoany data
v Value351storedataddress0x08§ 35110 =15F16=0x0000015F
v Pointerstoredat0x38 pointstoaddress0x08
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0x000x080x100x180x200x280x300x380x400x48
64-bit example(pointers are 64-bits wide)
Address
00 00 00 00 00 00 01 5F
00 00 00 00 00 00 00 08
L02: Memory & Data I CSE351, Winter 2017
AddressesandPointers
v Anaddress isalocationinmemoryv Apointer isadataobjectthatholdsanaddress
§ Addresscanpointtoany data
v Pointerstoredat0x48 pointstoaddress0x38§ Pointertoapointer!
v Isthedatastoredat0x08 apointer?§ Couldbe,dependingonhowyouuseit
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0x000x080x100x180x200x280x300x380x400x48
64-bit example(pointers are 64-bits wide)
Address
00 00 00 00 00 00 01 5F
00 00 00 00 00 00 00 08
00 00 00 00 00 00 00 38
L02: Memory & Data I CSE351, Winter 2017
v Sizesofdatatypes(inbytes)
DataRepresentations
26Touse“bool”inC,youmust#include <stdbool.h>
Java Data Type C Data Type 32-bit (old) x86-64boolean bool 1 1byte char 1 1char 2 2short short int 2 2int int 4 4float float 4 4
long int 4 8double double 8 8long long 8 8
long double 8 16(reference) pointer * 4 8(reference) pointer * 4 8
address size = word size
L02: Memory & Data I CSE351, Winter 2017
MoreonMemoryAlignmentinx86-64
v Forgoodmemorysystemperformance,Intelrecommendsdatabealigned§ Howeverthex86-64hardwarewillworkcorrectlyregardlessofalignmentofdata
§ Designchoice:x86-64instructionsarevariable byteslong
v Aligned: Primitiveobjectof𝐾 bytesmusthaveanaddressthatisamultipleof𝐾§ Moreaboutalignmentlaterinthecourse
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𝐾 Type1 char2 short4 int, float8 long, double, pointers
L02: Memory & Data I CSE351, Winter 2017
ByteOrdering
v Howshouldbyteswithinawordbeorderedinmemory?§ Example:storethe4-byte(32-bit)int:0x a1 b2 c3 d4
v Byconvention,orderingofbytescalledendianness§ Thetwooptionsarebig-endianandlittle-endian§ BasedonGulliver’sTravels:tribescuteggsondifferentsides(big,little)
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L02: Memory & Data I CSE351, Winter 2017
ByteOrdering
v Big-endian(SPARC,z/Architecture)§ Leastsignificantbytehashighestaddress
v Little-endian(x86,x86-64)§ Leastsignificantbytehaslowestaddress
v Bi-endian(ARM,PowerPC)§ Endiannesscanbespecifiedasbigorlittle
v Example: 4-bytedata0xa1b2c3d4ataddress0x100
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0x100 0x101 0x102 0x103
01 23 45 670x100 0x101 0x102 0x103
67 45 23 01
Big Endian
Little Endian
a1 b2 c3 d4
d4 c3 b2 a1
L02: Memory & Data I CSE351, Winter 2017
ByteOrderingExamples
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Decimal: 12345Binary: 0011 0000 0011 1001Hex: 3 0 3 9
39300000
IA32,x86-64(littleendian)
00000000
39300000
x86-64
39300000
IA32
3039
0000
SPARC(bigendian)
3039
0000
32-bitSPARC
3039
0000
64-bitSPARC
00000000
int x = 12345;// or x = 0x3039;
long int y = 12345;// or y = 0x3039;
(Along int isthesizeofaword)
0x000x010x020x03
0x000x010x020x03
0x000x010x020x03
0x000x010x020x03
0x000x010x020x030x040x050x060x07
0x000x010x020x030x040x050x060x07
L02: Memory & Data I CSE351, Winter 2017
Endianness
v Oftenprogrammercanignoreendiannessbecauseitishandledforyou§ Byteswiredintocorrectplacewhenreadingorstoringfrommemory(hardware)
§ Compilerandassemblergeneratecorrectbehavior(software)
v Endiannessstillshowsup:§ Logicalissues:accessingdifferentamountofdatathanhowyoustoredit(e.g.storeint,accessbyteasachar)
§ Whenrunningdownmemoryerrors,needtoknowexactvalues
§ Manualtranslationtoandfrommachinecode(in351)31
L02: Memory & Data I CSE351, Winter 2017
ReadingByte-ReversedListingsv Disassembly
§ Takebinarymachinecodeandgenerateanassemblycodeversion§ Doesthereverseoftheassembler
v Exampleinstructioninmemory§ addvalue0x12abtoregister‘ebx’(aspeciallocationintheCPU)
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Address InstructionCode AssemblyRendition8048366: 81c3ab120000 add$0x12ab,%ebx
32-bit example
Decipheringnumbers
L02: Memory & Data I CSE351, Winter 2017
ReadingByte-ReversedListingsv Disassembly
§ Takebinarymachinecodeandgenerateanassemblycodeversion§ Doesthereverseoftheassembler
v Exampleinstructioninmemory§ addvalue0x12abtoregister‘ebx’(aspeciallocationintheCPU)
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Address InstructionCode AssemblyRendition8048366: 81c3ab 120000 add$0x12ab,%ebx
Decipheringnumbersn Value: 0x12ab
n Padto32bits: 0x000012ab
n Splitintobytes: 00 00 12 ab
n Reverse(little-endian): ab 12 00 00
32-bit example
L02: Memory & Data I CSE351, Winter 2017
Question:
v Westorethevalue0x 00 01 02 03 asaword ataddress0x100 andthengetback0x00 whenwereadabyte ataddress0x102
v Whatmachinesetupareweusing?
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32-bit,big-endian(A)32-bit,little-endian(B)64-bit,big-endian(C)
(D)
L02: Memory & Data I CSE351, Winter 2017
Summary
v Memoryisalong,byte-addressed array§ Wordsizeboundsthesizeoftheaddressspaceandmemory§ Differentdatatypesusedifferentnumberofbytes§ Addressofchunkofmemorygivenbyaddressoflowestbyteinchunk
§ Objectof𝐾 bytesisaligned ifithasanaddressthatisamultipleof𝐾
v IECprefixesrefertopowersof2-.
v Pointersaredataobjectsthatholdsaddressesv Endiannessdeterminesstorageorderformulti-byteobjects
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