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DEMO MANUAL DC1795A
Description
LTC6950 1.4GHz Low Phase Noise, Low Jitter PLL
with Clock Distribution
Demonstration circuit 1795A features the LTC®6950, a 1.4GHz low phase noise, low jitter PLL with clock dis-tribution.
For ease of use, the DC1795A comes installed with a 100MHz reference and a 1GHz VCSO, voltage controlled SAW oscillator with sine wave output. All differential inputs and outputs have 0.5" spaced SMA connectors. The DC1795A has four AC coupled LVPECL outputs with 50Ω transmission lines making them suitable to drive 50Ω impedance instruments. The LVDS/CMOS output is DC coupled. The LTC6950’s EZSync™ function is made available via a turret and an SMA connector.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and EZSync and ClockWizard are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
For the evaluation of the LTC6950 with other VCOs and references, the DC1795A can be modified to accommodate different on-board or external components. It also allows the user the option of a passive or active loop filter.
A DC590 USB serial controller board is used for SPI com-munication with the LTC6950, controlled by the supplied ClockWizard™ software.
Design files for this circuit board are available at http://www.linear.com/demo/DC1795A
Figure 1. DC1795A Connections
Ribbon cable connection to DC590
LVDS/CMOS DC-coupled Outputs, SMA PECL0
AC Coupled Outputs, SMA
Frequency Reference Input, SMA
PECL1 AC Coupled Outputs, SMA
PECL2 AC Coupled Outputs, SMA
PECL3 AC Coupled Outputs, SMA
5V DC Supply, BNC & turret
3.3V DC Supply, BNC & turret
5V U4 (VCXO) DC Supply, turret
U3 (VCO) DC Supply, turret
External VCO Input, SMA
External VCO Charge Pump Output, SMA and turret
Active Loop Filter Op-amp (U2) DC Supply, turret
EZSyncTM SYNC Input, SMA & turret Stat Outputs,
turrets
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DEMO MANUAL DC1795A
Quick start proceDureThe DC1795A is easy to set up to evaluate the performance of the LTC6950. Follow the procedure below.
The DC590 and ClockWizard application are required to control the DC1795A through a personal computer (PC).
DC590 ConFigurAtion
Place the DC590 jumpers in the following positions (refer to Figure 2):
JP4: EE - Must be in the EN position.
JP5: ISO - ON must be selected.
JP5: SW - ON must be selected.
JP6: VCCIO - 3.3V or 5V must be selected. This sets the SPI port to 3.3V or 5V operation. 3.3V operation is recommended.
Connect the DC590 to one of your computer’s USB ports with the included USB cable.
CloCkWizArD instAllAtion
The ClockWizard software is used to communicate with the LTC6950. It uses the DC590 to translate between USB and SPI-compatible serial communications formats. It also includes advanced PLL design and simulation capabilities. The following are the ClockWizard system requirements:
• Windows Operating System: Windows XP, Windows 2003 Server, Windows Vista, Windows 7
• Microsoft .NET 3.5 SP1 or later
• Windows Installer 3.1 or later
• Linear Technology’s DC590 hardware
Figure 2. DC590 Jumper and Connector locations
JP6 jumpers
J4, ribbon cable connection to the DC1795
JP5 jumpers
JP4 jumper
J3, USB connection to PC
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DEMO MANUAL DC1795A
Quick start proceDureDownload the ClockWizard setup file at www.linear.com/ClockWizard.
Run the ClockWizard setup file and follow the instructions given on the screen. The setup file will verify and/or install Microsoft .NET and install the ClockWizard. Refer to the Help menu for software operation.
DC1795A ConFigurAtion
1. Connect the GND, V+ = 3.15V to 3.45V, V+ to 5.25V and V+ VCXO turrets to a power supply and apply power (see Figure 1 and the Typical DC1795A Requirements and Characteristics table).
2. Connect the DC590 to the DC1795A with the provided ribbon cable.
3. Run the ClockWizard application.
4. In ClockWizard, click File > Load Settings and point to the “LTC6950_PECL0_250MHz.clkset” file.
The green “STAT1” LED on the DC1795A should turn on and the “STAT2” LED should turn off indicating that the loop is locked at 1000MHz. A 250MHz signal should be present on the PECL0 outputs.
Be sure to power down or terminate any unused RF output with 50Ω, or poor spurious performance may result.
Figure 3. ClockWizard screenshot
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DEMO MANUAL DC1795A
Quick start proceDuretroubleshooting
If the green LED does not illuminate, follow the instruc-tions below:
1. Verify that you are able to communicate with the DC1795A. The bottom status line in ClockWizard should read “LTC6950” and “Comm Enabled.”
2. Verify that V+ = 3.15V to 3.45V, V+ to 5.25V and V+ VCXO turrets have the correct voltages on them (see the Typical DC1795A Requirements and Characteristics table).
3. Select “Status” Output = 2 in ClockWizard’s System Tab. Click “Read All.” See if the NO_VCO or NO_REF boxes in the second column are checked.
a. If NO_REF is checked, verify the “V+ XO” test point voltage is set to 3.3V. Verify R73 is installed (0 ohm)
b. IF NO_VCO is checked, verify the components between U4 and U1 match the default BOM.
Contact the factory for further troubleshooting.
Dc1795a reconfigurationThe DC1795A allows the use of a variety of references, VCOs and active or passive loop filters. The following covers the hardware reconfiguration of the DC1795A. Refer to ClockWizard and the LTC6950 data sheet to bet-ter understand how to change programmed parameters on the DC1795A.
ltC6950 Clkset Files
The ClockWizard provides three different clkset files for evaluation purposes. These files were made for the default bill of materials. If board modifications are made, these files or the loop filter may need to be modified for the LTC6950 to lock correctly.
1. LTC6950_PECL0_250MHz.clkset: Produces a 250MHz output on PECL0. All other outputs are powered down.
2. LTC6950_Figure16_250MHZ.clkset: Matches Figure 16 of the LTC6950 data sheet. To sync outputs, refer to the EZSync Function section.
3. LTC6950_ALL_CHAN_250MHz.clkset: Produces a 250MHz output on all five outputs. To sync outputs, refer to the EZSync Function section.
ezsync FunCtion
Apply a 1ms or longer high pulse to the SYNC SMA con-nector to take advantage of the EZSync function. Refer to the LTC6950 data sheet for SYNC timing and level requirements.
lVPeCl outPut oPtions
The DC1795A has four AC coupled LVPECL outputs. Internal biasing (IBIASx = H) is required with this default termination network. The DC1795A has options for pull down or series resistors to accommodate the other LVPECL termination networks described in the data sheet.
lVDs/CMos outPut oPtions
The LVDS/CMOS output is DC coupled without on-board termination by default. The DC1795A provides pull down, series and a differential termination resistor options to accommodate other termination networks described in the data sheet.
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DEMO MANUAL DC1795A
Dc1795a reconfigurationreFerenCe oPtions
Table 1 details the available reference options and board modifications for each available option. The CLKSET files described above assume the noise profile of the default reference. If a different reference is used, change the reference noise profile in ClockWizard before simulating the LTC6950 under the Loop Design tab.
VCo inPut oPtions
Table 2 describes the available VCO input options. Board modifications and power requirements for each option are also provided in Table 2. There are two different oscillator footprints on the board: U3, which accommodates the popular 0.5" × 0.5" package, and U4, which accommodates another common 14mm × 9mm package with four or six pins. U4 also accommodates the smaller 5mm × 7.5mm package. An external connectorized VCO can also drive the LTC6950 through SMA connector J15. The CLKSET files described above assume the noise profile for the default VCO. If a different VCO is used, change the VCO noise profile in ClockWizard before simulating the LTC6950 under the Loop Design tab.
CloCk FolloWer
When using the LTC6950 as a clock follower the LTC6950’s PLL circuitry can be powered down by setting the PDPLL bit in ClockWizard. This will reduce the LTC6950’s overall power consumption. Table 2 describes how to reconfigure the board for a differential external input when using the LTC6950 as a clock follower. Refer to the EZSync Function section and to the data sheet for more details on using the LTC6950 as a clock follower.
looP Filter Design AnD instAllAtion
Tables 3, 4 and 5 cross reference the loop filter options shown in ClockWizard’s Loop Design tab with the DC1795A component reference designators. Table 3 is dedicated to the default oscillator, component U4. Table 4 is dedicated to another common oscillator footprint, component U3. Table 5 can be used with external oscillators. Use ClockWizard to select, design and simulate different loop filters.
Some VCO tuning voltage ranges are greater than the LTC6950 charge pump voltage range (refer to the LTC6950 data sheet). In such cases, an active loop filter using an op amp can deliver the required tuning voltage. When satisfied with the loop filter design, use Tables 3, 4 and 5 to help identify which components should be modified. The loop filter components are located on the bottom side of the DC1795A.
table 1. reference options and board ModificationsDeFAult oPtion
reFerenCe oPtion instAll DePoPulAte ltC6950 PerForMAnCe CoMMents
l On-Board NA NA Limited by on board reference at frequency offsets <10kHz
U9 can accommodate any 5mm × 7.5mm or 9mm × 14mm oscillator package
External C67 0402 0.1µF R73, C71 Best performance when using an
ultralow noise external referenceFor improved performance connect J4 to a very low noise reference, such as the Wenzel 501-04517D
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DEMO MANUAL DC1795A
Dc1795a reconfigurationtable 2. VCo input options: Power settings and board Modifications
DeFAult oPtion
boArD MoDiFiCAtions osCillAtor PoWer settings
CoMMentsosCillAtor instAll DePoPulAteV+ oA
turretV+ VXCo turret
V+ VCo turret
en turret
l U4 NA (Default)
NA (Default)
[For Active Filters Only] Determined by
U4 VTUNE specification. 5V for Default U4.
Must be less than 24V
Determined by U4 VCC
specification. 5V for Default U4. Must be
less than 24V
- Connects to pin 2 of U4.
Not used with Default U4
Refer to Table 3: loop filter component selections for U4
U3 U3, *C38 0402 0Ω
*R43 [For Active Filters Only] Determined by
U3 VTUNE specification. Must be less than 24V
- Determined by U3 VCC
specification. Must be less
than 24V
- Refer to Table 4: loop filter component selections for U3
Single-Ended External
*C25 0402 0Ω
*R25, R40, R41
[For Active Filters Only] Determined by External Oscillator
VTUNE specification, must be less than 24V
- - - Connect signal to J15. Refer to Table 5: loop filter component
selections.
Differential External
*C25, C26 0402 0Ω C69 0402 ~100pF
*R25, R40, R41
[For Active Filters Only] Determined by External Oscillator
VTUNE specification, must be less than 24V
- - - Connect signals to J14 and J15. [For External Oscillator Only] Refer to Table 5: loop filter
component selections.
* General Recommendations: There are several termination and common mode options on the DC1795A for different input signal types. Refer to the DC1795A schematic, the LTC6950 data sheet and the data sheet for the VCO or clock distribution component used for an optimum termination network.
table 3. loop Filter selection for u4 oscillator (refer to ClockWizard’s loop Design tab)
DeFAult oPtion
CloCkWizArD AnD boM Cross reFerenCe other MoDiFiCAtions
CoMMentslooP Filter
tYPe rz Ci CP r1 C2 l1 instAll DePoPulAte
l Filter 1 (Passive) RZ_P CI1_P + CI2_P CP_P - - - - - RZ_P, CI1_P, CI2_P, CP_P populated with default values
Filter 2 (Passive) RZ_P CI1_P + CI2_P CP_P R12 C22 - - -
Filter 3 (Passive) RZ_P CI1_P + CI2_P CP_P R72 C22 R12 - -
Filter 4 (Active) RZ_A CI1_A + CI2_A CP_A R12 C22 - R69, R71 (0402 0Ω)
R70, R72 Select CPINV under the ClockWizard System tab
table 4. loop Filter selection for u3 oscillator (refer to ClockWizard’s loop Design tab)
DeFAult oPtion
CloCkWizArD AnD boM Cross reFerenCe other MoDiFiCAtions
CoMMentslooP Filter tYPe rz Ci CP r1 C2 l1 instAll DePoPulAte
Filter 1 (Passive) RZ_P CI1_P + CI2_P CP_P - - - R18 (0402 0Ω)
R12
Filter 2 (Passive) RZ_P CI1_P + CI2_P CP_P R18 C29 - R12
Filter 3 (Passive) RZ_P CI1_P + CI2_P CP_P R72 C29 R18 - R12
Filter 4 (Active) RZ_A CI1_A + CI2_A CP_A R18 C29 - R69, R71 (0402 0Ω)
R12, R70, R72
Select CPINV under the ClockWizard System tab
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DEMO MANUAL DC1795A
Dc1795a reconfigurationtable 5. loop Filter selection for external oscillator (refer to ClockWizard’s loop Design tab)
DeFAult oPtion
CloCkWizArD AnD boM Cross reFerenCe other MoDiFiCAtions
CoMMentslooP Filter tYPe rz Ci CP instAll DePoPulAte
Filter 1 (Passive) RZ_P CI1_P + CI2_P CP_P R68 (0402 0Ω)
R72 Connect CPOUT turret to VTUNE of external oscillator
Filter 4 (Active) RZ_A CI1_A + CI2_A CP_A R67, R69 (0402 0Ω)
R70, R72 Select CPINV under the ClockWizard System tab. Connect CPOUT turret to
VTUNE of external oscillator
typical Dc1795a reQuirements anD characteristicsPArAMeter inPut or outPut PhYsiCAl loCAtion DetAils
3.3V Power Supply Input J2 BNC connector, or V+ = 3.15V to 3.45V turret
Low-noise and spur-free 3.3V, 500mA default (200mA configured*). Powers LTC6950, U6, U7, U8 and U9
Charge Pump Power Supply Input J1 BNC connector, or V+ to 5.25V turret
Low-noise and spur-free 5V, 35mA*. Powers LTC6950 and provides common mode to U2
VCXO/VCSO Power Supply Input V+ VCXO turret Low-noise and spur-free 5V, 20mA*. Powers U4
LVDS/CMOS+, LVDS/CMOS– Two Outputs J19 and J18 SMA connectors** DC coupled, 250MHz, (if enabled)*. Refer to LTC6950 data sheet for output levels for LVDS and CMOS option.
PECL0+, PECL0– Two Outputs J17 and J16 SMA connectors** AC coupled, 250MHz, 800mVP differential*. Must have LTC6950’s IBIAS0 = H with default BOM. DC1795A has options for an external pull down resistor if IBIAS0 = L.
PECL1+, PECL1– Two Outputs J13 and J12 SMA connectors** AC coupled, 250MHz, 800mVP differential (if enabled)*. Must have LTC6950’s IBIASX = H with default BOM. DC1795A has options for an external pull down resistor if IBIASX = L.
PECL2+, PECL2– Two Outputs J8 and J7 SMA connectors**
PECL3+, PECL3– Two Outputs J11 and J10 SMA connectors**
SYNC Input SYNC turret or J9 SMA connector EZSync, 0V to 3.3V control signal, refer to the data sheet
STAT1, STAT2 Output STAT1 and STAT2 turret STAT1 GREEN LED, if ON LTC6950 is locked*. STAT2 RED LED, if ON indicates issue*. Refer to the troubleshooting section and data sheet
Loop Bandwidth - Set by loop filter component values 4.2kHz*
VCO Power Supply Input V+ VCO turret Board Modifications required for use, see Table 2
Active Loop Filter Supply Input V+ OA turret Board Modifications required for use, see Table 2
REF, External Reference Input J4 SMA connector Board Modifications required for use, see Table 1
VCO+, VCO–, External VCO or Input for clock distribution
Input J14 and J15 SMA connectors Board Modifications required to use External VCO. See Tables 2 and 5. Clock Distribution, see Table 2 only
CPOUT Output CPOUT Turret Used with External VCO, connect to external VCO’s VTUNE voltage
* These values are for the “LTC6950_PECL0_250MHz” file and the default on board VCO and Reference.** Any unused RF output must be powered down or terminated with 50Ω, or poor spurious performance may result.
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DEMO MANUAL DC1795A
layout top layer
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DEMO MANUAL DC1795A
parts listiteM QtY reFerenCe PArt DesCriPtion MAnuFACturer/PArt nuMber
1 0 CI1_A, C22, C29, CP_A CAP., 0603 OPT
2 1 CI1_P CAP., X7R, 0.1µF, 25V, 10%, 0603 AVX, 06033C104KAT2A
3 0 CI2_A CAP., 1206 OPT
4 1 CI2_P CAP., X7R, 0.56µF, 25V, 10%, 1206 AVX, 12063C564KAT2A
5 1 CP_P CAP., X7R, 0.056µF, 16V, 10%, 0603 AVX, 0603YC563KAT2A
6 3 C1, C3, C7 CAP., TANT, 47µF, 20V, 20%, 7343 AVX, TAJD476M020HNJ
7 2 C2, C8 CAP., X7R, 1µF, 10V, 10%, 0603 AVX, 0603ZC105KAT2A
8 20 C4, C9-C19, C42-C48, C60 CAP., X7R, 0.01µF, 6.3V, 10%, 0201 AVX, 02016C103KAT2A
9 3 C5, C24, C32 CAP., X7R, 0.1µF, 50V, 10%, 0805 AVX, 08055C104KAT2A
10 29 C6, C28, C31, C33-C36, C39-C41, C49-C58, C61-C66, C71, C73, C74
CAP., X7R, 0.1µF, 10V, 10%, 0402 AVX, 0402ZC104KAT2A
11 3 C23, C30, C59 CAP., TANT, 47µF, 35V, 10%, 7361 AVX, TAJV476K035RNJ
12 0 C25-C27, C38, C67, C69, C70 CAP., 0402 OPT
13 2 C68, C72 CAP., NPO, 100pF, 25V, 10%, 0402 AVX, 04023A101KAT2A
14 1 D1 LED, GREEN, LED-ROHM-SML-010FT ROHM, SML-010FTT86L
15 1 D2 LED, RED, LED-ROHM-SML-010VT ROHM, SML-010VTT86L
16 15 E1-E11, E16, E17, E20, E21 TURRET, TESTPOINT 0.064" MILL-MAX, 2308-2-00-80-00-00-07-0
17 2 J1, J2 CONN, BNC, 5 PINS CONNEX, 112404
18 2 J3, J9 CONN., SMA 50Ω STRAIGHT MOUNT CONNEX, 132134
19 13 J4, J7, J8, J10-J19 CONN., SMA 50Ω EDGE-LAUNCH EMERSON, 142-0701-851
20 1 J5 CONN., HEADER, 14 PIN, 2mm MOLEX, 87831-1420
21 1 RZ_P RES., CHIP, 196Ω, 1/16W, 1%, 0603 VISHAY, CRCW0603196RFKEA
22 5 R1, R2, R4, R5, R10 RES., CHIP, 4.99k, 1/16W, 1% 0402 VISHAY, CRCW04024K99FKED
23 0 R6, R9, R17, R19, R21-R24, R26, R30-R33, R36, R38, R42, R46, R52, R57, R60, R61
RES., 0402 OPT
24 4 R7, R16, R28, R29 RES., CHIP, 49.9, 1/16W, 1% 0402 VISHAY, CRCW040249R9FKED
25 15 R8, R43, R44, R55, R56, R62-R66, R74-R78 RES., CHIP, 0Ω, 0402 VISHAY, CRCW04020000Z0ED
26 5 R11, R12, R70, R72, R73 RES., CHIP, 0Ω, 0603 YAGEO, RC0603JR-070RL
27 5 R13-R15, R35, R58 RES., CHIP, 200K, 1/16W, 1% 0402 VISHAY, CRCW0402200KFKED 2rls
28 0 R18, R67-R69, R71, RZ_A, R53 RES., 0603 OPT
29 5 R20, R51, R54, R59, R79 RES., CHIP, 100, 1/16W, 1% 0402 NIC, NRC04F1000TRF
30 2 R25, R40 RES., CHIP, 150, 1/16W, 1% 0402 VISHAY, CRCW0402150RFKED
31 2 R37, R39 RES., CHIP, 330, 1/16W, 1% 0402 VISHAY, CRCW0402330RFKED
32 1 R41 RES., CHIP, 37.4, 1/16W, 1% 0402 VISHAY, CRCW040237R4FKED
33 1 U1 I.C. LTC6950IUHH, QFN48UHH-5X9 LINEAR TECH., LTC6950IUHH#PBF
34 1 U2 I.C. LT1678IS8, SO8 LINEAR TECH., LT1678IS8#PBF
35 0 U3 VCO, 0.5" × 0.5" OPT
36 1 U4 VCSO, 1GHz 5V CRYSTEK, CVCSO-914-1000.000
37 1 U5 I.C., SERIAL EEPROM, TSSOP8 MICROCHIP, 24LC025-I /ST
38 2 U6, U7 I.C., DUAL BUFFER, SC70-6 FAIRCHILD SEMI., NC7WZ17P6X
39 1 U8 I.C., DUAL TRANSCEIVER, SOT363 NXP, 74LVC1T45GW
40 1 U9 CLOCK OSCILLATOR, 100MHz, 3.3V CRYSTEK, CCHD-575-25-100.000
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DEMO MANUAL DC1795A
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SIST
ANCE
.
THIS
CIR
CUIT
IS P
ROPR
IETA
RY T
O LI
NEAR
TEC
HNOL
OGY
AND
SCHE
MAT
IC
SUPP
LIED
FOR
USE
WIT
H LI
NEAR
TEC
HNOL
OGY
PART
S.SC
ALE
= NO
NE
www.
linea
r.com 2
03/24
/2014
, 05:0
7 PM
12
1.4 G
HZ L
OW P
HASE
NOI
SE, L
OW JI
TTER
PLL
WIT
H CL
OCK
DIST
RIBU
TION
KIM
T.MI
CHEL
A.
N/A
LTC6
950I
UHH
DEMO
CIR
CUIT
1795
ASI
ZE
DATE
:
IC N
O.RE
V.
SHEE
TOF
TITL
E:
APPR
OVAL
S
PCB
DES.
APP
ENG.
TEC
HN
OLO
GY
Fax:
(408
)434
-050
7
Milp
itas,
CA 95
035
Phon
e: (4
08)4
32-1
900
1630
McC
arth
y Blvd
.
LTC
Conf
iden
tial-F
or C
usto
mer
Use
Onl
y
CUST
OMER
NOT
ICE
LINE
AR T
ECHN
OLOG
Y HA
S MA
DE A
BES
T EF
FORT
TO
DESI
GN A
CIRC
UIT
THAT
MEE
TS C
USTO
MER-
SUPP
LIED
SPE
CIFI
CATI
ONS;
HOW
EVER
, IT R
EMAI
NS T
HE C
USTO
MER'
S RE
SPON
SIBI
LITY
TO
VERI
FY P
ROPE
R AN
D RE
LIAB
LE O
PERA
TION
IN T
HE A
CTUA
LAP
PLIC
ATIO
N. C
OMPO
NENT
SUB
STIT
UTIO
N AN
D PR
INTE
DCI
RCUI
T BO
ARD
LAYO
UT M
AY S
IGNI
FICA
NTLY
AFF
ECT
CIRC
UIT
PERF
ORMA
NCE
OR R
ELIA
BILI
TY. C
ONTA
CT L
INEA
RTE
CHNO
LOGY
APP
LICA
TION
S EN
GINE
ERIN
G FO
R AS
SIST
ANCE
.
THIS
CIR
CUIT
IS P
ROPR
IETA
RY T
O LI
NEAR
TEC
HNOL
OGY
AND
SCHE
MAT
IC
SUPP
LIED
FOR
USE
WIT
H LI
NEAR
TEC
HNOL
OGY
PART
S.SC
ALE
= NO
NE
www.
linea
r.com 2
03/24
/2014
, 05:0
7 PM
12
1.4 G
HZ L
OW P
HASE
NOI
SE, L
OW JI
TTER
PLL
WIT
H CL
OCK
DIST
RIBU
TION
KIM
T.MI
CHEL
A.
N/A
LTC6
950I
UHH
DEMO
CIR
CUIT
1795
A
REVI
SION
HIS
TORY
DESC
RIPT
ION
DATE
APPR
OVED
ECO
REV
MICH
EL A
.PR
ODUC
TION
203
-24-14
__
REVI
SION
HIS
TORY
DESC
RIPT
ION
DATE
APPR
OVED
ECO
REV
MICH
EL A
.PR
ODUC
TION
203
-24-14
__
REVI
SION
HIS
TORY
DESC
RIPT
ION
DATE
APPR
OVED
ECO
REV
MICH
EL A
.PR
ODUC
TION
203
-24-14
__
R36
OPT
R36
OPT
C58
0.1uF
C58
0.1uF
R28
49.9
R28
49.9
CI1_
AOP
T
0603
CI1_
AOP
T
0603
C27
OPT
C27
OPT
R6 OPT
R6 OPT
RZ_P
196
0603
RZ_P
196
0603
R42
OPT
R42
OPT
R71
OPT
0603
R71
OPT
0603
AB
U2LT
1678
IS8
AB
U2LT
1678
IS8
OUTA
1-IN
A2
+INA
3V-
4+IN
B5
-INB
6
OUTB
7
V+8
J8PE
CL2+
J8PE
CL2+
C32
0.1uF
0805
C32
0.1uF
0805
R70 0 0603
R70 0 0603
C50
0.1uF
C50
0.1uF
J14
VCO+
J14
VCO+
CP_A
OPT
0603
CP_A
OPT
0603
R73
0
0603
R73
0
0603
C52
0.1uF
C52
0.1uF
R22
OPT
R22
OPT
C25
OPT
C25
OPT
J13
PECL
1+J1
3PE
CL1+
C40
0.1uF
C40
0.1uF
C70
OPT
C70
OPT
C66
0.1uF
C66
0.1uF
R32
OPT
R32
OPT
+
C23
35V
47uF
7361
+
C23
35V
47uF
7361
C29
OPT
0603
C29
OPT
0603
E10
STAT
1E1
0ST
AT1
J9SY
NCJ9
SYNC
U3 OPT
U3 OPT
GND
1VT
UNE
2GN
D3
GND
4
GND5GND6GND7GND8
GND
9
RFOU
T10
GND
11
GND
12
GND 13
VCC 14
GND 15
GND 16
C54
0.1uF
C54
0.1uF
J7PE
CL2-
J7PE
CL2-
R68
OPT
0603
R68
OPT
0603
CI2_
P0.5
6uF
1206
CI2_
P0.5
6uF
1206
R29
49.9
R29
49.9
R14.9
9KR1
4.99K
J18
LVDS
/CMO
S-J1
8LV
DS/C
MOS-
R67
OPT
0603
R67
OPT
0603
+
C30
35V
47uF
7361
+
C30
35V
47uF
7361
R53
OPT
R53
OPT
J19
LVDS
/CMO
S+J1
9LV
DS/C
MOS+
R52
OPT
R52
OPT
RZ_A
OPT
0603
RZ_A
OPT
0603
J12
PECL
1-J1
2PE
CL1-
C57
0.1uF
C57
0.1uF
C56
0.1uF
C56
0.1uF
J11
PECL
3+J1
1PE
CL3+
R39
330
R39
330
CI1_
P0.1
uF
0603
CI1_
P0.1
uF
0603
E11
STAT
2E1
1ST
AT2
R61
OPT
R61
OPT
R55 0R55 0
E2V+
OAE2
V+OA
J15
VCO-
J15
VCO-
C49
0.1uF
C49
0.1uF
U4 CVCS
O-91
4-100
0
U4 CVCS
O-91
4-100
0
VTUN
E1
EN2
GND
3OU
T+4
OUT-
5VC
C6
J17
PECL
0+J1
7PE
CL0+
+
C3 20V
47uF
7343
+
C3 20V
47uF
7343
R35
200K
R35
200K
R2 4.99K
R2 4.99K
R65 0R65 0
C24
0.1uF
0805
C24
0.1uF
0805
J3CP
OUT
J3CP
OUT
C22
OPT
0603
C22
OPT
0603
R18
OPT
0603
R18
OPT
0603
R72
0 0603
R72
0 0603
J4RE
FJ4
REF
C71
0.1uF
C71
0.1uF
J16
PECL
0-J1
6PE
CL0-
R31
OPT
R31
OPT
R66 0R66 0
R17
OPT
R17
OPT
R69
OPT
0603
R69
OPT
0603
R12
0
0603
R12
0
0603
R30
OPT
R30
OPT
E7GN
DE7
GND
J10
PECL
3-J1
0PE
CL3-
R74 0R74 0
R46
OPT
R46
OPT
C51
0.1uF
C51
0.1uF
C69
OPT
C69
OPT
E4CP
OUT
E4CP
OUT
R21
OPT
R21
OPT
E9SY
NCE9
SYNC
C67
OPT
C67
OPT
R9OP
TR9
OPT
C72
100p
F
C72
100p
F
R75 0R75 0
CPCP
R16
49.9
R16
49.9
V+XO
V+XO
E17
GND
E17
GND
R40
150
R40
150
R43
0R4
30
D1
SML-
010M
T
GRN
D1
SML-
010M
T
GRN
1 2
E16
V+VC
OE1
6V+
VCO
C53
0.1uF
C53
0.1uF
U9 CCHD
-575-2
5-100
U9 CCHD
-575-2
5-100VT
UNE
1EN
2GN
D3
OUT+
4
OUT-
5
VCC
6
R76 0R76 0
R26
OPT
R26
OPT
C28
0.1uF
C28
0.1uF
E6GN
DE6
GND
R77 0R77 0
E5V+
VCXO
E5V+
VCXO
C55
0.1uF
C55
0.1uF
R60
OPT
R60
OPT
R33
OPT
R33
OPT
R20
100
R20
100
CI2_
AOP
T12
06CI
2_A
OPT
1206
R23
OPT
R23
OPT
C60.1
uFC6
0.1uF
C38
OPT
C38
OPT
U1LT
C695
0IUHH
U1LT
C695
0IUHH
CP40
V+CP
39GN
D38
V+37
V+VC
O36
VCO-
35VC
O+34
V+VC
O33
V+32
GND
31
V+18
V+P3
1PE
CL3-
2PE
CL3+
3V+
P34
V+P2
5PE
CL2-
6PE
CL2+
7V+
P28
V+P1
9PE
CL1-
10PE
CL1+
11V+
P112
V+P0
13PE
CL0-
14PE
CL0+
15V+
P016
V+ 47V+REF 46
GND17
SDO24
LV/CM-21
CS23
V+20
V+25
SCLK
26
SDI
27
STAT
129
SYNC
30
STAT
228
LV/CM+22
REF+ 45REF- 44
V+ 42
V+REF 43
V+19
GND 41
GND 48
GND 49
R37
330
R37
330
R78 0R78 0
R56 0R56 0
E8EN
E8EN
R57
OPT
R57
OPT
R8 0R8 0
C26
OPT
C26
OPT
CP_P
0.056
uF06
03
CP_P
0.056
uF06
03
R62 0R62 0
R25
150
R25
150
C68
100p
F
C68
100p
F
R44
0R4
40
+
C59
35V
47uF
7361
+
C59
35V
47uF
7361
R63 0R63 0
R41
37.4
R41
37.4
EN-X
OEN
-XO
C50.1
uF08
05C5
0.1uF
0805
R19
OPT
R19
OPT
D2 SML-
010V
T
REDD2 SML-
010V
T
RED
1 2
R64 0R64 0
R38
OPT
R38
OPT
R24
OPT
R24
OPT
R7 49.9
R7 49.9
11dc1795af
DEMO MANUAL DC1795A
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
note: The buffers shown on sheet 2 of 2 of the schematic are used to protect the LTC6950 when connected to the DC590 before the LTC6950 is powered up. There is no need for such circuitry if the SPI bus is not active before powering up the LTC6950. The EEPROM is for identification and is not needed to program the LTC6950.
schematic DiagramA A
B B
C C
D D
E E
44
33
22
11
NOTE
: EEP
ROM
FOR
BOAR
D ID
ENTI
FICA
TION
DC59
0 SPI
INTE
RFAC
E
LTC6
950 B
YPAS
S AN
D BU
LK C
APAC
ITOR
S
V+
V+V+
V+
V+
V+CP
V+V+
CS SCLK
SDI
SDO
SIZE
DATE
:
IC N
O.RE
V.
SHEE
TOF
TITL
E:
APPR
OVAL
S
PCB
DES.
APP
ENG.
TEC
HN
OLO
GY
Fax:
(408
)434
-050
7
Milp
itas,
CA 95
035
Phon
e: (4
08)4
32-1
900
1630
McC
arth
y Blvd
.
LTC
Conf
iden
tial-F
or C
usto
mer
Use
Onl
y
CUST
OMER
NOT
ICE
LINE
AR T
ECHN
OLOG
Y HA
S MA
DE A
BES
T EF
FORT
TO
DESI
GN A
CIRC
UIT
THAT
MEE
TS C
USTO
MER-
SUPP
LIED
SPE
CIFI
CATI
ONS;
HOW
EVER
, IT R
EMAI
NS T
HE C
USTO
MER'
S RE
SPON
SIBI
LITY
TO
VERI
FY P
ROPE
R AN
D RE
LIAB
LE O
PERA
TION
IN T
HE A
CTUA
LAP
PLIC
ATIO
N. C
OMPO
NENT
SUB
STIT
UTIO
N AN
D PR
INTE
DCI
RCUI
T BO
ARD
LAYO
UT M
AY S
IGNI
FICA
NTLY
AFF
ECT
CIRC
UIT
PERF
ORMA
NCE
OR R
ELIA
BILI
TY. C
ONTA
CT L
INEA
RTE
CHNO
LOGY
APP
LICA
TION
S EN
GINE
ERIN
G FO
R AS
SIST
ANCE
.
THIS
CIR
CUIT
IS P
ROPR
IETA
RY T
O LI
NEAR
TEC
HNOL
OGY
AND
SCHE
MAT
IC
SUPP
LIED
FOR
USE
WIT
H LI
NEAR
TEC
HNOL
OGY
PART
S.SC
ALE
= NO
NE
www.
linea
r.com 2
03/24
/2014
, 05:0
7 PM
22
1.4 G
HZ L
OW P
HASE
NOI
SE, L
OW JI
TTER
PLL
WIT
H CL
OCK
DIST
RIBU
TION
KIM
T.MI
CHEL
A.
N/A
LTC6
950I
UHH
DEMO
CIR
CUIT
1795
ASI
ZE
DATE
:
IC N
O.RE
V.
SHEE
TOF
TITL
E:
APPR
OVAL
S
PCB
DES.
APP
ENG.
TEC
HN
OLO
GY
Fax:
(408
)434
-050
7
Milp
itas,
CA 95
035
Phon
e: (4
08)4
32-1
900
1630
McC
arth
y Blvd
.
LTC
Conf
iden
tial-F
or C
usto
mer
Use
Onl
y
CUST
OMER
NOT
ICE
LINE
AR T
ECHN
OLOG
Y HA
S MA
DE A
BES
T EF
FORT
TO
DESI
GN A
CIRC
UIT
THAT
MEE
TS C
USTO
MER-
SUPP
LIED
SPE
CIFI
CATI
ONS;
HOW
EVER
, IT R
EMAI
NS T
HE C
USTO
MER'
S RE
SPON
SIBI
LITY
TO
VERI
FY P
ROPE
R AN
D RE
LIAB
LE O
PERA
TION
IN T
HE A
CTUA
LAP
PLIC
ATIO
N. C
OMPO
NENT
SUB
STIT
UTIO
N AN
D PR
INTE
DCI
RCUI
T BO
ARD
LAYO
UT M
AY S
IGNI
FICA
NTLY
AFF
ECT
CIRC
UIT
PERF
ORMA
NCE
OR R
ELIA
BILI
TY. C
ONTA
CT L
INEA
RTE
CHNO
LOGY
APP
LICA
TION
S EN
GINE
ERIN
G FO
R AS
SIST
ANCE
.
THIS
CIR
CUIT
IS P
ROPR
IETA
RY T
O LI
NEAR
TEC
HNOL
OGY
AND
SCHE
MAT
IC
SUPP
LIED
FOR
USE
WIT
H LI
NEAR
TEC
HNOL
OGY
PART
S.SC
ALE
= NO
NE
www.
linea
r.com 2
03/24
/2014
, 05:0
7 PM
22
1.4 G
HZ L
OW P
HASE
NOI
SE, L
OW JI
TTER
PLL
WIT
H CL
OCK
DIST
RIBU
TION
KIM
T.MI
CHEL
A.
N/A
LTC6
950I
UHH
DEMO
CIR
CUIT
1795
ASI
ZE
DATE
:
IC N
O.RE
V.
SHEE
TOF
TITL
E:
APPR
OVAL
S
PCB
DES.
APP
ENG.
TEC
HN
OLO
GY
Fax:
(408
)434
-050
7
Milp
itas,
CA 95
035
Phon
e: (4
08)4
32-1
900
1630
McC
arth
y Blvd
.
LTC
Conf
iden
tial-F
or C
usto
mer
Use
Onl
y
CUST
OMER
NOT
ICE
LINE
AR T
ECHN
OLOG
Y HA
S MA
DE A
BES
T EF
FORT
TO
DESI
GN A
CIRC
UIT
THAT
MEE
TS C
USTO
MER-
SUPP
LIED
SPE
CIFI
CATI
ONS;
HOW
EVER
, IT R
EMAI
NS T
HE C
USTO
MER'
S RE
SPON
SIBI
LITY
TO
VERI
FY P
ROPE
R AN
D RE
LIAB
LE O
PERA
TION
IN T
HE A
CTUA
LAP
PLIC
ATIO
N. C
OMPO
NENT
SUB
STIT
UTIO
N AN
D PR
INTE
DCI
RCUI
T BO
ARD
LAYO
UT M
AY S
IGNI
FICA
NTLY
AFF
ECT
CIRC
UIT
PERF
ORMA
NCE
OR R
ELIA
BILI
TY. C
ONTA
CT L
INEA
RTE
CHNO
LOGY
APP
LICA
TION
S EN
GINE
ERIN
G FO
R AS
SIST
ANCE
.
THIS
CIR
CUIT
IS P
ROPR
IETA
RY T
O LI
NEAR
TEC
HNOL
OGY
AND
SCHE
MAT
IC
SUPP
LIED
FOR
USE
WIT
H LI
NEAR
TEC
HNOL
OGY
PART
S.SC
ALE
= NO
NE
www.
linea
r.com 2
03/24
/2014
, 05:0
7 PM
22
1.4 G
HZ L
OW P
HASE
NOI
SE, L
OW JI
TTER
PLL
WIT
H CL
OCK
DIST
RIBU
TION
KIM
T.MI
CHEL
A.
N/A
LTC6
950I
UHH
DEMO
CIR
CUIT
1795
A
C39
0.1uF
C39
0.1uF
C2 1.0uF
0603C2 1.0uF
0603
C44
0.01u
F02
01
C44
0.01u
F02
01
C62
0.1uF
C62
0.1uF
WP
WP
C4 0.01u
F02
01
C4 0.01u
F02
01
C13
0.01u
F02
01
C13
0.01u
F02
01E2
0GN
DE2
0GN
D
SCLK
SCLK
R5 4.99K
R5 4.99K
J2 BNC
J2 BNC
GN
DV
CC
U7 NC7W
Z17P
6X
GN
DV
CC
U7 NC7W
Z17P
6X1
6 43
52
R10
4.99K
R10
4.99K
C65
0.1uF
C65
0.1uF
C47
0.01u
F02
01
C47
0.01u
F02
01
C16
0.01u
F02
01
C16
0.01u
F02
01
C15
0.01u
F02
01
C15
0.01u
F02
01
E3V+
= 3.1
5V - 3
.45V
E3V+
= 3.1
5V - 3
.45V
C74
0.1uF
C74
0.1uF
C36
0.1uF
C36
0.1uF
C63
0.1uF
C63
0.1uF
R13
200K
R13
200K
C12
0.01u
F02
01
C12
0.01u
F02
01 R58
200K
R58
200K
R79
100
R79
100
GN
DV
CC
U6 NC7W
Z17P
6X
GN
DV
CC
U6 NC7W
Z17P
6X1
6 43
52
C73
0.1uF
C73
0.1uF
C9 0.01u
F02
01
C9 0.01u
F02
01
R11 0 0603
R11 0 0603
C46
0.01u
F02
01
C46
0.01u
F02
01
C64
0.1uF
C64
0.1uF
EEGN
DEE
GND
EEPROMARRAY
U524
LC02
5-I /S
T EEPROMARRAY
U524
LC02
5-I /S
T
SDA
5
VCC8
A01
A12
A23
GND 4
WP
7SC
L6
+C7
20V
47uF
7343
+C7
20V
47uF
7343
SDI
SDI
J1 BNC
V+ TO
5.25
V
J1 BNC
V+ TO
5.25
V
J5HD
2X7-0
79-M
OLEX
J5HD
2X7-0
79-M
OLEX
MOSI
/SDA
7
EESD
A9
V+1
5V2
CS6
SCK/
SCL
4
EEVC
C10
MISO
5
EESC
L11
EEGN
D12
AUX
14
GND 3GND 13GND 8
R15
200KR15
200K
C11
0.01u
F02
01
C11
0.01u
F02
01
C43
0.01u
F02
01
C43
0.01u
F02
01
C8 1.0uF
0603C8 1.0uF
0603
GN
DD
IR
VC
C(A
)V
CC
(B)
U8 74LV
C1T4
5GW
GN
DD
IR
VC
C(A
)V
CC
(B)
U8 74LV
C1T4
5GW
16 4
3
52
C42
0.01u
F02
01
C42
0.01u
F02
01
C34
0.1uF
C34
0.1uF
R54
100
R54
100
C31
0.1uF
C31
0.1uF
C61
0.1uF
C61
0.1uF
C60
0.01u
F02
01
C60
0.01u
F02
01
C45
0.01u
F02
01
C45
0.01u
F02
01
CSCS
C33
0.1uFC33
0.1uF
C41
0.1uF
C41
0.1uF
C48
0.01u
F02
01
C48
0.01u
F02
01
C10
0.01u
F02
01
C10
0.01u
F02
01
C17
0.01u
F02
01
C17
0.01u
F02
01
R4 4.99K
R4 4.99K
E1E1
SDO
SDO
R14
200K
R14
200K
E21
GND
E21
GND
R51
100
R51
100
C14
0.01u
F02
01
C14
0.01u
F02
01
C19
0.01u
F02
01
C19
0.01u
F02
01
R59
100
R59
100
C18
0.01u
F02
01
C18
0.01u
F02
01
+C1
20V
47uF
7343
+C1
20V
47uF
7343
C35
0.1uF
C35
0.1uF
V+DI
GV+
DIG
12dc1795af
DEMO MANUAL DC1795A
Linear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2014
LT 0714 • PRINTED IN USA
DEMONSTRATION BOARD IMPORTANT NOTICE
Linear Technology Corporation (LTC) provides the enclosed product(s) under the following As is conditions:
This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for engineering DeVeloPMent or eVAluAtion PurPoses onlY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations.
If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.).
No License is granted under any patent right or other intellectual property whatsoever. ltC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.
LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive.
Please read the DeMo boArD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged.
This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC applica-tion engineer.
Mailing Address:
Linear Technology
1630 McCarthy Blvd.
Milpitas, CA 95035
Copyright © 2004, Linear Technology Corporation