A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Cover Sheet
1 63Tuesday, February 07, 2006
Compal Electronics, Inc.
2006-01-20
COMPAL P/N :PCB NO :
COMPAL CONFIDENTIALMODEL NAME : HAL00
Travis (UMA) Schematics DocumentuFCPGA Mobile YonahIntel Calistoga + ICH7M
REV : 1.0 (DELL: A00)
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
LA-2791
PCB P/N: DA800002L1L BOM NO. 45135631L01
45135631L01
Part Number Description
DAA0000040L PCB ZJX LA-2791 REV0 M/B UMA
MB PCB
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Block Diagram
2 63Tuesday, February 07, 2006
Compal Electronics, Inc.
Clock GeneratoruFCPGA CPU
INTEL
DMI
H_D#(0..63)H_A#(3..31)
Compal confidentialModel : HAL00
Pentium-M
Block Diagram
Azalia Codec
Power On/OffSW & LED
System Bus
INTEL
Memory BUS(DDR2)
FSB 533/667 MHz
+1.5V_RUN 100MHz
+1.8V_SUS 533 / 667MHz
ATA100
MDC
1466pin BGA
SLG84450VTR
STAC9200
Azalia I/F
Calistoga
ICH7-M
LVDS
RJ11D Moudle+5VMOD
+VDDA
+3.3V_RUN
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8DDRII-DIMM X2
+0.9V_DDR_VTT
+1.8V_SUS
Cable
+3.3V_SUS
478pin
DC/DC Interface
CPU ITP Port
LVDS CONNon M/B Board
FAN1_VOUT Yonah-2M
SATA
+3.3V_RUN
VCORE (IMVP-6)
1.5V/1.05V
CHARGER
1.8V/0.9V
BATT IN
DC IN
3V/5V/15V
GUARDIAN IIEMC4000
Thermal
+3.3V_SUS
FAN
S-HDD+5VHDD
Power Sequence
DELL CONFIDENTIAL/PROPRIETARY
652pin BGA
page 7,8,9
page 18
page 18
page6page 7
page 10,11,12,13,14,15
page 19
page 21,22,23,24
page 47
page 25 page 25 page 26
page 33
page 48
page 49
page 50
page 44
page 45
page 46
page 42
page 43
page 41
page 16,17
CRT CONNpage 20
LPC BUS+3VRUN33MHz
SMSC SIO
+3VALW
ECE5018page 38
HUB USB[1]
HUB USB[2]
BATT SELECTpage 51
RGB
page 19DVODVI Bridge
SI1362DVI
RGB
TV
HUB USB[3]
DOCKINGBUFFER
PAGE 35
DOCKINGPORT
PAGE 36 page 30
PCI BUS
CardBusOZ601 TQFP
+3.3V_RUN 33MHz
IDSEL:AD17(PIRQC,D#,GNT#1,REQ#1)
+3VRUN
Mini Card2WLAN
+3.3V_RUN
Mini Card 1
PCI Express BUS
+1.5VRUN+1.5VRUN page 28,29
GIGA Enthernet
+3VLAN
RJ45
+3.3V_RUN/ +1.5V_RUN 100MHz
BCM5752WWANpage 34page 34
USB Ports X2
Bluetooth
HUB USB[4]
Smart Card+3.3V_RUN page 31
OZ77C6
IO/B
SLOT
48MHz
+5V_SUS
USB[5,6]
HUB USB[2]USB[0]
HUB USB[1]USB[7]
USB[2]
USB Ports X2+5V_SUS page 32
HUB USB[3]
USB[3,4] SIDE
REAR
+3.3V_RUN
page 39
page 37COM
+3.3V_ALWST M25P80
+3.3V_ALW
+RTC_CELLMEC5004
page 39
SPI
Stick
page 40
Int.KBD &Stick
page 33+5V_RUN
Touch Pad
AMP & INT.Speaker
HeadPhone &MIC Jack
+5V_SUS +3.3V_RUNpage 27 page 27
INT MIC+5V_SUS
USB0 on the top of connector,USB2 on the bottom
USB[1]
page 33
SPI
+5V_RUN
+5VRUN
USB4 on right side ofconnector, USB6 on left side
IO/BIO/B
+1.05V_VCCP (1.05V)
+VCC_CORE
+1.5V_RUN
+1.8V_SUS
+1.05V_VCCP (1.05V)
+3.3V_RUN
+2.5V_RUN
+1.05V_VCCP
+3.3V_RUN
+3.3V_RUN
+3.3V_SUS
+1.5V_RUN
+1.05V_VCCP
+3.3V_RUN page 37FIR
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Index and Config.
3 63Tuesday, February 07, 2006
Compal Electronics, Inc.
PIRQ
C
PM TABLE
ON
ON
AD17
OFF
PCI DEVICE
CARD BUS
IDSEL
S0
TABLE
1
PCI
ON
ON
S3
ON
OFF
ON
OFF
S1
S5 S4/AC don't exist
+VCC_CORE
REQ#/GNT#
ON
powerplane
S5 S4/AC
ON
ON
State
OFFOFF
OFF
+3.3V_RUN_R
Tolerance0.1U_0402_6.3VXX
Ceramic Capacitors :
Temperature CharacteristicsRated VoltagePackage SizeValue
CH
A
Capacitor Spec Guide:
1
SL
CODE
COG SJ
9
B
+-3%
CODE
Symbol F
+40,-20%+-20%
4
G
+20,-10%
X
UK
5
B
Z
C
+-0.05PF
Y5V
Temperature Characteristics:
Y5P
CK
V
+-0.1PF
X5R
A
Z5U
BJ
+100,-0%
Y5U X7R
P
+-30%
C
SH
8
H
CJ
+30,-10%
K
+-5%
7
Q
+80,-20%
6
+-0.5PF +-1PF
Z5V
+-10%
J
+-0.25PF
Tolerance:
+-2%
N
D
Z5P
2
UJ
D E F G
H I J
30Symbol
X6SNPO
K
X5S
M
ValuePackage SizeRated VoltageToleranceLow ESR Mark : 45 m ohm
10U_D2_10VX_R45
Tantalum or Polymer Capacitors :+0.9V_DDR_VTT
@XX : Depop component
NOTE1:DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+1.5V_RUN
+3.3V_SRC
+2.5V_RUN+1.05V_VCCP
+3.3V_SUS+5V_SUS+5V_ALW +1.8V_RUN
+5V_RUN+3.3V_RUN
+3.3V_ALW+1.8V_SUS
+15V_SUS
1
2
USB HUB DESTINATION
4
3
PC Card Bay
Mini 1(WWAN)
Mini 2(WLAN)
Smart Card --> BIO
3,4
TABLEUSB
0
1
7
USB PORT# DESTINATION
5,6 REAR
2
USB Hub (5018)
Docking
SIDE Blue tooth
D Moudle
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Power Rail
4 63Tuesday, February 07, 2006
Compal Electronics, Inc.
BATTERY
+PWR_SRC
ADAPTER
SU
S_O
N
RU
N_O
N
AUD
IO_A
VD
D_O
N
(Opt
ion)
+2.5V_RUN
MAX8734
EMC4000
RU
N_O
N
L47
793475
FDS4435 +INV_PWR_SRCRUN_ON
SI4800
SI3456
SI3456
HD
DC
_EN
#
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
SI3456
ENAB
_3V
LAN
MOD(+5VRUN)
ALWON
SI3456
MO
DC
_EN
#
SU
S_O
N+VCC_CORE
RU
NP
WR
OK
SI3456
RU
N_O
N
ISL6227
+1.8V_SUS
RU
N_O
N
RU
NP
WR
OK
ISL6260 MAX88550
+1.8V_RUN
RU
NP
WR
OK
SU
SP
WR
OK
_5V
PL8 SI4800
ALWON
SI4800
+3.3V_RUN_R
RU
N_O
N
+3.3V_ALW
+5V_ALW
+3.3V_SRC+5V_SUS
+3VLAN+15V_SUS +3.3V_SUS+3.3V_RUN+5V_SATA +5V_RUN +VDDA
+0.9V_DDR_VTT+1.05V_VCCP+1.5V_RUN
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
SMBUS TOPOLOGY
5 63Tuesday, February 07, 2006
Compal Electronics, Inc.
CLK GEN.
Macallan IV
ICH7-M
DAT_SMB +3.3V_ALW
CLK_SMB
GUARDIAN
ICH_SMBDATA
+3.3V_SUSICH_SMBCLK
SIO
PBAT_SMBCLK
PBAT_SMBDAT +3.3V_ALWBATTERYCONN
CHARGER
DELL CONFIDENTIAL/PROPRIETARY
DIMM1
DIMM0
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+3.3V_SUS
2N7002
2N7002
+3.3V_RUN
2.2K 2.2K 2.2K 2.2K
CLK_SCLK
CLK_SDATA
+3.3V_ALW
10K 10K
SMBUS Address [A0]
SMBUS Address [A2]
195
195
197
197
B22
C22
17
16
5
6
7
8
SMBUS Address [D2]
SMBUS Address [2F]
+3.3V_ALW
8.2K8.2K
100
100
SMBUS Address [16]
SMBUS Address [12]
3
4
9
10
8
7
WWANSMBUS Address [TBD]
3032
WLAN
3032
SMBUS Address [TBD]
SBAT_SMBDAT111
112
+3.3V_ALW
+3.3V_ALW
2'ndBATTERY
SMBUS Address [58]5
6
3
4
SBAT_SMBCLKInverter INV
4.7K 4.7K
8.2K 8.2K
SMBUS Address [C4, 72, 70, 48]+3.3V_ALW10
+3.3V_ALW
DOCKING9 DOCK_SMB_DAT
39
40
100
100
SMBUS Address [16]
5752MLOM
C8C7
SMBUS Address [C8]
DOCK_SMB_CLK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CPU_ITP#
CLK_CPU_ITP
CLK_CPU_ITP#
CPU_ITP
H_STP_CPU#
H_STP_PCI#
DOT96_SSC
DOT96_SSC#
CLK_MCH_BCLK#MCH_BCLK#
CPU_BCLK
CLK_CPU_BCLK#CPU_BCLK#
CLK_CPU_BCLK
+CK_VDD_A
+CK_VDD_MAIN
CLK_XTAL_IN
FSC
DREF_SSCLK#
DREF_SSCLK
CLK_CPU_BCLK#
CLK_CPU_BCLK
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_CPU_ITP#
CLK_CPU_ITP
CLK_PCIE_LOM#
CLK_PCIE_LOM
DREFCLK#
DREFCLK
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_PCIE_SATA#
CLK_PCIE_SATA
CLK_PCIE_ICH#
CLK_PCIE_ICH
ICH_SMBDATA
ICH_SMBCLK
CLK_SDATA
CLK_SCLK
FSB
FSC
CLKREFCLK_ICH_14MCLK_SIO_14M
DREFCLK# DOT96#
DOT96DREFCLK
CLK_ENABLE#
CLKIREF
CLK_SDATA
CLK_SCLK
FCTSEL1
CLK_PCIE_MINI2#
CLK_PCIE_MINI2
CLK_MCH_BCLKMCH_BCLK
PCIE_MINI2
CLK_PCIE_MINI2#
CLK_PCIE_MINI2
PCIE_MINI2#
CLK_PCI_ICH PCI_ICH
CLK_SMC_48M
CLK_ICH_48M FSA
FCTSEL1
CLK_PCI_LOM PCI_LOM
DOCKPCI_33MCLK_DOCKPCI_33M
CLK_PCI_PCM PCI_PCM
CLK_PCI_5018
CLK_PCI_5004
CLK_MCH_3GPLL#
CLK_MCH_3GPLL
MCH_3GPLL#
MCH_3GPLL
PCIE_SATA
PCIE_SATA#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_PCIE_LOMPCIE_LOM
CLK_PCIE_LOM#PCIE_LOM#
PCIE_ICH
PCIE_ICH#
CLK_PCIE_ICH
CLK_PCIE_ICH#
FSB
PCIE_MINI1
PCIE_MINI1#
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
CLK_PCIE_MINI1#+CK_VDD_REF
+CK_VDD_48
+CK_VDD_48+CK_VDD_A +CK_VDD_REF
CLK_XTAL_OUT
FSA
+CK_VDD_MAIN
+CK_VDD_MAIN2
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
H_STP_CPU# 23
H_STP_PCI# 23
CLK_MCH_BCLK# 10
CLK_MCH_BCLK 10
CLK_CPU_BCLK# 7
CLK_CPU_BCLK 7
DREF_SSCLK 10
DREF_SSCLK# 10
CLK_CPU_ITP 7
CLK_CPU_ITP# 7
MCH_CLKSEL2 10 MCH_CLKSEL1 10
CPU_BSEL28 CPU_BSEL18
ICH_SMBCLK23,28,34
ICH_SMBDATA23,28,34 CLK_SDATA 16,17
CLK_SCLK 16,17
CLK_ICH_14M23CLK_SIO_14M38
DREFCLK10
DREFCLK#10
CLK_PCIE_MINI2 34
CLK_PCIE_MINI2# 34
CLK_PCI_ICH21
CLK_SMC_48M31
CLK_ICH_48M23
CLK_PCI_LOM28
CLK_DOCKPCI_33M36
CLK_PCI_PCM30
CLK_PCI_501838
CLK_PCI_500439
CLK_MCH_3GPLL 10
CLK_MCH_3GPLL# 10
CLK_PCIE_SATA 22
CLK_PCIE_SATA# 22
CLK_PCIE_LOM 28
CLK_PCIE_LOM# 28
CLK_PCIE_ICH# 23
CLK_PCIE_ICH 23
CLK_PCIE_MINI1 34
CLK_PCIE_MINI1# 34
MINI1CLK_REQ# 34
SATA_CLKREQ# 23
CLK_3GPLLREQ# 10
LOM_CLKREQ# 28
CLK_ENABLE#49
MINI2CLK_REQ# 34
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Clock Generator
6 63Tuesday, February 07, 2006
Compal Electronics, Inc.
Place crystal within500 mils of CK410
31
G S
2N7002
2
D
Table : ICS954305AK
1
*
CLKSEL2 CLKSEL0CLKSEL1FSC FSB FSA CPU
MHzSRCMHz
PCIMHz
266
133
200
166
333
100
400
100
100
100
100
100
100
100
33.3
33.3
33.3
33.3
33.3
33.3
33.3
0 0 0
00
0
0
0
00
0
0
1
1
1 1
1
1
1
1 1
1
1
CPU_BSEL CPU_BSEL2(FSC) CPU_BSEL1(FSB)
133
166
0
0
0
1
Place near each pinW>40 mil
Place near CK410+
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Reserve
FCTSEL1 PIN43 PIN44 PIN47 PIN48
0
1
DOT96T DOT96C 96/100M_T 96/100M_C
27M_out 27M SSout SRCT0 SRCC0
*
NOTE: Place Decoupling as close as physically possilble to the VDD pins
Solder Thermal Pad to GND. Add min. 4 vias.
R392 49.9_0402_1%~D
1 2
R298 12.1_0402_1%~D
12
R32470_0402_5%~D 1 2
R525 33_0402_5%~D 1 2
R1393 33_0402_5%~D
1 2
R337 33_0402_5%~D
1 2
R399 49.9_0402_1%~D 1 2
R294 33_0402_5%~D
12
R2732.2_0603_5%~D
1 2
C3440.1U_0402_16V4Z~D
1
2
R1436 33_0402_5%~D
1 2
R366 33_0402_5%~D
1 2
R348 33_0402_5%~D
1 2
R250 12.1_0402_1%~D
1 2
R158233_0402_5%~D 12
C326
0.1U_0402_16V4Z~D
1
2
R302 33_0402_5%~D
12
R369 49.9_0402_1%~D
12
R545 49.9_0402_1%~D
1 2
R299 10K_0402_5%~D
1 2
R355 49.9_0402_1%~D
1 2
C700.1U_0402_16V4Z~D
1
2
R397 33_0402_5%~D
1 2
R360 49.9_0402_1%~D
12
C30810U_0805_10V4Z~D
1
2
R524 33_0402_5%~D 1 2
R344 49.9_0402_1%~D
1 2
R374 49.9_0402_1%~D
1 2
R1762 10K_0402_5%~D
1 2
C640.1U_0402_16V4Z~D
1
2
R322 49.9_0402_1%~D
12
C51
0.04
7U_0
402_
16V4
Z~D 1
2
R403 49.9_0402_1%~D
1 2
R376 33_0402_5%~D
1 2
R400 33_0402_5%~D
1 2
R381 49.9_0402_1%~D
1 2
R266 12.1_0402_1%~D
1 2
R523 49.9_0402_1%~D 1 2
G
D S
Q362N7002W-7-F_SOT323~D
2
1 3
C3300.1U_0402_16V4Z~D
1
2
C40210U_0805_10V4Z~D
1
2
R3300_0402_5%~D
1 2
L40BLM21PG600SN1D_0805~D
1 2
R385 49.9_0402_1%~D
1 2
L32BLM21PG600SN1D_0805~D
1 2
R1394 33_0402_5%~D
1 2
X214.31818MHz_20P_1BX14318CC1A~D
12
R1438 12.1_0402_1%~D
12
R375 33_0402_5%~D
1 2R356 33_0402_5%~D
1 2
R1642 49.9_0402_1%~D
1 2
R531
8.2K_0402_5%~D
12
G
D S
Q382N7002W-7-F_SOT323~D
2
1 3
R544 49.9_0402_1%~D
1 2
R345 33_0402_5%~D
1 2
U16
SLG84450VTR_QFN72~D
VDDSRC1VDDSRC49
VDDSRC65
VDDPCI30VDDPCI36
VDD4840
VDDCPU12
VDDREF18
USB_48MHz/FSLA41
FSLB/TEST_MODE45
X219
X120
GNDPCI31
PCICLK232
REF0/FSLC/TEST_SEL23
SMBDAT17
SMBCLK16
ITP_EN/PCICLK_F037
IREF9
CPU_STOP# 24
CPUT1 11
CPUC1 10
CPUT_ITP/SRCT10 6
PCICLK333
PCICLK4/FCTSEL134
CPUC0 13
CPUT0 14
PCI_SRC_STOP# 25
GNDA 8
VDDA 7
GNDPCI35
CPUC_ITP/SRCC10 5
GNDREF21
GNDCPU15
GNDSRC4
GND4842
GNDSRC68
DOTT_96MHz/27MHz43
DOTC_96MHz/27MHz(SS)44
Vtt_PwrGd#/PD39
REF122 SRCT7 66
SRCC7 67
SRCT8 70
SRCC8 69
SRCT9 3
SRCC9 2
SRCC1 51
LCD100/96/SRC0_T 47
SRCT2 52
SRCT4 58
SRCT1 50
CLKREQ4# 57
SRCC2 53
SRCC5 61
SRCC4 59
SRCT5 60
LCD100/96/SRC0_C 48
SRCC3 56
SRCT3 55
SRCT6 63
SRCC6 64
CLKREQ6# 62
CLKREQ8# 71
CLKREQ9# 72
CLKREQ1# 46
CLKREQ5# 29
CLKREQ3# 28
CLKREQ2# 26
CLKREQ7# 38
VDDSRC54
PCICLK127
THRM_PAD73
THRM_PAD76
THRM_PAD74THRM_PAD75
R394 33_0402_5%~D
1 2
R29110K_0402_5%~D
12
R1395 10K_0402_5%~D
1 2
R368 33_0402_5%~D
1 2
R321 33_0402_5%~D
1 2
R1589 12.1_0402_1%~D
1 2
R1641 49.9_0402_1%~D
1 2
C3890.1U_0402_16V4Z~D
1
2
R27810K_0402_5%~D
@
12
R1761 10K_0402_5%~D@ 1 2
R2741_0603_5%~D
1 2
R1638 33_0402_5%~D
1 2
R402 33_0402_5%~D
1 2
R1639 33_0402_5%~D
1 2
R331 33_0402_5%~D
12
C52
0.04
7U_0
402_
16V4
Z~D
1
2C68
4.7U
_060
3_6.
3V4Z
~D 1
2
R4012.2_0603_5%~D
1 2
R292 10K_0402_5%~D
1 2
R1619 12.1_0402_1%~D
12
R1435 33_0402_5%~D
1 2
C3840.1U_0402_16V4Z~D
1
2
R27
02.
2K_0
402_
5%~D
12
R362 475_0402_1%~D
1 2
C580.1U_0402_16V4Z~D
1
2
R349 49.9_0402_1%~D
12
R1640 10K_0402_5%~D
1 2
R338 49.9_0402_1%~D
12
C32927P_0402_50V8J~D
12
R316
10K_0402_5%~D
1 2
R377 49.9_0402_1%~D
12
R27110K_0402_5%~D
12
R393 49.9_0402_1%~D 1 2
R359 33_0402_5%~D
1 2
C50
4.7U
_060
3_6.
3V4Z
~D 1
2
R522 49.9_0402_1%~D 1 2
R3540_0402_5%~D
1 2
C33327P_0402_50V8J~D
12
R27
52.
2K_0
402_
5%~D
12
R365 49.9_0402_1%~D
1 2
C61
0.04
7U_0
402_
16V4
Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_A#28
H_FERR#
H_ADSTB#0
H_D#52
H_D#20H_A#23
H_REQ#2
H_D#10
H_D#5
H_D#49
H_D#3
H_A#31
H_REQ#0
H_D#39
H_D#57
H_D#29
H_A#17
H_IGNNE#
H_D#34
H_D#14
H_BNR#
H_A#29
H_DSTBP#0
H_D#51
H_D#22
H_A#8
H_DEFER#
H_INIT#
H_REQ#1
H_D#50
H_D#48
H_D#0H_A#3
H_RS#0
H_DSTBN#1
H_D#58
H_D#28
H_A#6
ITP_BPM#2
H_BPRI#
H_ADS#
H_A#25
ITP_BPM#3
H_RS#1
H_DSTBP#1
H_D#46
H_D#41
H_D#12
H_A#4
H_IERR#H_HITM#
H_DSTBN#0
H_D#47
H_D#37
H_INTR
H_DSTBN#2
H_D#9
H_D#7
H_A#22
H_A#7
H_REQ#4
H_D#31
H_D#13
ITP_DBRESET#
H_DRDY#
H_A#15H_A#14
H_A20M#
H_D#27
H_D#25
H_D#4
H_DSTBP#2
H_D#56
H_D#35
H_D#59
H_D#63
H_D#45
H_D#24
H_D#30
H_D#55
H_D#40
H_D#19
H_D#62
H_D#44
H_D#23
H_D#2
H_D#8
H_D#6
H_D#54
H_D#33
H_D#18
H_D#16
H_D#61
H_D#43
H_D#1
H_D#26
H_DSTBN#3
H_D#53
H_D#32
H_D#11
H_DSTBP#3
H_D#38
H_D#36
H_D#17
H_D#15
H_NMI
H_D#60
H_D#42
H_D#21
H_A#30
H_A#27
H_A#18
H_A#10
H_BR0#
H_LOCK#
H_A#11
H_A#21
H_A#26
H_A#13
H_A#9
H_DPSLP#
H_A#20
H_A#16
H_A#12
H_HIT#
H_ADSTB#1
H_THERMTRIP#
H_DBSY#
H_A#19
H_A#24
H_A#5
H_RS#2
H_RESET#
ITP_BPM#1
H_REQ#3
H_SMI#H_STPCLK#
ITP_TCK
ITP_TRST#
TEST1TEST2ITP_TMS
H_CPUSLP#
ITP_TDOITP_TDI
ITP_BPM#5
H_DPWR#ITP_BPM#4
H_DPRSTP#
H_THERMTRIP#
H_TRDY#
CLK_CPU_BCLKCLK_CPU_BCLK#
ITP_BPM#0
ITP_TDIITP_TMS
ITP_TCK
ITP_TRST#
ITP_TDO
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#4
ITP_BPM#5
ITP_DBRESET#
ITP_TCK
ITP_BPM#3
CLK_CPU_ITP#CLK_CPU_ITP
H_RESET#
H_THERMDAH_THERMDC
ITP_BPM#5
ITP_TDO
ITP_TMS
ITP_TDI
ITP_TRST#
ITP_TCK
ITP_DBRESET#
H_RESET#
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+3.3V_SUS
H_THERMTRIP#18
H_ADS#10
H_REQ#[0..4]10
H_A#[3..31]10
H_BPRI#10H_BNR#10
H_DEFER#10
H_HITM#10
H_BR0#10
H_HIT#10
H_D#[0..63] 10
H_DPSLP#22
H_RESET#10
H_DRDY#10
H_RS#[0..2]10
H_ADSTB#010
H_DSTBP#[0..3] 10
H_ADSTB#110
H_DSTBN#[0..3] 10
H_DINV#0 10
H_DINV#2 10
H_DBSY#10
H_DINV#1 10
H_IGNNE# 22
H_LOCK#10
H_INTR 22H_NMI 22
H_DINV#3 10
H_INIT# 22
H_FERR# 22
ITP_DBRESET#23,39
H_A20M# 22
H_STPCLK# 22H_SMI# 22
H_PWRGOOD22H_CPUSLP#10,22
H_DPWR#10
CPU_PROCHOT#38
H_DPRSTP#22,49
H_TRDY#10
CLK_CPU_BCLK6CLK_CPU_BCLK#6
CLK_CPU_ITP#6CLK_CPU_ITP6
H_THERMDA18H_THERMDC18
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Yonah in mFCPGA479
7 63Tuesday, February 07, 2006
Compal Electronics, Inc.
H_THERMDA, H_THERMDC routing together.Trace width / Spacing = 10 / 10 mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
This shall place near CPU
Pop R1378 required byIntel for B0 Yonah. Backward compatible forA0 and A1 Yonah
R43627.4_0402_1%~D
1 2
R41551_0402_5%~D
1 2
R391680_0402_5%~D
1 2
R42256_0402_5%~D
1 2
R417150_0402_5%~D
1 2
R43422.6_0402_1%~D
1 2
C72
0.01
U_0
402_
16V7
K~D
@
1
2
R3354.9_0402_1%~D 1 2
R38739.2_0402_1%~D
1 2
R1378 51_0603_1%~D
12
R13871K_0603_1%~D
@
12
R39856_0402_5%~D 1 2
R42422.6_0402_1%~D
1 2
C71
0.01
U_0
402_
16V7
K~D
@
1
2
R367150_0402_1%~D
1 2
JITP
MOLEX_52435-2891_28P~D@
TDI1 TMS2 TRST#3 NC14 TCK5 NC26 TDO7 BCLKN8 BCLKP9 GND010 FBO11 RESET#12 BPM5#13
BPM4#15
BPM3#17
BPM2#19
BPM1#21
BPM0#23 DBA#24 DBR#25 VTAP26 VTT027 VTT128
GND114
GND216
GND318
GND420
GND522
3030
2929
ADDR GROUP
CONTROL
HOST CLK
MISC
DATA GROUP
THERMALDIODE
LEGACY CPU
YONAHJCPUA
TYCO_1-1674770-2_Yonah~D
A3#J4A4#L4A5#M3A6#K5A7#M1A8#N2A9#J1A10#N3A11#P5A12#P2A13#L1A14#P4A15#P1A16#R1A17#Y2A18#U5A19#R3A20#W6A21#U4A22#Y5A23#U2A24#R4A25#T5A26#T3A27#W3A28#W5A29#Y4A30#W2A31#Y1
REQ0#K3REQ1#H2REQ2#K2REQ3#J3REQ4#L5
ADSTB0#L2ADSTB1#V4
BCLK0A22BCLK1A21
ADS#H1BNR#E2BPRI#G5BR0#F1DEFER#H5DRDY#F21HIT#G6HITM#E4IERR#D20LOCK#H4RESET#B1
RS0#F3RS1#F4RS2#G3TRDY#G2
BPM0#AD4BPM1#AD3BPM2#AD1BPM3#AC4
DBR#C20DBSY#E1DPSLP#B5
DPWR#D24PRDY#AC2PREQ#AC1PROCHOT#D21
PWRGOODD6SLP#D7TCKAC5TDIAA6TDOAB3TEST1C26TEST2D25TMSAB5TRST#AB6
THERMDAA24THERMDCA25THERMTRIP#C7
D0# E22D1# F24D2# E26D3# H22D4# F23D5# G25D6# E25D7# E23D8# K24D9# G24
D10# J24D11# J23D12# H26D13# F26D14# K22D15# H25D16# N22D17# K25D18# P26D19# R23D20# L25D21# L22D22# L23D23# M23D24# P25D25# P22D26# P23D27# T24D28# R24D29# L26D30# T25D31# N24D32# AA23D33# AB24D34# V24D35# V26D36# W25D37# U23D38# U25D39# U22D40# AB25D41# W22D42# Y23D43# AA26D44# Y26D45# Y22D46# AC26D47# AA24D48# AC22D49# AC23D50# AB22D51# AA21D52# AB21D53# AC25D54# AD20D55# AE22D56# AF23D57# AD24D58# AE21D59# AD21D60# AE25D61# AF25D62# AF22D63# AF26
DINV0# J26DINV1# M26DINV2# V23DINV3# AC20
DSTBN0# H23DSTBN1# M24DSTBN2# W24DSTBN3# AD23DSTBP0# G22DSTBP1# N25DSTBP2# Y25DSTBP3# AE24
A20M# A6FERR# A5
IGNNE# C4INIT# B3
LINT0 C6LINT1 B4
STPCLK# D5SMI# A3
DPRSTP#E5
R41651_0402_5%~D 1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
COMP3COMP2
H_PSI#
COMP1COMP0
VID1VID0
VID3VID4
VID2
VID5VID6
CPU_BSEL1CPU_BSEL2
CPU_BSEL0
VCCSENSE
VSSSENSE
VCCSENSE
VSSSENSE
+1.05V_VCCP
+VCC_CORE
+1.05V_VCCP
V_CPU_GTLREF
V_CPU_GTLREF
+1.5V_RUN
+VCC_CORE
+VCC_CORE
H_PSI#49
VID049VID149VID249VID349VID449VID549VID649
CPU_BSEL16CPU_BSEL26
CPU_BSEL010
VCCSENSE49VSSSENSE49
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Yonah in mFCPGA479
8 63Tuesday, February 07, 2006
Compal Electronics, Inc.
Resistor placed within0.5" of CPU pin.Traceshould be at least 25mils away from anyother toggling signal.
R_B
R_A
Layout close CPU PIN AD26
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
0.5 inch (max)
CPU_BSEL CPU_BSEL2 CPU_BSEL1
133
166
0 0
0 1
CPU_BSEL0
1
1
Length match within 25 mils
Layout close CPU
R1472K_0402_1%~D
12
C87
10U
_080
5_4V
AM~D
1
2
R12
927
.4_0
402_
1%~D
12
POWER, GROUND
YONAH
JCPUC
TYCO_1-1674770-2_Yonah~D
VCCAE18VCCAE17VCCAB15VCCAA15VCCAD15VCCAC15VCCAF15VCCAE15VCCAB14VCCAA13VCCAD14VCCAC13VCCAF14VCCAE13VCCAB12VCCAA12VCCAD12VCCAC12VCCAF12VCCAE12VCCAB10VCCAB9VCCAA10VCCAA9VCCAD10VCCAD9VCCAC10VCCAC9VCCAF10VCCAF9VCCAE10VCCAE9VCCAB7VCCAA7VCCAD7VCCAC7VCCB20VCCA20VCCF20VCCE20VCCB18VCCB17VCCA18VCCA17VCCD18VCCD17VCCC18VCCC17VCCF18VCCF17VCCE18VCCE17VCCB15VCCA15VCCD15VCCC15VCCF15VCCE15
VSS K1VSS J2VSS M2VSS N1VSS T1VSS R2VSS V2VSS W1VSS A26VSS D26VSS C25VSS F25VSS B24VSS A23VSS D23VSS E24VSS B21VSS C22VSS F22VSS E21VSS B19VSS A19VSS D19VSS C19VSS F19VSS E19VSS B16VSS A16VSS D16VSS C16VSS F16VSS E16VSS B13VSS A14VSS D13VSS C14VSS F13VSS E14VSS B11VSS A11VSS D11VSS C11VSS F11VSS E11VSS B8VSS A8VSS D8VSS C8VSS F8VSS E8VSS G26VSS K26VSS J25VSS M25VSS N26VSS T26VSS R25VSS V25VSS W26VSS H24VSS G23VSS K23VSS L24VSS P24VSS N23VSS T23VSS U24VSS Y24VSS W23VSS H21VSS J22VSS M22VSS L21VSS P21VSS R22VSS V22VSS U21VSS Y21
VCCB14VCCA13VCCD14VCCC13VCCF14VCCE13VCCB12VCCA12VCCD12VCCC12VCCF12VCCE12VCCB10VCCB9VCCA10VCCA9VCCD10VCCD9VCCC10VCCC9VCCF10VCCF9VCCE10VCCE9VCCB7
VCCF7 VCCA7
R1401K_0402_1%~D
12
POWER, GROUNG, RESERVED SIGNALS AND NC
YONAH
JCPUB
TYCO_1-1674770-2_Yonah~D
PSI#AE6
GTLREFAD26
VCCSENSEAF7
VCCAB26
VCCAB20VCCAA20VCCAF20VCCAE20VCCAB18VCCAB17VCCAA18VCCAA17VCCAD18VCCAD17VCCAC18VCCAC17VCCAF18VCCAF17
RSVDT22
RSVDV3RSVDB2RSVDC3
VSS AB26VSS AA25VSS AD25VSS AE26VSS AB23VSS AC24VSS AF24VSS AE23VSS AA22VSS AD22VSS AC21VSS AF21VSS AB19VSS AA19VSS AD19VSS AC19VSS AF19VSS AE19VSS AB16VSS AA16VSS AD16VSS AC16VSS AF16VSS AE16VSS AB13VSS AA14VSS AD13VSS AC14VSS AF13VSS AE14VSS AB11VSS AA11VSS AD11VSS AC11VSS AF11VSS AE11VSS AB8VSS AA8VSS AD8VSS AC8VSS AF8VSS AE8VSS AA5VSS AD5VSS AC6VSS AF6VSS AB4VSS AC3VSS AF3VSS AE4VSS AB1VSS AA2VSS AD2VSS AE1VSS B6VSS C5VSS F5VSS E6VSS H6VSS J5VSS M5VSS L6VSS P6VSS R5VSS V5VSS U6VSS Y6VSS A4VSS D4VSS E3VSS H3VSS G4VSS K4VSS L3VSS P3VSS N4VSS T4VSS U3VSS Y3VSS W4VSS D1VSS C2VSS F2VSS G1RSVDB25
VSSSENSEAE7
VCCPK6VCCPJ6VCCPM6VCCPN6VCCPT6VCCPR6VCCPK21VCCPJ21VCCPM21VCCPN21VCCPT21VCCPR21VCCPV21VCCPW21VCCPV6VCCPG21
VID0AD6VID1AF5VID2AE5VID3AF4VID4AE3VID5AF2VID6AE2
BSEL0B22BSEL1B23BSEL2C21
COMP0R26COMP1U26COMP2U1COMP3V1
RSVDC23RSVDC24RSVDAA1RSVDAA4RSVDAB2RSVDAA3RSVDM4RSVDN5RSVDT2
RSVDD2RSVDF6RSVDD3RSVDC1RSVDAF1RSVDD22
VCCE7
R45
754
.9_0
402_
1%~D
12
C88
0.01
U_0
402_
16V7
K~D
1
2R556100_0402_1%~D 1 2
R555100_0402_1%~D 1 2
R46
527
.4_0
402_
1%~D
12
R12
454
.9_0
402_
1%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05V_VCCP
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
CPU Bypass
9 63Tuesday, February 07, 2006
Compal Electronics, Inc.
10uF 0805 X5R -> 85 degree C
High Frequence Decoupling
7mOhmPS CAP
ESR <= 1.5m ohmCapacitor > 1980uF
Near VCORE regulator.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place these insidesocket cavity on L8(North sideSecondary)
Place these insidesocket cavity on L8(Sorth sideSecondary)
Place these insidesocket cavity on L8(North sidePrimary)
Place these insidesocket cavity on L8(Sorth sidePrimary)
South Side Secondary
Place these insidesocket cavity on L8(North sideSecondary)
CRB was 270uF
North Side Secondary
7mOhmPS CAP
7mOhmPS CAP
7mOhmPS CAP
7mOhmPS CAP
7mOhmPS CAP
22uF 0805 X5R -> 85 degree C
The caps need change to ESR=6m ohms
C43010U_0805_4VAM~D
1
2
C4150.1U_0402_10V7K~D
1
2
C44710U_0805_4VAM~D
1
2
+
C35
233
0U_D
_2.5
VM_R
6M~D
1
2
C4160.1U_0402_10V7K~D
1
2
C12010U_0805_4VAM~D
1
2
C9910U_0805_4VAM~D
1
2
C42610U_0805_4VAM~D
1
2
C46610U_0805_4VAM~D
1
2
C43310U_0805_4VAM~D
1
2
C10210U_0805_4VAM~D
1
2
C14010U_0805_4VAM~D
1
2
C4140.1U_0402_10V7K~D
1
2
C42710U_0805_4VAM~D
1
2
C42910U_0805_4VAM~D
1
2
C43110U_0805_4VAM~D
1
2
C13710U_0805_4VAM~D
1
2
+
C37
233
0U_D
2E_2
.5VM
_R9~
D@
1
2
C46810U_0805_4VAM~D
1
2
C4390.1U_0402_10V7K~D
1
2
C11910U_0805_4VAM~D
1
2
C9810U_0805_4VAM~D
1
2
+
C35
433
0U_D
_2.5
VM_R
6M~D
@
1
2
C13810U_0805_4VAM~D
1
2
C42810U_0805_4VAM~D
1
2
C13910U_0805_4VAM~D
1
2
C4510.1U_0402_10V7K~D
1
2
C47110U_0805_4VAM~D
1
2
C44610U_0805_4VAM~D
1
2
C14210U_0805_4VAM~D
1
2
C44810U_0805_4VAM~D
1
2
+
C61
833
0U_D
_2.5
VM_R
6M~D
@
1
2
C47010U_0805_4VAM~D
1
2
C46710U_0805_4VAM~D
1
2
C46910U_0805_4VAM~D
1
2
+
C36
533
0U_D
_2.5
VM_R
6M~D
1
2
C47210U_0805_4VAM~D
1
2
C47310U_0805_4VAM~D
1
2
C43210U_0805_4VAM~D
1
2
+
C49
733
0U_D
_2.5
VM_R
6M~D
1
2
C10010U_0805_4VAM~D
1
2
C9710U_0805_4VAM~D
1
2
C14110U_0805_4VAM~D
1
2
C4620.1U_0402_10V7K~D
1
2
+
C49
633
0U_D
_2.5
VM_R
6M~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_SWNG1
H_SWNG0
H_VREF
THERMTRIP_MCH#
PM_EXTTS#0V_DDR_MCH_REF
M_OCDOCMP1
PM_EXTTS#1
H_RS#0
H_ADSTB#1
H_A#28
H_A#15
H_SWNG1
H_XRCOMP
H_D#16
H_D#10
MCH_CLKSEL1
H_REQ#0
H_A#16
H_D#62
H_D#60
H_D#19
H_D#7
H_D#0
CFG7
CFG5
DDR_CKE0_DIMMA
M_CLK_DDR3
H_HIT#
H_DSTBP#0
H_REQ#4
H_A#20
H_A#17
H_A#13
H_SWNG0
H_D#53
H_D#39H_D#38
H_D#32
H_D#13
DDR_CKE1_DIMMA
M_OCDOCMP0
DMI_MRX_ITX_N0
H_BNR#
H_REQ#2
H_A#8
H_D#59
H_D#27
H_D#20
M_ODT1
H_DSTBP#2
H_A#26
H_A#19
H_D#58
H_D#48
H_D#46
H_D#40
H_D#8
CFG13
M_CLK_DDR#0
H_REQ#3
H_D#44
H_D#12
H_D#3
H_D#1
CFG9
H_REQ#1
H_A#7
H_YSCOMP
H_D#43
H_D#35
H_D#31
H_D#25H_D#24
CPU_BSEL0
DDR_CKE3_DIMMB
H_BPRI#
H_A#22
H_D#61
H_D#56
H_D#21
H_D#11
H_D#6
CFG18
M_CLK_DDR#1
H_CPUSLP#
H_ADS#
H_DSTBP#3
H_DSTBN#3
H_A#27
H_A#6
H_A#3
H_D#37
H_D#33
H_D#30
CFG16
M_OCDOCMP0
H_D#63
H_D#51
H_D#9
H_D#2
PLTRST_R#
CFG19
CFG12
DDR_CS1_DIMMA#
SMRCOMPN
V_DDR_MCH_REF
H_DSTBP#1
H_RS#2
H_ADSTB#0
H_A#25
H_D#50
H_D#41
H_D#36
H_D#23
H_D#4
DDR_CKE2_DIMMB
H_LOCK#
H_RESET#
H_A#12H_A#11
H_D#54
H_D#42
M_ODT3
M_OCDOCMP1
M_CLK_DDR#2
H_DBSY#
H_BR0#
H_DSTBN#1H_DSTBN#0
H_A#18
H_A#10
H_D#52
H_D#45
H_D#28
H_D#22
CFG20
H_DSTBN#2
H_RS#1
H_A#14
H_XSCOMP
H_D#29
MCH_CLKSEL2
DDR_CS0_DIMMA#
SMRCOMPP
M_CLK_DDR#3
H_A#21
H_D#47
H_D#34
H_D#18
CFG11
DDR_CS3_DIMMB#
H_HITM#
H_DRDY#
H_A#31H_A#30H_A#29
H_A#24H_A#23
H_D#55
H_D#49
H_D#17
H_D#15
PM_EXTTS#1PM_EXTTS#0
DDR_CS2_DIMMB#
M_ODT2
M_ODT0
H_DEFER#
H_TRDY#
H_A#9
H_A#5H_A#4
H_D#57
H_D#26
H_D#14
H_D#5
M_CLK_DDR2M_CLK_DDR1M_CLK_DDR0
H_VREF
H_YRCOMP
DMI_MRX_ITX_N1DMI_MRX_ITX_N2DMI_MRX_ITX_N3
DMI_MRX_ITX_P0DMI_MRX_ITX_P1DMI_MRX_ITX_P2DMI_MRX_ITX_P3
DMI_MTX_IRX_N0DMI_MTX_IRX_N1DMI_MTX_IRX_N2DMI_MTX_IRX_N3
DMI_MTX_IRX_P0DMI_MTX_IRX_P1DMI_MTX_IRX_P2DMI_MTX_IRX_P3
ICH_PWRGD
CFG8
CFG4
CFG10
CFG14CFG15
CFG3
CFG17
CFG6
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+3.3V_RUN_R
+1.8V_SUS
+1.05V_VCCP
H_A#[3..31] 7H_D#[0..63]7
H_REQ#[0..4] 7
H_ADSTB#1 7H_ADSTB#0 7
H_TRDY# 7
H_HIT# 7H_LOCK# 7
H_DEFER# 7
H_BPRI# 7
H_BR0# 7
H_RESET# 7
H_DPWR# 7H_DRDY# 7
H_DBSY# 7
CLK_MCH_BCLK# 6CLK_MCH_BCLK 6
H_BNR# 7
H_ADS# 7
H_RS#[0..2] 7
H_DSTBP#[0..3] 7
H_DSTBN#[0..3] 7
H_DINV#1 7H_DINV#0 7
H_DINV#2 7H_DINV#3 7
H_CPUSLP# 7,22
CFG12 12
MCH_CLKSEL1 6
M_CLK_DDR#317
M_CLK_DDR#016
CLK_MCH_3GPLL# 6
M_ODT016
DREF_SSCLK# 6
M_CLK_DDR317
DDR_CS1_DIMMA#16DDR_CS2_DIMMB#17
DMI_MRX_ITX_N023
CFG7 12
PLTRST#21,23,28,34,52
DDR_CKE1_DIMMA16
CLK_MCH_3GPLL 6
DREFCLK 6M_CLK_DDR217
M_ODT317
CFG9 12
DDR_CS0_DIMMA#16
CFG19 12
DDR_CKE0_DIMMA16
MCH_ICH_SYNC#21
DREFCLK# 6M_CLK_DDR116
M_CLK_DDR#217
M_ODT217
CPU_BSEL0 8
CFG16 12
DDR_CS3_DIMMB#17
DDR_CKE2_DIMMB17
THERMTRIP_MCH#18
CFG5 12
MCH_CLKSEL2 6
M_CLK_DDR016
M_CLK_DDR#116
CFG20 12
CFG13 12
V_DDR_MCH_REF16,17,48
M_ODT116
DREF_SSCLK 6
CFG18 12
PM_BMBUSY#23
DDR_CKE3_DIMMB17
H_HITM# 7
CFG11 12
PM_EXTTS#016PM_EXTTS#123
DMI_MRX_ITX_N123DMI_MRX_ITX_N223DMI_MRX_ITX_N323
DMI_MRX_ITX_P023DMI_MRX_ITX_P123DMI_MRX_ITX_P223DMI_MRX_ITX_P323
DMI_MTX_IRX_N023DMI_MTX_IRX_N123DMI_MTX_IRX_N223DMI_MTX_IRX_N323
DMI_MTX_IRX_P023DMI_MTX_IRX_P123DMI_MTX_IRX_P223DMI_MTX_IRX_P323
ICH_PWRGD23,42
CLK_3GPLLREQ# 6
CFG6 12
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Calistoga(1 of 6)
10 63Tuesday, February 07, 2006
Compal Electronics, Inc.
Layout Note:H_XRCOMP & H_YRCOMP trace widthand spacing is 10/20
Layout Note:Route as shortas possible
Note : CFG3:17 hasinternal pullup,CFG18:19 hasinternal pulldown
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Description at page12
Stuff R435 & R437 for A1 Calistoga
DM
ID
DR
MU
CFG
PM
CLK
NC
RES
ERVE
D
U40B
CALISTOGA A0_FCBGA1466~D
DMIRXN0AE35DMIRXN1AF39DMIRXN2AG35DMIRXN3AH39
DMIRXP0AC35DMIRXP1AE39DMIRXP2AF35DMIRXP3AG39
DMITXN0AE37DMITXN1AF41DMITXN2AG37DMITXN3AH41
DMITXP0AC37DMITXP1AE41DMITXP2AF37DMITXP3AG41
SM_CK0AY35SM_CK1AR1SM_CK2AW7SM_CK3AW40
SM_CK0#AW35SM_CK1#AT1SM_CK2#AY7SM_CK3#AY40
SM_OCDCOMP0AL20SM_OCDCOMP1AF10
SM_ODT0BA13SM_ODT1BA12SM_ODT2AY20SM_ODT3AU21
SM_RCOMPNAV9SM_RCOMPPAT9
SM_VREF0AK1SM_VREF1AK41
SM_CKE0AU20SM_CKE1AT20SM_CKE2BA29SM_CKE3AY29
SM_CS0#AW13SM_CS1#AW12SM_CS2#AY21SM_CS3#AW21
CFG16 G18
CFG1 K18CFG2 J18CFG3 F18CFG4 E15CFG5 F15CFG6 E18CFG7 D19CFG8 D16CFG9 G16
CFG10 E16CFG11 D15CFG12 G15CFG13 K15CFG14 C15CFG15 H16
CFG0 K16
CFG17 H15CFG18 J25CFG19 K27CFG20 J26
G_CLKP AG33G_CLKN AF33
D_REF_CLKN A27D_REF_CLKP A26
D_REF_SSCLKN C40D_REF_SSCLKP D41
NC0 A3NC1 A39NC2 A4NC3 A40NC4 AW1NC5 AW41NC6 AY1NC7 BA1NC8 BA2NC9 BA3
NC10 BA39NC11 BA40NC12 BA41NC13 C1NC14 AY41NC15 B2NC16 B41NC17 C41NC18 D1
PM_BMBUSY#G28PM_EXTTS0#F25PM_EXTTS1#H26PM_THERMTRIP#G6PWROKAH33RSTIN#AH34
RESERVED1 T32RESERVED2 R32RESERVED3 F3RESERVED4 F7RESERVED5 AG11RESERVED6 AF11RESERVED7 H7RESERVED8 J19RESERVED9 A41
RESERVED10 A34RESERVED11 D28RESERVED12 D27RESERVED13 A35
ICH_SYNC#K28
CLK_REQ# H32
R141 80.6_0402_1%~D
1 2
R43
540
.2_0
402_
1%~D
@
12
C36
3
0.1U
_040
2_16
V4Z~
D
1
2
T41PAD~D
R57
24.9
_040
2_1%
~D
12
R33575_0402_5%~D
1 2
R86
100_
0402
_1%
~D
12
R142 80.6_0402_1%~D
1 2
R32
5
200_
0402
_1%
~D
12
R90
24.9
_040
2_1%
~D
12
T44PAD~D
C48
0.1U
_040
2_16
V4Z~
D
1
2
T35PAD~D
R441100_0402_1%~D
12
R33610K_0402_5%~D
12
T43PAD~D
R80
54.9
_040
2_1%
~D
12
HOST
U40A
CALISTOGA A0_FCBGA1466~D
HD0#F1HD1#J1HD2#H1HD3#J6HD4#H3HD5#K2HD6#G1HD7#G2HD8#K9HD9#K1HD10#K7HD11#J8HD12#H4HD13#J3HD14#K11HD15#G4HD16#T10HD17#W11HD18#T3HD19#U7HD20#U9HD21#U11HD22#T11HD23#W9HD24#T1HD25#T8HD26#T4HD27#W7HD28#U5HD29#T9HD30#W6HD31#T5HD32#AB7HD33#AA9HD34#W4HD35#W3HD36#Y3HD37#Y7HD38#W5HD39#Y10HD40#AB8HD41#W2HD42#AA4HD43#AA7HD44#AA2HD45#AA6HD46#AA10HD47#Y8HD48#AA1HD49#AB4HD50#AC9HD51#AB11HD52#AC11HD53#AB3HD54#AC2HD55#AD1HD56#AD9HD57#AC1HD58#AD7HD59#AC6HD60#AB5HD61#AD10HD62#AD4HD63#AC8
HVREF1K13HXRCOMPE1HXSCOMPE2HYRCOMPY1HYSCOMPU1HXSWINGE4HYSWINGW1
HA3# H9HA4# C9HA5# E11HA6# G11HA7# F11HA8# G12HA9# F9
HA10# H11HA11# J12HA12# G14HA13# D9HA14# J14HA15# H13HA16# J15HA17# F14HA18# D12HA19# A11HA20# C11HA21# A12HA22# A13HA23# E13HA24# G13HA25# F12HA26# B12HA27# B14HA28# C12HA29# A14HA30# C14HA31# D14
HREQ#0 D8HREQ#1 G8HREQ#2 B8HREQ#3 F8HREQ#4 A8
HADSTB#0 B9HADSTB#1 C13
HRS0# B4HRS1# E6HRS2# D6
HCLKN AG1HCLKP AG2
HDINV#0 J7HDINV#1 W8HDINV#2 U3HDINV#3 AB10
HDSTBN#0 K4HDSTBN#1 T7HDSTBN#2 Y5HDSTBN#3 AC4HDSTBP#0 K3HDSTBP#1 T6HDSTBP#2 AA5HDSTBP#3 AC5
HCPURST# B7HADS# E8
HTRDY# E7HDPWR# J9HDRDY# H8
HDEFER# C3HHITM# D4
HHIT# D3HLOCK# B3
HBREQ0# C7HBNR# C6HBPRI# F6
HDBSY# A7HCPUSLP# E3
HVREF0J13
R43
740
.2_0
402_
1%~D
@
12
T42PAD~D
R85
221_
0402
_1%
~D
12
R32
610
0_04
02_1
%~D
12
R64
221_
0402
_1%
~D
12
R52
54.9
_040
2_1%
~D
12
T45PAD~D
C65
0.1U
_040
2_16
V4Z~
D
1
2
R25310K_0402_5%~D
@
12
T34PAD~D
C42
50.
1U_0
402_
16V4
Z~D
@
1
2
R65
100_
0402
_1%
~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_D11
DDR_B_D57
DDR_B_D46
DDR_B_D7
DDR_B_D0
DDR_B_D44
DDR_B_D40
DDR_B_D30
DDR_B_D27
DDR_B_D15
DDR_B_D3
DDR_B_D35
DDR_B_D25
DDR_B_D23
DDR_B_D49
DDR_B_D37
DDR_B_D19
DDR_B_D48DDR_B_D47
DDR_B_D36
DDR_B_D18
DDR_B_D8
DDR_B_D62
DDR_B_D60
DDR_B_D9
DDR_B_D2
DDR_B_D52
DDR_B_D50
DDR_B_D22
DDR_B_D56
DDR_B_D51
DDR_B_D39
DDR_B_D28
DDR_B_D17
DDR_B_D45
DDR_B_D6
DDR_B_D61
DDR_B_D58
DDR_B_D1
DDR_B_D54
DDR_B_D41
DDR_B_D31
DDR_B_D12
DDR_B_D5
DDR_B_D38
DDR_B_D32
DDR_B_D20
DDR_B_D16
DDR_B_D14
DDR_B_D33
DDR_B_D63
DDR_B_D59
DDR_B_D42
DDR_B_D55
DDR_B_D53
DDR_B_D43
DDR_B_D29
DDR_B_D26
DDR_B_D13
DDR_B_D4
DDR_B_BS2
DDR_B_D34
DDR_B_D24
DDR_B_D21
DDR_B_D10
DDR_B_CAS#
DDR_B_WE#DDR_B_RAS#
DDR_A_D35
DDR_A_D15DDR_A_D14
DDR_A_D21
DDR_A_BS2
DDR_A_D28
DDR_A_D11
DDR_A_D7
DDR_A_WE#
DDR_A_D31
DDR_A_D16
DDR_A_D59
DDR_A_D56
DDR_A_D42
DDR_A_D25
DDR_A_D9
DDR_A_RAS#
DDR_A_D60
DDR_A_D55
DDR_A_D13
DDR_A_D0
DDR_A_D62
DDR_A_D3
DDR_A_D1
DDR_A_D41
DDR_A_D20
DDR_A_D43
DDR_A_D24
DDR_A_CAS#
DDR_A_D54
DDR_A_D52
DDR_A_D33
DDR_A_D12
DDR_A_D19
DDR_A_D46
DDR_A_D23
DDR_A_D18
DDR_A_D63
DDR_A_D34
DDR_A_D26
DDR_A_D22
SA_RCVENIN#SA_RCVENOUT#
SB_RCVENIN#SB_RCVENOUT#
DDR_A_D27
DDR_A_D2
DDR_A_D32
DDR_A_D6
DDR_A_D49
DDR_A_D47
DDR_A_D58
DDR_A_D40
DDR_A_D36
DDR_A_D5
DDR_A_D48
DDR_A_D10
DDR_A_D8
DDR_A_D57
DDR_A_D39
DDR_A_D37
DDR_A_D30
DDR_A_D4
DDR_A_D45
DDR_A_D53
DDR_A_D51
DDR_A_D17
DDR_A_D38
DDR_A_D29
DDR_A_D44
DDR_A_D50
DDR_A_D61
DDR_A_DQS6DDR_B_DQS7
DDR_B_MA9
DDR_A_MA13
DDR_A_MA7
DDR_A_DM1
DDR_A_MA5
DDR_A_BS1
DDR_A_DM7
DDR_B_MA0
DDR_A_DQS7
DDR_A_DM5
DDR_B_MA7
DDR_B_DQS#1
DDR_B_DQS0
DDR_B_DM3
DDR_B_DQS1
DDR_B_DM1
DDR_A_BS0
DDR_A_DQS#6
DDR_B_DQS5
DDR_B_DM0
DDR_A_MA4
DDR_A_MA8
DDR_A_DQS#7
DDR_A_MA10
DDR_A_DQS5
DDR_A_DM2
DDR_A_DQS0
DDR_B_MA2
DDR_B_MA13
DDR_B_DM5
DDR_B_DQS#5
DDR_B_DQS#7
DDR_B_BS1
DDR_A_DQS#1
DDR_A_MA2
DDR_B_MA4
DDR_A_DQS#5
DDR_B_DM6
DDR_B_DQS4
DDR_A_DQS1
DDR_A_MA9
DDR_A_DQS4
DDR_A_DM0
DDR_A_MA0
DDR_B_MA5
DDR_A_DM4
DDR_A_DQS#2
DDR_A_DQS3
DDR_B_MA3
DDR_A_MA11 DDR_B_MA11
DDR_B_BS0
DDR_A_DM6
DDR_B_MA6DDR_A_MA6
DDR_B_DQS#4
DDR_B_DQS3
DDR_B_DQS#3
DDR_A_DQS#0
DDR_A_DM3
DDR_A_MA3
DDR_A_MA12
DDR_B_MA8
DDR_A_DQS2
DDR_B_DQS#0
DDR_B_MA10
DDR_B_DM7
DDR_A_MA1
DDR_B_MA12
DDR_B_DQS#2
DDR_B_DM4
DDR_B_DQS#6
DDR_B_MA1
DDR_B_DQS2
DDR_B_DQS6
DDR_B_DM2
DDR_A_DQS#3DDR_A_DQS#4
DDR_B_D[0..63] 17DDR_A_D[0..63] 16
DDR_A_DQS[0..7]16
DDR_A_MA[0..13]16
DDR_A_BS216 DDR_B_BS217
DDR_A_WE#16
DDR_A_CAS#16DDR_A_RAS#16
DDR_A_DQS#[0..7]16
DDR_A_DM[0..7]16
DDR_B_DQS[0..7]17
DDR_B_CAS#17DDR_B_RAS#17
DDR_B_MA[0..13]17
DDR_B_DQS#[0..7]17
DDR_B_WE#17
DDR_B_DM[0..7]17
DDR_B_BS017DDR_A_BS116DDR_A_BS016
DDR_B_BS117
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Calistogo(2 of 6)
11 63Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
D
E
DDR SYS MEMORY B
U40E
CALISTOGA A0_FCBGA1466~D
SB_DQ0 AK39SB_DQ1 AJ37SB_DQ2 AP39SB_DQ3 AR41SB_DQ4 AJ38SB_DQ5 AK38SB_DQ6 AN41SB_DQ7 AP41SB_DQ8 AT40SB_DQ9 AV41
SB_DQ10 AU38SB_DQ11 AV38SB_DQ12 AP38SB_DQ13 AR40SB_DQ14 AW38SB_DQ15 AY38SB_DQ16 BA38SB_DQ17 AV36SB_DQ18 AR36SB_DQ19 AP36SB_DQ20 BA36SB_DQ21 AU36SB_DQ22 AP35SB_DQ23 AP34SB_DQ24 AY33SB_DQ25 BA33SB_DQ26 AT31SB_DQ27 AU29SB_DQ28 AU31SB_DQ29 AW31SB_DQ30 AV29SB_DQ31 AW29SB_DQ32 AM19SB_DQ33 AL19SB_DQ34 AP14SB_DQ35 AN14SB_DQ36 AN17SB_DQ37 AM16SB_DQ38 AP15SB_DQ39 AL15SB_DQ40 AJ11SB_DQ41 AH10SB_DQ42 AJ9SB_DQ43 AN10SB_DQ44 AK13SB_DQ45 AH11SB_DQ46 AK10SB_DQ47 AJ8SB_DQ48 BA10SB_DQ49 AW10SB_DQ50 BA4SB_DQ51 AW4SB_DQ52 AY10SB_DQ53 AY9SB_DQ54 AW5SB_DQ55 AY5SB_DQ56 AV4SB_DQ57 AR5SB_DQ58 AK4SB_DQ59 AK3SB_DQ60 AT4SB_DQ61 AK5SB_DQ62 AJ5SB_DQ63 AJ3
SB_BS0AT24SB_BS1AV23SB_BS2AY28
SB_CAS#AR24SB_RAS#AU23SB_WE#AR27SB_RCVENIN#AK16SB_RCVENOUT#AK18
SB_DM0AK36SB_DM1AR38SB_DM2AT36SB_DM3BA31SB_DM4AL17SB_DM5AH8SB_DM6BA5SB_DM7AN4
SB_DQS0AM39SB_DQS1AT39SB_DQS2AU35SB_DQS3AR29SB_DQS4AR16SB_DQS5AR10SB_DQS6AR7SB_DQS7AN5
SB_DQS0#AM40SB_DQS1#AU39SB_DQS2#AT35SB_DQS3#AP29SB_DQS4#AP16SB_DQS5#AT10SB_DQS6#AT7SB_DQS7#AP5
SB_MA0AY23SB_MA1AW24SB_MA2AY24SB_MA3AR28SB_MA4AT27SB_MA5AT28SB_MA6AU27SB_MA7AV28SB_MA8AV27SB_MA9AW27SB_MA10AV24SB_MA11BA27SB_MA12AY27SB_MA13AR23
DDR SYS MEMORY A
U40D
CALISTOGA A0_FCBGA1466~D
SA_DQ0 AJ35SA_DQ1 AJ34SA_DQ2 AM31SA_DQ3 AM33SA_DQ4 AJ36SA_DQ5 AK35SA_DQ6 AJ32SA_DQ7 AH31SA_DQ8 AN35SA_DQ9 AP33
SA_DQ10 AR31SA_DQ11 AP31SA_DQ12 AN38SA_DQ13 AM36SA_DQ14 AM34SA_DQ15 AN33SA_DQ16 AK26SA_DQ17 AL27SA_DQ18 AM26SA_DQ19 AN24SA_DQ20 AK28SA_DQ21 AL28SA_DQ22 AM24SA_DQ23 AP26SA_DQ24 AP23SA_DQ25 AL22SA_DQ26 AP21SA_DQ27 AN20SA_DQ28 AL23SA_DQ29 AP24SA_DQ30 AP20SA_DQ31 AT21SA_DQ32 AR12SA_DQ33 AR14SA_DQ34 AP13SA_DQ35 AP12SA_DQ36 AT13SA_DQ37 AT12SA_DQ38 AL14SA_DQ39 AL12SA_DQ40 AK9SA_DQ41 AN7SA_DQ42 AK8SA_DQ43 AK7SA_DQ44 AP9SA_DQ45 AN9SA_DQ46 AT5SA_DQ47 AL5SA_DQ48 AY2SA_DQ49 AW2SA_DQ50 AP1SA_DQ51 AN2SA_DQ52 AV2SA_DQ53 AT3SA_DQ54 AN1SA_DQ55 AL2SA_DQ56 AG7SA_DQ57 AF9SA_DQ58 AG4SA_DQ59 AF6SA_DQ60 AG9SA_DQ61 AH6SA_DQ62 AF4SA_DQ63 AF8
SA_BS0AU12SA_BS1AV14SA_BS2BA20
SA_CAS#AY13SA_RAS#AW14SA_WE#AY14SA_RCVENIN#AK23SA_RCVENOUT#AK24
SA_DM0AJ33SA_DM1AM35SA_DM2AL26SA_DM3AN22SA_DM4AM14SA_DM5AL9SA_DM6AR3SA_DM7AH4
SA_DQS0AK33SA_DQS1AT33SA_DQS2AN28SA_DQS3AM22SA_DQS4AN12SA_DQS5AN8SA_DQS6AP3SA_DQS7AG5
SA_DQS0#AK32SA_DQS1#AU33SA_DQS2#AN27SA_DQS3#AM21SA_DQS4#AM12SA_DQS5#AL8SA_DQS6#AN3SA_DQS7#AH5
SA_MA0AY16SA_MA1AU14SA_MA2AW16SA_MA3BA16SA_MA4BA17SA_MA5AU16SA_MA6AV17SA_MA7AU17SA_MA8AW17SA_MA9AT16SA_MA10AU13SA_MA11AT17SA_MA12AV20SA_MA13AV12
T2022 PAD~DT2025 PAD~DT2024 PAD~DT2023 PAD~D
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PANEL_BKEN
DAT_DDC2
CLK_DDC2
LCTLA_CLK
LCTLB_DATA
G_DAT_DDC2
VGA_RED
VGA_GRN
VGA_BLU
PANEL_BKEN
G_DAT_DDC2
TVIREF
SDVO_CTRLDATA
LDDC_DATA
LCTLB_DATA
G_CLK_DDC2
L_IBG
LDDC_CLK
G_CLK_DDC2
LCTLA_CLK
DVO_RED_C
DVO_CLK_CDVO_BLUE_CDVO_GREEN_C
DVO_RED#_CDVO_GREEN#_C
DVO_CLK#_CDVO_BLUE#_C
SDVO_CTRLCLKPEGCOMP
BIA_PWM_R
BIA_PWM_R
+3.3V_RUN_R
+3.3V_RUN_R
+3.3V_RUN_R
+3.3V_RUN_R
+1.5VRUN_PCIE
+3.3V_RUN_R
CFG510
CFG710
CFG1810CFG1910
CFG910
VGA_HSYNC20VGA_VSYNC20
DAT_DDC2 20,36
CLK_DDC2 20,36
CFG2010
CFG1210
CFG1310
CFG1610
CFG1110
PANEL_BKEN19
ENVDD19
TV_Y36TV_CVBS36
TV_C36
VGA_BLU20,36
VGA_RED20,36
VGA_GRN20,36
SDVOB_INT- 52
SDVOB_INT+ 52
SDVOB_RED- 52
SDVOB_RED+ 52
SDVOB_GREEN- 52
SDVOB_GREEN+ 52
SDVOB_BLUE- 52
SDVOB_BLUE+ 52
SDVOB_CLK- 52
SDVOB_CLK+ 52
SDVO_CTRLCLK52SDVO_CTRLDATA52
LCD_A0+19LCD_A1+19LCD_A2+19
LCD_A0-19LCD_A1-19LCD_A2-19
LCD_B0+19LCD_B1+19LCD_B2+19
LCD_B0-19LCD_B1-19LCD_B2-19
LCD_ACLK+19LCD_ACLK-19LCD_BCLK+19LCD_BCLK-19
LDDC_CLK19LDDC_DATA19
CFG610
BIA_PWM19,39
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Calistoga(3 of 6)
12 63Tuesday, February 07, 2006
Compal Electronics, Inc.
CFG[18:20] have internal pulldown
*
*
*
(VCC Select)
*
*
*
Low = DMI x 2
CFG7
High = DMI x 4CFG5
Low = DT/Transportable CPU
High = Mobile CPU
CFG[13:12]
CFG[3:17] have internal pullup
Low = NormalOperation (Default):Lane number in Order
00 = Reserved01 = XOR Mode Enabled10 = All Z Mode Enabled11 = Normal Operation
High = Reverse Lane
Low = 1.05V (Default)
High = 1.5V
High = Enabled
Low = Disabled
Low = Reverse LaneCFG9
High = Normal Operation *
(DMI Lane Reversal)
SDVO_CTRLDATALow = No SDVO Device Present
High = SDVO Device Present
(Default)
(Default)*
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Strap Pin Table
LVREF for Alviso N.C for Calistoga to GND
CFG20
(PCIE/SDVO select)High = PCIE/SDVO are operatingsimu.
Low = Only PCIE or SDVO isoperational. *(Default)
CFG11
C
(FSB Dynamic ODT)
CFG16
CFG18
CFG19
Close to U40.J22
Close to U40.J20
LOW = Moby Dick
HIGH = CalistogaCFG6
LOW = Moby Dick
*R67 2.2K_0402_5%~D@1 2
R323 2.2K_0402_5%~D@ 1 2
R23
22.
2K_0
402_
5%~D
1
2LVD
ST
VC
RT
PCI-EXPRESS GRAPHICS
U40C
CALISTOGA A0_FCBGA1466~D
SDVOCTRL_CLKH28 SDVOCTRL_DATAH27
LA_DATA0B37LA_DATA1B34LA_DATA2A36
LVREFHC33LVREFLC32
TVDAC_AA16TVDAC_BC18TVDAC_CA19
TV_IREFJ20
TV_IRTNAB16TV_IRTNBB18TV_IRTNCB19
DDCCLKC26DDCDATAC25
LA_DATA#0C37LA_DATA#1B35LA_DATA#2A37
LB_DATA0F30LB_DATA1D29LB_DATA2F28
LB_DATA#0G30LB_DATA#1D30LB_DATA#2F29
LA_CLKA32LA_CLK#A33LB_CLKE26LB_CLK#E27
LBKLT_CTLD32LBKLT_ENJ30LCTLA_CLKH30LCTLB_DATAH29LDDC_CLKG26LDDC_DATAG25LVDD_ENF32LIBGB38LVBGC35
VSYNCH23HSYNCG23BLUEE23BLUE#D23GREENC22GREEN#B22REDA21RED#B21
CRT_IREFJ22
EXP_COMPI D40EXP_COMPO D38
EXP_RXN0 F34EXP_RXN1 G38EXP_RXN2 H34EXP_RXN3 J38EXP_RXN4 L34EXP_RXN5 M38EXP_RXN6 N34EXP_RXN7 P38EXP_RXN8 R34EXP_RXN9 T38
EXP_RXN10 V34EXP_RXN11 W38EXP_RXN12 Y34EXP_RXN13 AA38EXP_RXN14 AB34EXP_RXN15 AC38
EXP_RXP0 D34EXP_RXP1 F38EXP_RXP2 G34EXP_RXP3 H38EXP_RXP4 J34EXP_RXP5 L38EXP_RXP6 M34EXP_RXP7 N38EXP_RXP8 P34EXP_RXP9 R38
EXP_RXP10 T34EXP_RXP11 V38EXP_RXP12 W34EXP_RXP13 Y38EXP_RXP14 AA34EXP_RXP15 AB38
EXP_TXN0 F36EXP_TXN1 G40EXP_TXN2 H36EXP_TXN3 J40EXP_TXN4 L36EXP_TXN5 M40EXP_TXN6 N36EXP_TXN7 P40EXP_TXN8 R36EXP_TXN9 T40
EXP_TXN10 V36EXP_TXN11 W40EXP_TXN12 Y36EXP_TXN13 AA40EXP_TXN14 AB36EXP_TXN15 AC40
EXP_TXP0 D36EXP_TXP1 F40EXP_TXP2 G36EXP_TXP3 H40EXP_TXP4 J36EXP_TXP5 L40EXP_TXP6 M36EXP_TXP7 N40EXP_TXP8 P36EXP_TXP9 R40
EXP_TXP10 T36EXP_TXP11 V40EXP_TXP12 W36EXP_TXP13 Y40EXP_TXP14 AA36EXP_TXP15 AB40
TV_DCONSEL1J29TV_DCONSEL0K30
C1347 0.1U_0402_16V4Z~D
1 2
R308 1K_0402_5%~D @
1 2
R282 2.2K_0402_5%~D @1 2
R150255_0402_1%~D
12
R283 10K_0402_5%~D
1 2
R2511.5K_0402_1%~D
12
R307 2.2K_0402_5%~D @1 2
R279 10K_0402_5%~D
1 2
C1350 0.1U_0402_16V4Z~D
1 2
U874AHC1G08GW_SOT353-5~D
IN1 1
IN2 2G3
O4
P5
R23
150_
0402
_1%
~D
12
R357 2.2K_0402_5%~D@ 1 2
R300 100K_0402_5%~D
1 2
R288 2.2K_0402_5%~D@1 2
R261 150_0402_1%~D
1 2
G
DS
Q27BSS138W-7-F_SOT323~D
2
13
C1346 0.1U_0402_16V4Z~D
1 2
R281 2.2K_0402_5%~D @1 2
C1359 0.1U_0402_16V4Z~D
1 2
C1348 0.1U_0402_16V4Z~D
1 2
R24
150_
0402
_1%
~D
12
R310 1K_0402_5%~D @1 2
R25
150_
0402
_1%
~D
12
G
DS
Q31BSS138W-7-F_SOT323~D
2
13
R149324.9_0402_1%~D 1 2
R346 2.2K_0402_5%~D @1 2
R306 1K_0402_5%~D @1 2
C1372 0.1U_0402_16V4Z~D
1 2
C1349 0.1U_0402_16V4Z~D
1 2
R295 150_0402_1%~D
1 2
R31
4
4.99
K_0
402_
1%~D
12
R260 150_0402_1%~D
1 2
R22
92.
2K_0
402_
5%~D
12
C1360 0.1U_0402_16V4Z~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+3GPLL_R
VSSA_TVBG
U40_D2
U40_A6
U40
_AB
1
+2.5V_CRTDAC
VSSA_TVBG
+3V
RU
N_A
TV
+2.5V_RUN
+1.5V_RUN
+1.5V_RUN
+2.5V_RUN
+2.5V_RUN
+1.5V_RUN
+2.5V_RUN
+2.5V_RUN
+2.5V_RUN+1.5VRUN_PCIE
+1.5V_RUN
+1.5V_RUN+1.5VRUN_3GPLL
+1.5VRUN_DPLLB+1.5VRUN_DPLLA
+2.5V_RUN
+1.5VRUN_HPLL
+3.3V_RUN_R
+1.5V_RUN_TVDAC+1.5VRUN_QTVDAC
+2.5V_RUN
+3VRUN_ATVBG+1.5VRUN_MPLL
+1.5V_RUN
+3VRUN_TVDACC
+3VRUN_TVDACA
+3VRUN_TVDACB
+1.5VRUN_QTVDAC +1.5V_RUN_TVDAC+1.5V_RUN
+1.5VRUN_3GPLL
+2.5V_RUN+3.3V_RUN_R
+1.5V_RUN+1.05V_VCCP
+1.5V_RUN
+1.05V_VCCP
+1.5V_RUN
+1.5VRUN_MPLL+1.5VRUN_HPLL
+1.5VRUN_DPLLA +1.5VRUN_DPLLB
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+3VRUN_TVDACA
+3VRUN_TVDACB
+3VRUN_TVDACC
+3V_TVDAC
+3VRUN_ATVBG
+3.3V_RUN_R
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Calistoga(4 of 6)
13 63Tuesday, February 07, 2006
Compal Electronics, Inc.
Route +2.5VRUN from GMCH pinG41 todecoupling cap (C345)<200mil to the edge.
W=30 mils
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
CRTDAC: Route caps within250mil of Alviso. Route FBwithin 3" of Calistoga
Route VSSACRTDAC gnd from GMCH todecoupling cap ground lead and thenconnect to the gnd plane.
Route VSSA_TVBG GND from GMCH todecoupling cap ground lead and thenconnect to the GND plane.
CRT DAC Voltge Follower Circuit - 700mV TV DAC Voltge Follower Circuit - 700mV
close pin A38
close pin B30/C30/A30
CRB 270uF
40mA Max.40mA Max.
45mA Max.45mA Max.
Should be placed in cavity
Should be placed on top
C35, C305, C306 replace by 0ohm 0805 resistor
+3V_TVDAC
C43
50.
47U
_040
2_16
V4Z
~D
1
2
C41
8
0.1U
_040
2_16
V4Z
~D
1
2
C39
14.
7U_0
603_
6.3V
4Z~D
1
2
D14MMBD4148_SOT23~D
1
3
2
R32010_0402_5%~D
1 2
L38
BLM18AG121SN1D_0603~D
12
C31
44.
7U_0
603_
6.3V
4Z~D
1
2
C29
70.
1U_0
402_
16V
4Z~D
1
2
L11BLM18PG181SN1_0603~D
12
+
C29
447
0U_D
2_2.
5VM
~D
1
2
C59
910
U_0
805_
4VA
M~D
1
2
C23
0.1U
_040
2_16
V4Z
~D
1
2
C37
0.02
2U_0
402_
16V
7K~D
1
2
C36
40.
1U_0
402_
16V
4Z~D
1
2
L37 BLM18PG181SN1_0603~D 1 2
C30
40.
022U
_040
2_16
V7K
~D
1
2
C30
522
n_08
05_2
5V
1 2
3
+
C49
220U
_V_4
VM
_R45
~D
1
2
C43
70.
1U_0
402_
16V
4Z~D
1
2
R2670.5_0805_1%~D 1 2
R920_0603_5%~D
12
C53
10U
_080
5_4V
AM
~D
1
2
C33
20.
1U_0
402_
16V
4Z~D
1
2
C31
80.
01U
_040
2_16
V7K
~D
1
2
C29
90.
1U_0
402_
16V
4Z~D
1
2
C59
8
4.7U
_060
3_6.
3V4Z
~D
@
1
2
C3450.1U_0402_16V4Z~D
1
2
C38
510
U_0
805_
4VA
M~D
1
2
C41
3
0.1U
_040
2_16
V4Z
~D
1
2
C9422U_0805_6.3VAM~D
1
2
C29
80.
1U_0
402_
16V
4Z~D
1
2
C32
30.
1U_0
402_
16V
4Z~D
1
2
+
C41
122
0U_V
_4V
M_R
45~D
1
2
C41922U_0805_6.3VAM~D
1
2
C33
10.
1U_0
402_
16V
4Z~D
1
2
C4650.1U_0402_16V4Z~D
1
2
C35
70.
022U
_040
2_16
V7K
~D
1
2
C30
622
n_08
05_2
5V
1 2
3
C33
60.
1U_0
402_
16V
4Z~D
1
2
C40
40.
1U_0
402_
16V
4Z~D
1
2
L2810U_MLZ2012E100PTAIN_60mA_25%_0805~D
12
+
C33
547
0U_D
2_2.
5VM
~D
1
2C32
20.
1U_0
402_
16V
4Z~D
1
2
C36
22n_
0805
_25V
1 2
3
R1210_0402_5%~D
1 2
L3310U_MLZ2012E100PTAIN_60mA_25%_0805~D
12
C11
80.
22U
_040
2_10
V4Z
~D
1
2C
325
0.01
U_0
402_
16V
7K~D
1
2
L9BLM18PG181SN1_0603~D
12
C31
110
U_0
805_
4VA
M~D
1
2
C24
0.1U
_040
2_16
V4Z
~D
1
2
L39
BLM18AG121SN1D_0603~D
12
L34BLM18PG181SN1_0603~D
12
C59
10U
_080
5_4V
AM
~D
1
2
P O W E R
U40H
CALISTOGA A0_FCBGA1466~D
VCC_SYNC H22
VCCTX_LVDS0 B30VCCTX_LVDS1 C30
VCC3G0 AB41VCC3G1 AJ41VCC3G2 L41VCC3G3 N41VCC3G4 R41VCC3G5 V41VCC3G6 Y41
VCCA_3GBG G41VSSA_3GBG H41
VCCA_3GPLL AC33
VCCTX_LVDS2 A30
VCCA_LVDS A38VSSA_LVDS B39
VCCA_MPLL AF2
VCCA_TVBG H20VSSA_TVBG G20
VCCA_TVDACA0 E19VCCA_TVDACA1 F19VCCA_TVDACB0 C20VCCA_TVDACB1 D20VCCA_TVDACC0 E20VCCA_TVDACC1 F20
VCCAUX1 AF31VCCAUX2 AE31VCCAUX3 AC31VCCAUX4 AL30VCCAUX5 AK30VCCAUX6 AJ30VCCAUX7 AH30VCCAUX8 AG30VCCAUX9 AF30
VCCAUX10 AE30VCCAUX11 AD30VCCAUX12 AC30VCCAUX13 AG29VCCAUX14 AF29VCCAUX15 AE29VCCAUX16 AD29VCCAUX17 AC29VCCAUX18 AG28VCCAUX19 AF28VCCAUX20 AE28
VTT0AC14VTT1AB14VTT2W14VTT3V14VTT4T14VTT5R14VTT6P14VTT7N14VTT8M14VTT9L14VTT10AD13VTT11AC13VTT12AB13VTT13AA13VTT14Y13VTT15W13VTT16V13VTT17U13VTT18T13VTT19R13VTT20N13VTT21M13VTT22L13VTT23AB12VTT24AA12VTT25Y12VTT26W12VTT27V12VTT28U12VTT29T12VTT30R12VTT31P12VTT32N12VTT33M12VTT34L12VTT35R11VTT36P11VTT37N11VTT38M11VTT39R10VTT40P10VTT41N10VTT42M10VTT43P9VTT44N9VTT45M9VTT46R8VTT47P8VTT48N8VTT49M8VTT50P7VTT51N7VTT52M7VTT53R6VTT54P6VTT55M6VTT56A6VTT57R5
VTT59N5VTT60M5VTT61P4VTT62N4VTT63M4VTT64R3VTT65P3VTT66N3VTT67M3VTT68R2VTT69P2VTT70M2VTT71D2VTT72AB1VTT73R1VTT74P1VTT75N1VTT76M1
VCCA_CRTDAC0 E21VCCA_CRTDAC1 F21VSSA_CRTDAC2 G21
VCCA_DPLLA B26VCCA_DPLLB C39
VCCA_HPLL AF1
VCCD_HMPLL0 AH1VCCD_HMPLL1 AH2
VCCD_LVDS0 A28VCCD_LVDS1 B28VCCD_LVDS2 C28
VCCD_TVDAC D21VCCDQ_TVDAC H19
VCCHV0 A23VCCHV1 B23 VCCHV2 B25
VCCAUX21 AH22VCCAUX22 AJ21VCCAUX23 AH21VCCAUX24 AJ20VCCAUX25 AH20VCCAUX26 AH19VCCAUX27 P19VCCAUX28 P16VCCAUX29 AH15VCCAUX30 P15VCCAUX31 AH14
VCCAUX32AG14VCCAUX33AF14VCCAUX34AE14VCCAUX35Y14VCCAUX36AF13VCCAUX37AE13VCCAUX38AF12VCCAUX39AE12VCCAUX40AD12
VCCAUX0 AK31
VTT58P5
L35
BLM21PG600SN1D_0805~D
12
C32
40.
1U_0
402_
16V
4Z~D
1
2
C35
22n_
0805
_25V
1 2
3
C31
010
U_0
805_
4VA
M~D
1
2
D8MMBD4148_SOT23~D
1
3
2
C22
0.1U
_040
2_16
V4Z
~D
1
2
C39
02.
2U_0
603_
6.3V
6K~D
1
2
C16
40.
22U
_040
2_10
V4Z
~D 1
2
C31
60.
47U
_040
2_16
V4Z
~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCSM_LF4
VCCSM_LF2
VCCSM_LF5
VCCSM_LF1
+1.05V_VCCP
+1.5V_RUN
+1.05V_VCCP
+1.8V_SUS+1.05V_VCCP
+1.8V_SUS
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Calistoga(5 of 6)
14 63Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
CRB 270uF
Place near U40.BA15
Place near U40.BA23
Place near U40.AT41 & AM41
Place near U40.AV1 & AJ1
C36
710
U_0
805_
4VAM
~D
1
2
+
C16
533
0U_D
2E_2
.5VM
_R9~
D@
1
2
C61
40.
47U
_040
2_16
V4Z~
D
1
2
C36
81U
_060
3_10
V4Z~
D
1
2
C61
30.
47U
_040
2_16
V4Z~
D
1
2
C61
70.
47U
_040
2_16
V4Z~
D
1
2
C61
50.
47U
_040
2_16
V4Z~
D
1
2
+
C62
022
0U_V
_4VM
_R45
~D
1
2
C35
80.
22U
_040
2_10
V4Z~
D
1
2
C44
4
0.1U
_040
2_16
V4Z~
D
1
2
C38
30.
22U
_040
2_10
V4Z~
D
1
2
P O
W E
R
U40F
CALISTOGA A0_FCBGA1466~D
VCC_NCTF1AC27VCC_NCTF2AB27VCC_NCTF3AA27VCC_NCTF4Y27VCC_NCTF5W27VCC_NCTF6V27VCC_NCTF7U27
VCCAUX_NCTF52 Y15
VCC_NCTF9R27VCC_NCTF10AD26VCC_NCTF11AC26VCC_NCTF12AB26VCC_NCTF13AA26VCC_NCTF14Y26VCC_NCTF15W26VCC_NCTF16V26VCC_NCTF17U26VCC_NCTF18T26VCC_NCTF19R26VCC_NCTF20AD25VCC_NCTF21AC25VCC_NCTF22AB25VCC_NCTF23AA25VCC_NCTF24Y25VCC_NCTF25W25
VCCAUX_NCTF53 W15
VCC_NCTF27U25VCC_NCTF28T25VCC_NCTF29R25VCC_NCTF30AD24VCC_NCTF31AC24VCC_NCTF32AB24VCC_NCTF33AA24VCC_NCTF34Y24VCC_NCTF35W24VCC_NCTF36V24
VCCAUX_NCTF54 V15
VCC_NCTF38T24VCC_NCTF39R24VCC_NCTF40AD23VCC_NCTF41V23VCC_NCTF42U23VCC_NCTF43T23VCC_NCTF44R23VCC_NCTF45AD22VCC_NCTF46V22VCC_NCTF47U22VCC_NCTF48T22VCC_NCTF49R22VCC_NCTF50AD21VCC_NCTF51V21VCC_NCTF52U21VCC_NCTF53T21VCC_NCTF54R21VCC_NCTF55AD20VCC_NCTF56V20VCC_NCTF57U20VCC_NCTF58T20
VCCAUX_NCTF55 U15
VCC_NCTF60AD19VCC_NCTF61V19VCC_NCTF62U19VCC_NCTF63T19VCC_NCTF64AD18VCC_NCTF65AC18VCC_NCTF66AB18VCC_NCTF67AA18VCC_NCTF68Y18VCC_NCTF69W18VCC_NCTF70V18VCC_NCTF71U18VCC_NCTF72T18
VCC_NCTF0AD27 VCCAUX_NCTF0 AG27VCCAUX_NCTF1 AF27VCCAUX_NCTF2 AG26VCCAUX_NCTF3 AF26VCCAUX_NCTF4 AG25VCCAUX_NCTF5 AF25VCCAUX_NCTF6 AG24VCCAUX_NCTF7 AF24VCCAUX_NCTF8 AG23VCCAUX_NCTF9 AF23
VCCAUX_NCTF10 AG22VCCAUX_NCTF11 AF22VCCAUX_NCTF12 AG21VCCAUX_NCTF13 AF21VCCAUX_NCTF14 AG20VCCAUX_NCTF15 AF20VCCAUX_NCTF16 AG19VCCAUX_NCTF17 AF19VCCAUX_NCTF18 R19VCCAUX_NCTF19 AG18VCCAUX_NCTF20 AF18VCCAUX_NCTF21 R18VCCAUX_NCTF22 AG17VCCAUX_NCTF23 AF17VCCAUX_NCTF24 AE17VCCAUX_NCTF25 AD17VCCAUX_NCTF26 AB17VCCAUX_NCTF27 AA17VCCAUX_NCTF28 W17VCCAUX_NCTF29 V17VCCAUX_NCTF30 T17VCCAUX_NCTF31 R17VCCAUX_NCTF32 AG16VCCAUX_NCTF33 AF16VCCAUX_NCTF34 AE16VCCAUX_NCTF35 AD16VCCAUX_NCTF36 AC16VCCAUX_NCTF37 AB16VCCAUX_NCTF38 AA16VCCAUX_NCTF39 Y16VCCAUX_NCTF40 W16VCCAUX_NCTF41 V16VCCAUX_NCTF42 U16VCCAUX_NCTF43 T16VCCAUX_NCTF44 R16VCCAUX_NCTF45 AG15VCCAUX_NCTF46 AF15VCCAUX_NCTF47 AE15VCCAUX_NCTF48 AD15VCCAUX_NCTF49 AC15VCCAUX_NCTF50 AB15
VSS_NCTF0 AE27
VCCAUX_NCTF51 AA15
VSS_NCTF1 AE26
VCC_NCTF59R20
VCCAUX_NCTF56 T15
VSS_NCTF2 AE25VSS_NCTF3 AE24VSS_NCTF4 AE23VSS_NCTF5 AE22VSS_NCTF6 AE21VSS_NCTF7 AE20VSS_NCTF8 AE19VSS_NCTF9 AE18
VSS_NCTF10 AC17VSS_NCTF11 Y17VSS_NCTF12 U17
VCC_NCTF26V25
VCCAUX_NCTF57 R15
VCC_NCTF37U24
VCC_NCTF8T27
VCC100M19VCC101L19VCC102N18VCC103M18VCC104L18VCC105P17VCC106N17VCC107M17VCC108N16VCC109M16VCC110L16
VCC_SM100 AR6VCC_SM101 AP6VCC_SM102 AN6VCC_SM103 AL6VCC_SM104 AK6VCC_SM105 AJ6VCC_SM106 AV1VCC_SM107 AJ1
C61
20.
47U
_040
2_16
V4Z~
D
1
2
C15
810
U_0
805_
4VAM
~D
1
2
C44
1
0.1U
_040
2_16
V4Z~
D
1
2
C36
610
U_0
805_
4VAM
~D
1
2
P O W E R
U40G
CALISTOGA A0_FCBGA1466~D
VCC0AA33VCC1W33VCC2P33VCC3N33VCC4L33VCC5J33VCC6AA32VCC7Y32VCC8W32VCC9V32VCC10P32VCC11N32VCC12M32VCC13L32VCC14J32VCC15AA31VCC16W31VCC17V31VCC18T31VCC19R31VCC20P31VCC21N31VCC22M31VCC23AA30VCC24Y30VCC25W30VCC26V30VCC27U30VCC28T30VCC29R30VCC30P30VCC31N30VCC32M30VCC33L30VCC34AA29VCC35Y29VCC36W29VCC37V29VCC38U29VCC39R29VCC40P29VCC41M29VCC42L29VCC43AB28VCC44AA28VCC45Y28
VCC_SM5 AY34VCC_SM6 AW34VCC_SM7 AV34VCC_SM8 AU34VCC_SM9 AT34
VCC_SM10 AR34VCC_SM11 BA30VCC_SM12 AY30VCC_SM13 AW30VCC_SM14 AV30VCC_SM15 AU30VCC_SM16 AT30VCC_SM17 AR30VCC_SM18 AP30VCC_SM19 AN30VCC_SM20 AM30VCC_SM21 AM29VCC_SM22 AL29VCC_SM23 AK29VCC_SM24 AJ29VCC_SM25 AH29VCC_SM26 AJ28VCC_SM27 AH28VCC_SM28 AJ27VCC_SM29 AH27VCC_SM30 BA26VCC_SM31 AY26VCC_SM32 AW26VCC_SM33 AV26VCC_SM34 AU26VCC_SM35 AT26VCC_SM36 AR26VCC_SM37 AJ26VCC_SM38 AH26VCC_SM39 AJ25VCC_SM40 AH25VCC_SM41 AJ24VCC_SM42 AH24VCC_SM43 BA23VCC_SM44 AJ23VCC_SM45 BA22VCC_SM46 AY22VCC_SM47 AW22VCC_SM48 AV22VCC_SM49 AU22VCC_SM50 AT22VCC_SM51 AR22VCC_SM52 AP22VCC_SM53 AK22VCC_SM54 AJ22VCC_SM55 AK21VCC_SM56 AK20VCC_SM57 BA19VCC_SM58 AY19VCC_SM59 AW19VCC_SM60 AV19VCC_SM61 AU19VCC_SM62 AT19VCC_SM63 AR19VCC_SM64 AP19VCC_SM65 AK19VCC_SM66 AJ19VCC_SM67 AJ18VCC_SM68 AJ17VCC_SM69 AH17VCC_SM70 AJ16VCC_SM71 AH16VCC_SM72 BA15
VCC_SM3 AU40VCC_SM4 BA34
VCC_SM73 AY15VCC_SM74 AW15VCC_SM75 AV15VCC_SM76 AU15VCC_SM77 AT15VCC_SM78 AR15VCC_SM79 AJ15VCC_SM80 AJ14VCC_SM81 AJ13VCC_SM82 AH13VCC_SM83 AK12VCC_SM84 AJ12VCC_SM85 AH12VCC_SM86 AG12VCC_SM87 AK11VCC_SM88 BA8VCC_SM89 AY8VCC_SM90 AW8VCC_SM91 AV8VCC_SM92 AT8VCC_SM93 AR8VCC_SM94 AP8VCC_SM95 BA6VCC_SM96 AY6VCC_SM97 AW6VCC_SM98 AV6VCC_SM99 AT6
VCC_SM1 AT41VCC_SM0 AU41
VCC_SM2 AM41
VCC46V28VCC47U28VCC48T28VCC49R28VCC50P28VCC51N28VCC52M28VCC53L28VCC54P27VCC55N27VCC56M27VCC57L27VCC58P26VCC59N26VCC60L26VCC61N25VCC62M25VCC63L25VCC64P24VCC65N24VCC66M24VCC67AB23VCC68AA23VCC69Y23VCC70P23VCC71N23VCC72M23VCC73L23VCC74AC22VCC75AB22VCC76Y22VCC77W22VCC78P22VCC79N22VCC80M22VCC81L22VCC82AC21VCC83AA21VCC84W21VCC85N21VCC86M21VCC87L21VCC88AC20VCC89AB20VCC90Y20VCC91W20VCC92P20VCC93N20VCC94M20VCC95L20VCC96AB19VCC97AA19VCC98Y19VCC99N19
+
C42
322
0U_V
_4VM
_R45
~D
1
2
C37
90.
22U
_040
2_10
V4Z~
D
1
2
C16
010
U_0
805_
4VAM
~D
1
2
C43
8
0.1U
_040
2_16
V4Z~
D
1
2
C61
60.
47U
_040
2_16
V4Z~
D
1
2
C45
2
0.1U
_040
2_16
V4Z~
D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Calistoga(6 of 6)
15 63Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
P O W E R
U40J
CALISTOGA A0_FCBGA1466~D
VSS200AN21VSS201AL21VSS202AB21VSS203Y21VSS204P21VSS205K21VSS206J21VSS207H21VSS208C21VSS209AW20VSS210AR20VSS211AM20VSS212AA20VSS213K20VSS214B20VSS215A20VSS216AN19VSS217AC19VSS218W19VSS219K19VSS220G19VSS221C19VSS222AH18VSS223P18VSS224H18VSS225D18VSS226A18VSS227AY17VSS228AR17VSS229AP17VSS230AM17VSS231AK17VSS232AV16VSS233AN16VSS234AL16VSS235J16VSS236F16VSS237C16VSS238AN15VSS239AM15VSS240AK15VSS241N15VSS242M15VSS243L15VSS244B15VSS245A15VSS246BA14VSS247AT14VSS248AK14VSS249AD14VSS250AA14VSS251U14VSS252K14VSS253H14VSS254E14VSS255AV13VSS256AR13VSS257AN13VSS258AM13VSS259AL13VSS260AG13VSS261P13VSS262F13
VSS266AC12VSS267K12VSS268H12VSS269E12VSS270AD11VSS271AA11VSS272Y11VSS273J11VSS274D11VSS275B11VSS276AV10VSS277AP10VSS278AL10VSS279AJ10
VSS265D13VSS264B13VSS263AY12
VSS285 AW9VSS286 AR9VSS287 AH9VSS288 AB9VSS289 Y9VSS290 R9VSS292 G9VSS291 E9VSS293 A9VSS294 AG8VSS295 AD8VSS296 AA8VSS297 U8VSS298 K8VSS299 C8VSS300 BA7VSS301 AV7VSS302 AP7VSS303 AL7VSS304 AJ7VSS305 AH7VSS306 AF7VSS307 AC7VSS308 R7VSS309 G7VSS310 D7VSS311 AG6VSS312 AD6VSS313 AB6VSS314 Y6
VSS317 K6VSS318 H6VSS319 B6VSS320 AV5VSS321 AF5VSS322 AD5VSS323 AY4VSS324 AR4VSS325 AP4VSS326 AL4VSS327 AJ4VSS328 Y4VSS329 U4VSS330 R4VSS331 J4VSS332 F4VSS333 C4VSS334 AY3VSS335 AW3VSS336 AV3VSS337 AL3
VSS341 AD3
VSS345 AT2VSS346 AR2VSS347 AP2VSS348 AK2
VSS351 AB2VSS352 Y2VSS353 U2VSS354 T2VSS355 N2VSS356 J2VSS357 H2
VSS359 C2VSS360 AL1
VSS358 F2
VSS349 AJ2VSS350 AD2
VSS344 G3VSS343 AA3VSS342 AC3
VSS340 AF3
VSS338 AH3
VSS280 AG10VSS281 AC10VSS282 W10VSS283 U10VSS284 BA9
VSS315 U6VSS316 N6
VSS339 AG3
P O W E R
U40I
CALISTOGA A0_FCBGA1466~D
VSS0AC41VSS1AA41VSS2W41VSS3T41VSS4P41VSS5M41VSS6J41VSS7F41VSS8AV40VSS9AP40VSS10AN40VSS11AK40
VSS13AH40VSS14AG40VSS15AF40VSS16AE40VSS17B40VSS18AY39VSS19AW39
VSS21AR39VSS22AN39
VSS24AC39VSS25AB39VSS26AA39VSS27Y39VSS28W39VSS29V39VSS30T39VSS31R39VSS32P39VSS33N39VSS34M39VSS35L39VSS36J39VSS37H39
VSS20AV39
VSS23AJ39
VSS12AJ40
VSS38G39
VSS40D39VSS41AT38VSS42AM38VSS43AH38VSS44AG38VSS45AF38VSS46AE38VSS47C38VSS48AK37VSS49AH37VSS50AB37VSS51AA37VSS52Y37VSS53W37VSS54V37VSS55T37VSS56R37VSS57P37VSS58N37VSS59M37VSS60L37VSS61J37VSS62H37VSS63G37VSS64F37VSS65D37VSS66AY36VSS67AW36VSS68AN36VSS69AH36VSS70AG36VSS71AF36VSS72AE36VSS73AC36VSS74C36VSS75B36VSS76BA35VSS77AV35VSS78AR35VSS79AH35VSS80AB35VSS81AA35VSS82Y35VSS83W35VSS84V35VSS85T35VSS86R35VSS87P35VSS88N35VSS89M35VSS90L35VSS91J35VSS92H35VSS93G35VSS94F35VSS95D35VSS96AN34VSS97AK34VSS98AG34VSS99AF34
VSS39F39
VSS100 AE34VSS101 AC34VSS102 C34VSS103 AW33VSS104 AV33VSS105 AR33VSS106 AE33VSS107 AB33VSS108 Y33VSS109 V33VSS110 T33VSS111 R33VSS112 M33VSS113 H33VSS114 G33VSS115 F33VSS116 D33VSS117 B33VSS118 AH32VSS119 AG32VSS120 AF32VSS121 AE32VSS122 AC32VSS123 AB32VSS124 G32VSS125 B32VSS126 AY31VSS127 AV31VSS128 AN31VSS129 AJ31VSS130 AG31VSS131 AB31VSS132 Y31VSS133 AB30VSS134 E30VSS135 AT29VSS136 AN29VSS137 AB29VSS138 T29VSS139 N29VSS140 K29VSS141 G29VSS142 E29VSS143 C29VSS144 B29VSS145 A29VSS146 BA28VSS147 AW28VSS148 AU28VSS149 AP28VSS150 AM28VSS151 AD28VSS152 AC28VSS153 W28VSS154 J28VSS155 E28VSS156 AP27VSS157 AM27VSS158 AK27VSS159 J27VSS160 G27VSS161 F27VSS162 C27VSS163 B27VSS164 AN26VSS165 M26VSS166 K26VSS167 F26VSS168 D26VSS169 AK25VSS170 P25VSS171 K25VSS172 H25VSS173 E25VSS174 D25VSS175 A25VSS176 BA24VSS177 AU24VSS178 AL24VSS179 AW23VSS180 AT23VSS181 AN23VSS182 AM23VSS183 AH23VSS184 AC23VSS185 W23VSS186 K23VSS187 J23VSS188 F23VSS189 C23VSS190 AA22VSS191 K22VSS192 G22VSS193 F22VSS194 E22VSS195 D22VSS196 A22VSS197 BA21VSS198 AV21VSS199 AR21
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_MA11
V_DDR_MCH_REF
DDR_CKE1_DIMMA
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR#0
M_CLK_DDR#1
DDR_CKE1_DIMMA
DDR_CS0_DIMMA#
CLK_SCLK
DDR_A_MA1
DDR_A_MA10
DDR_A_MA3
DDR_A_MA9 DDR_A_MA7DDR_A_MA12
DDR_A_MA5
DDR_A_WE#
DDR_A_D14
DDR_A_D2
DDR_A_D8
DDR_A_D1DDR_A_D0
DDR_A_D3
DDR_A_D11
DDR_A_D29
DDR_A_D17
DDR_A_D23
DDR_A_D20
DDR_A_D22
DDR_A_D10
DDR_A_D24
DDR_A_D27
DDR_A_D32
DDR_A_D60
DDR_A_D47
DDR_A_D55
DDR_A_D52
DDR_A_D51
DDR_A_D48
DDR_A_D59DDR_A_D58
DDR_A_D61
DDR_A_DQS1
DDR_A_DQS0
DDR_A_DQS2
DDR_A_DM3
DDR_A_DM1
DDR_A_DM2
DDR_A_DQS4
DDR_A_DQS6
DDR_A_DQS7
CLK_SDATA
DDR_CKE0_DIMMA
DDR_A_MA8
DDR_CS1_DIMMA#
DDR_A_MA11
DDR_A_MA2DDR_A_MA0
DDR_A_MA4
DDR_A_MA6
DDR_A_CAS#
DDR_A_BS1DDR_A_RAS#
DDR_A_D6
DDR_A_D7
DDR_A_D5
DDR_A_D4
DDR_A_D9
DDR_A_D16
DDR_A_D15
DDR_A_D21
DDR_A_D18
DDR_A_D13DDR_A_D12
DDR_A_D25
DDR_A_D30
DDR_A_D19
DDR_A_D28
DDR_A_D38
DDR_A_D44
DDR_A_D50
DDR_A_D53DDR_A_D49
DDR_A_D57
DDR_A_D63
DDR_A_D56
DDR_A_D62
DDR_A_D54
DDR_A_DM6
DDR_A_DM4
DDR_A_DM5
DDR_A_DM7
DDR_A_MA13
DDR_A_DQS5
DDR_A_BS0
DDR_A_BS2
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS3DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_MA0
DDR_A_MA4
DDR_A_BS1
DDR_A_MA6
DDR_A_MA2
M_ODT0
M_ODT1
M_ODT0DDR_A_MA13
DDR_A_MA7
DDR_A_DM0
DDR_A_D42
DDR_CS0_DIMMA#DDR_A_RAS#
DDR_A_D41DDR_A_D46
DDR_A_D43
DDR_A_D33
DDR_A_D39DDR_A_D34
DDR_A_D35DDR_A_D37DDR_A_D36
DDR_A_D31 DDR_A_D26
M_ODT1DDR_CS1_DIMMA#
DDR_CKE0_DIMMA
DDR_A_MA10DDR_A_BS0
DDR_A_WE#DDR_A_CAS#
DDR_A_BS2
DDR_A_MA12
DDR_A_MA8
DDR_A_MA9
DDR_A_MA5
DDR_A_D40DDR_A_D45
DDR_A_MA1DDR_A_MA3
PM_EXTTS#0_R
+1.8V_SUS +1.8V_SUS
+0.9V_DDR_VTT
+3.3V_RUN
+0.9V_DDR_VTT
+1.8V_SUS
DDR_A_D[0..63]11
DDR_A_DQS[0..7]11
DDR_A_MA[0..13]11
DDR_A_DM[0..7]11
M_CLK_DDR0 10
M_CLK_DDR1 10
M_CLK_DDR#0 10
M_CLK_DDR#1 10
DDR_CKE1_DIMMA 10
DDR_CS0_DIMMA# 10
DDR_CKE0_DIMMA10
DDR_CS1_DIMMA#10
DDR_A_DQS#[0..7]11
M_ODT0 10
M_ODT110
DDR_A_BS1 11
DDR_A_WE#11DDR_A_RAS# 11
DDR_A_CAS#11
DDR_A_BS011
DDR_A_BS211
V_DDR_MCH_REF 10,17,48
CLK_SCLK6,17CLK_SDATA6,17
PM_EXTTS#0_R 17
PM_EXTTS#0 10
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
DDRII-SODIMM SLOT1
16 63Tuesday, February 07, 2006
Compal Electronics, Inc.Layout Note:Place these resistorclosely DIMM0,alltrace lengthMax=1.3"
RESERVEDIMMA
Layout Note:Place near JDIM1
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT
Layout Note:Place these resistorclosely DIMM0,alltrace length<750 mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
ON TOP SIDEJDIM2
TYCO_1470815-2~D
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
DQS5# 146DQS5 148
VSS 150DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
GND 202GND201
C225
2.2U_0603_6.3V6K~D
1
2
R175 100K_0402_5%~D
1 2
RN25
56_0404_4P2R_5%~D
1 42 3
C237
0.1U_0402_16V4Z~D
1
2C233
0.1U_0402_16V4Z~D
1
2C219
0.1U_0402_16V4Z~D
1
2
RN20
56_0404_4P2R_5%~D
1423
C227
0.1U_0402_16V4Z~D
1
2
C221
0.1U_0402_16V4Z~D
1
2C
228
0.1U_0402_16V4Z~D
1
2
RN24
56_0404_4P2R_5%~D
1 42 3
RN27
56_0404_4P2R_5%~D
1423
C222
2.2U_0603_6.3V6K~D
1
2
C220
0.1U_0402_16V4Z~D
1
2
R1770_0402_5%~D
1 2
C215
0.1U_0402_16V4Z~D
1
2
C216
0.1U_0402_16V4Z~D
1
2 C235
0.1U_0402_16V4Z~D
1
2
C230
2.2U_0603_6.3V6K~D
1
2
C213
2.2U_0603_6.3V6K~D
1
2
C234
0.1U_0402_16V4Z~D
1
2
C226
2.2U_0603_6.3V6K~D
1
2
RN18
56_0404_4P2R_5%~D
1423
R51100K_0402_5%~D
12
RN19
56_0404_4P2R_5%~D
1423
C229
2.2U_0603_6.3V6K~D
1
2
C236
0.1U_0402_16V4Z~D
1
2C231
0.1U_0402_16V4Z~D
1
2
RN16
56_0404_4P2R_5%~D
1 42 3
C217
0.1U_0402_16V4Z~D
1
2
RN15
56_0404_4P2R_5%~D
1423
RN26
56_0404_4P2R_5%~D
1423
RN21
56_0404_4P2R_5%~D
1 42 3
RN22
56_0404_4P2R_5%~D
1 42 3
RN17
56_0404_4P2R_5%~D
1423
C212
0.1U_0402_16V4Z~D
1
2
C218
0.1U_0402_16V4Z~D
1
2
RN23
56_0404_4P2R_5%~D
1 42 3
C232
0.1U_0402_16V4Z~D
1
2
C223
0.1U_0402_16V4Z~D
1
2
C214
2.2U_0603_6.3V6K~D
1
2
C224
0.1U_0402_16V4Z~D
1
2
R176 100K_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_DQS#5
DDR_B_D55
DDR_B_D7
DDR_B_D62
DDR_B_D52
DDR_B_BS1
DDR_CKE3_DIMMB
DDR_B_D23
DDR_B_D20
M_ODT3
DDR_CS3_DIMMB#
DDR_B_BS0
DDR_B_D6
M_CLK_DDR2
DDR_B_D59
DDR_B_RAS#
DDR_B_MA4
DDR_B_D25
DDR_B_DM2
DDR_B_MA9
DDR_B_DQS6
DDR_B_DM5
DDR_B_MA1
DDR_B_DQS#1
DDR_B_D43
DDR_B_DQS#3
DDR_CKE2_DIMMB
DDR_B_D26
DDR_B_D16
DDR_B_D8
DDR_B_D57
DDR_B_D49
DDR_B_D44
DDR_B_D38
M_ODT2
DDR_B_D31
DDR_B_D10
DDR_B_DM1
DDR_B_D34
V_DDR_MCH_REF
DDR_B_D54
DDR_B_DM4
DDR_B_MA0
DDR_B_DM0
DDR_B_DQS#4
DDR_B_CAS#
DDR_B_MA3
DDR_B_BS2
DDR_B_DQS5
DDR_B_DQS4
DDR_B_DQS1
CLK_SCLK
DDR_B_DQS3
DDR_B_WE#
DDR_B_D15
DDR_B_DQS0
DDR_B_D63
DDR_B_D50
DDR_B_MA7
DDR_B_D13
DDR_B_D29
DDR_B_DQS2
DDR_B_D0
DDR_B_DM6
DDR_B_D53
DDR_B_MA2
DDR_B_MA10
DDR_B_DM3
DDR_B_DQS#2
CLK_SDATA
DDR_B_MA13
DDR_B_D3DDR_B_D2
DDR_B_MA5
M_CLK_DDR#2
DDR_B_D19
DDR_B_DQS#0
DDR_B_DQS#7
DDR_B_DQS#6
DDR_B_D48
DDR_CS2_DIMMB#
DDR_B_D12
DDR_B_D9
DDR_B_D51
DDR_B_D37
DDR_B_MA11
M_CLK_DDR#3
DDR_B_D14
DDR_B_DQS7
DDR_B_D47
DDR_B_D58
DDR_B_DM7
DDR_B_MA6
DDR_B_MA12
DDR_B_D11
M_CLK_DDR3
DDR_B_D33
DDR_B_MA8
PM_EXTTS#0_R
DDR_B_MA7
M_ODT2
DDR_B_RAS#DDR_CS2_DIMMB#
DDR_B_MA0
DDR_B_MA6
DDR_B_BS1
DDR_B_MA11DDR_CKE3_DIMMB
DDR_B_MA4
DDR_B_MA13
DDR_B_MA2
DDR_B_D60DDR_B_D61DDR_B_D56
DDR_B_D45DDR_B_D40DDR_B_D41
DDR_B_D39DDR_B_D35
DDR_B_D36DDR_B_D32
DDR_B_D30DDR_B_D27
DDR_B_D24DDR_B_D28
DDR_B_D22DDR_B_D18
DDR_B_D17DDR_B_D21
DDR_B_D4DDR_B_D1DDR_B_D5
DDR_CKE2_DIMMBDDR_B_BS2
DDR_B_MA12DDR_B_MA9
DDR_B_MA8DDR_B_MA5
DDR_B_MA3DDR_B_MA1
DDR_B_MA10DDR_B_BS0
DDR_B_WE#DDR_B_CAS#
M_ODT3DDR_CS3_DIMMB#
DDR_B_D46DDR_B_D42
+0.9V_DDR_VTT
+0.9V_DDR_VTT
+1.8V_SUS
+3.3V_RUN
+3.3V_RUN
+1.8V_SUS+1.8V_SUS
V_DDR_MCH_REF 10,16,48DDR_B_D[0..63]11
DDR_B_DQS[0..7]11
DDR_B_MA[0..13]11
DDR_B_DM[0..7]11
DDR_B_DQS#[0..7]11
DDR_B_CAS#11
M_ODT310
DDR_CKE3_DIMMB 10
DDR_B_WE#11
M_CLK_DDR2 10
DDR_CKE2_DIMMB10
DDR_B_BS011 DDR_B_RAS# 11
M_CLK_DDR3 10
DDR_B_BS1 11
M_CLK_DDR#2 10
DDR_B_BS211
M_ODT2 10DDR_CS3_DIMMB#10
DDR_CS2_DIMMB# 10
M_CLK_DDR#3 10
CLK_SCLK6,16CLK_SDATA6,16
PM_EXTTS#0_R 16
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
DDRII-SODIMM SLOT2
17 63Tuesday, February 07, 2006
Compal Electronics, Inc.
Layout Note:Place these resistorclosely DIMM0,alltrace length<750 mil
Layout Note:Place these resistorclosely DIMM0,alltrace lengthMax=1.3"
Layout Note:Place near JDIM2
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT
DELL CONFIDENTIAL/PROPRIETARY
DIMMBSTANDARD
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
ON BOTTOM SIDE
C244
0.1U_0402_16V4Z~D
1
2 C269
0.1U_0402_16V4Z~D
1
2
C255
0.1U_0402_16V4Z~D
1
2
C248
0.1U_0402_16V4Z~D
1
2
C242
2.2U_0603_6.3V6K~D
1
2
R17410K_0402_5%~D
12
RN2
56_0404_4P2R_5%~D
1423
C267
0.1U_0402_16V4Z~D
1
2
C249
2.2U_0603_6.3V6K~D
1
2
C239
0.1U_0402_16V4Z~D
1
2
RN3
56_0404_4P2R_5%~D
1 42 3
RN9
56_0404_4P2R_5%~D
1 42 3
C240
0.1U_0402_16V4Z~D
1
2
RN5
56_0404_4P2R_5%~D
1423
RN14
56_0404_4P2R_5%~D
1423
RN11
56_0404_4P2R_5%~D
1 42 3
R173
100K_0402_5%~D
12
C251
0.1U_0402_16V4Z~D
1
2
RN12
56_0404_4P2R_5%~D
1423
C268
0.1U_0402_16V4Z~D
1
2
C548
2.2U_0603_6.3V6K~D
1
2
RN10
56_0404_4P2R_5%~D
1 42 3
C247
0.1U_0402_16V4Z~D
1
2 C264
0.1U_0402_16V4Z~D
1
2
RN8
56_0404_4P2R_5%~D
1 42 3
JDIM1
TYCO_1565917-4~D
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
DQS5# 146DQS5 148
VSS 150DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
GND 202GND201
C246
0.1U_0402_16V4Z~D
1
2
RN4
56_0404_4P2R_5%~D
1 42 3
C241
2.2U_0603_6.3V6K~D
1
2
C252
0.1U_0402_16V4Z~D
1
2
C266
0.1U_0402_16V4Z~D
1
2 C265
0.1U_0402_16V4Z~D
1
2
RN6
56_0404_4P2R_5%~D
1423
RN7
56_0404_4P2R_5%~D
1423
C263
0.1U_0402_16V4Z~D
1
2
C254
2.2U_0603_6.3V6K~D
1
2
C261
2.2U_0603_6.3V6K~D
1
2
C243
0.1U_0402_16V4Z~D
1
2C245
0.1U_0402_16V4Z~D
1
2
RN13
56_0404_4P2R_5%~D
1423
C253
2.2U_0603_6.3V6K~D
1
2
C549
0.1U_0402_16V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+FAN1_VOUT
THERMATRIP1#
THERMATRIP2#
REM_DIODE1_PREM_DIODE1_N
FAN1_TACH_FB
THERMATRIP3#
THERMATRIP2#
+3VSUS_THRM
THERMATRIP1#
LDO_SET
+3V_LD
OIN
REM_DIODE3_NREM_DIODE3_P
+FAN1_VOUT
SNIFFER_GREEN#SNIFFER_YELLOW#
LDO_SET
VCP2
VCP2
+3.3V_RUN
+3.3V_ALW
+3.3V_SUS
+3.3V_SUS
+1.05V_VCCP
+1.05V_VCCP
+3.3V_SUS
+RTC_CELL
+3.3V_SUS
+3.3V_SUS
+2.5V_RUN
+5V_RUN
+RTC_CELL
+2.5V_RUN
+3.3V_RUN
+5V_SUS+5V_SUS
FAN1_TACH 39
ATF_INT# 39
THERMTRIP_SIO 38
THERMTRIP_MCH#10
H_THERMTRIP#7
DAT_SMB39CLK_SMB39
H_THERMDA7
H_THERMDC7
SUSPWROK23,42
POWER_SW#39,40
ICH_PWRGD#42
ACAV_IN 39,50,51
THERM_STP# 46
SNIFFER_GREEN#43SNIFFER_YELLOW#43
2.5V_RUN_PWRGD 42
5V_CAL_SIO2# 38
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
FAN & Thermal Sensor
18 63Tuesday, February 07, 2006
Compal Electronics, Inc.
FAN1 Control and Tachometer
Place under CPU
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
SMBUS ADDRESS : 2FPlace cap close to theGuardian pins as possible.
REM_DIODE3_N, REM_DIODE3_P routing together.Trace width / Spacing = 10 / 10 mil
Place near the bottom SODIMM
Place C341 close to the Guardianpins as possible
Place C47 close to the Guardianpins as possible
VSET =Tp-70
21
VSET=R249+R262
R262x 3.3V
R479 place on bottom sidenext to SoDIMM connector
Place near the bottom SODIMM
DP2, DN2 routing together. Tracewidth / Spacing = 10 / 10 mil
REM_DIODE1_N, REM_DIODE1_P routing together.Trace width / Spacing = 10 / 10 mil
C3412200P_0402_50V7K~D
1
2
JFAN1
MOLEX_53398-0371~D
112233
C57
11U
_060
3_10
V4Z~
D
1
2
R163410K_0402_5%~D@
12
EB
C
Q84MMST3904-7-F_SOT323~D
2
31
R41310K_0402_5%~D
12
R2418.2K_0402_5%~D
12
R48010K_0402_5%~D
12
R1367.5K_0402_5%~D
1 2
R180031.6K_0402_1%~D
@
12
R38 1K_0402_5%~D
1 2
R402.2K_0402_5%~D 1 2
R1643
0.27_1210_5%~D
12
R2398.2K_0402_5%~D
12
EB
C
Q34MMST3904-7-F_SOT323~D
2
31
C21
0
22U
_080
5_6.
3VAM
~D
1
2
R262118K_0402_1%~D
12
R249332K_0402_1%~D
12
C410.1U_0402_16V4Z~D
1
2
C472200P_0402_50V7K~D
1
2C1803
2200P_0402_50V7K~D@
1
2
C17732200P_0402_50V7K~D
1
2
D35RB751S40T1_SOD523-2~D
@
21
R42 1K_0402_5%~D
1 2
R392.2K_0402_5%~D 1 2
C17770.1U_0402_16V4Z~D
1
2
G
D
S
Q212N7002W-7-F_SOT323~D
2
13
R479
10K_0603_1%_TSM1A103F34D3RZ~D
1 2
R6010K_0402_5%~D
12
C1778100P_0402_50V8J~D@
1
2
C1520.1U_0402_16V4Z~D@
1
2
EB
C
Q12
MM
ST39
04-7
-F_S
OT3
23~D
2
31R41 8.2K_0402_5%~D
1 2
EB
C
Q39MMST3904-7-F_SOT323~D
2
31
C3030.1U_0402_16V4Z~D
1
2
R61
1K_0
402_
5%~D
12
C1500.1U_0402_16V4Z~D@
1
2
R5049.9_0603_1%~D 1 2
C17
79
22U
_080
5_6.
3VAM
~D
@
1
2
C792200P_0402_25V7K~D
1
2
C18042200P_0402_50V7K~D
@
1
2
U15
EMC4000 C_QFN40~D
SMDATA7SMBCLK8
LDO_SHDN#_ADDR23
DP235DN234
+3V_SUS12VSUS_PWRGD21
+RTC_PWR3V18
+3V_PWROK#13
POWER_SW#38
THERMTRIP1#14
THERMTRIP2#15
THERMTRIP3#16
VSET39HW_LOCK#29VSS9
ATF_INT# 17
VCP 3
LDO_POK 31
DN1 36DP1 37
THERMTRIP_SIO 30ACAV_CLR 4
SYS_SHDN# 22
DP31DN32
VDD_5V 5
FAN_OUT6
GPIO110GPIO211GPIO319GPIO420
LDO_SET 24
LDO_OUT 25
LDO_IN 26
LDO_OUT 27
LDO_IN 28
GPIO532
FAN_DAC33
VCP 40
PAD_GND 41
R17
891K
_040
2_5%
~D
12
C440.1U_0402_16V4Z~D
1
2
R4812.21K_0603_1%~D
12
C17
7410
U_0
805_
10V4
Z~D
1
2
C17
7610
U_0
805_
10V4
Z~D
1
2
C420.1U_0402_16V4Z~D
1
2
C430.1U_0402_16V4Z~D
1
2
C31
722
00P_
0402
_50V
7K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LCD_TST
LCD_A1-
LCD_A0+
LCD_A2-
LCD_A0-
LCD_A2+
LCD_A1+
LCD_ACLK+LCD_ACLK-
LCD_BCLK+
LCD_B0+LCD_B0-
LCD_B2-
LCD_B1-
LCD_B2+
LCD_BCLK-
LCD_B1+
LAMP_D_STAT#
LAMP_STAT#
BACKLITEON
BACKLITEON
PANEL_BKEN
FPBACK_EN
LDDC_DATALDDC_CLK
+3.3V_RUN_R
+LCDVDD
+3.3V_RUN_R
+INV_PWR_SRC+PWR_SRC
+INV_PWR_SRC
+5V_ALW
+LCDVDD
+LCDVDD+15V_SUS
+15V_SUS
+3.3V_RUN_R
+3.3V_RUN_R
SBAT_SMBDAT 39,45SBAT_SMBCLK 39,45
RUN_ON37,39,41,42,46,47,48
LCD_TST 23
LDDC_CLK 12LDDC_DATA 12
LCD_A0- 12LCD_A0+ 12
LCD_A1- 12LCD_A1+ 12
LCD_A2- 12LCD_A2+ 12
LCD_ACLK- 12LCD_ACLK+ 12
LCD_B0- 12LCD_B0+ 12
LCD_B1- 12LCD_B1+ 12
LCD_B2- 12LCD_B2+ 12
LCD_BCLK- 12LCD_BCLK+ 12
ENVDD12
LAMP_STAT# 23
FPBACK_EN38
PANEL_BKEN12
BIA_PWM 12,39
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Internal LVDS
19 63Tuesday, February 07, 2006
Compal Electronics, Inc.
FDS4435: P CHANNAL
40mil40mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
M'07 inverter support - Depop D2.D'05 inverter support - Populate D2
M'07 inverter support - Populate R520,R1767 Depop U7.D'05 inverter support - Populate U7, Depop R520,R1767
BACKLITEON for D'05;BIA_PWM for M'07
X01 support M07 inverter
U7
74AHC1G08GW_SOT353-5~D@
IN11
IN22 G3
O 4
P5
G
D
S Q372N7002W-7-F_SOT323~D
2
13
R235100K_0402_5%~D
12
C280.1U_0402_16V4Z~D
1
2
R520 0_0402_5%~D 1 2
C29
0.1U
_040
2_16
V4Z~
D
1
2
D2
RB751S40T1_SOD523-2~D@
21
C31
50.
1U_0
603_
50V4
Z~D
1
2
R1767 0_0402_5%~D
1 2
C2960.1U_0603_50V4Z~D
1
2
JLVDS
IPEX_20330-044E-11F~D
TXUCLKUT- 44
GND1 42
TXUOUT2+ 40
TXUOUT1- 38
GND3 36
TXUOUT0+ 34
TXLCLKOUT- 32
GND5 30
TXLOUT2+ 28
TXLOUT1- 26
GND7 24
TXLOUT0+ 22
PANEL_I2C_DAT 19GND9 18
GND10 16
LCDVDD2 14
LCDPWR_SRC 12
LCDPWR_SRC 10
+5V_ALWF 3
PBAT_SMBCLK 6
GND13 4
FPBACK 8
TXUCLKUT+ 43
TXUOUT2- 41
GND2 39
TXUOUT1+ 37
TXUOUT0- 35
GND4 33
TXLCLKOUT+ 31
TXLOUT2- 29
GND6 27
TXLOUT1+ 25
TXLOUT0- 23
GND8 21PANEL_I2C_CLK 20
VEDID 17
LCDVDD1 15
PNL_SLFTST 13
LCDPWR_SRC 11
GND11 9
LAMP_START 2
PBAT_SMBDAT 5
GND12 7
GND14 1
MGND145MGND246MGND347MGND448MGND549MGND650MGND751
NC56NC57
MGND1054MGND1155
MGND852MGND953
R1760100K_0402_5%~D
12
R35470_0402_5%~D
12
C2890.1U_0603_50V4Z~D
1
2
R236
100K_0402_5%~D
1 2
G
D S
Q292N7002W-7-F_SOT323~D
2
1 3
R74
10K_
0402
_5%
~D
12
R79100K_0402_5%~D@
12
G
D
S
Q10
2N70
02W
-7-F
_SO
T323
~D
2
13
C260.1U_0402_16V4Z~D
1
2
C27
0.1U_0402_16V4Z~D
1
2
Q8DDTC124EUA-7-F_SOT323~D
I2
O1
G3
Q32FDS4435_NL_SO8~D
4
78
65
123
S
GD
Q9SI3456BDV-T1-E3_TSOP6~D
3
6
24 5
1
C29
010
00P_
0402
_50V
7K~D
1
2
R54100K_0402_5%~D
12
R272100K_0402_5%~D
12
R73
10K_
0402
_5%
~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DAT_DDC2
VGA_GRN
VGA_BLU
CLK_DDC2
CRT_VCC
M_ID2#
JVGA_HSBLUE
RED
GREEN
JVGA_VS
VGA_RED
+5V_RUN
+3.3V_RUN_R
CRT_VCC
CRT_VCC
+5V_RUN
VGA_RED12,36
VGA_VSYNC12
CLK_DDC212,36
VGA_GRN12,36
VGA_BLU12,36
VGA_HSYNC12
DAT_DDC212,36
VSYNC_R 36
HSYNC_R 36
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
CRT
20 63Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
K1
Evaluate Package
A2
A1 K2
DA204U
C14
120.
01U
_040
2_16
V7K~
D
1
2
C141010P_0402_50V8J~D@
1
2
JCRT
SUYIN_070915FR015S201CU~D
611
17
1228
1339
144
1015
5
1617
C141110P_0402_50V8J~D@
1
2
D2005SDM10U45-7_SOD523-2~D
2 1
L81BLM18AG121SN1D_0603~D
1 2
T46 PAD~D
U191SN74AHCT1G125GW_SC70-5~D
A2 Y 4
P5
G3
OE#
1
C14130.1U_0402_16V4Z~D
1
2
C14
06
22P
_040
2_50
V8J~
D
@
1
2
R13
9715
0_04
02_1
%~D
12
R1230_0402_5%~D
1 2R1405
39_0402_5%~D
1 2
D31DA204U_SOT323~D@
2 31
C14
1422
P_0
402_
50V8
J~D
1
2
R14
001K
_040
2_5%
~D@
1
2
R13
9815
0_04
02_1
%~D
12
L78BLM18BB600SN1D_0603~D
1 2
D30DA204U_SOT323~D@
2 31
L79BLM18BB600SN1D_0603~D
1 2
D29DA204U_SOT323~D@
2 31
R13
991K
_040
2_5%
~D@
12
C140910P_0402_50V8J~D@
1
2
D32SDM10U45-7_SOD523-2~D
21
R14
012.
2K_0
402_
5%~D
12
U190
SN74AHCT1G125GW_SC70-5~D
A2 Y 4
P5
G3
OE#
1
R14022.2K_0402_5%~D
12
R13
9615
0_04
02_1
%~D
12
R14031K_0402_5%~D 1 2
L80BLM18BB600SN1D_0603~D
1 2
C14
07
22P
_040
2_50
V8J~
D
@
1
2
C14
1522
P_0
402_
50V8
J~D
1
2
L82BLM18AG121SN1D_0603~D
1 2
R1020_0402_5%~D
1 2R1404
39_0402_5%~D
1 2
C14
08
22P
_040
2_50
V8J~
D
@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_SERR#
PCI_DEVSEL#PCI_PCIRST#
PCI_C_BE0#
PCI_REQ4#
PCI_PERR#
PCI_GNT4#
PCI_GNT1#
ICH_GPIO4_PIRQG#PCI_PIRQB#
PCI_REQ5#
PCI_STOP#
PCI_C_BE1#
PCI_C_BE3#
ICH_GPIO3_PIRQF#PCI_PIRQC#
PCI_REQ2#
ICH_GPIO2_PIRQE#
PCI_FRAME#
PCI_REQ3#
PCI_PLOCK#
PCI_IRDY#
PCI_C_BE2#
PCI_REQ1#
PCI_REQ0#
PCI_PIRQD#
PCI_PIRQA#
PCI_PAR
PCI_TRDY#
ICH_GPIO5_PIRQH#
PCI_PCIRST#PCI_RST#
PCI_PLTRST#CLK_PCI_ICHICH_PME#
PCI_AD0PCI_AD1PCI_AD2PCI_AD3PCI_AD4PCI_AD5
PCI_AD7PCI_AD6
PCI_AD8PCI_AD9
PCI_AD11PCI_AD10
PCI_AD14PCI_AD15
PCI_AD13PCI_AD12
PCI_AD16PCI_AD17
PCI_AD19PCI_AD18
PCI_AD22PCI_AD23
PCI_AD21PCI_AD20
PCI_AD25PCI_AD24
PCI_AD28PCI_AD29
PCI_AD31PCI_AD30
PCI_AD26PCI_AD27
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_FRAME#
PCI_IRDY#
PCI_PLOCK#
PCI_SERR#
PCI_PERR#
PCI_PIRQC#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQD#
ICH_GPIO5_PIRQH#
ICH_GPIO4_PIRQG#
ICH_GPIO3_PIRQF#
ICH_GPIO2_PIRQE#
PCI_REQ0#
PCI_REQ2#
PCI_REQ3#
PCI_REQ4#
PCI_REQ5#
PCI_REQ1#PCI_GNT5#
PCI_GNT5#
PCI_GNT4#
PCI_GNT0#
PLTRST2#
PCI_PLTRST#PLTRST#
CLK_PCI_ICH
+3.3V_RUN_R
+3.3V_RUN_R +3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
PCI_C_BE1# 30,35
PCI_SERR# 35
PCI_PAR 30,35PCI_IRDY# 30,35,36
PCI_PERR# 30,35
PCI_GNT1# 30
PCI_PIRQC#30
PCI_C_BE3# 30,35
PCI_FRAME# 30,35,36
PCI_REQ1# 30
PCI_C_BE2# 30,35
PCI_DEVSEL# 30,35
PCI_TRDY# 30,35
PCI_C_BE0# 30,35
PCI_STOP# 30,35
PCI_AD[0..31]30,35
CLK_PCI_ICH 6ICH_PME# 38
PCI_RST# 30,31,35
MCH_ICH_SYNC# 10
PCI_PIRQA#35
PCI_REQ0# 36
PCI_PLOCK# 35
PCI_GNT0# 35,36
PLTRST# 10,23,28,34,52
PLTRST2# 38,39
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
ICH7(1/4)
21 63Tuesday, February 07, 2006
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
LPC
PCI
SPI
GNT5#R328
GNT4#R347
(11)
(10)
(01)
unstuffunstuff
unstuff
unstuff stuff
stuff *
Place closely pin U45.A9
C3498.2P_0402_50V8J~D
@
1
2
R339 8.2K_0402_5%~D
1 2
U21D
74VHC08MTCX_NL_TSSOP14~D
IN113
IN212 OUT 11
P14
G7
R3281K_0402_5%~D
12
R77 8.2K_0402_5%~D
1 2
Interrupt I/F
PCI
MISC
U45B
ICH7M A0_BGA652~D
FRAME# F16
GPIO17 / GNT5# D8
TRDY# F14STOP# F15
GPIO2 / PIRQE# G8GPIO3 / PIRQF# F7GPIO4 / PIRQG# F8GPIO5 / PIRQH# G7
C/BE0# B15C/BE1# C12C/BE2# D12C/BE3# C15
IRDY# A7PAR E10
PCIRST# B18DEVSEL# A12
PERR# C9PLOCK# E11
SERR# B10
PIRQC#C5
RSVD[4]AH4
PIRQA#A3
RSVD[5]AD9
RSVD[2]AD5RSVD[3]AG4
PIRQB#B4
PIRQD#B5
RSVD[1]AE5
REQ0# D7GNT0# E7REQ1# C16GNT1# D16REQ2# C17GNT2# D17REQ3# E13GNT3# F13
REQ4# / GPIO22 A13GNT4# / GPIO48 A14GPIO1 / REQ5# C8
AD0E18AD1C18AD2A16AD3F18AD4E16AD5A18AD6E17AD7A17AD8A15AD9C14AD10E14AD11D14AD12B12AD13C13AD14G15AD15G13AD16E12AD17C11AD18D11AD19A11AD20A10AD21F11AD22F10AD23E9AD24D9AD25B9AD26A8AD27A6AD28C7AD29B6AD30E6AD31D6
RSVD[6] AE9RSVD[7] AG8RSVD[8] AH8RSVD[9] F21
MCH_SYNC# AH20
PLTRST# C26PCICLK A9
PME# B19
R324 8.2K_0402_5%~D
1 2
R69 8.2K_0402_5%~D
1 2
R45 8.2K_0402_5%~D
1 2
R286 8.2K_0402_5%~D
1 2
R256 8.2K_0402_5%~D
1 2
R315 8.2K_0402_5%~D
1 2
R257 8.2K_0402_5%~D
1 2
U21B
74VHC08MTCX_NL_TSSOP14~D
IN14
IN25 OUT 6
P14
G7
R317 8.2K_0402_5%~D
1 2
R327 8.2K_0402_5%~D
1 2
R3471K_0402_5%~D@
12
R33210_0402_5%~D
@
12
R350 8.2K_0402_5%~D
1 2
R255 8.2K_0402_5%~D
1 2
R258 8.2K_0402_5%~D
1 2
R43 8.2K_0402_5%~D
1 2
R254 8.2K_0402_5%~D
1 2
R72 8.2K_0402_5%~D
1 2
U21C
74VHC08MTCX_NL_TSSOP14~D
IN110
IN29 OUT 8
P14
G7
R309 8.2K_0402_5%~D
1 2
U21A
74VHC08MTCX_NL_TSSOP14~D
IN11
IN22 OUT 3
P14
G7
R44 8.2K_0402_5%~D
1 2
R340 8.2K_0402_5%~D
1 2
R46 8.2K_0402_5%~D
1 2
R47 8.2K_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
IDE_DDREQ
H_A20M#
H_INIT#
H_IGNNE#
H_INTR
H_NMI
H_STPCLK#
H_FERR#
IDE_IRQ
H_DPRSTP#
IDE_DD9
IDE_DD2
CLK_PCIE_SATA#
IDE_DD15
IDE_DD0
IDE_DIOR#
CLK_PCIE_SATA
DPRSLP#
LPC_LFRAME#
IDE_DA1
IDE_DD14
IDE_DA2
LPC_LDRQ1#
IDE_DIOW#
ICH_AC_SDIN1
IDE_DD6
IDE_DA0
ICH_AC_SDOUT_R
IDE_DD13
SATA_ACT#
IDE_DD10
IDE_DD8
IDE_DD1
IDE_DD7
IDE_DD4
LPC_LAD3
ICH_AC_RST_R#
IDE_IRQ
IDE_DD[0..15]
IDE_DD12
IDE_DD3
IDE_DD5
ICH_RTCX1
SIO_RCIN#
LPC_LAD0
IDE_DD11
IDE_DDACK#
ICH_AC_SDIN0
LPC_LDRQ0#
H_DPSLP#
IDE_DIORDY
IDE_DCS1#
ICH_AC_SYNC_R
ICH_AC_SYNC_R
ICH_AC_RST_R#
ICH_AC_SDOUT_R
H_CPUSLP#H_CPUSLP_R#
SIO_A20GATE
H_PWRGOOD
H_SMI#
LPC_LAD2
IDE_DCS3#
H_FERR#
LPC_LAD1
ICH_AC_BITCLK_R
ICH_AC_BITCLK_R
PSATA_ITX_DRX_N0_CPSATA_ITX_DRX_P0_C
PSATA_IRX_DTX_N0_CPSATA_IRX_DTX_P0_C
SIO_A20GATE
SIO_RCIN#
ICH_INTVRMEN
ICH_RTCRST#
SM_INTRUDER#
THRMTRIP_ICH#
ICH_RTCX2
+3.3V_RUN_R
+1.05V_VCCP
+3.3V_RUN_R
+RTC_CELL
+1.05V_VCCP
IDE_DD[0..15] 25
LPC_LFRAME# 28,38,39
IDE_DDACK#25
IDE_DIOR#25IDE_DIOW#25
ICH_AC_SDIN133
IDE_DDREQ 25
LPC_LAD[0..3] 28,38,39
IDE_DA[0..2] 25
CLK_PCIE_SATA6
H_INTR 7H_INIT# 7
H_DPSLP# 7
H_SMI# 7
H_IGNNE# 7
H_A20M# 7
H_NMI 7
H_STPCLK# 7
H_CPUSLP# 7,10
SATA_ACT#43
IDE_IRQ25
H_DPRSTP# 7,49
H_FERR# 7
H_PWRGOOD 7
SIO_RCIN# 39
IDE_DIORDY25
IDE_DCS1# 25
LPC_LDRQ0# 38
SIO_A20GATE 39
ICH_AC_SDIN026
IDE_DCS3# 25
CLK_PCIE_SATA#6
LPC_LDRQ1# 38
ICH_RST_AUDIO#26
ICH_SYNC_AUDIO26
ICH_SDOUT_AUDIO26
ICH_SYNC_MDC33
ICH_RST_MDC#33
ICH_SDOUT_MDC33
MDC_AC_BITCLK33
ICH_AC_BITCLK26
PSATA_ITX_DRX_N025
PSATA_IRX_DTX_N0_C25
PSATA_ITX_DRX_P025
PSATA_IRX_DTX_P0_C25
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
ICH7(2/4)
22 63Tuesday, February 07, 2006
Compal Electronics, Inc.
Package9.6X4.06 mm
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place near ICH7 side.
H_DPRSTP# daisy
Close to U45
Within 500 mils
ICH7-M --> Yonah --> IMVP6
R8433_0402_5%~D
1 2
R371
33_0402_5%~D
1 2
R380 24.9_0402_1%~D 1 2
C499 27P_0402_50V8J~D@
12
R11556_0402_5%~D
1 2
C3481U_0603_10V4Z~D 1 2
C402.2P_0402_50V8C 12
R27710K_0402_5%~D
12
CMOS@SHORT PADS~D
11 2 2
R8133_0402_5%~D 1 2
RTC
LAN
SATA
AC-97/AZALIA
LPC
CPU
IDE
U45A
ICH7M A0_BGA652~D
RTCX1AB1RTCX2AB2
RTCRST#AA3
INTVRMENW4INTRUDER#Y5
EE_CSW1EE_SHCLKY1EE_DOUTY2EE_DINW3
LAN_CLKV3
LAN_RSTSYNCU3
LAN_RXD0U5LAN_RXD1V4LAN_RXD2T5
LAN_TXD0U7LAN_TXD1V6LAN_TXD2V7
ACZ_BCLKU1ACZ_SYNCR6
ACZ_RST#R5
ACZ_SDIN0T2ACZ_SDIN1T3ACZ_SDIN2T1
ACZ_SDOUTT4
SATALED#AF18
SATA0RXNAF3SATA0RXPAE3SATA0TXNAG2SATA0TXPAH2
SATA2RXNAF7SATA2RXPAE7SATA2TXNAG6SATA2TXPAH6
SATA_CLKNAF1SATA_CLKPAE1
SATARBIASNAH10SATARBIASPAG10
IORDYAG16IDEIRQAH16DDACK#AF16DIOW#AH15DIOR#AF15
LAD0 AA6LAD1 AB5LAD2 AC4LAD3 Y6
LDRQ0# AC3LDRQ1# / GPIO23 AA5
LFRAME# AB3
A20GATE AE22A20M# AH28
CPUSLP# AG27
TP1 / DPRSTP# AF24TP2 / DPSLP# AH25
FERR# AG26
GPIO49 / CPUPWRGD AG24
IGNNE# AG22INIT3_3V# AG21
INIT# AF22INTR AF25
RCIN# AG23
SMI# AF23NMI AH24
STPCLK# AH22
THERMTRIP# AF26
DA0 AH17DA1 AE17DA2 AF17
DCS1# AE16DCS3# AD16
DD0 AB15DD1 AE14DD2 AG13DD3 AF13DD4 AD14DD5 AC13DD6 AD12DD7 AC12DD8 AE12DD9 AF12
DD10 AB13DD11 AC14DD12 AF14DD13 AH13DD14 AH14DD15 AC15
DDREQ AE15
R297 20K_0402_5%~D
1 2
R276 1M_0402_5%~D
1 2
R970_0402_5%~D
1 2
C382.2P_0402_50V8C 12
C270 3900P_0402_50V7K~D
12
R37833_0402_5%~D
1 2
R163110K_0402_5%~D
12
R301 332K_0402_1%~D
1 2
R55333_0402_5%~D 1 2
R438 0_0402_5%~D@12
R18933_0402_5%~D
1 2
R8233_0402_5%~D
1 2
C50327P_0402_50V8J~D@
1
2
X1
32.768KHZ_6PF_1TJS060BJ4A376P~D
14
23
R11856_0402_5%~D
12
C690.1U_0402_16V4Z~D
@
1
2
C2713900P_0402_50V7K~D
12
R36
10M
_040
2_5%
~D
12
R121 0_0402_5%~D 12
R8333_0402_5%~D
1 2
R414
8.2K_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LINKALERT#
SMBALERT#
ICH_BATLOW#
ICH_PCIE_WAKE#
SIO_THRM#
IRQ_SERIRQ
CLKRUN# ICH_SMBDATA
SIO_THRM#
ICH_PCIE_WAKE#
CLK_PCIE_ICH#
CLK_ICH_48M
PM_BMBUSY#
CLK_ICH_14M
PLTRST#
H_STP_CPU#
SIO_SLP_S3#
CLK_ICH_14MICH_RI#
IRQ_SERIRQ
SIO_EXT_SMI#
SIO_SLP_S5#SMBALERT#
CLKRUN#
USBRBIAS
DMI_IRCOMP
GPIO24
USB_OC0#
USB_OC3#
USB_OC1#USB_OC2#
USB_OC5#USB_OC6#USB_OC7#
ICH_SMBCLK
SPKR
LINKALERT#
USB_OC4#
H_STP_PCI#
ICH_SMLINK0ICH_SMLINK0ICH_SMLINK1 ICH_SMLINK1
SUSPWROK
ICH_BATLOW#
SIO_PWRBTN#
ICH_PWRGD
ICH_SUSCLK
SIO_EXT_SCI#
LAMP_STAT#
DPRSLPVR
DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3
DMI_MRX_ITX_P0
DMI_MRX_ITX_N2
DMI_MRX_ITX_P3
PCIE_ITX_WLANRX_N2
PCIE_IRX_WLANTX_N2PCIE_IRX_WLANTX_P2
PCIE_ITX_WLANRX_P2
PCIE_ITX_LOMRX_N3
PCIE_IRX_LOMTX_N3PCIE_IRX_LOMTX_P3
PCIE_ITX_LOMRX_P3
PCIE_ITX_WANRX_N1
PCIE_IRX_WANTX_N1PCIE_IRX_WANTX_P1
PCIE_ITX_WANRX_P1
ITP_DBRESET#
CLK_PCIE_ICH
DMI_MRX_ITX_P2
DMI_MRX_ITX_N3
DMI_MRX_ITX_P1
DMI_MTX_IRX_P0
DMI_MRX_ITX_N1
DMI_MRX_ITX_N0
DMI_MTX_IRX_P1
USB_OC7#
USB_OC0#
USB_OC1#
CLK_ICH_48M
SATA_DET#USB_IDE#
LCD_TST
IDE_RST_MOD
BT_RADIO_DIS#
BT_RADIO_DIS#
WWAN_RADIO_DIS#
WWAN_RADIO_DIS#
USBP7+
USBP6+USBP7-
USBP6-
USBP0+USBP0-
USBP3+
USBP2+
USBP5+
USBP4-
USBP3-
USBP2-
USBP4+USBP5-
USBP1+USBP1-
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC2#
DPRSLPVRSIO_EXT_SCI#
SIO_EXT_SMI#
ICHI_ECO_SPI_DATA
SPI_CS#ICH_EC_SPI_CLK
ICHO_ECI_SPI_DATA
LAMP_STAT#
IMVP_PWRGD
+3.3V_SUS
+3.3V_RUN_R
+3.3V_SUS
+3.3V_SUS
+1.5V_RUN
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+3.3V_RUN_R
+3.3V_SUS+3.3V_SUS +3.3V_SUS
SIO_EXT_SMI#39
H_STP_CPU#6
IRQ_SERIRQ28,30,38,39
SIO_SLP_S3# 39
SIO_SLP_S5# 39
CLK_PCIE_ICH# 6CLK_PCIE_ICH 6
PM_BMBUSY#10
SIO_THRM#39
ICH_PCIE_WAKE#38
PLTRST# 10,21,28,34,52
CLK_ICH_14M 6CLK_ICH_48M 6
ICH_SMBDATA6,28,34ICH_SMBCLK6,28,34
CLKRUN#30,38,39
SPKR26
H_STP_PCI#6
SUSPWROK 18,42
SIO_PWRBTN# 39
ICH_PWRGD 10,42
DPRSLPVR 49
SIO_EXT_WAKE#39
SIO_EXT_SCI# 39
LAMP_STAT#19 SATA_CLKREQ# 6
DMI_MTX_IRX_N0 10
DMI_MTX_IRX_N1 10
DMI_MTX_IRX_N2 10
DMI_MTX_IRX_N3 10
DMI_MTX_IRX_P0 10DMI_MRX_ITX_N0 10DMI_MRX_ITX_P0 10
DMI_MTX_IRX_P1 10DMI_MRX_ITX_N1 10DMI_MRX_ITX_P1 10
DMI_MTX_IRX_P2 10DMI_MRX_ITX_N2 10DMI_MRX_ITX_P2 10
DMI_MTX_IRX_P3 10DMI_MRX_ITX_N3 10DMI_MRX_ITX_P3 10
PCIE_IRX_LOMTX_N328
PCIE_ITX_LOMRX_N3_C28
PCIE_ITX_LOMRX_P3_C28
PCIE_IRX_LOMTX_P328
PCIE_IRX_WLANTX_N234PCIE_IRX_WLANTX_P234PCIE_ITX_WLANRX_N2_C34
PCIE_ITX_WLANRX_P2_C34
PCIE_IRX_WANTX_N134PCIE_IRX_WANTX_P134PCIE_ITX_WANRX_N1_C34
PCIE_ITX_WANRX_P1_C34
ITP_DBRESET#7,39
USB_OC4# 32
USB_OC3# 32
USB_OC5# 32USB_OC6# 32
SATA_DET# 25USB_IDE# 25
LCD_TST19
IDE_RST_MOD25
BT_RADIO_DIS#40
WWAN_RADIO_DIS# 34
USBP4+ 32USBP5- 32
USBP3+ 32
USBP5+ 32
USBP4- 32
USBP3- 32USBP2+ 25USBP2- 25
USBP6+ 32USBP7- 36USBP7+ 36
USBP6- 32
USBP1+ 38USBP1- 38USBP0+ 34USBP0- 34
USB_OC2# 25
PM_EXTTS#1 10
SPI_CS#39ICH_EC_SPI_CLK39
ICHO_ECI_SPI_DATA39ICHI_ECO_SPI_DATA39
IMVP_PWRGD42,49
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
ICH7(3/4)
23 63Tuesday, February 07, 2006
Compal Electronics, Inc.
(PCI Express Wake Event)
Place closely pin U45.AC1
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Within 500 mils
Within 500 mils
close to ICH7-M
Place closely pin U45.B2
<---Docking
<---REAR
<---REAR
<---SIO USB Hub
<---SIDE TOP
<---SIDE BOTTOM
<---Mini2 WLAN
<---D Moudle
MiniWLAN (Mini Card 2)--->
GIGA LAN --->
MiniWWAN (Mini Card 1) --->
R427 24.9_0402_1%~D
1 2
R38
810
K_04
02_5
%~D
12
R37210K_0402_5%~D
1 2
R37910_0402_5%~D@
12
C603 0.1U_0402_16V4Z~D
1 2
R178747_0402_5%~D
1 2
R432 10K_0402_5%~D
1 2
R113 22.6_0402_1%~D 1 2
R1624 10K_0402_5%~D 1 2
R1799 0_0402_5%~D 1 2R1633 10K_0402_5%~D
1 2
R178647_0402_5%~D
1 2
T36PAD~D
R2698.2K_0402_5%~D
1 2
R38
910
K_04
02_5
%~D
12
R1755 10K_0402_5%~D
1 2
R1622 10K_0402_5%~D 1 2
C281 0.1U_0402_16V4Z~D
1 2
C282 0.1U_0402_16V4Z~D
1 2
R38
410
K_04
02_5
%~D
12
C2 0.1U_0402_16V4Z~D
1 2
R35
22.
2K_0
402_
5%~D
12
R296 10K_0402_5%~D
1 2
R1626 10K_0402_5%~D 1 2
R1629 10K_0402_5%~D 1 2
R28010K_0402_5%~D
1 2
SATA
POWER MGT
SYS
SMB
GPIO
Clocks
GPIO
GPIO
U45C
ICH7M A0_BGA652~D
RI#A28
SPKRA19
SYS_RST#A22 SUS_STAT#A27
GPIO0 / BM_BUSY#AB18
GPIO26A21
GPIO27B21GPIO28E23
GPIO32 / CLKRUN#AG18
GPIO33 / AZ_DOCK_EN#AC19GPIO34 / AZ_DOCK_RST#U2
VRMPWRGDAD22
GPIO11 / SMBALERT#B23
SUSCLK C20
SLP_S3# B24SLP_S4# D23SLP_S5# F22
PWROK AA4
GPIO16 / DPRSLPVR AC22
TP0 / BATLOW# C21
PWRBTN# C23
LAN_RST# C19
RSMRST# Y4
GPIO21 / SATA0GP AF19GPIO19 / SATA1GP AH18GPIO36 / SATA2GP AH19GPIO37 / SATA3GP AE19
CLK14 AC1CLK48 B2
GPIO9 E20GPIO10 A20GPIO12 F19GPIO13 E19GPIO14 R4GPIO15 E22GPIO24 R3GPIO25 D20
SATACLKREQ#/GPIO35 AD21GPIO38 AD20GPIO39 AE20
SMBCLKC22SMBDATAB22LINKALERT#A26SMLINK0B25SMLINK1A25
GPIO18 / STPPCI#AC20GPIO20 / STPCPU#AF21
WAKE#F20SERIRQAH21THRM#AF20
GPIO6AC21GPIO7AC18GPIO8E21
T39 PAD~D
PCI-EXPRESS
DIRECT MEDIA INTERFACE
USB
SPI
U45D
ICH7M A0_BGA652~D
SPI_CLKR2SPI_CS#P6SPI_ARBP1
SPI_MOSIP5SPI_MISOP2
DMI0RXN V26DMI0RXP V25DMI0TXN U28DMI0TXP U27
DMI1RXN Y26DMI1RXP Y25DMI1TXN W28DMI1TXP W27
DMI2RXN AB26DMI2RXP AB25DMI2TXN AA28DMI2TXP AA27
DMI3RXN AD25DMI3RXP AD24DMI3TXN AC28DMI3TXP AC27
DMI_CLKN AE28DMI_CLKP AE27
DMI_ZCOMP C25DMI_IRCOMP D25
PERn1F26PERp1F25PETn1E28PETp1E27
PERn2H26PERp2H25PETn2G28PETp2G27
PERn3K26PERp3K25PETn3J28PETp3J27
PERn4M26PERp4M25PETn4L28PETp4L27
PERn5P26PERp5P25PETn5N28PETp5N27
PERn6T25PERp6T24PETn6R28PETp6R27
OC0#D3OC1#C4OC2#D5OC3#D4OC4#E5OC5# / GPIO29C3OC6# / GPIO30A2OC7# / GPIO31B3
USBP0N F1USBP0P F2USBP1N G4USBP1P G3USBP2N H1USBP2P H2USBP3N J4USBP3P J3USBP4N K1USBP4P K2USBP5N L4USBP5P L5USBP6N M1USBP6P M2USBP7N N4USBP7P N3
USBRBIAS# D2USBRBIAS D1
R36
310
K_04
02_5
%~D
12
R1632 10K_0402_5%~D
1 2
R1623 10K_0402_5%~D 1 2
R35
12.
2K_0
402_
5%~D
1
2
R3038.2K_0402_5%~D
1 2
R12610_0402_5%~D@
12
R1625 10K_0402_5%~D 1 2
R34
110
K_04
02_5
%~D
12
R784100K_0402_5%~D
12
C82 0.1U_0402_16V4Z~D@12
R111 8.2K_0402_5%~D
1 2
C1 0.1U_0402_16V4Z~D
1 2
R4258.2K_0402_5%~D
12
R554100K_0402_5%~D
1 2
C602 0.1U_0402_16V4Z~D
1 2
C380
4.7P_0402_50V8C~D@
1
2
R318680_0402_5%~D
1 2
R428 8.2K_0402_5%[email protected]
1 2
R1628 10K_0402_5%~D 1 2
R37310K_0402_5%~D
1 2
R75 10K_0402_5%~D
1 2
C1244.7P_0402_50V8C~D@
1
2
R1627 10K_0402_5%~D 1 2
R1756 10K_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.5VRUN_L
ICH_V5REF_SUS
ICH_V5REF_RUN
ICH_V5REF_RUN
ICH_V5REF_SUS
+1.5V_DMIPLL
+VCCSATAPLL
+3.3V_SUS+1.5V_RUN
+1.5V_RUN
+1.05V_VCCP
+3.3V_RUN_R
+1.5V_RUN
+RTC_CELL
+3.3V_SUS
+1.5V_RUN
+1.5V_RUN
+3.3V_RUN_R+5V_RUN
+3.3V_SUS+5V_SUS
+3.3V_RUN_R
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+3.3V_RUN_R
+3.3V_SUS
+3.3V_RUN_R
+3.3V_RUN_R
+3.3V_SUS
+3.3V_SUS
+1.5V_RUN
+1.5V_RUN
+1.05V_VCCP
+1.5V_RUN
+1.5VRUN_L
+1.5V_DMIPLL
+VCCSATAPLL
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
ICH7(4/4)
24 63Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
CRB is 270uF
C38
71U
_060
3_10
V4Z~
D
1
2
L41
BLM21PG600SN1D_0805~D
1 2
C4551U_0603_10V4Z~D
1
2
C4420.1U_0402_16V4Z~D
1 2
C4070.1U_0402_16V4Z~D
1
2
C3610.1U_0402_16V4Z~D
1
2
R590.5_0603_1%~D
1 2
C45
4
0.1U
_040
2_16
V4Z~
D
1
2
C40
50.
1U_0
402_
16V4
Z~D
1
2
D16RB751S40T1_SOD523-2~D
21
C33
70.
1U_0
402_
16V4
Z~D
1
2
C40
60.
1U_0
402_
16V4
Z~D
1
2
U45F
ICH7M A0_BGA652~D
V5REF[1]G10
V5REF[2]AD17
V5REF_SusF6
Vcc1_5_B[1]AA22Vcc1_5_B[2]AA23Vcc1_5_B[3]AB22Vcc1_5_B[4]AB23Vcc1_5_B[5]AC23Vcc1_5_B[6]AC24Vcc1_5_B[7]AC25Vcc1_5_B[8]AC26Vcc1_5_B[9]AD26Vcc1_5_B[10]AD27Vcc1_5_B[11]AD28Vcc1_5_B[12]D26Vcc1_5_B[13]D27Vcc1_5_B[14]D28Vcc1_5_B[15]E24Vcc1_5_B[16]E25Vcc1_5_B[17]E26Vcc1_5_B[18]F23Vcc1_5_B[19]F24Vcc1_5_B[20]G22Vcc1_5_B[21]G23Vcc1_5_B[22]H22Vcc1_5_B[23]H23Vcc1_5_B[24]J22Vcc1_5_B[25]J23Vcc1_5_B[26]K22Vcc1_5_B[27]K23Vcc1_5_B[28]L22Vcc1_5_B[29]L23Vcc1_5_B[30]M22Vcc1_5_B[31]M23Vcc1_5_B[32]N22Vcc1_5_B[33]N23Vcc1_5_B[34]P22Vcc1_5_B[35]P23Vcc1_5_B[36]R22Vcc1_5_B[37]R23Vcc1_5_B[38]R24Vcc1_5_B[39]R25
Vcc1_5_B[41]T22Vcc1_5_B[42]T23Vcc1_5_B[43]T26Vcc1_5_B[44]T27Vcc1_5_B[45]T28Vcc1_5_B[46]U22Vcc1_5_B[47]U23Vcc1_5_B[48]V22Vcc1_5_B[49]V23Vcc1_5_B[50]W22
Vcc1_5_B[52]Y22Vcc1_5_B[53]Y23
Vcc1_5_B[51]W23
Vcc1_5_B[40]R26
Vcc3_3[1]B27
VccDMIPLLAG28
VccSATAPLLAD2
Vcc3_3[2]AH11
Vcc1_05[1] L11Vcc1_05[2] L12Vcc1_05[3] L14Vcc1_05[4] L16
Vcc1_05[6] L18Vcc1_05[5] L17
Vcc1_05[7] M11Vcc1_05[8] M18Vcc1_05[9] P11
Vcc1_05[10] P18Vcc1_05[11] T11Vcc1_05[12] T18Vcc1_05[13] U11Vcc1_05[14] U18Vcc1_05[15] V11Vcc1_05[16] V12Vcc1_05[17] V14Vcc1_05[18] V16Vcc1_05[19] V17Vcc1_05[20] V18
Vcc3_3 / VccHDA U6
VccSus3_3/VccSusHDA R7
V_CPU_IO[1] AE23V_CPU_IO[2] AE26V_CPU_IO[3] AH26
Vcc3_3[3] AA7Vcc3_3[4] AB12Vcc3_3[5] AB20Vcc3_3[6] AC16Vcc3_3[7] AD13Vcc3_3[8] AD18Vcc3_3[9] AG12
Vcc3_3[10] AG15Vcc3_3[11] AG19
Vcc3_3[12] A5
Vcc3_3[14] B16Vcc3_3[15] B7Vcc3_3[16] C10
Vcc3_3[13] B13
Vcc3_3[17] D15Vcc3_3[18] F9Vcc3_3[19] G11Vcc3_3[20] G12
VccRTC W5
VccSus3_3[1] P7
VccSus3_3[2] A24
VccSus3_3[4] D19VccSus3_3[5] D22VccSus3_3[6] G19
VccSus3_3[3] C24
VccSus3_3[7] K3VccSus3_3[8] K4VccSus3_3[9] K5
VccSus3_3[10] K6VccSus3_3[11] L1
Vcc1_5_A[19] AB17Vcc1_5_A[20] AC17
Vcc1_5_A[21] T7Vcc1_5_A[22] F17Vcc1_5_A[23] G17
Vcc1_5_A[24] AB8Vcc1_5_A[25] AC8
VccSus1_05[1] K7
Vcc1_5_A[1]AB7Vcc1_5_A[2]AC6Vcc1_5_A[3]AC7Vcc1_5_A[4]AD6Vcc1_5_A[5]AE6Vcc1_5_A[6]AF5Vcc1_5_A[7]AF6Vcc1_5_A[8]AG5Vcc1_5_A[9]AH5
Vcc1_5_A[10]AB10Vcc1_5_A[11]AB9Vcc1_5_A[12]AC10Vcc1_5_A[13]AD10Vcc1_5_A[14]AE10Vcc1_5_A[15]AF10Vcc1_5_A[16]AF9Vcc1_5_A[17]AG9Vcc1_5_A[18]AH9
VccSus3_3[19]E3
VccUSBPLLC1
VccSus1_05/VccLAN1_05[1]AA2VccSus1_05/VccLAN1_05[2]Y7
VccSus3_3/VccLAN3_3[1]V5VccSus3_3/VccLAN3_3[2]V1VccSus3_3/VccLAN3_3[3]W2VccSus3_3/VccLAN3_3[4]W7
Vcc3_3[21] G16
VccSus3_3[12] L2VccSus3_3[13] L3VccSus3_3[14] L6VccSus3_3[15] L7VccSus3_3[16] M6VccSus3_3[17] M7VccSus3_3[18] N7
VccSus1_05[2] C28VccSus1_05[3] G20
Vcc1_5_A[26] A1Vcc1_5_A[27] H6Vcc1_5_A[28] H7Vcc1_5_A[29] J6Vcc1_5_A[30] J7
C3390.1U_0402_16V4Z~D
1
2
C3700.1U_0402_16V4Z~D
1
2
C14440.1U_0402_16V4Z~D
1
2
C45
80.
01U
_040
2_16
V7K~
D
1
2
C44
9
0.1U
_040
2_16
V4Z~
D
1
2
C38
80.
1U_0
402_
16V4
Z~D
1
2
C45
9
0.1U
_040
2_16
V4Z~
D
1
2
C382
0.1U_0402_16V4Z~D
1
2
C37
40.
1U_0
402_
16V4
Z~D
1
2
C45
3
0.1U
_040
2_16
V4Z~
D
1
2R535100_0402_5%~D
12
C3930.1U_0402_16V4Z~D
1
2
C461
0.1U_0402_16V4Z~D
1
2
C33
80.
1U_0
402_
16V4
Z~D
1
2
C39
20.
1U_0
402_
16V4
Z~D
1
2
R370.5_0603_1%~D
1 2
C32
80.
1U_0
402_
16V4
Z~D
1
2
C3530.1U_0402_16V4Z~D
1
2
L42BLM18AG601SN1D_0603~D
1 2
C4450.1U_0402_16V4Z~D
1 2
+
C45
033
0U_D
2E_2
.5VM
_R9~
D
1
2
C4360.1U_0402_16V4Z~D
1
2
C4244.7U_0603_6.3V4Z~D
1 2
C474 0.1U_0402_16V4Z~D
1 2
U45E
ICH7M A0_BGA652~D
VSS[0]A4VSS[1]A23VSS[2]B1VSS[3]B8VSS[4]B11VSS[5]B14VSS[6]B17VSS[7]B20VSS[8]B26VSS[9]B28VSS[10]C2VSS[11]C6VSS[12]C27VSS[13]D10VSS[14]D13VSS[15]D18VSS[16]D21VSS[17]D24VSS[18]E1VSS[19]E2VSS[21]E4VSS[22]E8VSS[23]E15VSS[24]F3VSS[25]F4VSS[26]F5VSS[27]F12VSS[28]F27VSS[29]F28VSS[30]G1VSS[31]G2VSS[32]G5VSS[33]G6VSS[34]G9VSS[35]G14VSS[36]G18VSS[37]G21VSS[38]G24VSS[39]G25VSS[40]G26VSS[41]H3VSS[42]H4VSS[43]H5VSS[44]H24VSS[45]H27VSS[46]H28VSS[47]J1VSS[48]J2VSS[49]J5VSS[50]J24VSS[51]J25VSS[52]J26VSS[53]K24VSS[54]K27VSS[55]K28VSS[56]L13VSS[57]L15VSS[58]L24VSS[59]L25VSS[60]L26VSS[61]M3VSS[62]M4VSS[63]M5VSS[64]M12VSS[65]M13VSS[66]M14VSS[67]M15VSS[68]M16VSS[69]M17VSS[70]M24VSS[71]M27VSS[72]M28VSS[73]N1VSS[74]N2VSS[75]N5VSS[76]N6VSS[77]N11VSS[78]N12VSS[79]N13VSS[80]N14VSS[81]N15VSS[82]N16VSS[83]N17VSS[84]N18VSS[85]N24VSS[86]N25VSS[87]N26VSS[88]P3VSS[89]P4VSS[90]P12VSS[91]P13VSS[92]P14VSS[93]P15VSS[94]P16VSS[95]P17VSS[96]P24VSS[97]P27
VSS[98] P28VSS[99] R1
VSS[100] R11VSS[101] R12VSS[102] R13VSS[103] R14VSS[104] R15VSS[105] R16VSS[106] R17VSS[107] R18VSS[108] T6VSS[109] T12VSS[110] T13VSS[111] T14VSS[112] T15VSS[113] T16VSS[114] T17VSS[115] U4VSS[116] U12VSS[117] U13VSS[118] U14VSS[119] U15VSS[120] U16VSS[121] U17VSS[122] U24VSS[123] U25VSS[124] U26VSS[125] V2VSS[126] V13VSS[127] V15VSS[128] V24VSS[129] V27VSS[130] V28VSS[131] W6VSS[132] W24VSS[133] W25VSS[134] W26VSS[135] Y3VSS[136] Y24VSS[137] Y27VSS[138] Y28VSS[139] AA1VSS[140] AA24VSS[141] AA25VSS[142] AA26VSS[143] AB4VSS[144] AB6VSS[145] AB11VSS[146] AB14VSS[147] AB16VSS[148] AB19VSS[149] AB21VSS[150] AB24VSS[151] AB27VSS[152] AB28VSS[153] AC2VSS[154] AC5VSS[155] AC9VSS[156] AC11VSS[157] AD1VSS[158] AD3VSS[159] AD4VSS[160] AD7VSS[161] AD8VSS[162] AD11VSS[163] AD15VSS[164] AD19VSS[165] AD23VSS[166] AE2VSS[167] AE4VSS[168] AE8VSS[169] AE11VSS[170] AE13VSS[171] AE18VSS[172] AE21VSS[173] AE24VSS[174] AE25VSS[175] AF2VSS[176] AF4VSS[177] AF8VSS[178] AF11VSS[179] AF27VSS[180] AF28VSS[181] AG1VSS[182] AG3VSS[183] AG7VSS[184] AG11VSS[185] AG14VSS[186] AG17VSS[187] AG20VSS[188] AG25VSS[189] AH1VSS[190] AH3VSS[191] AH7VSS[192] AH12VSS[193] AH23VSS[194] AH27
D17RB751S40T1_SOD523-2~D
21
C422
0.1U_0402_16V4Z~D
1
2
C34
70.
1U_0
402_
16V4
Z~D
1
2
R53710_0402_5%~D
12
+
C15
1
220U
_V_4
VM_R
45~D
1
2
C28
610
U_0
805_
4VAM
~D
1
2
C41
20.
1U_0
402_
16V4
Z~D
1
2
L10710UH_LB2012T100MR_20%_0805~D
1 2
C46
010
U_0
805_
4VAM
~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
IDE_DDACK#
IDE_DDREQIDE_DIORDY
IDE_IRQ
IDE_DCS1#
IDE_DIOW#
IDE_DCS3#
IDE_DIOR#
IDE_RST_MOD
IDE_DD12
IDE_DA0
IDE_DD12
IDE_DA1
IDE_DD8
IDE_DD5
IDE_IRQ
IDE_DD11
IDE_DD14
IDE_DD4
IDE_DD2
IDE_DD15
IDE_DD1
IDE_DD3
IDE_DD8
IDE_DD13
IDE_DD14
USB_OC2#
IDE_DD13
IDE_DDREQ
IDE_DCS1#
IDE_DD10
IDE_DD3
IDE_DD7
IDE_DD0
IDE_DIOR#
IDE_DDACK#
IDE_DA1
IDE_DA2IDE_DD6
IDE_DD7
IDE_DD6
IDE_DIORDY
IDE_DD9
IDE_DD4
IDE_DA0
IDE_DD9
IDE_DD2
IDE_DIOW#
IDE_DD10
IDE_DD15
IDE_DCS3#
MOD_RST
IDE_DD5
IDE_DD11
CSEL2
IDE_DA2
IDE_DD0
INT_CD_L
INT_CD_R
SATA_DET#
IDE_DD1
BAY_MODPRES#
PSATA_IRX_DTX_N0PSATA_IRX_DTX_P0
PSATA_ITX_DRX_P0PSATA_ITX_DRX_N0
CD_AUDIORET
USB_IDE#
IDE_DIORDY
USBP2-
USBP2+
+3.3V_SUS
+3.3V_ALW
+5VMOD
+5VHDD +3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+5VHDD
IDE_DIOR#22
IDE_DCS1#22
IDE_DA[0..2]22
IDE_DIORDY22
IDE_DCS3#22
IDE_DD[0..15]22
IDE_DIOW#22
IDE_DDREQ22IDE_IRQ22
IDE_DDACK#22
USB_OC2# 23
USB_IDE#23
IDE_RST_MOD23
SATA_DET# 23
BAY_MODPRES#38
PSATA_IRX_DTX_N0_C22
PSATA_ITX_DRX_P022PSATA_ITX_DRX_N022
PSATA_IRX_DTX_P0_C22
USBP2+ 23
USBP2- 23
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
DVD MODULE
25 63Tuesday, February 07, 2006
1
3
6
2
DASP#
PDIAG#
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Pleace near HD CONN
Main SATA +5V Default
close SATA connector
Pleace near HD CONN
WF1F068N
1A
TOP VIEW
5
4
C13
450.
1U_0
402_
16V4
Z~D
@
1
2
C13
220.
1U_0
402_
16V4
Z~D
@
1
2
C13
024.
7U_0
603_
6.3V
4Z~D
1
2
C13
1510
U_0
805_
10V4
Z~D
@
1
2
C13
200.
1U_0
402_
16V4
Z~D
@
1
2
C13
170.
1U_0
402_
16V4
Z~D
@
1
2
C13
1010
U_0
805_
10V4
Z~D
1
2
JSATA
TYCO_1775191-1_RV~D
GND1 23GND2 24
GND1RX+2RX-3GND4TX-5TX+6GND7
3.3V83.3V93.3V10GND11GND12GND135V145V155V16GND17Reserved18GND1912V2012V2112V22
R1331100K_0402_5%~D
1 2
R1330100K_0402_5%~D
1 2
R13
2847
0_04
02_5
%~D
12
C13
1610
00P_
0402
_50V
7K~D
@
1
2
C13233900P_0402_50V7K~D
12
C1313
1U_0603_10V4Z~D
1
2
JMOD
TYCO_1770530-1~D
8.3
1 122
3 344
5 566
7 788
9 91010
11 111212
13 131414
15 151616
17 171818
19 192020
21 212222
23 232424
25 252626
27 272828
29 293030
31 313232
33 333434
35 353636
37 373838
39 394040
41 414242
43 434444
45 454646
47 474848
49 495050
51 515252
53 535454
55 555656
57 575858
59 596060
61 616262
63 636464
65 656666
67 676868
G71
G72
G69
G70
C13
1110
00P_
0402
_50V
7K~D
1
2
C13
050.
1U_0
402_
16V4
Z~D
1
2C13
030.
1U_0
402_
16V4
Z~D
1
2
C13
120.
1U_0
402_
16V4
Z~D
1
2
C1318
1U_0603_10V4Z~D
@
1
2
C13193900P_0402_50V7K~D 12
R512 4.7K_0402_5%~D
1 2
R132933_0402_5%~D
1 2
C13
210.
1U_0
402_
16V4
Z~D
@
1
2
C13
040.
1U_0
402_
16V4
Z~D
1
2
C13
140.
1U_0
402_
16V4
Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AUDIO_AVDD_ON TPS793475_BYPASS
ICH_SDOUT_AUDIO
CAP2
HP_NB_SENSE
AC97VREFI
PC_BEEPZ2402 Z2404
HP_NB_SENSE
EAPD
AC97VREFI
SENSE_A
DOCK_HP_MUTE#
ICH_AC_SDIN0_R
+Z2401
CAP2ICH_AC_BITCLK
SPDIF_DOCK
SPDIF_SHDN
+VDDA+3.3V_RUN
+VDDA+5V_SUS
+5V_RUN
+VDDA
+VDDA
VREFOUT
ICH_RST_AUDIO#22
ICH_SYNC_AUDIO22
ICH_SDOUT_AUDIO22
ICH_AC_BITCLK22
AUDIO_AVDD_ON38
ICH_AC_SDIN022
SPDIF_DOCK36
SPDIF_SHDN38
MIC_SWITCH 27
AUD_LINE_OUT 27
INT_MIC 27
BEEP38
SPKR23PC_BEEP 27
HP_NB_SENSE27,38
DOCK_HP_MUTE#38
EAPD27
NB_MICIN_L 27
NB_MICIN_R 27
HP_OUT_R 27
HP_OUT_L 27
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Azalia (HD) Codec
26 63Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+VDDA=4.75V
Close to U10.20
Close to U10.5
W=30 mil
Close to U10.3
STAC9200 Rev.
CA1
B1
R22 R109
5.11K 10K
39.2K 20K
Close to U10.18
TRACE>15 mil
45
2
single gate TTL
31
From SIO
Default POP the LDO U22When U22 is popped, no pop L47.
Note:U28,R496,R162,C529 place as close as U19
C49
80.
1U_0
402_
16V4
Z~D
1
2
G
D
SQ442N7002W-7-F_SOT323~D
2
13
R49610K_0402_5%~D
1 2
C179
0.1U_0402_16V4Z~D
1 2
C48
61U
_060
3_10
V4Z~
D
1
2
C49
20.
047U
_040
2_16
V4Z~
D
1
2
C17
61U
_060
3_10
V4Z~
D
1
2
C18
2610
U_0
805_
10V4
Z~D
1
2
C16
90.
1U_0
402_
16V4
Z~D
1
2
R36122_0402_5%~D @
12
C18
11U
_060
3_10
V4Z~
D
1
2
R160 33_0402_5%~D
1 2
C48
72.
2U_0
603_
6.3V
6K~D
1
2
R22
39.2
K_0
402_
1%~D
12
R17685.1K_0402 _1%~D
12
R89 2.2K_0402_5%~D
1 2
R109
20K_0402_1%~D
12
C18
250.
1U_0
402_
16V4
Z~D
1
2
C189 0.1U_0402_16V4Z~D 1 2
C36222P_0402_50V8J~D@
1
2
C1780 1000P_0402_50V7K~D
1 2
STAC9200
U10
STAC9200X5NAEB1XR_QFN32~D
SDATA_OUT2
BIT_CLK3
SYNC7
RESET#8
SPDIF _OUT32
CAP220
VREF_OUT19
VREF_IN18
AVD
D26
AVSS
117
AVSS
229
SPDIF _ IN/EAPD /GPIO331
SENSE_A 9
SDATA_IN5
LINE_IN_L 15
LINE_IN_R 16
CD_L 10
CD_R 12
HP_L 27
HP_R 28
LOUT_L 23
LOUT_R 24
MONO_OUT 25
DVD
D6
DVS
S4
GPIO021
GPIO122
GPIO230
MIC1 13
MIC2 14
NC11NC211
PAD
_GN
D33
R1622.2K_0402_5%~D
12
U22
TPS793475DBVRG4_SOT23-5~D
OUT 5
BYPASS 4
GND2
EN3
IN1
C1781 1000P_0402_50V7K~D
1 2
C50
02.
2U_0
603_
6.3V
6K~D
1
2
R48847_0402_5%~D@
12
C51
00.
1U_0
402_
16V4
Z~D
1
2
C49
11U
_060
3_10
V4Z~
D
1
2
L47
BLM18AG601SN1D_0603~D
@ 1 2
U28
SN74AHCT1G86DCKR_SC70-5~D
A1
B2 Y 4
P5
G3
C50
50.
047U
_040
2_16
V4Z~
D
1
2
C50
60.
1U_0
402_
16V4
Z~D
1
2
C49522P_0402_50V8J~D@
1
2
C5390.1U_0402_16V4Z~D
1
2
G
D
S Q542N7002W-7-F_SOT323~D
2
13
C5290.1U_0402_16V4Z~D
1 2
C52
30.
1U_0
402_
16V4
Z~D
1
2
R480_0402_5%~D
@
1 2
R96 2.2K_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AUD_GAIN0
AUD_GAIN1
HP_NB_SENSE
C1P
C1N
HP_SPK_L1
PVSS
HP_SPK_R1
INT_SPK_R2
+5VAMPVCC
BYPASS
PC_BEEP
RIN-
AUD_GAIN0
AUD_GAIN1
INT_SPK_R1
INT_SPK_R2
HP_SPK_R2
AUD_LINE_IN_L
HP_SPK_R1
HP_SPK_L1 HP_SPK_L2
MIC_L1
MIC_R1 MIC_R2
MIC_L2MIC_BIAS
INT_MIC+
INT_MIC-
MIC_BIAS
INT_SPK_R1
AUD_LINE_IN_R
SPK_SHUTDOWN#
+5VAMPVCC
+3.3V_RUN
+5V_SUS +5VAMPVCC
+3VRUN_4411
+3.3V_RUN
VREFOUT
+3.3V_RUN
+VDDA
+VDDA
+VDDA
+VDDA
+3.3V_RUN
HP_OUT_L26
HP_OUT_R26
AUD_LINE_OUT26
HP_NB_SENSE26,38
MIC_SWITCH26
NB_MICIN_R26
NB_MICIN_L26
INT_MIC 26INT_MIC+32
INT_MIC-32
PC_BEEP26
NB_MUTE38 EAPD26
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
AMP and PHONE JACK
27 63Tuesday, February 07, 2006
Compal Electronics, Inc.
Gain Setting
GAIN0 INPUTAV(inv)GAIN1
21.6dB
15.6dB
6dB
1
0
10dB
25K ohm
45K ohm
70K ohm
90K ohm
IMPEDANCE
11
0
0
0
*
1
Speaker Connector
15 mils trace
W=40mils
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
NOTE: SPEAKER TRACE WIDTHSHOULD BE MINIMUM 10 MILS
C56
510
00P_
0402
_50V
7K~D
@
1
2C48510U_0805_10V4Z~D
1
2
C53
60.
047U
_040
2_16
V4Z~
D
1
2
C1132.2U_0603_6.3V6K~D
1
2
R1784100K_0402_5%~D
1 2
C17
9347
P_0
402_
50V8
J~D
1
2
R1775100K_0402_5%~D
12
L16BLM18AG121SN1D_0603~D
12
R17811K_0402_5%~D
12
R17
7610
0K_0
402_
5%~D
12
R17
714.
7K_0
402_
5%~D
12
C56
610
00P_
0402
_50V
7K~D
@
1
2
U19
TPA6017A2PWP_TSSOP20~D
GN
D4
1G
ND
311
GN
D2
13G
ND
120
VDD
16PV
DD
115
RIN-17
BYPASS 10
NC 12
LOUT- 8
LOUT+ 4
ROUT- 14
ROUT+ 18
RIN+7
LIN-5
LIN+9
GAIN0 2
GAIN1 3
PVD
D2
6
SHUTDOWN19
PAD_GND 21
R17831K_0402_5%~D
12
R1711K_0402_5%~D@
12
C17752.2U_0603_6.3V6K~D
1 2
L17BLM18AG121SN1D_0603~D
12
C537
0.47U_0402_16V4Z~D
1
2
L108BLM18AG121SN1D_0603~D
12
L45
BLM21PG600SN1D_0805~D
1 2
R1779100K_0402_5%~D
1 2
L52BLM18AG601SN1D_0603~D
1 2
G
D
S
Q112N7002W-7-F_SOT323~D@2
13
C29
347
P_0
402_
50V8
J~D
1
2
C1794
2.2U_0603_6.3V6K~D
1 2
C199
0.022U_0402_16V7K~D
12
G
D
S Q432N7002W-7-F_SOT323~D
2
13
C1792
0.047U_0402_16V4Z~D
12
JAUDIO
FOX_JA9033L-B1N6-7F~D
12
3
4
5
6
78
R17
6910
0K_0
402_
5%~D
12
R1641K_0402_5%~D
12
R132100K_0402_5%~D
12
C49
347
P_0
402_
50V8
J~D
1
2
R17801K_0402_5%~D
12
C1471U_0603_10V4Z~D
1 2
R17704.99_0402_1%~D
12
R21404.99_0402_1%~D
12
R1701K_0402_5%~D @
12
C15
310
0P_0
402_
50V8
J~D
1
2
C1142.2U_0603_6.3V6K~D
1
2
R17
7420
K_04
02_1
%~D
12
R177810K_0402_5%~D
1 2
R17
724.
7K_0
402_
5%~D
12
C148 1U_0603_10V4Z~D
1 2
C10
9
100P
_040
2_50
V8J~
D
1
2
C4940.1U_0402_16V4Z~D
1
2
R156
100K_0402_5%~D
12
C1795
1U_0603_10V4Z~D
1 2
R17821K_0402_5%~D
12
C17962.2U_0603_6.3V6K~D
1
2
C18002.2U_0603_6.3V6K~D
12
U9BLM358DR2G_SOIC8~D
P8
IN+ 5
IN- 6G4
O7
C5020.1U_0402_16V4Z~D
1
2
C50
147
P_0
402_
50V8
J~D
1
2
C1791
0.047U_0402_16V4Z~D
12
C17990.1U_0402_16V4Z~D
1 2
C17980.1U_0402_16V4Z~D
1 2
U5
MAX4411ETP+_TQFN20~D
C1P1
PGN
D2
C1N3
NC-4 4
PVss
5
NC-6 6
SVss
7
NC-8 8
OUTL 9
SVD
D10
INR15
SHDNR#14
INL13
NC-12 12
OUTR 11
NC-20 20
PVD
D19
SHDNL#18
SGN
D17
NC-16 16
JSPK
MOLEX_53398-0271~D
1122
C5341U_0603_10V4Z~D
1
2
JMIC
FOX_JA9033L-B1N6-7F~D
12
3
4
5
6
78
L15BLM18AG121SN1D_0603~D
12
R17
7320
K_04
02_1
%~D
12
C1462.2U_0603_6.3V6K~D
1
2
R1651K_0402_5%~D
12
U9ALM358DR2G_SOIC8~D
P8
IN+3
IN-2 G4
O 1
C18012.2U_0603_6.3V6K~D
12
R177710K_0402_5%~D
1 2
C17
710
0P_0
402_
50V8
J~D
1
2
C10
810
0P_0
402_
50V8
J~D
1
2
C17970.1U_0402_16V4Z~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_LOM
CLK_PCIE_LOM#
LAN_TX3+
PLTRST#
LAN_TX3-
LOM_CS#
LOM_SI
LPC_LAD1
LAN_ACT#
XTALI
PCIE_IRX_LOMTX_P3_C
LPC_LAD0
LOM_SO
IRQ_SERIRQ
LAN_TX1-
LAN_TX2+
LPC_LFRAME#
PCIE_IRX_LOMTX_N3_C
REGCTL_PNP25
REGCTL_PNP12
LOM_SCLK
LAN_TX0-
LAN_TX1+
XTALO
LPC_LAD3
REGCTL_PNP12
CLK_PCIE_LOM
LINK_100#
LAN_TX2-
PCIE_WAKE#
LINK_10#
LAN_TX0+
PLTRST#
LPC_LAD2
CLK_PCI_LOM
LOM_SI
LOM_CS#
LOM_SCLKLOM_SO
LOM_CABLE_DETECT
TPM_GPIO1TPM_GPIO2
TPM_GPIO0
LOM_CLKREQ#
REGCTL_PNP25
+3VLAN
+3.3V_SRC
+2.5VLAN
PCIE_PLLVDD
XTALVDD
AVDD
+3VLAN
+1.2VLAN
GPHY_PLLVDDAVDDL
GPHY_PLLVDD
PCIE_PLLVDD
PCIE_SDS_VDD
+1.2VLAN
BIASVDD
XTALVDD
+2.5VLAN
AVDD
+2.5VLAN
+1.2VLAN
+3VLAN
+3VLAN
+3VLAN
+2.5VLAN
AVDDL
PCIE_SDS_VDD
BIASVDD
+1.2VLAN
+1.2VLAN
+3VLAN
+3VLAN
+3.3V_RUN_R
+3VLAN
+3VLAN
+3VLAN
+2.5VLAN
+3VLAN
PCIE_WAKE# 34,38CLK_PCIE_LOM# 6CLK_PCIE_LOM 6
LAN_TX3- 29
LAN_TX1- 29
LAN_TX3+ 29
LAN_TX2- 29LAN_TX1+ 29
LAN_TX0- 29LAN_TX0+ 29
ENAB_3VLAN41
PCIE_IRX_LOMTX_P3 23
PCIE_ITX_LOMRX_N3_C 23
PCIE_IRX_LOMTX_N3 23
PCIE_ITX_LOMRX_P3_C 23
LAN_TX2+ 29
LAN_ACT#29
LINK_10#29LINK_100#29
CLK_PCI_LOM6
ICH_SMBCLK6,23,34ICH_SMBDATA6,23,34
PLTRST# 10,21,23,34,52
LPC_LFRAME#22,38,39
IRQ_SERIRQ23,30,38,39PLTRST#10,21,23,34,52
LPC_LAD[0..3]22,38,39
LOM_CABLE_DETECT38
LAN_TPM_EN#38
LAN_LOW_PWR 38
LAN_LOW_PWR38
LOM_CLKREQ#6
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
BCM5751M
28 63Tuesday, February 07, 2006
1C4
MMJT9435
B
C2
3
E
Layout Notice : 1.2V filter. Place as closechip as possible.
Layout Notice : Place as closechip as possible.
Layout Notice : No highspeed signal should berouted near RDAC or onadjacent layer to RDAC
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARYAtmel AT45BCM021B
ST M45PE20
NV_STRAP1 NV_STRAP0 SO SI CS# SCLK
0
1
0 0
0 0 0
1
1
1 1
1
Place closely pin J8
Pop C1375 for 5752-A0,De-pop for 5752-A1
R7, R9 are 1/2 W rating
R13 4.7K_0402_5%~D@1 2
C13834.7U_0603_6.3V4Z~D
1
2
U188
AT45BCM021B-SU_SO8~D
@
SI 1SCK 2
RESET# 3CS# 4
SO8GND7VCC6WP#5
C13
530.
1U_0
402_
16V4
Z~D
1
2
C13910.1U_0402_16V4Z~D
@
1
2
R1368
0_0603_5%~D
12
BCM5752
Analogpower
PLL
GND
Digial power
BIAS
U214B
BCM5752KFBG A2_FPBGA144~D
VDDC_0D5
VDDC_4H5VDDC_5H6VDDC_6H8VDDC_7J4
VDDIO_3F1VDDIO_4G10VDDIO_5J2VDDIO_6L1VDDIO_7L12
VSS_4 E6VSS_5 E7VSS_6 E8VSS_7 E9VSS_8 F4VSS_9 F5
VSS_10 F6VSS_11 F7VSS_12 F8VSS_13 F9VSS_14 G5VSS_15 G6VSS_16 G7VSS_17 G8VSS_18 L2VSS_19 L6VSS_20 M6
NC_7 D2NC_8 D3NC_9 E1
NC_10 E2NC_11 F2
VDDC_3D8 VDDC_2D7 VDDC_1D6
VSS_3 E5VSS_2 E4VSS_1 B10VSS_0 B2
NC_18 J10
VDDP_0A5VDDP_1G3VDDP_2L11
XTALVDDH12
PCIE_SDSVDDK4
AVDDL_0F10AVDDL_1F11
AVDD_0A11AVDD_1F12
PCIE_PLLVDDK6
GPHY_PLLVDDG12
BIASVDDA12
NC_12 G1
NC_0 A1NC_1 A6NC_2 A7NC_3 B7NC_4 C1NC_5 C3NC_6 D1
NC_13 G2NC_14 G9NC_15 H1NC_16 H2NC_17 H10
NC_19 K1NC_20 K2NC_21 K3NC_22 K5NC_23 K7NC_24 K8NC_25 K10NC_26 K11NC_27 L4NC_28 L8NC_29 M8
VDDIO_0A3VDDIO_1C2VDDIO_2D10
C13854.7U_0603_6.3V4Z~D
1
2
LPC/TPM
Media
GPIO
BCM5752
Power
PCI-E
TEST
LED
Bias
Clock
Control
Regulator
Control
SPI
SMBUS
U214A
BCM5752KFBG A2_FPBGA144~D
TRD3+ B11TRD3- B12TRD2+ C11TRD2- C12TRD1+ D11TRD1- D12TRD0+ E11TRD0- E12
LCLKJ8
LAD0J7LAD1L10LAD2J5LAD3K9
LFRAMEJ9LRESETM10SERIRQH7
GPIO0H9GPIO1H11GPIO2C5
SMB_CLKC8SMB_DATAC7
SERIAL_DI J1SERIAL_DO M4
SIE10 SCLKC9
SOD9CSC10
PERST B1
REGCTL12 J11
REGCTL25 M11
REGSEN25 M12
LINKLEDA9SPD100LEDB9SPD1000LEDA10TRAFFICLEDB8
PCIE_TXDN M3
PCIE_TXDP L3
PCIE_RXDN L7
PCIE_RXDP M7
WAKE A4REFCLK- L5REFCLK+ M5
VAUXPRSNT B6
TCK B5TDI F3
TDO B4TMS E3
TRST D4
RDAC A8
XTALIL9
XTALOM9
REFCLK_SEL B3
LOW_PWR H4
REGSUP12 K12
REGSEN12 J12GPIO3C4
GPHY_TVCOI C6
ATTN_BTTN A2TPM_GPIO0G4
TPM_GPIO2H3 TPM_GPIO1J3
TPM_ENJ6 VMAINPRSNT G11
NV_STRAP1M1 NV_STRAP0M2
C13
570.
1U_0
402_
16V4
Z~D
1
2
C13
93
27P
_040
2_50
V8J~
D
1
2
S
GD
Q62SI3456BDV-T1-E3_TSOP6~D
36
245
1
R11 1K_0402_5%~D
12
C1362
4.7U_0603_6.3V
4Z~D
1
2
R7039K_0402_5%~D@1 2
L60
BLM18AG601SN1D_0603~D
12
C13880.1U_0402_16V4Z~D
1
2R18 4.7K_0402_5%~D@
1 2
X425MHZ_18PF_1BX25000CK1D~D
1 2
R7
2_12
10_5
%~D
12
C13760.1U_0402_16V4Z~D
1
2
C1361
0.1U_0402_16V4Z~D
1
2
R6820K_0402_5%~D @
1 2
R17 0_0402_5%~D
12
C7822P_0402_50V8J~D
@
1
2
R1367
200_0402_1%~D
12
R1583 10K_0402_5%~D
12
R1586 4.7K_0402_5%~D@12 R10 1K_0402_5%~D
12
C13860.1U_0402_16V4Z~D
1
2
L62
BLM18AG601SN1D_0603~D
12
Q63MMJT9435T1G_SOT223~D
1
23
4
C13
670.
1U_0
402_
16V4
Z~D
1
2
C13
634.
7U_0
603_
6.3V
4Z~D
1
2
R13
654.
7K_0
402_
5%~D
12
L63
BLM18AG601SN1D_0603~D
12
R13
664.
7K_0
402_
5%~D
@
12
L65
BLM18AG601SN1D_0603~D
12
R14 4.7K_0402_5%~D
1 2
C13
540.
1U_0
402_
16V4
Z~D
1
2
R13604.7K_0402_5%~D@
1 2
C13
660.
1U_0
402_
16V4
Z~D
1
2
C13
650.
1U_0
402_
16V4
Z~D
1
2
L61
BLM18AG601SN1D_0603~D
12
C1743
10U_0805_10V4Z~D
1
2
R534.7K_0402_5%~D @1 2
R1268 4.7K_0402_5%~D@1 2
R120
0_0603_5%~D
1 2 C13
510.
1U_0
402_
16V4
Z~D
1
2
R9
2_12
10_5
%~D
12
C1370
0.1U_0402_16V4Z~D
1
2
R7822_0402_5%~D
@
12
C1375470P_0402_50V7K~D@
1
2
C13
520.
1U_0
402_
16V4
Z~D
1
2
R58
0_0402_5%~D
@12
C1740
0.1U_0402_16V4Z~D
1
2
C13790.1U_0402_16V4Z~D
1 2
C1368
0.1U_0402_16V4Z~D
1
2
U3
M45PE20-VMN6TP_SO8~D
D 1C 2
RESET# 3S# 4
Q8VSS7VCC6W#5
C13820.1U_0402_16V4Z~D
1
2
C13904.7U_0603_6.3V4Z~D
@
1
2
Q68
MBT35200MT1G_TSOP6~D 3
41 2 5 6
R12674.7K_0402_5%~D
1 2
C13
580.
1U_0
402_
16V4
Z~D
1
2
C13840.1U_0402_16V4Z~D
1
2
R1584 10K_0402_5%~D
12
C13
550.
1U_0
402_
16V4
Z~D
1
2
C1371
0.1U_0402_16V4Z~D
1
2C
1741
4.7U_0603_6.3V
4Z~D
1
2
C800.1U_0402_16V4Z~D@
1
2
R1585 10K_0402_5%~D
12
C13
560.
1U_0
402_
16V4
Z~D
1
2
C1369
10U_0805_10V4Z~D
1
2
L64
BLM18AG601SN1D_0603~D
12
C13770.1U_0402_16V4Z~D
1 2
R16 0_0402_5%~D@1 2
C13
640.
1U_0
402_
16V4
Z~D
1
2
R1439 4.7K_0402_5%~D
12
C1392
0.1U_0402_16V4Z~D
1
2
R1364
1.18K_0402_1%~D
12
C13874.7U_0603_6.3V4Z~D
1
2
C13780.1U_0402_16V4Z~D
1
2
C13
94
27P
_040
2_50
V8J~
D
1
2
C1742
0.1U_0402_16V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DOCKED
LAN_TX2- LAN_TX2-R
LAN_TX2+ LAN_TX2+R
LAN_TX3- LAN_TX3-R
LAN_TX3+ LAN_TX3+R
SW_LAN_TX3+SW_LAN_TX3-
SW_LAN_TX2+SW_LAN_TX2-
SW_LAN_TX1+SW_LAN_TX1-
SW_LAN_TX0+SW_LAN_TX0-
DOCK_LAN_TX0-
DOCK_LED_100#DOCK_LED_10#
DOCK_LAN_TX1-DOCK_LAN_TX1+
LINK_LED100#
DOCK_LAN_TX0+
DOCK_LAN_ACTLED_YEL#
DOCK_LAN_TX2+
DOCK_LAN_TX3+DOCK_LAN_TX3-
DOCK_LAN_TX2-
LAN_ACT#
LINK_100#
LINK_LED10#
LINK_LED100#
LAN_LEDACT# LAN_ACTLED_YEL_R#
LED_10_GRN_R#
LED_100_ORG_R#
LAN_TX3-LAN_TX3+
LAN_TX2-LAN_TX2+
LAN_TX1+
LAN_TX0+LAN_TX0-
LAN_TX1-
LINK_10#
LINK_LED10#LAN_LEDACT#
LAN_TX0+
LAN_TX1+ LAN_TX1+R
LAN_TX1- LAN_TX1-R
LAN_TX0+R
LAN_TX0- LAN_TX0-R
+3VLAN
+3VLAN
DOCKED36,38
LAN_TX0-28
LAN_TX0+28
LAN_TX1-28
LAN_TX1+28
LAN_TX2-28
LAN_TX2+28
LAN_TX3-28
LAN_TX3+28
LAN_ACT#28LINK_10#28LINK_100#28
DOCK_LAN_TX0- 36
DOCK_LAN_TX1- 36DOCK_LAN_TX1+ 36
DOCK_LAN_TX0+ 36
DOCK_LAN_TX2+ 36
DOCK_LAN_TX3+ 36
DOCK_LAN_TX2- 36
DOCK_LAN_TX3- 36
DOCK_LAN_ACTLED_YEL# 36DOCK_LED_10# 36DOCK_LED_100# 36
SW_LAN_TX0+ 32SW_LAN_TX0- 32
SW_LAN_TX1+ 32SW_LAN_TX1- 32
SW_LAN_TX2+ 32SW_LAN_TX2- 32
SW_LAN_TX3+ 32SW_LAN_TX3- 32
LAN_ACTLED_YEL_R# 32
LED_10_GRN_R# 32
LED_100_ORG_R# 32
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
LAN TRANSFOMER
29 63Tuesday, February 07, 2006
TODOCKFROM NIC DOCKED
1: TO DOCK0: TO RJ45
LAN ANALOGSWITCH
Layout Notice : Place bead asclose PI3L500 as possible
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Layout Notice : Placetermination as close asASIC as possible
The resistors need atleast 1/16W
C1395 0.1U_0402_16V4Z~D
1 2
L74 36NH_0603CS-360EJTS_5%_0603~D
1 2
C1398 0.1U_0402_16V4Z~D
1 2
R1376 49.9_0402_1%~D
1 2
L73 36NH_0603CS-360EJTS_5%_0603~D
1 2
U189
PI3L500E_TQFN56~D
SEL17
A02
A13
A27
A38
A411
A512
A614
0B1 48
0B2 46
1B1 47
1B2 45
2B1 43
2B2 41
3B1 42
3B2 40
4B1 37
4B2 35
5B1 36
5B2 34
6B1 32
6B2 30
7B1 31
7B2 29
A715
LED019LED120LED254
0LED1 22
0LED2 25
1LED1 23
1LED2 26
2LED1 52
2LED2 51PAD_GND57
VDD
04
VDD
110
VDD
218
VDD
327
VDD
438
VDD
550
VDD
656
GN
D0
1G
ND
16
GN
D2
9G
ND
313
GN
D4
16G
ND
521
GN
D6
24G
ND
728
GN
D8
33G
ND
939
GN
D10
44G
ND
1149
GN
D12
53G
ND
1355
NC5
R1377 49.9_0402_1%~D
1 2
R1382
150_0402_5%~D
1 2
R1371 49.9_0402_1%~D
1 2
L75 36NH_0603CS-360EJTS_5%_0603~D
1 2
L70 36NH_0603CS-360EJTS_5%_0603~D
1 2
L72 36NH_0603CS-360EJTS_5%_0603~D
1 2
R13
81
10K_
0402
_5%
~D @12
R1385
150_0402_5%~D
1 2
L71 36NH_0603CS-360EJTS_5%_0603~D
1 2
R1384
150_0402_5%~D
1 2
L68 36NH_0603CS-360EJTS_5%_0603~D
1 2
R1372 49.9_0402_1%~D
1 2
R1374 49.9_0402_1%~D
1 2
R13
80
10K_
0402
_5%
~D @12R
1379
10K_
0402
_5%
~D @12
R1373 49.9_0402_1%~D
1 2
L69 36NH_0603CS-360EJTS_5%_0603~D
1 2
R1370 49.9_0402_1%~D
1 2
R1375 49.9_0402_1%~D
1 2C1399 0.1U_0402_16V4Z~D
1 2
C1400 0.1U_0402_16V4Z~D
1 2
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CBS_CCLK
PCI_AD17
CBS_SLATCH
PCI_AD4
PCI_RST#
PCI_C_BE0#
PCI_IRDY#
PCI_AD8
PCI_RST#
CBS_RSVD/D2
CBS_CGNT#
CBS_CSTSCHNG
CBS_CSERR#
CBS_CPAR
CBS_CC/BE1#
CBS_CSTOP#
CBS_CC/BE0#
CBS_CPERR#
PCI_C_BE2#
PCI_AD9
PCI_AD18
PCI_AD24
PCI_AD31
PCI_DEVSEL#
PCI_C_BE1#
PCI_AD14
PCI_AD23
PCI_AD25
PCI_AD0
PCI_AD3
PCI_AD29
CLK_PCI_PCM
CBS_CAUDIO
PCI_AD20
PCI_AD7
PCI_PIRQC#
PCI_C_BE3#
PCI_AD30
PCI_PAR
PCI_TRDY#
PCI_AD22
PCI_AD6
PCI_AD19
CBS_SATA
CBS_CCD1#CBS_CVS2
CBS_IDSEL
PCI_AD2
PCI_FRAME#
PCI_AD27
CBS_CDEVSEL#
PCI_AD5
CBS_CBLOCK#
CBS_CC/BE2#
CBS_CCD2#
PCI_AD11PCI_AD10
PCI_AD12
PCI_AD26
PCI_AD1
PCI_AD13
CBS_CREQ#
CBS_CC/BE3#
CBS_RSVD/A18
CBS_CFRAME#
CBS_RSVD/D14
CLKRUN#
CBS_CTRDY#
PCI_AD16
CBS_CINT#
CBS_CCLKRUN#CBS_CRST#
CBS_CVS1
CBS_SCLK
PCI_AD17
PCI_AD28
CBS_CIRDY#
PCI_GNT1#
PCI_AD15
PCI_AD21
PCI_STOP#
PCI_PERR#
PCI_REQ1#
IRQ_SERIRQ
CBS_CAD7
CBS_CAD1
CBS_CAD25
CBS_CAD0
CBS_CAD2
CBS_CAD28
CBS_CAD21
CBS_CAD9
CBS_CAD30CBS_CAD31
CBS_CAD20
CBS_CAD12
CBS_CAD27
CBS_CAD4
CBS_CAD10
CBS_CAD18
CBS_CAD8
CBS_CAD11
CBS_CAD29
CBS_CAD24
CBS_CAD3
CBS_CAD15
CBS_CAD26
CBS_CAD23CBS_CAD22
CBS_CAD19
CBS_CAD17CBS_CAD16
CBS_CAD14CBS_CAD13
CBS_CAD6CBS_CAD5
CLK_PCI_PCM
CBS_CAD0
CBS_CINT#
CBS_CAD5CBS_CAD3CBS_CAD1
CBS_CCLK
CBS_CCLKRUN#
CBS_CAD11CBS_CAD9
CBS_CAD7
CBS_CAD14
CBS_CAD21
CBS_CAD20CBS_CAD18
CBS_CAD12
CBS_CAD22
CBS_CAD25
CBS_CAD24
CBS_CAD27
CBS_CAD23
CBS_CAD26
CBS_CC/BE2#
CBS_CC/BE1#
CBS_CC/BE0#
CBS_CAD29
CBS_CPAR
CBS_CIRDY#
CBS_RSVD/D2
CBS_CPERR#CBS_CGNT#
CBS_RSVD/D14
CBS_CAD2CBS_CCD1#
CBS_CAD4CBS_CAD6
CBS_CAD8
CBS_CVS1
CBS_CAD15
CBS_CAD15
CBS_CAD13
CBS_CAD13
CBS_CAD10
CBS_CCD2#
CBS_CAD30CBS_CAD31
CBS_CSTSCHNGCBS_CAUDIO
CBS_CAD28
CBS_CRST#
CBS_CC/BE3#
CBS_CSERR#CBS_CREQ#
CBS_CVS2
CBS_CAD17CBS_CAD19
CBS_CTRDY#CBS_CFRAME#
CBS_CSTOP#CBS_CDEVSEL#
CBS_CBLOCK#
CBS_CAD16CBS_RSVD/A18
CBS_CCD1#CBS_CCD2#CBS_CVS1CBS_CVS2
+3.3V_RUN
+3.3V_RUN
+5V_RUN
+3.3V_RUN+3.3V_RUN
+CBS_VCC
+CBS_VCC +CBS_VCC
SYS_PME#35,38
PCI_PIRQC#21IRQ_SERIRQ23,28,38,39
CLKRUN#23,38,39
PCI_AD[0..31]21,35
PCI_C_BE3#21,35
PCI_C_BE1#21,35PCI_C_BE0#21,35
PCI_C_BE2#21,35
PCI_PAR21,35
PCI_PERR#21,35
PCI_REQ1#21PCI_GNT1#21
PCI_RST#21,31,35
CLK_PCI_PCM6PCI_DEVSEL#21,35PCI_FRAME#21,35,36PCI_IRDY#21,35,36PCI_TRDY#21,35PCI_STOP#21,35
USB_HUBP1+ 38USB_HUBP1- 38
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Card Bus OZ601
30 63Tuesday, February 07, 2006
22K TO 47K PULL-UP & PULL-DOWN RESISTORS AREREQUIRED TO BE CONNECTED TO PINS 123 & 124 TO
THE TABLE BELOW SHOWS THE 4 POSSIBLE COMBINATIONS.
IDSEL SELECT POWER-ON-STRAPPING(SEE NOTE & TABLE FOR OPTIONS)
NOTE: IDSEL SELECTION!THIS DEVICE UTILIZES A "SELECTABLE IDSEL" SCHEME.IDSEL CAN BE CONNECTED INTERNALLY TO ONE OF THREEPCI AD LINES OR EXTERNAL IDSEL SIGNAL.
SELECT ONE OF THE 4 POSSIBLE IDSEL CONNECTIONS.
CONFIGURING IDSEL TO BE INTERNALLY CONNECTED ALLOWSFOR A FULL PARALLEL POWER MODE. IF AN EXTERNALLYCONNECTED IDSEL IS REQUIRED THEN AN INVERTER MUSTBE CONNECTED TO VPP_PGM TO CREATE VPP_VCC.
22K TO 47K PULL-UPS MUST BE PLACEDON INTA#, PME#, SERIRQ# & CLKRUN#.
NOTE:
EXTERNAL IDSEL AND WITHOUT 12V VPP SUPPORT.THIS PAGE SHOWS THE OZ601B CONFIGURED WITH
VCC5# VPP_PGM IDSEL SELECT (124) (123)
UP UP PIN 127
DOWN DOWN AD18
DOWN UP AD20
UP DOWN AD25
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Place closely pin 26C
1422
4.7U
_060
3_6.
3V4Z
~D
1
2
R71 0_0402_5%~D@1 2
C14
210.
1U_0
402_
16V4
Z~D
1
2
R14
0633
K_04
02_5
%~D
12
C14
470.
1U_0
402_
16V4
Z~D
1
2
JCBUS
TYCO_1734648-1~D
GND11A_CAD02A_CAD13A_CAD34A_CAD55A_CAD76A_PCI_C/BE0#7GND28A_CAD99A_CAD1110A_CAD1211GND312A_CAD1413A_PCI_C/BE1#14A_CPAR15GND416A_CPERR#17A_CGNT#18A_CINT#19+AVCC020+AVPP021A_CCLK22A_CIRDY23A_PCI_C/BE2#24
GND527
A_CAD1825A_CAD2026
A_CAD2128A_CAD2229
GND632
A_CAD2330A_CAD2431
A_CAD2533A_CAD2634
GND736 A_CAD2735
A_CAD2937CB_A_D238A_CCLKRUN#39GND840
A_CCD1# 42A_CAD2 43A_CAD4 44A_CAD6 45
GND10 48
CB_A_D14 46A_CAD8 47
A_CAD10 49A_CVS1 50
GND11 52A_CAD13 51
A_CAD15 53A_CAD16 54
CB_A_A18 55GND12 56
A_CBLOCK# 57A_CSTOP# 58
A_CDEVSEL# 59+AVCC1 60+AVPP1 61
A_CTRDY# 62A_CFRAME# 63
A_CAD17 64
GND13 67
A_CAD19 65A_CVS2 66
A_CRST# 68A_CSERR# 69
GND14 72
A_CREQ# 70A_PCI_C/BE3# 71
A_CAUDIO 73A_CSTSCHG 74
GND15 76A_CAD28 75
A_CAD30 77A_CAD31 78A_CCD2# 79
GND9 41
GND16 80
U2
OZ2522LN-A1_QFN32~D
+5V19+5V20
+3.3V3+3.3V4
DATA1CLK2LATCH6
RESET#32
HOST_CLK18SC_CLK22HOST_RST11SC_RST12HOST_I/O9SC_I/O10
GND7
AVCC 29AVCC 30AVCC 31
AVPP 28
BVCC 13
CD1# 14CD2# 15
VS1 16VS2 17
+3.3V5
NC 8
+5V21
NC 25
HOST_DN 24HOST_DP 27
CARD_DN 23CARD_DP 26
C14
190.
1U_0
402_
16V4
Z~D
1
2
C14
260.
1U_0
402_
16V4
Z~D
1
2
C14
170.
1U_0
402_
16V4
Z~D
1
2
C8122P_0402_50V8J~D
@
1
2
C14
164.
7U_0
603_
6.3V
4Z~D
1
2
U193
OZ601TN_TQFP128~D
CORE_VCC64CORE_VCC77CORE_VCC97CORE_VCC115
PCI_VCC1PCI_VCC20PCI_VCC33
AD314AD305AD296AD287AD278AD269AD2510AD2413AD2314AD2215AD2116AD2017AD1918AD1819AD1721AD1622AD1528AD1429AD1330AD1231AD1134AD1035AD936AD837AD738AD639AD540AD441AD342AD243AD144AD046VPP_VCC/VPPD1/IDSEL127C/BE3#11C/BE2#12C/BE1#49C/BE0#50
PCI_CLK26DEVSEL#27FRAME#23IRDY#24TRDY#25STOP#47PAR48
PERR#/SPKR_OUT51
REQ#2GNT#3
RST#126PME#/RI_OUT#120
MF6 55MF4 54MF3 53MF0 52
VCC5#/VCCD0#/SDATA 124VCC3#/VCCD1#/SCLK 125
VPP_PGM/VPPD0/SLATCH 123
D10/CAD31 103D9/CAD30 102D1/CAD29 101D8/CAD28 100D0/CAD27 99A0/CAD26 110A1/CAD25 109A2/CAD24 108A3/CAD23 106A4/CAD22 105A5/CAD21 104A6/CAD20 118
A25/CAD19 95A7/CAD18 94
A24/CAD17 93A17/CAD16 75
IOW#/CAD15 73A9/CAD14 74
IORD#/CAD13 71A11/CAD12 72OE#/CAD11 70
CE2#/CAD10 69A10/CAD9 68D15/CAD8 85
D7/CAD7 84D13/CAD6 82
D6/CAD5 83D12/CAD4 80
D5/CAD3 81D11/CAD2 78
D4/CAD1 79D3/CAD0 76
A16/CCLK 107A23/CFRAME# 114
A15/CIRDY# 117A22/CTRDY# 116
A21/CDEVSEL# 113A20/CSTOP# 61
A13/CPAR 58A14/CPERR# 60
WAIT#/CSERR# 91INPACK#/CREQ# 89
WE#/CGNT# 62RDY/IREQ#/CINT# 88
A19/CBLOCK# 59WP/CCLKRUN# 87RESET/CRST# 119
D2/RFU 98D14/RFU 86A18/RFU 63
VS1/CVS1 57VS2/CVS2 121
CD1#/CCD1# 56CD2#/CCD2# 122
BVD2/LED/CAUDIO 92BVD1/STSCHG#/RI#/CSTSCHG 90
REG#CCBE3# 111A12/CCBE2# 112
A8/CCBE1# 66CE1/CCBE0# 67
GN
D32
GN
D45
GN
D65
GN
D96
GN
D12
8
C14
184.
7U_0
603_
6.3V
4Z~D
1
2
R4 33_0402_5%~D R1307
100_0402_5%~D 1 2
C14
244.
7U_0
603_
6.3V
4Z~D
1
2 C14
250.
1U_0
402_
16V4
Z~D
1
2
C14
230.
1U_0
402_
16V4
Z~D
1
2C14
200.
1U_0
402_
16V4
Z~D
1
2
C14
480.
1U_0
402_
16V4
Z~D
1
2
R8822_0402_5%~D
@
12
R14
0733
K_04
02_5
%~D
12
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_SMC_48M
SCCD-SCCD+
VRCPR
MD0
+SC_PWR
PCI_RST#
SC_RST#
SCCD+SC_CLK
SC_IO
USB_HUBP3-USB_HUBP3+
USB_BIO_L-USB_BIO_L+
SCCD-
SC_C4
SC_DET#
CLK_SMC_48M
SC_DET#
+5V_RUN
+SC_PWR
+3V_PWR
+3.3V_RUN
CLK_SMC_48M6
USB_HUBP3-38USB_HUBP3+38
PCI_RST#21,30,35
SC_DET# 38
USB_BIO- 40
USB_BIO+ 40
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Smart Card OZ77C6
31 63Tuesday, February 07, 2006
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
USB SMARTCARD READER.
& USB SMARTCARDS ARE SUPPORTED.TYPE A (5V), B (3V), AB (5V/3V)
MODE1 CLOCK INPUT
LOW 48MHz
HIGH 6MHz Crystal
Place closely pin 3
C76
0.1U
_040
2_16
V4Z~
D
1
2
R15
971.
5K_0
402_
1%~D
12
C14
370.
1U_0
402_
16V4
Z~D
1
2
R15
96
15K_
0402
_5%
~D
12
C17
484.
7U_0
603_
6.3V
4Z~D
1
2
C83 47
P_0
402_
50V8
J~D
1
2
JSC
MOLEX_52207-1085~D
11 22 33 44 55 66 77 88 99 1010
GND11 GND12
R14
17
15K_
0402
_5%
~D
12
C84 47
P_0
402_
50V8
J~D
1
2
R1423 220_0402_5%~D
12
R15
95
15K_
0402
_5%
~D
12
C1443
1U_0603_10V4Z~D
12
R14
16
15K_
0402
_5%
~D
12
C14
390.
1U_0
402_
16V4
Z~D
1
2
U1
OZ77C6LN-A1_QFN32~D 10.1
VCC5V_IN5VCC5V_IN28
UPD-17UPD+16
RST#14
NC30NC31
XI/48M_IN3XO4
MODE0/SC_LED#32MODE11MODE22
GND11GND13GND26
+3.3V_OUT 29
DPD- 19DPD+ 18
EGATED- 21EGATED+ 20
SC_VCC 27
SC_RST# 24SC_CLK 23
SC_C4 22SC_IO 25
SC_DET# 15
RF_OUT 8RF_IN/RX 7
RF_CLK 9RF_AUX 10
VR_C
PR6
VR_C
PR12
C17
490.
1U_0
402_
16V4
Z~D
1
2
R14
19
47K_
0402
_5%
~D
12
R1420 220_0402_5%~D
12
C1354.7P_0402_50V8C~D
@ 1
2
L5
DLW21SN900SQ2_0805~D
@
11
44 3 3
2 2
R1424 330_0402_5%~D
12
R13
3610
K_04
02_5
%~D
12
R128 33_0402_5%~D
1 2
R1421 33_0402_5%~D
12
R13310_0402_5%~D
@ 12
C14
401U
_060
3_10
V4Z~
D
1
2
C14
364.
7U_0
603_
6.3V
4Z~D
1
2
R137 33_0402_5%~D
1 2
R14
25
4.7K
_040
2_5%
~D
12
C45
74.
7U_0
603_
6.3V
4Z~D
1
2
C14
330.
1U_0
402_
16V4
Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB_OC5#
USB_OC3#
USB_OC4#
USB_OC6#
USB_SIDE_EN#
USB_BACK_EN#
USBP5_D+
USBP5_D-
USBP6_D+
USBP6_D-
LED_10_GRN_R#LED_100_ORG_R#
LAN_ACTLED_YEL_R#
SW_LAN_TX0+
SW_LAN_TX1+SW_LAN_TX1-
SW_LAN_TX0-
SW_LAN_TX2+
SW_LAN_TX3-SW_LAN_TX3+SW_LAN_TX2-
USBP5_D+USBP5_D-
USBP6_D-USBP6_D+
INT_MIC-INT_MIC+
R_SATA_ACT
USBP4-USBP4+
BATT_GREEN_LEDBATT_AMBER_LED
BREATH_GREEN_LED
R_BT_ACTR_MPCI_ACT
USBP3-USBP3+
USBP3+
USBP3-
USBP4+
USBP4-
USBP5+
USBP5-
USBP6+
USBP6-
+USB_BACK_PWR
+USB_BACK_PWR
+5V_SUS
+5V_SUS
+USB_SIDE_PWR
+3VLAN
+USB_SIDE_PWR
+2.5VLAN
+USB_SIDE_PWR +USB_BACK_PWR
USB_OC5# 23
USB_OC3# 23
USB_OC4# 23
USB_OC6# 23USB_BACK_EN#38
USB_SIDE_EN#38
SW_LAN_TX2+ 29SW_LAN_TX2- 29SW_LAN_TX3+ 29SW_LAN_TX3- 29
LED_10_GRN_R# 29LED_100_ORG_R# 29
LAN_ACTLED_YEL_R# 29
SW_LAN_TX0+ 29SW_LAN_TX0- 29SW_LAN_TX1+ 29SW_LAN_TX1- 29
USBP5-23
USBP5+23
USBP6-23
USBP6+23INT_MIC-27INT_MIC+27
R_SATA_ACT 43
USBP4-23USBP4+23
BATT_GREEN_LED43BATT_AMBER_LED43R_BT_ACT43R_MPCI_ACT43
BREATH_GREEN_LED43
USBP3-23USBP3+23
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
USB 2.0 Port
32 63Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
USB Port
Rear USB Ports
Place ESD diodes as close as USB connector.
U186
IP4220CZ6_SO6~D
@
D2+ 4
D1- 6
VCC 5
D1+1
GND2
D2-3
JIO
TYCO_3-1775014-0~D
11 2 233 4 455 6 677 8 899 10 10
12 1214 141111
13131515 16 161717 18 181919 20 202121 22 222323 24 242525 26 2627272929 28 28
30 30
GND31GND32GND33
GND 34GND 35GND 36
R290_0402_5%~D 1 2
C34210U_0805_10V4Z~D
1
2
L8 DLW21SN900SQ2_0805~D@
11
44 3 3
2 2
R270_0402_5%~D 1 2
JUSB1
FOX_UB9112C-SB201-4F~D
A_VCC1A_D-2A_D+3A_GND4
B_VCC5B_D-6B_D+7B_GND8
G19G210G311G412
C17
450.
1U_0
402_
16V4
Z~D
1
2
U14
TPS2062DR_SO8~D
GND1IN2EN1#3EN2#4
OC1# 8OUT1 7OUT2 6OC2# 5
U187
IP4220CZ6_SO6~D
@
D2+ 4
D1- 6
VCC 5
D1+1
GND2
D2-3
C90.1U_0402_16V4Z~D
1
2
C3430.1U_0402_16V4Z~D
1
2
+
C18
150U
_D2_
6.3V
M~D
1
2
L7 DLW21SN900SQ2_0805~D@
11
44 3 3
2 2
C1310U_0805_10V4Z~D
1
2
C19
0.1U
_040
2_16
V4Z~
D
1
2
R280_0402_5%~D 1 2
C29
20.
1U_0
402_
16V4
Z~D
1
2
U17
TPS2062DR_SO8~D
GND1IN2EN1#3EN2#4
OC1# 8OUT1 7OUT2 6OC2# 5
R260_0402_5%~D 1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MDC_AC_BITCLK
ICH_SYNC_MDC
ICH_SDOUT_MDC
ICH
_AC
_SD
OU
T_M
DC
TER
M
ICH_SDOUT_MDC
MD
C_A
C_B
ITC
LK_T
ERM
MDC_SDIN
MDC_AC_BITCLK
ICH_RST_MDC_R#
ICH_RST_MDC_R#
+3.3V_SUS
+5V_SUS
ICH_SYNC_MDC22ICH_AC_SDIN122
MDC_AC_BITCLK22
ICH_SDOUT_MDC22
MDC_RST_DIS#38
ICH_RST_MDC#22
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
BT PORT and MDC
33 63Tuesday, February 07, 2006
Compal Electronics, Inc.
1
3
5
7
9
11 12
10
8
6
4
2GND
IAC_SDATA0
IAC_SYNC
IAC_SDATAIN
IAC_RESET#
RES
RES
3.3V
GND
GND
IAC_BITCLK
GND
New MDC connector.
W=20 mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
R144110K_0402_5%~D
12
C89
0.1U
_040
2_16
V4Z~
D
1
2
G
D S
Q64BSS138W-7-F_SOT323~D
2
1 3
Connector for MDC Rev1.5
JMDC
TYCO_1-1775149-2~D
GND11IAC_SDATA_OUT3GND25IAC_SYNC7IAC_SDATA_IN9IAC_RESET#11
RES0 2RES1 43.3V 6
GND3 8GND4 10
IAC_BITCLK 12
GN
D13
GN
D14
GN
D15
GN
D16
GN
D17
GN
D18
R14420_0402_5%~D
@
1 2
R9133_0402_5%~D
1 2
R1443100K_0402_5%~D
12
R98
10_0
402_
5%~D
@
12
C39610P_0402_50V8J~D
@
1
2
C8610P_0402_50V8J~D
@
1
2
C40
34.
7U_0
603_
6.3V
4Z~D
1
2
R40
610
_040
2_5%
~D@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB_HUBP2_D+
ICH_SMBCLK
USB_HUBP2_D-
ICH_SMBDATA
WWAN_RADIO_DIS#
LED_WLAN_OUT#
PCIE_IRX_WLANTX_N2PCIE_IRX_WLANTX_P2
PCIE_ITX_WLANRX_N2_CPCIE_ITX_WLANRX_P2_C
WLAN_RADIO_OFF#PLTRST#
UIM_DATAUIM_CLKUIM_RESETUIM_VPP
PCIE_IRX_WANTX_N1PCIE_IRX_WANTX_P1
PCIE_ITX_WANRX_N1_CPCIE_ITX_WANRX_P1_C
USB_HUBP2_D-
USB_HUBP2_D+
CLK_PCIE_MINI1#CLK_PCIE_MINI1
MINI1CLK_REQ#
PLTRST#
PCIE_WAKE#
UIM_CLKUIM_VPPUIM_RESETUIM_DATA
USBP0+USBP0-
WLAN_RADIO_OFF#
+3.3V_RUN
+3.3V_RUN+3.3V_RUN
+3.3V_RUN_R
+1.5V_RUN
+3.3V_RUN_R
+3VLAN
+SIM_PWR
+3.3V_RUN_R
+1.5V_RUN+3VLAN
+1.5V_RUN
+1.5V_RUN+3VLAN
+3VLAN
+SIM_PWR
ICH_SMBCLK 6,23,28ICH_SMBDATA 6,23,28
CLK_PCIE_MINI26
COEX1_BT_ACTIVE40COEX2_WLAN_ACTIVE40
CLK_PCIE_MINI2#6
PCIE_IRX_WLANTX_N223
ICH_SMBCLK 6,23,28
PCIE_IRX_WLANTX_P223
ICH_SMBDATA 6,23,28
MINI2CLK_REQ#6
PCIE_ITX_WLANRX_N2_C23PCIE_ITX_WLANRX_P2_C23
PCIE_IRX_WANTX_N123PCIE_IRX_WANTX_P123
PCIE_ITX_WANRX_N1_C23PCIE_ITX_WANRX_P1_C23
USB_HUBP2+38
USB_HUBP2-38
CLK_PCIE_MINI16CLK_PCIE_MINI1#6
MINI1CLK_REQ#6
PLTRST# 10,21,23,28,52
PCIE_WAKE#28,38
PCIE_WAKE#28,38
WWAN_RADIO_DIS# 23
LED_WLAN_OUT# 43
USBP0- 23USBP0+ 23
BT_ACTIVE 40,43
8051_TX39
8051_RX 39WLAN_RADIO_DIS#38
PLTRST# 10,21,23,28,52
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Mini Card
34 63Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+-9%
+3.3Vaux
+3.3V
VoltageTolerance
+1.5V
+-9%
+-5%
PWRRail
Primary Power Aux Power
Peak Normal Normal
1000 750
330
500
250
375
250 (Wake enable)5 (Not wake enable)
NA
Mini CardWire less WAN
Wire less LANMini Card
Mini-Card Latch
Mini-Card Latch
C17
850.
1U_0
402_
16V4
Z~D
1
2C136
33P_0402_50V8J~D
1
2
C131
22U_0805_6.3VAM~D
1
2
C46
30.
047U
_040
2_16
V4Z~
D
1
2
C56
33P
_040
2_50
V8J~
D
1
2
+
C14
333
0U_V
_6.3
VM_R
25~D
1
2
R1609 0_0402_5%~D
1 2
C60
33P
_040
2_50
V8J~
D
1
2
D5NNCD5.6LG~D
2 31
45
C170
0.1U_0402_16V4Z~D
1
2
JMINI2
TYCO_1775838-1~D
1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151
GND153
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 52
GND2 54
C17
870.
047U
_040
2_16
V4Z~
D
@
1
2C166
0.047U_0402_16V4Z~D
1
2
C17
860.
047U
_040
2_16
V4Z~
D
@
1
2
L101 DLW21SN900SQ2_0805~D@11
44 3 3
2 2
JCLIP2
TYCO_1775837-1~D
GND11GND22GND33GND44
R15780_0402_5%~D 1 2
C17904.7U_0603_6.3V4Z~D
1
2
C168
0.047U_0402_16V4Z~D
1
2
R1603 0_0402_5%~D @1 2
C57
33P
_040
2_50
V8J~
D
@
1
2
C77
0.1U_0402_16V4Z~D
1
2
JMINI1
TYCO_1775838-1~D
1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151
GND153
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 52
GND2 54
R1610 0_0402_5%~D
1 2
R104
0_0402_5%~D
@1 2
R15770_0402_5%~D 1 2
JCLIP1
TYCO_1775837-1~D
GND11GND22GND33GND44
JSIM
SUYIN_254020MA006G502ZL~D
VCC1RST2CLK3
GND 4VPP 5
I/O 6
NC 8NC7
C11
70.
047U
_040
2_16
V4Z~
D
1
2C15
90.
1U_0
402_
16V4
Z~D
1
2
C17
471U
_060
3_10
V4Z~
D
1
2
D2003RB751S40T1_SOD523-2~D
21
C464
0.047U_0402_16V4Z~D
1
2
C55
33P
_040
2_50
V8J~
D
1
2
C440
0.047U_0402_16V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
QUIETE#DOCK_PCI_EN#
QBUFEN#
DOCK_SERR#
DOCK_LOCK#
PCI_C_BE3#
PCI_SERR#
DOCK_C_BE2#
PCI_PLOCK#
PCI_PIRQA#
PCI_AD24
DOCK_TRDY#
DOCK_PCIRST#
PCI_C_BE1#DOCK_C_BE0#
PCI_PERR#
PCI_PAR
PCI_C_BE0#
DOCK_SPME#
PCI_STOP#
DOCK_GNT0#
DOCK_PAR
DOCK_STOP#
DOCK_PIRQA#
PCI_TRDY#
SYS_PME#DOCK_C_BE3#
DOCK_DEVSEL#
PCI_IRDY#
PCI_C_BE2#
DOCK_IRDY#PCI_FRAME#
DOCK_PCI_IDSEL
DOCK_PERR#
DOCK_FRAME#
PCI_DEVSEL#
DOCK_C_BE1#
PCI_GNT0#PCI_RST#
PCI_AD22
+VCC_QBUFD
PCI_AD26
PCI_AD15
PCI_AD16
PCI_AD30
PCI_AD28
PCI_AD25
PCI_AD18
PCI_AD2
PCI_AD5
PCI_AD20
PCI_AD10
PCI_AD7
PCI_AD31
PCI_AD17
PCI_AD24
PCI_AD1
PCI_AD29
PCI_AD14
PCI_AD4
PCI_AD21
PCI_AD23
PCI_AD27
PCI_AD3
PCI_AD8
PCI_AD0
PCI_AD9
PCI_AD19
PCI_AD6
PCI_AD11PCI_AD12PCI_AD13
DOCK_AD30
DOCK_AD27
DOCK_AD18
DOCK_AD24
DOCK_AD23
DOCK_AD14
DOCK_AD6
DOCK_AD3DOCK_AD2
DOCK_AD13
DOCK_AD26
DOCK_AD0
DOCK_AD15
DOCK_AD11
DOCK_AD1
DOCK_AD28
DOCK_AD8
DOCK_AD21
DOCK_AD25
DOCK_AD10
DOCK_AD19
DOCK_AD16
DOCK_AD22
DOCK_AD31
DOCK_AD7
DOCK_AD5
DOCK_AD20
DOCK_AD17
DOCK_AD9
DOCK_AD12
DOCK_AD29
DOCK_AD4
QUIETE#
QUIETE#
+3.3V_RUN_R
+5V_RUN+VCC_QBUF
DOCK_PCI_EN#36
QBUFEN#38
DOCK_PAR 36
PCI_TRDY#21,30
PCI_FRAME#21,30,36
DOCK_C_BE1# 36
SYS_PME#30,38
DOCK_TRDY# 36
PCI_DEVSEL#21,30
DOCK_GNT0# 36
DOCK_C_BE0# 36
PCI_PIRQA#21
DOCK_IRDY# 36
PCI_GNT0#21,36
DOCK_DEVSEL# 36
PCI_C_BE3#21,30
DOCK_LOCK# 36
PCI_C_BE1#21,30DOCK_C_BE2# 36
DOCK_FRAME# 36
PCI_PERR#21,30
PCI_PAR21,30
DOCK_PERR# 36
PCI_RST#21,30,31
PCI_STOP#21,30
DOCK_SPME# 36
PCI_C_BE2#21,30
DOCK_PIRQA# 36
DOCK_SERR# 36
PCI_IRDY#21,30,36
PCI_SERR#21
PCI_PLOCK#21
DOCK_PCI_IDSEL 36
PCI_C_BE0#21,30
DOCK_PCIRST# 36
DOCK_STOP# 36
DOCK_C_BE3# 36
PCI_AD[0..31]21,30
DOCK_AD[0..31] 36
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
DOCKING BUFFER
35 63Tuesday, February 07, 2006
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
C18
230.
47U
_040
2_16
V4Z~
D
1
2
D27
RB751S40T1_SOD523-2~D
2 1
U184
PI5C162861BE_BQSOP48~D
A02A13A24A35A46A57A68A79A810A911
A1014A1115A1216A1317A1418A1519
B0 46B1 45B2 44B3 43B4 42B5 41B6 40B7 39B8 38B9 37
B10 34B11 33B12 32B13 31B14 30B15 29
GND1 12GND2 24NC11
NC213
OE147OE235 VCC2 48VCC1 36
A1620A1721A1822A1923
B16 28B17 27B18 26B19 25
D26
RB751S40T1_SOD523-2~D
2 1
C13290.1U_0402_16V4Z~D
1
2
C18
220.
1U_0
402_
16V4
Z~D
1
2
R1335100K_0402_5%~D 1
2
C18240.47U_0402_16V4Z~D
1 2
R133210K_0402_5%~D
12
C13250.1U_0402_16V4Z~D 1 2
U185
SN74AHC1G32DCKR_SC70-5~DINB2
INA1O 4
P5
G3
C13280.1U_0402_16V4Z~D
1 2
U194
PI5C34X2245BE_BQSOP80~D
NC11A12A23A34A45A56A67A78A89GND110NC211A912A1013A1114A1215A1316A1417A1518A1619GND220NC321A1722A1823A1924A2025A2126A2227A2328A2429GND330NC431A2532A2633A2734A2835A2936A3037A3138A3239GND440
VCC4 80OE1# 79
B1 78B2 77B3 76B4 75B5 74B6 73B7 72B8 71
VCC3 70OE2# 69
B9 68B10 67B11 66B12 65B13 64B14 63B15 62B16 61
VCC2 60OE3# 59
B17 58B18 57B19 56B20 55B21 54B22 53B23 52B24 51
VCC1 50OE4# 49
B25 48B26 47B27 46B28 45B29 44B30 43B31 42B32 41
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DOCK_AD28
DOCK_AD13
DOCK_AD22
DOCK_OWNS_PCI
DOCK_SIO_ALERT#
DOCK_AD31
TV_Y
TV_C
DOCK_C_BE2#
DOCK_AD30
DOCK_AD8
VGA_RED
DOCK_AD4
DOCK_AD23
DOCK_AD11
PCI_IRDY#
DOCK_AD16
DOCK_AD0
DOCK_AD10
Z3306
DOCK_AD11
DOCK_AD0
DOCK_AD19
VSYNC_R
DOCK_AD5
DOCK_AD3
DOCK_AD7
DOCK_AD31
DOCK_AD9
DOCK_AD4
DOCK_TRDY#
DOCK_AD26
PCI_GNT0#
DOCK_AD6
D_LAD2
DOCK_C_BE0#
TV_CVBS
DOCK_AD14
DOCK_AD18
DOCK_C_BE1#
DOCK_AD20
DOCK_AD12
DOCK_AD6
DOCK_AD30
PCI_FRAME#
DOCK_LAN_ACTLED_YEL#
G_DOC_PWRSRC
DOCK_AD2
DOCK_AD7
TV_Y
DOCK_OWNS_PCI
DOCK_AD29
R_PIDEACT
DOCK_AD8
DOCK_TIP
DOCK_AD14
DOCK_AD10
DOCK_AD2
DOCK_AD27
DOCK_AD25
DOCK_AD17
VGA_RED
DOCK_DC_IN
DOCK_C_BE3#
DOCK_AD17
DOCK_AD25
TV_CVBS
DOCK_AD24
Z3305
DOCK_LED_100#
DOCK_AD20
DOCK_AD16
DOCK_RING
DOCK_AD15
TV_C
DOCK_AD21
DOCK_AD18
DOCK_AD28DOCK_AD1
VGA_BLU
DOCK_AD21
D_LAD0
DOCK_AD19
DOCK_PWR_EN
HSYNC_R
DOCK_AD13
DOCK_AD5
DOCK_AD27
VGA_GRN
DOCK_AD12
DOCK_STOP#
Z330
7
DOCK_AD22
DOCK_PCIRST#
DOCK_AD15
DOCK_PERR#
VGA_GRN
DOCK_AD29
D_LAD1
DOCK_AD1
DOCK_AD23
DOCK_LED_10#
SPDIF_DOCK
DOCK_AD24
VGA_BLU
D_LAD3
DOCK_AD9
DOCK_AD3
DOCK_DET# DOCK_DET#
Z3308
DOCK_RING
DOCK_TIP
DOCK_DET#
USBP7-USBP7+
CLK_DOCKPCI_33M
PCI_REQ0#
DOCK_AD26
TV_C
TV_CVBS
TV_Y
+3.3V_SUS
+PWR_SRC
+3.3V_ALW
+3.3V_RUN_R
+DOCK_PWR_SRC
+3.3V_RUN_R
+DOCK_PWR_SRC
+3.3V_RUN_R
+2.5VLAN
+5V_ALW
DOCK_FRAME#35
DAT_KBD 39
DOCK_TRDY# 35
DOCK_LAN_TX3+ 29
CLK_DOCKPCI_33M6
VGA_BLU12,20
CLK_KBD 39
DOCK_AD[0..31] 35
DOCK_LAN_TX3- 29
VGA_GRN12,20
VGA_RED12,20
DOCK_SMB_INT# 39
DOCK_GNT0# 35
DVI_TX0-52
D_LFRAME# 38
DOCK_IRDY# 35
DVI_DETECT 52
PCI_GNT0#21,35
PS_ID_IN44
DOCK_DEVSEL# 35
DVI_TX0+52
DVI_SDATA 52
PCI_FRAME#21,30,35
DVI_CLK+52
DVI_SCLK 52
PCI_IRDY#21,30,35
DVI_TX1-52
D_DLRQ1# 38 D_LAD0 38
DVI_TX1+52
DOCK_C_BE3# 35
DOCK_LOCK#35
DAT_DOCK39
DOCK_SMB_DAT39
DOCK_PCI_IDSEL 35
TV_CVBS12
DOCK_PAR35
DOCK_LED_100#29
DOCK_C_BE2#35
SPDIF_DOCK26
DOCK_LAN_TX0-29
CLK_DOCK39
D_LAD138
DVI_CLK-52
D_LAD238
D_SERIRQ 38
TV_Y12
DOCK_LAN_TX1-29
DVI_TX2-52
R_PIDEACT 43
DOCK_SIO_ALERT# 38
DOCK_PCIRST# 35
DOCK_SMB_CLK39
D_LAD338
DOCK_LAN_ACTLED_YEL# 29
DOCK_C_BE0# 35
TV_C12
DOCK_PERR# 35
D_CLKRUN# 38
DOCK_STOP# 35
DOCK_PCI_EN#35
DOCK_SERR#35DVI_TX2+52
DOCK_C_BE1# 35
DOCK_LAN_TX2+ 29
DOCK_PIRQA#35
DOCK_LAN_TX0+29
DOCK_SPME#35
DOCK_DC_IN 44
DOCK_LAN_TX1+29DOCK_LAN_TX2- 29
DOCK_PWR_EN38
DOCK_LED_10#29
DAT_DDC2 12,20CLK_DDC2 12,20
HSYNC_R 20VSYNC_R 20
DOCKED 29,38
USBP7- 23USBP7+ 23
PCI_REQ0# 21
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
DOCKING CONN.
36 63Tuesday, February 07, 2006
PLACE TERMINATIONS CLOSE TO DOCK CONNECTOR
self power dock
NB
PWR_SRC
no power dock
DVI_TX4-DVI_TX4+
DVI_TX3+DVI_TX3-
DVI_TX5+DVI_TX5-
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
C13000.01U_0402_16V7K~D
12
JDOCKB
TYCO_2-1612415-1~D
S137137S138138S139139S140140S141141S142142S143143S144144S145145S146146S147147S148148S149149S150150S151151S152152S153153S154154S155155S156156S157157S158158S159159S160160S161161S162162S163163S164164S165165S166166S167167S168168S169169S170170S171171S172172S173173S174174S175175S176176S177177S178178S179179S180180S181181S182182S183183S184184S185185S186186S187187S188188S189189S190190
S205 205S206 206S207 207S208 208S209 209S210 210S211 211S212 212S213 213S214 214S215 215S216 216S217 217S218 218
S220 220
S222 222S223 223S224 224S225 225S226 226S227 227S228 228S229 229S230 230S231 231S232 232S233 233S234 234S235 235S236 236S237 237S238 238S239 239S240 240S241 241S242 242S243 243S244 244S245 245S246 246S247 247S248 248
S250 250
S252 252S253 253S254 254S255 255S256 256S257 257S258 258S259 259
S193193S194194S195195S196196
M204204
Q60DDTC144EUA-7-F_SOT323~D
2
13
R1324100K_0402_5%~D
12
C18211000P_0402_50V7K~D
1
2
U177NC7SZ04P5X_NL_SC70-5~D
A2 Y 4
P5
NC
1
G3
G
D
S
Q612N7002W-7-F_SOT323~D
2
13
JDOCKA
TYCO_2-1612415-1~D
S11S22S33S44S55S66S77S88S99S1010S1111S1212S1313
S1515
S1717S1818S1919S2020S2121S2222S2323S2424S2525S2626S2727S2828S2929S3030S3131S3232S3333S3434S3535S3636S3737S3838S3939S4040S4141S4242S4343
S4545
S4747S4848S4949S5050S5151S5252S5353S5454S5555
S69 69S70 70S71 71S72 72S73 73S74 74S75 75S76 76S77 77S78 78S79 79S80 80S81 81S82 82S83 83S84 84S85 85S86 86S87 87S88 88S89 89S90 90S91 91S92 92S93 93S94 94S95 95S96 96S97 97S98 98S99 99
S100 100S101 101S102 102S103 103S104 104S105 105S106 106S107 107S108 108S109 109S110 110S111 111S112 112S113 113S114 114S115 115S116 116S117 117S118 118S119 119S120 120S121 121S122 122
S125 125S126 126S127 127S128 128
M136 136
C12
960.
1U_0
603_
50V4
Z~D
1
2
C1819
0.1U_0402_16V4Z~D
1 2
R133433_0402_5%~D
@12
C12990.01U_0402_16V7K~D 1 2
U18074AHC1G08GW_SOT353-5~D
IN11
IN22 G3
O 4
P5
C132722P_0402_50V8J~D
@1
2
R13260_0402_5%~D@
1 2
C1817
0.1U_0402_16V4Z~D
12
C12970.01U_0402_16V7K~D
1 2
R1792 150_0402_1%~D
1 2
Q59FDS4435_NL_SO8~D
4
78
65
123
U179
74AHC1G08GW_SOT353-5~D
IN11
IN22 G3
O 4
P5
C18180.1U_0402_16V4Z~D
1
2
R1791 150_0402_1%~D
1 2
C13010.1U_0603_50V4Z~D
1
2
C12980.01U_0402_16V7K~D
12
R1323100K_0402_5%~D
12
R1321100K_0402_5%~D
12
C18200.1U_0402_16V4Z~D
1
2
U178
74AHC1G08GW_SOT353-5~D
IN11
IN22 G3
O 4
P5
R1790 150_0402_1%~D
1 2
C18
2710
00P_
0402
_50V
7K~D
1
2
R1322100K_0402_5%~D
12
JWIRE
MOLEX_53398-0471~D
11223344 R
1325
100K
_040
2_5%
~D
12
D25SM05TCT_SOT23-3~D @
231
JDOCKC
TYCO_2-1612415-1~D
P1P1
P2P2
P3P3
P4P4
P5 P5
P6 P6
P7 P7
P8 P8
MH1MH1 MH2 MH2
SHLD5MH9
SHLD1MH5
SHLD2MH6
SHLD3 MH7
SHLD6MH10
SHLD4 MH8
SHLD7 MH11
SHLD8 MH12
MH14 MH14MH16 MH16MH13MH13
MH15MH15
C29
10.
1U_0
603_
50V4
Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
IRVCC
SD_MODE
RTS0TXD0#
DTR0
RXD0#DSR0
CTS0
TXD0
3243C1-
3243C1+
RI0
DCD0
CTS0#
RTS0#
DSR0#
DCD0#DTR0#
3243C2+
3243C2-
RXD0
3243V+
3243V-
RI0RXD0#
DTR0RTS0TXD0#
DCD0
CTS0DSR0
RI0#
+3.3V_RUN
+3.3V_RUN
+3.3V_SUS
+3.3V_SUS
IRRX 38
IRTX38
D_IRMODE38
DSR0#38
DTR0#38
TXD038RTS0#38
DCD0#38
RXD038CTS0#38
RUN_ON19,39,41,42,46,47,48
RI0#38
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Serial & FIR
37 63Tuesday, February 07, 2006
Compal Electronics, Inc.
FIR
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C12570.47U_0402_16V4Z~D
1 2
C25
927
0P_0
402_
50V7
K~D
@
1
2C25
827
0P_0
402_
50V7
K~D
@
1
2
C12
600.
1U_0
402_
16V4
Z~D
1
2
U175
TFDU6102-TR3_8P~D
VCC6
SD_MODE5
IRED_CATHODE2
TXD3
IRED_ANODE 1
RXD 4
MODE 7
GND 8
C12540.1U_0402_16V4Z~D
1
2
JSIO
SUYIN_070921MR009S203BR~D
DCD01DSR06RXD0#2RTS0F7TXD0F#3CTS08DTR0F4RI09GND05
GND110GND211
C12
614.
7U_0
603_
6.3V
4Z~D
1
2
C27
227
0P_0
402_
50V7
K~D
@
1
2
R12890_0402_5%~D 1 2
C12
594.
7U_0
603_
6.3V
4Z~D
1
2
R12
9110
K_04
02_5
%~D
12
R128747_0805_5%~D
12
C26
027
0P_0
402_
50V7
K~D
@
1
2
U173
MAX3243ECUI+T_TSSOP28~D
V- 3
VCC
26
FORCEOFF#22
C1+28V+ 27
C1-24C2+1
C2-2
FORCEON23GND 25
T1OUT 9T2OUT 10T3OUT 11
R1IN 4R2IN 5R3IN 6R4IN 7R5IN 8
T1IN14T2IN13T3IN12R1OUT19R2OUT18R3OUT17R4OUT16R5OUT15R2OUTB20
INVALID# 21
C12550.47U_0402_16V4Z~D
1 2
C26
227
0P_0
402_
50V7
K~D
@
1
2C23
827
0P_0
402_
50V7
K~D
@
1
2 C25
627
0P_0
402_
50V7
K~D
@
1
2
C12580.47U_0402_16V4Z~D
1 2
R12
9010
K_04
02_5
%~D
12
C25
727
0P_0
402_
50V7
K~D
@
1
2
C12560.1U_0402_16V4Z~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RBIAS
IRQ_SERIRQ
CLK_SIO_14M
D_LAD1
D_LAD3
LPC_LDRQ1#
D_LAD0
D_LAD2
D_DLRQ1#
D_LFRAME#
IRTX
D_SERIRQ
D_CLKRUN#
IRRX
REG_EN
CLKRUN#LPC_LDRQ0#
SIO_VDDA
USB_HUBP4+USB_HUBP4-
USBP1+USBP1-USB_HUBP1+USB_HUBP1-USB_HUBP2+USB_HUBP2-USB_HUBP3+USB_HUBP3-
ECE5018_XTAL1
LPC_LAD1LPC_LAD0
LPC_LAD2LPC_LAD3
PLTRST2#CLK_PCI_5018
LPC_LFRAME#
RUNPWROK
RI0#
CTS0#
TXD0
DTR0#
RXD0
D_IRMODE
DCD0#
PCIE_WAKE#
PCIE_WAKE#
SYS_PME#DOCK_SIO_ALERT#
DOCK_SIO_ALERT#
PBAT_PRES#SBAT_PRES#
CHG_SBATTCHG_PBATT
SBAT_LOW
BEEP
DOCKEDQBUFEN#DOCK_PWR_EN
BC_CLKBC_DATBC_INT
SBAT_ALARM#PBAT_ALARM#
SBAT_ALARM#
PBAT_ALARM#
LAN_TPM_EN#LAN_LOW_PWRAUDIO_AVDD_ON
ICH_PME#ICH_PCIE_WAKE#
FPBACK_EN
CPU_PROCHOT#
BID3BID2BID1BID0
BID1
BID2
BID3
RTS0#DSR0#
CLK_PCI_5018
CLK_SIO_14M
THERMTRIP_SIO
WLAN_RADIO_DIS#
SNIFFER_WIRELESS_ON/OFF#
BAY_MODPRES#SC_DET#
USB_SIDE_EN#USB_BACK_EN#
D_CLKRUN#
D_SERIRQ
D_DLRQ1#
LAN_TPM_EN#
MDC_RST_DIS#
BID0
ADAPT_OC
SYS_PME#
IMVP6_PROCHOT#
NB_MUTE
IMVP6_PROCHOT#SPDIF_SHDN
ECE5018_XTAL2
DOCK_HP_MUTE#HP_NB_SENSE
DOCK_HP_MUTE#
HDDC_EN#MODC_EN#
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_SUS
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
USBP1+ 23USBP1- 23USB_HUBP1+ 30USB_HUBP1- 30USB_HUBP2+ 34USB_HUBP2- 34USB_HUBP3+ 31USB_HUBP3- 31USB_HUBP4+ 40USB_HUBP4- 40
LPC_LAD[0..3] 22,28,39
PLTRST2# 21,39CLK_PCI_5018 6
CLKRUN# 23,30,39
IRQ_SERIRQ 23,28,30,39
LPC_LFRAME# 22,28,39
LPC_LDRQ1# 22LPC_LDRQ0# 22
CLK_SIO_14M 6
D_DLRQ1# 36
D_LAD1 36D_LAD2 36D_LAD3 36
D_LAD0 36
D_LFRAME# 36D_CLKRUN# 36
D_SERIRQ 36
RUNPWROK 39,42,49
IRTX37IRRX37
DSR0#37
RXD037TXD037
DTR0#37CTS0#37
RI0#37
RTS0#37
D_IRMODE37
DCD0#37
SYS_PME#30,35DOCK_SIO_ALERT#36PBAT_PRES#45SBAT_PRES#45,51
CHG_PBATT51CHG_SBATT51
SBAT_LOW51
BEEP26
DOCKED29,36QBUFEN#35DOCK_PWR_EN36
BC_CLK39
BC_INT39BC_DAT39
PBAT_ALARM#45SBAT_ALARM#45
LAN_TPM_EN#28LAN_LOW_PWR28AUDIO_AVDD_ON26
ICH_PME#21ICH_PCIE_WAKE#23
THERMTRIP_SIO18
WLAN_RADIO_DIS# 34
SNIFFER_WIRELESS_ON/OFF#43
BAY_MODPRES#25SC_DET#31
USB_SIDE_EN#32USB_BACK_EN#32
PCIE_WAKE#28,34
FPBACK_EN19
MDC_RST_DIS#33ADAPT_OC50
NB_MUTE27
CPU_PROCHOT#7
IMVP6_PROCHOT#49SPDIF_SHDN26
LOM_CABLE_DETECT28
DOCK_HP_MUTE#26HP_NB_SENSE26,27
5V_CAL_SIO2#18
HDDC_EN#41MODC_EN#41
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
ECE5018
38 63Tuesday, February 07, 2006
Compal Electronics, Inc.
Route RBIAS and its return to pin 128 veryshort.
TEST_PIN is a No Connect
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
<---Blue Tooth
<---Mini1 WWAN
Place closely pin 56
Place closely pin 64
<---Smart Card
<---PC Card Bay
X0310 0 1X020 1X011 1
1 X001
BID0BID3
M01M00REVBID2 BID1
0 0
0
000
00000
000
R1437 100K_0402_5%~D
12
R1645 100K_0402_5%~D
12
R1369 10K_0402_5%~D
1 2
C17510.1U_0402_16V4Z~D
1
2
C17530.1U_0402_16V4Z~D
1
2
C145115P_0402_50V8J~D
1 2
Y124MHZ_12PF_1BX24000CE1B~D
12
R159910K_0402_5%~D
12
C14522P_0402_50V8J~D
@
1
2
R16
00
1M_0
402_
5%~D
12
R117110K_0402_5%~D
12
C17
624.
7U_0
603_
6.3V
4Z~D
1
2
C17500.1U_0402_16V4Z~D
1
2
C14422P_0402_50V8J~D
@
1
2
R108 10K_0402_5%~D@1 2
C17
600.
1U_0
402_
16V4
Z~D
1
2
C17
560.
1U_0
402_
16V4
Z~D
1
2
R1620 10K_0402_5%~D
1 2R
405
10K_
0402
_5%
~D
12
R419 10K_0402_5%~D@1 2
R1362 10K_0402_5%~D
1 2
R13422_0402_5%~D
@
12
R1363 10K_0402_5%~D
1 2
R15
9812
K_04
02_1
%~D
12
R40
410
K_04
02_5
%~D
@
12
R660_0402_5%~D
12R135
22_0402_5%~D@
12
R418 10K_0402_5%~D
1 2
C67
4.7U
_060
3_6.
3V4Z
~D
1
2
R107 10K_0402_5%~D 1 2
LPC
DLPC
USB
GPIO
ECE5018
CLK
TEST
U215
ECE5018 A0_VTQFP128~D
GPIOA[0]97GPIOA[1]98GPIOA[2]99GPIOA[3]100GPIOA[4]101GPIOA[5]102GPIOA[6]103GPIOA[7]104
VDDA33 8
VSS 23
VDDA33 14
VSS 51
VDDA33 20
VSS 36
GPIOH[0]24GPIOH[1]25GPIOH[4]26GPIOH[5]27BC_INT#58BC_DAT59BC_CLK60
VCC
134
GPIOE[0]/RXD1GPIOE[1]/TXD2GPIOE[2]/RTS#3GPIOE[3]/DSR#4GPIOE[4]/CTS#5GPIOE[5]/DTR#84GPIOE[6]/RI#83GPIOE[7]/DCD#6
CLKRUN# 37
DCLK_RUN# 38
SER_IRQ 39
DSER_IRQ 40
LRESET# 41LFRAME# 42
DLFRAME# 43
LDRQ1# 44
DLDRQ1# 45
LDRQ0# 46
LAD3 47
DLAD3 48
LAD2 49
DLAD2 50
LAD1 52
VCC
157
DLAD1 53
LAD0 54
DLAD0 55
PCICLK 56
GPIOB[0]/INIT#65GPIOB[1]/SLCTIN#66GPIOC[2]/SCLT67GPIOC[3]/PE68GPIOC[4]/BUSY69GPIOC[5]/ACK#70GPIOC[6]/ERROR#71GPIOC[7]/ALF#73GPIOD[0]/STROBE#74GPIOC[1]/PD775GPIOC[0]/PD676GPIOB[7]/PD577GPIOB[6]/PD478GPIOB[5]/PD379GPIOB[4]/PD280GPIOB[3]/PD181GPIOB[2]/PD082
CLKI (14.318 MHz) 64
GPIOD[1]61GPIOD[2]62
GPIOD[3]/VBUS_DET63
CAP_LDO 86
VCC
185
VSS 96
GPIOD[4]/OCS1_N28GPIOD[5]/OCS2_N29GPIOD[6]/OCS3_N30GPIOD[7]/OCS4_N31
GPIOH[6]32GPIOH[7]33
GPIOG[0]88GPIOG[1]89GPIOG[2]90GPIOG[3]91GPIOG[4]92GPIOG[5]93GPIOG[6]94GPIOG[7]95
SYSOPT1/GPIOH[2]106SYSOPT0/GPIOH[3]107
VCC
110
8
GPIOF[7]109GPIOF[6]110GPIOF[5]111GPIOF[4]112
IRTX113IRRX114
GPIOF[3]/IRMODE/IRRX3B115GPIOF[2]/IRTX2116GPIOF[1]/IRRX2117GPIOF[0]/IRMODE/IRRX3A118
VCC1 119
VDD18 120
VSS 17
XTAL2 122XTAL1/CLKIN 123
VDDA18PLL 124VDDA33PLL 125
ATEST 126
RBIAS 127
VSS 11
VSS 128VSS 121VSS 87VSS 72
USBDP0 9USBDN0 10USBDP1 13USBDN1 12USBDP2 15USBDN2 16USBDP3 19USBDN3 18USBDP4 21USBDN4 22
PWRGD 7
OUT65 105
TEST_PIN 35
R94
10K_
0402
_5%
~D
@
12
R87 100K_0402_5%~D@1 2
C17520.1U_0402_16V4Z~D
1
2R1361 10K_0402_5%~D
1 2
R1440 100K_0402_5%~D@ 12
C17
614.
7U_0
603_
6.3V
4Z~D
1
2
R1646 100K_0402_5%~D
12
C17
570.
1U_0
402_
16V4
Z~D
1
2
C17584.7U_0603_6.3V4Z~D
1
2
R55 0_0402_5%~D@ 12
L104BLM18PG181SN1_0603~D
1 2
C17540.1U_0402_16V4Z~D
1
2
C17
594.
7U_0
603_
6.3V
4Z~D
1
2
C1452
15P_0402_50V8J~D
1 2
R95
10K_
0402
_5%
~D
12
C17
550.
1U_0
402_
16V4
Z~D
1
2R34 100K_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LPC_LAD[0..3]
CLK_KBD
DAT_KBD
ICHO_FDATAIN
DAT_SMB
CLK_SMB
CLK_DOCK
DAT_DOCK
CLK_PCI_5004
LID_CL#
VAUX_EN
SIO_EXT_SMI#
LPC_LFRAME#
KSO16
KSO5
SFPI_EN
SIO_SLP_S3#
BAT1_LED#
LPC_LAD1
CLK_PCI_5004
KSI1KSI2
MEC5004_XOSEL
MEC5004_XTAL1
RUNPWROK
MEC5004_XTAL2
PLTRST2#
CLK_KBD
KSO3
NUM_LED#
LID_CL_SIO#
CLKRUN#
KSI3
KSI7
KSO0
KSO8
SIO_THRM#
KSO15
SIO_SLP_S5#
SBAT_SMBCLK
IRQ_SERIRQ
ICH_EC_SPI_CLK
SIO_A20GATE
KSI0
RESET_OUT#
FAN1_TACH
SFPI_EN
MEC5004_XTAL1
SNIFFER_PWR_SW#
DAT_TP_SIO
LPC_LAD3
KSI6
PBAT_SMBCLK
SCRL_LED#
FWP#
SIO_EXT_SCI#
PS_ID
KSO1
KSO9
FWP#
RUN_ON
CLK_TP_SIO
KSO7
KSO11
PBAT_SMBDAT
BREATH_LED
BC_INT
SBAT_SMBDAT
CLK_DOCK
KSO10ACAV_IN
KSO14ALWON
HOST_DEBUG_TX
LPC_LAD2
DAT_DOCK
DAT_KBD
KSI4
KSO6
CAP_LED#
DEBUG_ENABLE#
LPC_LAD0
ATF_INT#
LID_CL_SIO#
SUS_ON
HOST_DEBUG_RX
KSO2
BAT2_LED#
POWER_SW_IN#
KSI5
KSO12KSO13
SIO_RCIN#
SNIFFER_PWR_SW#
BC_DATBC_CLK
SIO_EXT_WAKE#
KSO4
CLK_SMBDAT_SMB
DOCK_SMB_DATDOCK_SMB_CLK
VGA_IDENTIFY
PS_ID_DISABLE#
DOCK_SMB_INT#
DOCK_SMB_INT#
SNIFFER#
POWER_SW_IN# POWER_SW#
POWER_SW_IN1#
POWER_SW_IN1#
8051_TXDEBUG_ENABLE#
SIO_PWRBTN#BAT_SEL#
SPI_CS_L#
DOCK_SMB_DAT
DOCK_SMB_CLK
SBAT_SMBDAT
SBAT_SMBCLK
PBAT_SMBDAT
PBAT_SMBCLK
KSO17
MEC5004_XTAL2
ICHI_FDATAOUT
VGA_IDENTIFY
FCLK
FCLK
ICHO_ECI_SPI_DATAICHI_ECO_SPI_DATA
ICHO_FDATAINICHI_FDATAOUT
SIO_BIAPWM
ITP_DBRESET#
ATF_INT#
BAT_SEL#
8051_RX8051_TX8051_RX
ALWON
SNIFFER_LED_OFF#
SPI_CS_R#
+3.3V_ALW
+3.3V_ALW
+RTC_CELL
+RTC_CELL
+5V_RUN
+3.3V_SUS
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+5V_ALW
+RTC_CELL
+3.3V_ALW
+RTC_CELL
+3.3V_ALW
+3.3V_SUS
+3.3V_SUS
+3.3V_ALW
+3.3V_ALW
LPC_LFRAME#22,28,38
PLTRST2#21,38
LPC_LAD[0..3]22,28,38
CLKRUN#23,30,38
CLK_PCI_50046
KSI[0..7]40
KSO[0..17]40
BAT1_LED# 43BAT2_LED# 43
RESET_OUT# 42
RUNPWROK 38,42,49
ACAV_IN 18,50,51
CLK_TP_SIO40DAT_TP_SIO40
ALWON 46
BREATH_LED 43
FAN1_TACH 18
CLK_SMB 18
SIO_A20GATE22
CLK_KBD36DAT_KBD36
DAT_DOCK36CLK_DOCK36
ICH_EC_SPI_CLK23
PBAT_SMBCLK 45,50PBAT_SMBDAT 45,50
SIO_EXT_SCI# 23
SIO_EXT_SMI# 23
BC_INT38
BC_CLK38BC_DAT38
SIO_THRM#23
IRQ_SERIRQ23,28,30,38
SBAT_SMBCLK 19,45SBAT_SMBDAT 19,45
VAUX_EN 41,46SUS_ON 41,42,46RUN_ON 19,37,41,42,46,47,48
SIO_SLP_S5# 23SIO_SLP_S3# 23
SIO_RCIN# 22SIO_EXT_WAKE# 23
PS_ID 44
LID_CL# 40
SCRL_LED# 43CAP_LED# 43
NUM_LED# 43
ATF_INT# 18
DAT_SMB 18
DOCK_SMB_DAT 36DOCK_SMB_CLK 36
PS_ID_DISABLE# 44
DOCK_SMB_INT# 36
POWER_SW# 18,40
SNIFFER# 43
SIO_PWRBTN#23
SPI_CS#23
BAT_SEL#50
ICHO_ECI_SPI_DATA23ICHI_ECO_SPI_DATA23
BIA_PWM 12,19
ITP_DBRESET# 7,23
8051_TX348051_RX34
SNIFFER_LED_OFF# 43
SPI_CS_R#
Title
Size Document Number R ev
Date: Sheet o fLA-2791 0.6
EMC5004
39 63Tuesday, February 07, 2006
Compal Electronics, Inc.
32 KHz ClockSame as Laguna
Place closely pin 58
Flash ROM
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
1=Flash Recovery Enabled0=Flash Recovery Disabled
Bat2 = Amber LEDBat1 = Green LED
Flash write protect bottom 4Kof internal bootblock flash
low=write protected
20mA drive pins
1 = Discrete Gfx
0 = UMA
150 MIL SO8
200 MIL SO8
R1752 no stuff when doingflash recovery
Work Around
R105 10K_0402_5%~D
1 2
R620_0402_5%~D
1 2
C17640.1U_0402_16V4Z~D
1
2
R63 0_0402_5%~D@12
R100 8.2K_0402_5%~D
12
R11710K_0402_5%~D
@
1 2
L106BLM18AG121SN1D_0603~D
12
C54
4.7U_0603_6.3V6M~D
@
1 2
R157910K_0402_5%~D
12
R12510K_0402_5%~D
1 2
R47510K_0402_5%~D@
12
R10
310
K_0
402_
5%~D
12
R16
0510
K_0
402_
5%~D
@
12
R127 47_0402_5%~D
1 2
C14
4922
P_0
402_
50V
8J~D
1
2
LPC Interface
Host/8051
Keyboard and Mouse Interface
BC Bus
PWR SW
U216
MEC5004_VTQFP128~D
GPIO82/FAN_TACH3 43
SGPIO35 1SGPIO36 (SFPI_EN) 2
SGPIO37 3
SGPIO43 4
GPIO16/FAN_TACH2 42GPIO15/FAN_TACH1 41
GPIO5/KSO1514GPIO4/KSO1415
OUT11/PWM1 46OUT10/PWM0 45
OUT9/PWM2 47
OUT5/KBRST50
OUT2/PWM3 48
PWRGD 49
nRESET_OUT/OUT6 53
ACAV_IN 128
POWER_ SW_IN1# 126
AB1A_DATA 5AB1A_CLK 6AB1B_DATA 7AB1B_CLK 8
KSO13/GPIO1816KSO12/OUT817KSO11/GPIOC718KSO10/GPIOC619KSO9/GPIOC520KSO8/GPIOC423KSO7/GPIO324KSO6/GPIO225
KSO4/GPIO028KSO3/GPIOC329KSO2/GPIOC230KSO1/GPIOC131KSO0/GPIOC032
KSI7/GPIO1933KSI6/GPIO1734KSI5/GPIO1035KSI4/GPIO936KSI3/GPIO837KSI2/GPIO738KSI1/GPIO639KSI0/SGPIO3040
KCLK77KDAT78EMCLK79EMDAT80
POWER_ SW_IN0# 127
VC
C1
21
KSO5/GPIO127
VR
_CA
P22
VS
S26
KSO17/GPIOA112KSO16/GPIOA013
VS
S51
VC
C1
44
GPIO96/TOUT1 52
SGPIO44/MSCLK/SPCLK2 54SGPIO45/MSDATA/SPDOUT2 55
SER_IRQ56
LRESET#57PCICLK58LFRAME#59LAD060LAD161LAD262LAD363
VS
S74
CLKRUN#64
VC
C1
65
nEC_SCI/SPDIN2 66
SGPIO31/TIN1/SPCLK1 67SGPIO47/SPDOUT1 68SGPIO46/SPDIN1 69
SYSOPT0/SGPIO32/LPC_TX 70SYSOPT1/SGPIO33/LPC_RX 71
TEST_PIN 72
GPIOA3/WINDMON 73
GPIO94/IMCLK75GPIO95/IMDAT76
VC
C1
83
GPIO20/PS2CLK/8051RX81GPIO21/PS2DAT/8051TX82
VS
S88
nFWP 84
SGPIO42 89SGPIO41 90SGPIO40 91
SGPIO34/A20M92
VS
S_P
LL10
1
HSTCLK102
FLCLK103
VC
C_P
LL10
4
HSTDATAIN105
FLDATAIN106
HSTDATAOUT107
FLDATAOUT108
FLCS0109FLCS1110
VS
S11
3
nBAT_LED 114nPWR_LED 115
VC
C1
116
OUT7/nSMI 11
GPIO83/32KHZ_OUT 117
BGPO0 118
ALWON 120
XTAL1122
XOSEL123
XTAL2124
AG
ND
125
POWER_ SW_IN2# 119
GPIO11/AB2A_DATA 93GPIO12/AB2A_CLK 94
GPIO13/AB2B_DATA 95GPIO14/AB2B_CLK 96
GPIO87/AB1C_DATA 111GPIO86/AB1C_CLK 112
GPIO85/AB1D_DATA 9GPIO84/AB1D_CLK 10
GPIO93/AB1F_DATA 97GPIO92/AB1F_CLK 98
GPIO91/AB1E_DATA 99GPIO90/AB1E_CLK 100
BC_CLK87BC_DAT86BC_INT85
VC
C0
121
C1768
0.1U_0402_16V4Z~D
12
R143 0_0402_5%~D
1 2
R469 4.7K_0402_5%~D
1 2
L105
BLM18AG121SN1D_0603~D
1 2
C4820.047U_0402_16V4Z~D
1
2
R468 4.7K_0402_5%~D
1 2
R99 8.2K_0402_5%~D
12
R521100K_0402_5%~D
12
U213
M25P80-VMW6TP_SO8~D
S#1Q2W#3VSS4
VCC 8HOLD# 7
C 6D 5
R1637 100K_0402_5%~D
12
R1608 4.7K_0402_5%~D
1 2
R1100_0402_5%~D
@
1 2
R101 100K_0402_5%~D@
1 2
R16
3610
K_0
402_
5%~D
12
R131 2.2K_0402_5%~D
1 2
C13
01U
_060
3_10
V4Z
~D 1
2
R11410K_0402_5%~D
@
12
C461U_0603_10V4Z~D
1
2
R447 4.7K_0402_5%~D
1 2
R47310_0402_5%~D
12
R163510K_0402_5%~D
12
T6PAD~D
R30100K_0402_5%~D
12
T7PAD~D
R16
0410
K_0
402_
5%~D
@
12
C17630.1U_0402_16V4Z~D
1
2
R112100K_0402_5%~D
@
12
C17670.1U_0402_16V4Z~D
1
2
R119100K_0402_5%~D
12
C176510U_0805_10V4Z~D
1
2
R106 10K_0402_5%~D
1 2
R175310K_0402_5%~D
12
R1785 0_0402_5%~D
12
R93
10K_0402_5%~D
1 2
D2002RB751S40T1_SOD523-2~D
@
21
R122
0_0402_5%~D
1 2
U217
M25P80-VMW6TP_SO8~D
@
S#1Q2W#3VSS4
VCC 8HOLD# 7
C 6D 5
G
D
SQ202N7002W-7-F_SOT323~D
@
2
13
Y232.768K_12.5PF_Q13MC30610003~D
14
23
R1607 4.7K_0402_5%~D
1 2
C13422P_0402_50V8J~D
@
1
2
C
BE
Q19PMST3906_SOT323-3~D@1
2
3
R13022_0402_5%~D
@
12
C17694.7U_0603_6.3V4Z~D
1
2
C17
390.
1U_0
402_
16V
4Z~D
1
2
JDEBUGMolex_53261
@1 12 23 3
5 54 4
R444 2.2K_0402_5%~D
1 2
R160610K_0402_5%~D
12
C1050.1U_0402_16V4Z~D
1
2
C17660.1U_0402_16V4Z~D
1
2
R138100K_0402_5%~D@
12
R47410K_0402_5%~D
12
R449 4.7K_0402_5%~D
1 2
C14
5022
P_0
402_
50V
8J~D
1
2
R4821M_0402_5%~D
12
R3110K_0402_5%~D
1 2
R178847_0402_5%~D
1 2
R1618 10K_0402_5%~D 12
R139100K_0402_5%~D
12
R1752 0_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_TP_SIOTP_CLK
KSO13KSO12
KSI2
KSO2
KSI3
KSI1
KSO4
KSI0
KSO14
KSO3
KSO8
KSI6
KSI4
KSO10KSO11
KSO5
KSO0
KSO7
KSO9
KSO1
KSO15
KSI7
KSI5
KSO6
KSO16KSO17
KSI1KSI5KSI2KSI4
POWER_SW#R_NUM_LED#
KSO10
R_CAP_LED#
KSO11
KSO17
KSO9
SP_XSP_GND
SP_V+SP_Y
KSO14
R_SCRL_LED#
KSO13KSO15KSO16
KSI6
KSO12
KSI7
KSO0KSO2KSO1KSO3KSO8KSO6KSO7KSO4KSO5KSI0KSI3
DAT_TP_SIO
POWER_SW#
COEX3USB_HUBP4+
SP_YSP_X
COEX2_WLAN_ACTIVE
TP_DATA
SP_GND
LID_CL#
TP_DATA
USB_HUBP4-
TP_CLK
BT_RADIO_DIS#
SP_V+
+5V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_RUN
+3.3V_RUN
+3.3V_ALW
CLK_TP_SIO 39
DAT_TP_SIO 39
KSI[0..7]39
KSO[0..17]39
R_SCRL_LED#43
POWER_SW#18,39R_NUM_LED#43R_CAP_LED#43
USB_BIO+31
USB_HUBP4-38 BT_RADIO_DIS# 23
LID_CL#39
COEX2_WLAN_ACTIVE34
USB_BIO-31
USB_HUBP4+38
COEX1_BT_ACTIVE34
BT_ACTIVE 34,43
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
INT KB
40 63Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Power Switch
Touch PAD
C11
100P
_040
2_50
V8J~
D
@
1
2
Part Number Description
DC28A000800 FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
FAN
C30
100P
_040
2_50
V8J~
D
@
1
2
Part Number Description
DC020003Y0L H-CONN SET ZJXMB-LCD 14 WXGA+
LVDS cable
C56
010
P_0
402_
50V8
J~D
1
2
JTPAD
JST_BM30B-SRDS-G-TFC~D
11 2 233 4 455 6 6
8 810 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 30
77991111131315151717191921212323252527272929G131 G2 32
C25
100P
_040
2_50
V8J~
D
@
1
2
C85
0.1U
_040
2_16
V4Z~
D
1
2
C45
100P
_040
2_50
V8J~
D
@
1
2
C75
100P
_040
2_50
V8J~
D
@
1
2
Part Number Description
DC000001Q0L PCMCIA TYCO1759096-1
PCMCIA BODY
C8
100P
_040
2_50
V8J~
D
@
1
2
C17
100P
_040
2_50
V8J~
D
@
1
2
Part Number Description
DC020004A0L H-CONN SET ZJXMB-B/T MODU
Bluetooth wire set cable
C57
0
33P
_040
2_50
V8J~
D
1
2
C4
100P
_040
2_50
V8J~
D
@
1
2
C3
100P
_040
2_50
V8J~
D
@
1
2
C20
100P
_040
2_50
V8J~
D
@
1
2
C7
100P
_040
2_50
V8J~
D
@
1
2
R51
54.
7K_0
402_
5%~D
12
C6
100P
_040
2_50
V8J~
D
@
1
2
C32
100P
_040
2_50
V8J~
D
@
1
2
C34
100P
_040
2_50
V8J~
D
@
1
2
JKYBRD
FOX_GS12403-0001K-8F~D
11
33
55
77
1111
99
1313
1515
1717
1919
2121
2323
2525
2727
2929
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
30303131323233333434
35 3536 3637 3738 3839 3940 40
GND 41GND 42
C16
100P
_040
2_50
V8J~
D
@
1
2
R6
10K_
0402
_5%
~D
12
C62
0.1U
_040
2_16
V4Z~
D
1
2
C15
100P
_040
2_50
V8J~
D
@
1
2
Part Number Description
DC020004T0L H-CONN SET ZJXMB-TP
T/P wire set cable
C66
10P
_040
2_50
V8J~
D
1
2
Part Number Description
DC020003Z0L H-CONN SET ZJXMB-MDC
MDC wire set cable
C59
610
0P_0
402_
50V8
J~D
@
1
2
C74
100P
_040
2_50
V8J~
D
@
1
2
C33
100P
_040
2_50
V8J~
D
@
1
2
C31
100P
_040
2_50
V8J~
D
@
1
2
Part Number Description
SP070007V0L S SOCKET TYCO 1770551-110P H5.9 SMART
SM CARD BODY
C63
0.04
7U_0
402_
16V4
Z~D
1
2
Part Number Description
GC20323MX00 BATT CR2032 3V220MAH MAXELL
RTC BATT
C14
100P
_040
2_50
V8J~
D
@
1
2
C17
8910
0P_0
402_
50V8
J~D
@
1
2
T31 PAD~D
C73
10P
_040
2_50
V8J~
D
1
2
C21
100P
_040
2_50
V8J~
D
@
1
2
C56
210
P_0
402_
50V8
J~D
1
2
Part Number Description
PK230003Q0L SPK PACK ZJX 2.0W 4 OHM FG
Speak
C12
100P
_040
2_50
V8J~
D
@
1
2
C5610.1U_0402_16V4Z~D
1
2
L2BLM18AG601SN1D_0603~D
1 2
R51
74.
7K_0
402_
5%~D
12
C10
100P
_040
2_50
V8J~
D
@
1
2
C1802100P_0402_50V8J~D
@
1
2
C5
100P
_040
2_50
V8J~
D
@
1
2
PWR_SW@SHORT PADS~D
11 2 2
C5640.1U_0402_16V4Z~D
1
2
C39
100P
_040
2_50
V8J~
D
@
1
2
R51
810
K_04
02_5
%~D 1
2
L1BLM18AG601SN1D_0603~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MOD_EN
N21917830
RUN_ENABLE
HDD_EN_5V
SUS_ON
SUS_ENABLE
SUS_ON_5V#
RUN_ON_5V#
RUN_ON_5V#SUS_ON_5V#
+15V_SUS+5V_ALW
+5V_SUS
+5V_RUN
+5V_SUS+15V_SUS
+5VMOD
+PWR_SRC+PWR_SRC
+5VHDD
+15V_SUS+5V_SUS
+5V_RUN
+1.8V_RUN+1.8V_SUS
+3.3V_SRC
+3.3V_RUN_R
+3.3V_SRC
+3.3V_SUS
+3.3V_RUN
+15V_SUS
+5V_ALW
+3.3V_ALW
+3.3V_ALW
+5V_RUN
+1.5V_RUN +0.9V_DDR_VTT +2.5V_RUN+3.3V_RUN+5V_RUN+1.8V_SUS
+3.3V_SRC
RUN_ON19,37,39,42,46,47,48
MODC_EN#38
ENAB_3VLAN 28
VAUX_EN39,46
HDDC_EN#38
SUS_ON39,42,46
RUN_ENABLE46
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
POWER CONTROL
41 63Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+5VRUN Source
DC/DC Interface
+5VMOD Source
2
+5V_HDD Source
HDD PWR
+3VSUS Source
1A Rating
Discharg Circuit
R22220K_0402_5%~D
12
R202100K_0402_5%~D
12
C12
620.
1U_0
603_
50V4
Z~D
1
2
PJP24
PAD-OPEN 4x4m@
1 2
S
GD
Q23SI3456BDV-T1-E3_TSOP6~D
3
6
245
1
R223100K_0402_5%~D
12
R507100K_0402_5%~D
12
C1788470P_0402_50V7K~D
1
2
G
D
S
Q862N7002W-7-F_SOT323~D
2
13
R1293100K_0402_5%~D
12
G
D
S Q172N7002W-7-F_SOT323~D
2
13
G
D
S Q88
2N70
02W
-7-F
_SO
T323
~D
@
2
13
S
GD Q50
SI3456BDV-T1-E3_TSOP6~D
3
624
51
G
D
S Q91
2N70
02W
-7-F
_SO
T323
~D
@
2
13
C54
64.
7U_0
603_
6.3V
4Z~D
1
2
R1758100K_0402_5%~D
12
Q58DDTC144EUA-7-F_SOT323~D
2
13
G
D
S
Q852N7002W-7-F_SOT323~D
2
13
C30
3310
U_0
805_
10V4
Z~D
1
2
C54
70.
1U_0
603_
50V4
Z~D
@
1
2
C28
447
00P_
0402
_25V
7K~D
1
2
G
D
S Q92
2N70
02W
-7-F
_SO
T323
~D
@
2
13
R17
941K
_040
2_5%
~D
@
12
R1617470K_0402_5%~D
12
R175720K_0402_5%~D
12
G
D
S Q89
2N70
02W
-7-F
_SO
T323
~D
2
13
R17
9530
_060
3_5%
12
C28
310
U_0
805_
10V4
Z~D
1
2
S
GD
Q3001SI3456BDV-T1-E3_TSOP6~D
3
6
245
1
R17
981K
_040
2_5%
~D
@
12
R1759100K_0402_5%~D
12
R1615100K_0402_5%~D
12
R214910K_0402_5%~D
12
G
D
S Q87
2N70
02W
-7-F
_SO
T323
~D
@
2
13
R1614100K_0402_5%~D
12
C30
3410
U_0
805_
10V4
Z~D
1
2
R16
1620
0K_0
402_
5%~D
12
C12
634.
7U_0
603_
6.3V
4Z~D
1
2
C28
510
U_0
805_
10V4
Z~D
1
2
R1764200K_0402_5%~D
12
R1295100K_0402_5%~D
12
G
D
S
Q83
2N70
02W
-7-F
_SO
T323
~D
2
13
PJP22
@PAD-OPEN 4x4m
1 2
G
D
S Q90
2N70
02W
-7-F
_SO
T323
~D
@
2
13
Q24SI4800BDY-T1-E3_SO8~D
365
78
2
4
1
R17
971K
_040
2_5%
~D
@
12
R301120K_0402_5%~D
12
Q6SI4800BDY-T1-E3_SO8~D
365
78
2
4
1
R17
931K
_040
2_5%
~D
@
12
R301220K_0402_5%~D
12
C17
8210
U_0
805_
10V4
Z~D
1
2
R214810K_0402_5%~D
12
G
D
S
Q82
2N70
02W
-7-F
_SO
T323
~D
2
13
R50
410
0K_0
402_
5%~D
12
Q3002SI4800BDY-T1-E3_SO8~D
365
78
2
4
1
R17
961K
_040
2_5%
~D
@
12
Q51DDTC144EUA-7-F_SOT323~D
2
13
R21520K_0402_5%~D
12
S
GD Q57
SI3456BDV-T1-E3_TSOP6~D
3
624
51
G
D
SQ22
2N7002W-7-F_SOT323~D
2
13
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RUNPWROK
IMVP_PWRGD
RESET_OUT#
Z401
2ICH_PWRGD
ICH_PWRGD#
COINCELL
3VRUNRC
+3.3V_SUS+3.3V_RUN
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+COINCELL
+3.3VX
+RTC_CELL
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+COINCELL
+3.3V_RUN_R +3.3V_SRC
+1.5V_RUN +3.3V_SRC
+1.8V_SUS +3.3V_SRC
+3.3V_RUN +3.3V_SRC
+3.3V_RUN_R +SDC_IN
+5V_SUS +SDC_IN
+SDC_IN+3.3V_SRC
+1.5V_RUN+3.3V_SRC
+SDC_IN+3.3V_SRC
+3.3V_SRC +1.8V_SUS
+3.3V_ALW
RUN_ON19,37,39,41,46,47,48
SUSPWROK 18,23
RUNPWROK 38,39,49
RESET_OUT#39
IMVP_PWRGD23,49
ICH_PWRGD# 18
ICH_PWRGD 10,23
SUS_ON39,41,46SUSPWROK_1P8V48
2.5V_RUN_PWRGD18
1.5V_RUN_PWRGD47
1.05V_RUN_PWRGD47
0.9V_DDR_PWRGD48
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Power Good
42 63Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
COIN RTC Battery
For EMI
U26D
74VHC08MTCX_NL_TSSOP14~D
IN113
IN212 OUT 11
P14
G7
U26C
74VHC08MTCX_NL_TSSOP14~D
IN110
IN29 OUT 8
P14
G7
R4711K_0402_5%~D
12
R1383100K_0402_5%~D
12
C1814
0.047U_0402_25V4Z~D
@1 2
R4630_0402_5%~D
1 2
C1811
0.047U_0402_25V4Z~D
@1 2
R31
30_
0402
_5%
~D
12
R31
90_
0402
_5%
~D
12
C5281U_0603_10V4Z~D
1
2
C4800.1U_0402_16V4Z~D 1 2
C1809
0.047U_0402_16V4Z~D
@1 2
U24C
74LVC3G14DC_VSSOP8~D
P8
A3 Y 5
G4
U24B
74LVC3G14DC_VSSOP8~D
P8
A6 Y 2
G4C520
0.01U_0402_16V7K~D
1
2
C18160.1U_0402_16V4Z~D
1
2
C1812
0.047U_0402_25V4Z~D
@1 2
U26A74VHC08MTCX_NL_TSSOP14~DIN11
IN22 OUT 3
P14
G7
R453100K_0402_5%~D
12
R49420K_0402_5%~D
12
U26B
74VHC08MTCX_NL_TSSOP14~D
IN14
IN25 OUT 6
P14
G7
C1806
0.047U_0402_16V4Z~D
@1 2
G
D
S
Q72N7002W-7-F_SOT323~D
2
13
C1815
0.047U_0402_25V4Z~D
@1 2
G
D
S
Q412N7002W-7-F_SOT323~D
2
13
R138610K_0402_5%~D
12
U24A
74LVC3G14DC_VSSOP8~D
P8
A1 Y 7
G4
C1808
0.047U_0402_16V4Z~D
@1 2
C1813
0.047U_0402_16V4Z~D
@1 2
JCOIN
MOLEX_53398-0271~D
1122
C1810
0.047U_0402_25V4Z~D
@1 2
D15BAT54CW_SOT323~D
32
1
R49
0_04
02_5
%~D
12
C1807
0.047U_0402_16V4Z~D
@1 2
C4830.1U_0402_16V4Z~D 1 2
R33
40_
0402
_5%
~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BATT_GREEN_LED
BREATH_LED_B
BAT1_LED#
R_CAP_LED#
R_NUM_LED#
R_SCRL_LED#
BAT2_LED#
BATT_AMBER_LED
BREATH_GREEN_LED
SNIFFER_WIRELESS_ON/OFF#
SNIFFER_GREEN#
R_BT_ACT
SNIFFER_YELLOW#
SNIFFER_G
SNIFFER_Y
SNIFFER#
BT_ACTIVE
SATA_ACT# SATA_ACT#_R
R_MPCI_ACT
+3.3V_ALW
+3.3V_SUS
+3.3V_RUN_R
+3.3V_ALW
+3.3V_ALW
+3.3V_SUS
+5V_RUN
+3.3V_SUS
+3.3V_RUN_R +3.3V_RUN_R
+3.3V_ALW
BREATH_LED39
BAT1_LED#39
SCRL_LED#39
CAP_LED#39
NUM_LED#39
LED_WLAN_OUT#34
BAT2_LED#39
BATT_GREEN_LED 32
BATT_AMBER_LED 32
R_MPCI_ACT 32
SNIFFER_WIRELESS_ON/OFF#38
SNIFFER#39
BREATH_GREEN_LED 32
R_SCRL_LED# 40
R_NUM_LED# 40
R_CAP_LED# 40
SNIFFER_GREEN#18
R_BT_ACT 32
SNIFFER_YELLOW#18
BT_ACTIVE34,40
R_PIDEACT 36
R_SATA_ACT 32
SNIFFER_LED_OFF#39
SATA_ACT#22
SNIFFER_LED_OFF#39
Title
Size Document Number R ev
Date: Sheet o fLA-2791 0.6
PAD and Standoff
43 63Tuesday, February 07, 2006
Compal Electronics, Inc.
Fiducial Mark
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
EMI CLIP
Disable HDD LED
FD11
FIDUCIAL MARK~D
1
R2
330_0402_5%~D
1 2
CLIP6EMI_CLIP
@
GND1
H31@H_C24D24N
1H8
@H_T217B315D98
1
FD8
FIDUCIAL MARK~D
1H19
@H_C217D91
1
FD12
FIDUCIAL MARK~D
1H16@H_T217B315D98
1
R265
330_0402_5%~D
1 2
FD1
FIDUCIAL MARK~D
1
R14480_0402_5%~D @
1 2
EB
CQ3MMST3904-7-F_SOT323~D
2
31
FD15
FIDUCIAL MARK~D
1
Q1DDTA114EUA-7-F_SOT323~D
2
13
H15@H_C315D118
1
H14@H_T315B237D118
1
H20@H_T217B315D98
1
R19 220_0402_5%~D
1 2
H30@H_O115X31D115X31N
1
JSNIFF
1BS008-13130-002-7F_4P~D
11
22
33
44
R237330_0402_5%~D
12
FD5
FIDUCIAL MARK~D
1
C
BE
Q65PMST3906_SOT323-3~D 1
2
3
H6@H_C236B256D110
1
Q18DDTA114EUA-7-F_SOT323~D
2
13
H10@H_C315D110
1
H2H_T146B217D91
1
R144510K_0402_5%~D@
12
H9@H_C315D110
1
R21330_0402_5%~D
12
FD14
FIDUCIAL MARK~D
1
Q35DDTA114EUA-7-F_SOT323~D
2
13
H28@H_O115X31D115X31N
1
Q13DDTA114EUA-7-F_SOT323~D
2
13
FD3
FIDUCIAL MARK~D
1
CLIP2EMI_CLIP
@
GND1
H29@H_O115X31D115X31N
1
H4H_T256B63D47
1
FD13
FIDUCIAL MARK~D
1
H32@H_C24D24N
1
H5@H_C315D110
1
R20 220_0402_5%~D
1 2
G
D
SQ4BSS138W-7-F_SOT323~D
2
13
CLIP3EMI_CLIP
@
GND1
H26@H_C472D376
1
H12@H_C315D118
1
Q2DDTA114EUA-7-F_SOT323~D
2
13
R5610K_0402_5%~D
12
H1H_T146B217D91
1
R143410K_0402_5%~D
1 2
H7@H_C315D110
1
R5
220_0402_5%~D
1 2
FD18
FIDUCIAL MARK~D
1
CLIP4EMI_CLIP
@
GND 1
R81K_0402_5%~D 1 2
R15
100_0402_5%~D
1 2
H18@H_C217D91
1 FD17
FIDUCIAL MARK~D
1
FD2
FIDUCIAL MARK~D
1
Y
G
D4
12-22AUYSYGC/530-A2/TR8_G/Y~D
3
21
FD7
FIDUCIAL MARK~D
1
Q5DDTA114EUA-7-F_SOT323~D
21
3
FD6
FIDUCIAL MARK~D
1
R7610K_0402_5%~D
12
H3@H_C315D110
1
H11@H_T315B237D118
1
FD4
FIDUCIAL MARK~D
1
Q16DDTA114EUA-7-F_SOT323~D
2
13
R231330_0402_5%~D
12
R310K_0402_5%~D
1 2
H17@H_T217B315D98
1
H27@H_C472D431X376
1
R1
56_0402_5%~D
1 2
H13@H_C315D118
1
FD9
FIDUCIAL MARK~D
1
FD16
FIDUCIAL MARK~D
1
CLIP1EMI_CLIP
@
GND 1
FD19
FIDUCIAL MARK~D
1
G
DS
Q66BSS138W-7-F_SOT323~D
2
13
FD10
FIDUCIAL MARK~D
1
CLIP5EMI_CLIP
@
GND 1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+ADP_DCIN
DOCK_DC_IN
PS_ID_IN
PWR_ID
PS_ID_IN
+3.3V_ALW+5V_ALW
+5V_ALW
+DC_IN
+PWR_SRC+3.3VX
+5V_ALW
PS_ID 39
PS_ID_DISABLE# 39
PS_ID_IN36
DOCK_DC_IN36
Title
Size Document Number R ev
Date: Sheet o f
0.6
+DCIN
44 63Tuesday, February 07, 2006
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
THESE CAPS MUST BENEXT TO JCHG
DC_IN+ Source
Z-series AC AdaptorConnctor
+3.3VX Source
LA-2792
PR346
0_0402_5%~D
@1 2
PL2FBMA-L18-453215-900LMA90T_1812~D 1 2
PC
50.
1U_0
603_
25V
7K~D
12
PC
20.
47U
_080
5_25
V7k
12
PR
1310
0K_0
402_
1%~D
12
PC72.2U_0603_6.3V6K~D
1
2
PD
2D
A20
4U_S
OT3
23~D
231
PQ3FDS6679Z_SO8~D
3 6
5
78
2
4
1
PR18433_0402_5%~D 1 2
PL34FBMA-L18-453215-900LMA90T_1812~D 1 2
PL1FBM-L11-160808-601LMT 0603~D
12
PR
124.
7K_0
603_
5%~D
@
12
PD53SM24_SOT23
@ 2 31 PR299
100_0402_5%~D
@1 2
G
D S
PQ1
FDV301N_SOT23~D
2
1 3
PR
22.
2K_0
402_
5%~D
12
PD
41D
A20
4U_S
OT3
23~D
@
231
MIC5235-3.3BM5_SOT23-5~D
PU1
IN1
GN
D2
OUT 5
NC 4EN3
PR
11
150K
_040
2_1%
~D
12
PR
610
0K_0
402_
1%~D
12
PC
610
U_1
206_
25V6
M~D
1
2
PR
1015
K_0
402_
1%~D
12
PC
11U
_080
5_25
V4Z
~D
12
TYCO_1566065-2~DPJPDC1
Low_PWR 1
DC+_1 2
DC+_2 3
DC-_1 4
DC-_2 5GND_16
GND_27
GND_38
GND_49
MH
1M
H2
PC
40.
1U_0
603_
25V
7K~D
12
PR
710
K_0
402_
1%~D
12
EB
CPQ2MMST3904-7-F_SOT323~D
2
31
PC
310
00P
_040
2_50
V7K~
D1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Z4304Z4305Z4306
Z4301Z4302Z4303
PBATT+
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
SBATT+
PBAT_PRES# 38PBAT_SMBDAT 39,50
PBAT_ALARM# 38
PBAT_SMBCLK 39,50
SBAT_ALARM# 38
SBAT_PRES# 38,51SBAT_SMBDAT 19,39SBAT_SMBCLK 19,39
Title
Size Document Number Rev
Date: Sheet o f
0.6
Battery Conn.
45 63Tuesday, February 07, 2006
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
ESD Diodes
Primary Battery Connector
SUYIN_20175A-09G1TOP view
9
8
7
6
5
4
3
2
1
ESD Diodes
Secondary Battery Connector
LA-2792
PC
1022
00P_
0402
_50V
7K~D
12
PR304100_0402_5%~D
1 2
PD9DA204U_SOT323~D @
231
PC
230
0.1U
_060
3_25
V7K~
D
12
PD11DA204U_SOT323~D @
231
PD45DA204U_SOT323~D @
231
PR303100_0402_5%~D
1 2
PD42DA204U_SOT323~D @
231
PR22100_0402_5%~D
1 2
PR
300
10K_
0402
_5%
~D
12
PD43DA204U_SOT323~D @
231
PR20100_0402_5%~D
1 2
PR23100_0402_5%~D
1 2
PL32FBMA-L18-453215-900LMA90T_1812~D
1 2
PR302100_0402_5%~D
1 2
PC
231
2200
P_04
02_5
0V7K
~D
12
PD10DA204U_SOT323~D @
231
PR301100_0402_5%~D
1 2
PD12DA204U_SOT323~D @
231 PL6
FBMA-L18-453215-900LMA90T_1812~D 1 2
PC
90.
1U_0
603_
25V7
K~D
12
PJP1
TYCO_1734077-1~D
BATT1+ 1
SMB_CLK 3SMB_DAT 4
BATT_PRES# 5SYSPRES# 6
BATT2- 9GND10GND11
BATT2+ 2
BATT_VOLT 7BATT1- 8
PD44DA204U_SOT323~D @
231
PR21100_0402_5%~D
1 2
PR
1910
K_04
02_1
%~D
12
PBATT1
SUYIN_200277MR009G506ZR~D
BATT1+ 1
SMB_CLK 3SMB_DAT 4
BATT_PRES# 5SYSPRES# 6
BATT2- 9GND10GND11
BATT2+ 2
BATT_VOLT 7BATT1- 8
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+15V
S
MAX
1999
_SKI
P#
MAX8734_REF
+15VS_L
+15V_SUSP
+5V_SUSP
+5V_ALW
+PWR_SRC
+3.3V_SRCP
+VCC_MAX1999
+3.3V_SRCP
+15V_SUSP
+3.3V_SRCP
+15V_SUS
+5V_SUS+5V_SUSP
+3.3V_SRC
+VCC_MAX1999
+DC1_PWR_SRC
+VCC_MAX1999
NC_TEST2
NC_TEST1
+3.3V_ALW+3.3VX
+3.3V_SRC
+3.3V_ALW
SUSPWROK_5V 48
SUS_ON39,41,42
RUN_ON 19,37,39,41,42,47,48
MAX8734_REF
THERM_STP# 18
ALWON39
THERM_STP#18
SUS_ON39,41,42
VAUX_EN39,41
RUN_ENABLE 41
Title
Size Document Number R ev
Date: Sheet o f
0.6
+3.3V/+5V/+15V
46 63Tuesday, February 07, 2006
Compal Electronics, Inc.
Typical:4A Typical:5APeak current:8A Peak current:7A
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
OCP point is from 8.2A to 10.5A OCP point is from 8A to 11.2A
DELL CONFIDENTIAL/PROPRIETARY
Place these CAPsclose to FETs
DC/DC +3V/ +5V/ +15VPlace these CAPsclose to FETs
LA-2792
PR
270_
1206
_5%
~D
12
PQ78SI4800BDY-T1_SO8~D
365 7 8
2
4
1
PC280.1U_0603_25V7K~D
12
PR
510_
0402
_5%
~D 12
PD
35M
MB
Z524
5B_S
OT2
3~D
1
2 3
PC
300.
1U_0
402_
10V
7K~D
12
PC
344.
7U_1
206_
10V
7K~D
12
PC
2522
00P
_040
2_50
V7K~
D
12
PQ77SI4800BDY-T1_SO8~D
36 578
2
4
1
PC2510.1U_0603_25V7K~D
12
PR203100_0805_5%~D
1 2
PR480_0402_5%~D
@
12
PR
349
0_04
02_5
%~D 1
2
PJP4
PAD-OPEN 4x4m
1 2
+
PC
2933
0U_D
3L_6
.3V
_R25
~D
1
2
PR3530_0402_5%~D
@
12
PC
204.
7U_1
206_
25V
6K~D
@
12
PC
1610
U_1
206_
25V
6M~D
1
2
PR290_0603_5%~D
1 2
PQ5SI4810BDY_SO8~D
36 578
2
4
1
PR491K_0402_1%~D
1 2
PC
210.
1U_0
603_
25V
7K~D
12
PC
156
2.2U
_120
6_25
V7M
~D
12
PC
320.
1U_0
402_
10V
7K~D
12
PC270.1U_0603_25V7K~D
1 2
PC
180.
1U_0
603_
25V
7K~D
12
+
PC
3133
0U_D
3L_6
.3V
_R25
~D
1
2
PU17TC7SH32FU_SSOP5~D
I02
I11 O 4
P5
G3
PR3540_0402_5%~D
12
PD
14R
B71
7F_S
OT3
23~D
2 31
PR
4424
3K_0
402_
1%~D
12
PR
4210
0K_0
402_
1%~D
12
PR
347
100K
_040
2_1%
~D
@ 12
PR2847_0603_5%~D
12
PQ6SI4810BDY_SO8~D
365 7 8
2
4
1
PC
268
10U
_120
6_25
V6M
~D
@
1
2
PR3550_0603_5%~D
@
12
+
PC
244
330U
_D3L
_6.3
V_R
25~D
@
1
2
+
PC
252
100U
_25V
_M
1
2
PR3560_0603_5%~D
@
12
S
GD
PQ82
FDC655BN_NL_SSOT-6~D
3
6 24
5 1
PC
241U
_060
3_10
V6K
~D
12
PJP25
PAD-OPEN 4x4m
1 2
PC
1710
U_1
206_
25V
6M~D
1
2
PL22FBM-L11-453215-900LMAT_1812~D
1 2
PC
231U
_060
3_10
V6K
~D
12
PD
13E
C11
FS2_
SO
D10
6~D
21
+
PC
245
330U
_D3L
_6.3
V_R
25~D
@
1
2
PR
3812
.7K
_040
2_1%
~D
12
PL84.7U_STQB125A-4722_8A_30%~D
14
32
PR3430_0402_5%~D@
12
PC
224.
7U_1
206_
25V
6K~D
12
PR
3745
.3K
_040
2_1%
~D
12
G
D
S PQ80RHU002N06_SOT323
@
2
13
PR412K_0402_1%~D
1 2
PR460_0402_5%~D
12
PC
3610
00P
_040
2_50
V7K~
D
@
12
PC
260.
1U_0
603_
25V
7K~D
12
PC
152.
2U_1
206_
25V
7M~D
12
PC
331U
_060
3_10
V6K
~D
12
PR
4724
0K_0
402_
5%~D
12
PR3450_0402_5%~D
12
PR3440_0402_5%~D
@12
PJP5
PAD-OPEN 4x4m
1 2
PC
1922
00P
_040
2_50
V7K~
D
12
PR322.2_0603_5%~D
1 2
PR500_0402_5%~D
@
12
PJP6
PAD-OPEN 4x4m
1 2
PL94.7U_SPC-1205P-4R7B_+40-20%~D
1 2
PU3
MAX8734AEEI_QSOP28~D
SHDN6
BST328
DH326
LX327
DL324
OUT322
LX5 15
DL5 19
FB5 9PRO 10
ILIM5 11ILIM3 5REF 8
V+20
VCC17
LDO5 18
BST5 14
DH5 16
OUT5 21N.C. 1
TON 13GND 23
SK
IP12
LDO325
FB37
ON33ON54
PGOOD 2
PR
188
453K
_040
2_1%
~D
12
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
+1.5VRUNP_L +VCCP_1P05VP_L
+1.5V_RUNP +1.5V_RUN
+5V_SUS
+1.5V_RUNP +VCCP_1P05VP
+PWR_SRC +DC2_PWR_SRC
+VCCP_1P05VP +1.05V_VCCP
RUN_ON19,37,39,41,42,46,48
1.05V_RUN_PWRGD 42
RUN_ON 19,37,39,41,42,46,48
1.5V_RUN_PWRGD42
Title
Size Document Number Rev
Date: Sheet o f
0.6
+1.5VSUSP /+VCCP_1P05VP
47 63Tuesday, February 07, 2006
Compal Electronics, Inc.
+1.5VRUNP / +VCCP_1P05VP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
Max current:5A Peak current:10A Typical:8A
OCP=7.08~11.96AOCP=14.23~18.39A
LA-2792
PQ83
FDS
6670
AS
_SO
8~D
36 578
2
4
1
PC
208
10U
_080
5_6.
3V5K
~D
@
12
PL263.8uH_SIL104-3R8_6A_30%~D
1 2
PR22528.7K_0603_1%~D
12
PC2101000P_0402_50V7K~D
@ 12
PR
281
0_04
02_5
%~D
@12
PR2800_0402_5%~D
12PR279
0_0402_5%~D
12
PJP21
PAD-OPEN 4x4m
1 2
PL25FBM-L11-453215-900LMAT_1812~D 1 2
PC
160
10U
_120
6_25
V6M
~D
1
2
PC
170
0.01
U_0
402_
25V7
K~D
12
PC
165
2.2U
_080
5_10
V6K~
D
12
PJP19
PAD-OPEN 4x4m
1 2
PQ38
FDS
8880
_SO
8~D
365 7 8
2
4
1
PC
205
1U_0
603_
10V6
K~D
12
PQ40
FDS
6670
AS
_SO
8~D
365 7 8
2
4
1
PD
37R
B75
1V_S
OD
323~
D
21
PR2820_0402_5%~D
@
12
PC
166
0.1U
_060
3_25
V7K~
D
12
PJP20
PAD-OPEN 4x4m
1 2
PQ8
FDS
8880
_SO
8~D
36 578
2
4
1
PR21610_0805_5%~D
12
PR2721K_0402_1%~D
12
PR
226
30.1
K_0
603_
1%~D
12
PC
263
2200
P_04
02_5
0V7K
~D
12
PC
261
0.01
U_0
402_
25V7
K~D
12
PL271.5uH_SIL104-1R5_10A_30%~D
1 2
PR2191.43K_0402_1%~D
1 2
PC
164
0.1U
_060
3_25
V7K~
D
12
PC
265
100P
_040
2_50
V8K
@
12
PC
211
1000
P_04
02_5
0V7K
~D
@
12
PR277
0_0603_5%~D
12
PR2271K_0402_1%~D
12
PJP23
PAD-OPEN 4x4m
1 2
PC
207
10U
_080
5_6.
3V5K
~D
@
12
ISL6227CA-T
PU9
ISL6227CA-T_SSOP28~D
GND 1
LGATE1 2
PGND1 3
PHASE1 4
UGATE1 5
BOOT1 6
ISEN1 7
EN1 8
VOUT1 9VSEN1 10
OCSET1 11
SOFT1 12
DDR 13VIN 14
PG1 15PG2/REF16
SOFT217
OCSET218
VSEN219VOUT220
EN221
ISEN222
BOOT223
UGATE224
PHASE225
PGND226
LGATE227
VCC28
PC
169
0.01
U_0
402_
25V7
K~D
12
PC
264
100P
_040
2_50
V8K
@
12
PC
262
2200
P_04
02_5
0V7K
~D
12P
C16
10.
1U_0
603_
25V7
K~D
12
PC
167
0.1U
_060
3_25
V7K~
D
12
+
PC
206
330U
_D2E
_2.5
VM_R
9~D
1
2PR
221
19.6
K_04
02_1
%~D
12
PC
159
10U
_120
6_25
V6M
~D
1
2
PR2780_0603_5%~D
12
PR
222
5.11
K_0
402_
1%~D
12
PR2202.1K_0402_1%~D
1 2
PC
162
10U
_120
6_25
V6M
~D
1
2
PR223124K_0402_1%
1 2
PC1730.01U_0402_25V7K~D
1 2
+
PC
168
330U
_D2E
_2.5
VM_R
9~D
1
2
PR224124K_0402_1%
1 2
PC1720.01U_0402_25V7K~D
1 2
PC
163
10U
_120
6_25
V6M
~D
1
2
PD
36
RB
751V
_SO
D32
3~D
21
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.8VSUSP_L
88550_AVDD
88550_AVDD
+1.8V_SUSP
+1.8V_SUSP
+1.8V_SUSP
+5V_SUS
+1.8V_SUS
+PWR_SRC
+0.9V_DDR_VTTP
+3.3V_SUS
+1.8V_SUSP
+0.9V_DDR_VTTP +0.9V_DDR_VTT
+DDR_PWR_SRC
+3.3V_RUN
SUSPWROK_1P8V 42
SUSPWROK_5V 46
RUN_ON 19,37,39,41,42,46,47
0.9V_DDR_PWRGD 42
V_DDR_MCH_REF 10,16,17
Title
Size Document Number R ev
Date: Sheet o f
0.6
48 63Tuesday, February 07, 2006
Compal Electronics, Inc.
Design current 8A for +1.8V_SUSPPeak current 10.1A for +1.8VSUSP
DELL CONFIDENTIAL/PROPRIETARY
+1.8VSUSP/ +0.9V_DDR_VT
Design current 1.05A for +0.9V_DDR_VTTPPeak current 1.5A for +0.9V_DDR_VTTP
OCP point is 12.7A for +1.8VSUSP
+1.8VSUSP/ +0.9V_DDR_VTTDDR2 Termination
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PR193, PD20 are only used with the second-source MAX8632.
LA-2792
PJP10PAD-OPEN 4x4m1 2
PC
157
10U
_080
5_6.
3V6M
~D
1
2
PJP11
PAD-OPEN 4x4m
1 2
PQ
34IR
F782
1_S
O8~
D
S1
S2
S3
G4
D8
D7
D6
D5
PC
154
10U
_080
5_6.
3V6M
~D
1
2
PR193
10_1206_5%~D
@12
PC
624.
7U_1
206_
10V
7K~D
12
PR3480_0402_5%~D
1 2
PL24FBM-L11-453215-900LMAT_1812~D
1 2
PC
720.
1U_0
402_
10V
7K~D
12
PC
570.
1U_0
603_
25V
7K~D
12
PR2120_0402_5%~D
12
PQ
11IR
F783
2_S
O8~
D
36 578
2
4
1
PC
5822
00P
_040
2_50
V7K~
D
12P
C55
10U
_120
6_25
V6M
~D
1
2
PC661000P_0402_50V7K~D
12
+
PC
7133
0U_D
2E_2
.5V
M~D
1
2
PC1550.22U_0402_6.3V 5K~D
12
PR840_0402_5%~D @
12
PC641U_0603_10V6K~D
12
PC
5610
U_1
206_
25V
6M~D
1
2
PJP32PAD-OPEN 4x4m1 2
PC770.1U_0402_10V7K~D
12
PC
153
10U
_080
5_6.
3V6M
~D
1
2
PR2130_0402_5%~D
12
PC680.22U_0603_10V7K~D
1 2
PL141.4UH_HMU1350-1R4PF_15A_20%~D
1 2
3
PR20248.7K_0402_1%~D
12
PC
631U
_060
3_10
V6K
~D
12
PD
20R
B75
1V-4
0_S
OD
323~
D
@
21
PR
194
100K
_040
2_1%
~D
12
PC
740.
1U_0
402_
10V
7K~D
12
PR
195
100K
_040
2_1%
~D
@ 12
PR
200
100K
_040
2_1%
~D
12
PR20420_0603_1%~D
12
PU6
ISL88550A_TQFN28~D
SK
IP25
VD
D22
PGND123
LX19
AV
DD
26
REF3
TON1
OV
P/ U
VP
2
SS
8
GN
D24
POK1 5
POK2 6
VTT 12
STBY 7
TP0
28
VOUT16 REFIN 14
FB15
VTTR 10
ILIM
4
PGND2 11
DH18
DL21
VTTS 9
SHDN 27
VIN 17BST20
VTTI 13
GN
D29
+
PC
7033
0U_D
2E_2
.5V
M~D
1
2
PR73
1_0603_5%~D
12
PC14610U_0805_6.3V6M~D
1
2
PJP9PAD-OPEN 4x4m1 2
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
H H
G G
F F
E E
D D
C C
B B
A A
VSUM
VSUM
VSUM
VO
VO
VSUM
VO
VO
PHASE1
PHASE2
PHASE3
+PWR_SRC
+VCC_CORE
+CPU_PWR_SRC
+CPU_PWR_SRC
+VCC_CORE
+5V_RUN
+5V_RUN
+CPU_PWR_SRC
+5V_RUN
+3.3V_RUN
+CPU_PWR_SRC
+5V_RUN
+VCC_CORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
VID08VID18VID28
VID48VID38
VID58VID68
H_DPRSTP#7,22
DPRSLPVR23
H_PSI#8
RUNPWROK38,39,42
RUNPWROK38,39,42
VSSSENSE8
VCCSENSE8
IMVP_PWRGD 23,42
IMVP6_PROCHOT#38
CLK_ENABLE#6
Title
Size Document Number R ev
Date: Sheet o f
0.6
+VCORE
49 63Tuesday, February 07, 2006
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
LA-2792
PR
266
15K
_040
2_1%
~D
12
PR2490_0402_5%~D
@ 12
PR26011.5K_0402_1%~D
12
PR25982.5K_0402_1%~D
12
PC
193
10U
_120
6_25
V6M
~D
1
2
PR
290
0_06
03_5
%~D
12
PR33010K_0402_1%~D
1 2
PR2450_0402_5%~D
12
PC1870.01U_0402_16V7K~D
12
PR23010K_0402_1%~D
1 2
PC
270
10U
_120
6_25
V6M
~D
@
1
2
PR2440_0402_5%~D
12
PH1
470KB_0402_5%_NCP15WM474J03RB~D
@12
PC
228
2200
P_0
402_
50V7
K~D
12
PU10
ISL6208CRZ-T_QFN8~D
BOOT 1
FCCM6
VCC5
PWM2
LGATE 4GND3
PHASE 7
UGATE 8
PC
271
10U
_120
6_25
V6M
~D
@
1
2
PC
249
0.1U
_060
3_25
V7K
~D
12
PQ
61FD
S70
88S
N3_
SO
8~D
G 2
D3
S1
PC
272
10U
_120
6_25
V6M
~D
@
1
2
PC
175
4.7U
_120
6_25
V6K
~D
12
PQ
42IR
F782
1_S
O8~
D
S1
S2
S3
G4
D8
D7
D6
D5
PU16
ISL6208CRZ-T_QFN8~D
BOOT 1
FCCM6
VCC5
PWM2
LGATE 4GND3
PHASE 7
UGATE 8
PR2341.91K_0603_1%~D
12
PC
224
2200
P_0
402_
50V7
K~D
12
PC201
330P_0402_50V7K~D
12
PC
223
0.1U
_060
3_25
V7K
~D
12
PC
194
4.7U
_120
6_25
V6K
~D
12
PR238147K_0402_1%~D
12
PC
215
0.06
8U_0
402_
10V
7K~D
1
2
PQ
56FD
S70
88S
N3_
SO
8~D
G 2
D3
S1
PR2290_0603_5%~D
12
PC2501500P_0402_50V7K~D
1 2
PR2707.68K_0805_1%~D
12
PR2540_0402_5%~D
12
PC
241
1U_0
603_
10V
6K~D
12
PR2530_0402_5%~D
12
PC213
1000P_0402_50V7K~D
12
PC
227
0.1U
_060
3_25
V7K
~D
12
PR3280_0603_5%~D
12
PR3317.68K_0805_1%~D
12PR372
0_0402_5%~D
12
PH
2
6.8K
B_0
603_
5%_E
RTJ
1VR
682J
~D
12
PR2620_0603_5%~D
12
PR2390_0402_5%~D
12
PC
177
10U
_120
6_25
V6M
~D
1
2
PR27110_0402_1%~D
12P
C22
90.
01U
_040
2_16
V7K
~D
1
2
PQ
57IR
F782
1_S
O8~
D
S1
S2
S3
G4
D8
D7
D6
D5
PC1790.22U_0603_10V7K~D
1 2
PC
260
0.1U
_060
3_25
V7K
~D
12
PR248
499_0402_1%~D
12
PR2646.34K_0402_1%~D
12
PC197
1000P_0402_50V7K~D
12
PR32910_0402_1%~D
12
PC2430.22U_0603_10V7K~D
12
PR26910K_0402_1%~D
1 2
PC
192
4.7U
_120
6_25
V6K
~D
12
PL28FBMA-L18-453215-900LMA90T_1812~D 1 2
PR2410_0402_5%~D
12
PC1980.22U_0603_10V7K~D
1 2PC190
680P_0402_50V7K~D
1 2
PC
240
2200
P_0
402_
50V7
K~D
12
PC2420.22U_0603_10V7K~D
1 2
PC
248
1500
P_0
805_
50V7
K
@
12
PJP30
PAD-OPEN 4x4m
1 2
PC
246
1500
P_0
805_
50V7
K
@
12
PR2840_0402_5%~D
@ 12
PR2870_0603_5%~D
12
PR
263
4.53
K_0
402_
1%~D
12
PR23210_0402_1%~D
12
PQ
60FD
S70
88S
N3_
SO
8~D
G 2
D3
S1
PL310.45UH_MPC1040LR45_27A_20%~D1
3
4
2
PU11
ISL6260CRZ-T_QFN40~D
VW8
PGD_IN2
PSI#1
DPRSLPVR36
DPRSTP#37
VID634 VID533
RTN13
FB10
COMP9
VS
S19
VDIFF11
DFB
15
VO
16
ISEN3 21
OCSET 7
PWM3 25
FCCM 24
CLK_EN#38
VR_TT#4
RBIAS3
NTC5
SOFT6
VID028VID129VID230VID331VID432
3V3
39
VSUM 17
VSEN12
VR_ON35
PWM1 27
ISEN2 22
ISEN1 23
PWM2 26
DR
OO
P14
VD
D20
VIN
18
PG
OO
D40
GND41
PC195220P_0402_50V8J~D
1 2
PR
233
10_0
603_
5%~D
12
PR2681K_0402_1%~D
12
PC
180
0.01
U_0
402_
25V
7K~D
12
PC214
1000P_0402_50V7K~D
12
PC
176
10U
_120
6_25
V6M
~D
1
2
PR2520_0402_5%~D
12
PR258
2.21K_0402_1%~D
12
PL330.45UH_MPC1040LR45_27A_20%~D
1
3
4
2
PC
182
1U_0
603_
10V
6K~D
12
PR2430_0402_5%~D
12
PC
178
1U_0
603_
10V
6K~D
12
PR22810_0603_5%~D
12
PC1810.22U_0603_10V7K~D
12
PC
196
1U_0
603_
10V
6K~D
12
PC
239
0.1U
_060
3_25
V7K
~D
12
PR
261
2.43
K_0
402_
1%~D
12
PR2400_0402_5%~D
12
PC2000.22U_0603_10V7K~D
12
PR2317.68K_0805_1%~D
12
PR2420_0402_5%~D
12
PU13
ISL6208CRZ-T_QFN8~D
BOOT 1
FCCM6
VCC5
PWM2
LGATE 4GND3
PHASE 7
UGATE 8
PC
191
0.33
U_0
603_
10V
7K
1
2
PR26710.5K_0402_1%
12
PR257
332_0402_1%~D
12
PQ
50IR
F782
1_S
O8~
D
S1
S2
S3
G4
D8
D7
D6
D5
PL290.45UH_MPC1040LR45_27A_20%~D
1
3
4
2
PJP31
PAD-OPEN 4x4m
1 2
PC
247
1500
P_0
805_
50V7
K
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MAX8731_IINP
MAX8731_REF
LDO
LDO
+VCHGR_B +VCHGR_L
MAX8731_REF
MAX8731_IINP
+VCHGR
+DC_IN
+5V_ALW
CHAGER_SRC+SDC_IN
+5V_ALW +3.3V_ALW
+5V_ALW
+5V_ALW
+VCHGR
+5V_ALW
ACAV_IN18,39,51
PBAT_SMBCLK39,45
PBAT_SMBDAT39,45
BAT_SEL#39
ADAPT_OC 38
Title
Size Document Number Rev
Date: Sheet o f
0.6
Charger
50 63Tuesday, February 07, 2006
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
+DC_IN discharge path
Vin DetectorHigh 17.9 VLow 17.24 V
LA-2792
PC
266
0.01
U_0
603_
50V7
K~D
@
1
2
PQ75
SI4
800B
DY
-T1_
SO8~
D
@
365 7 8
2
4
1
PR3601_0603_1%~D 12
PR1450.01_2512_1%~D
4
2
1
3
PC
120
0.1U
_040
2_10
V7K~
D
12
PR14320K_0402_1%~D
12
PU8
MAX8731_TQFN28~D
DHI 24
CSIP 18
LX 23
FBSA 15
SDA9
IINP8
GN
D1
DCIN22
ACIN2
VDD11
SCL10
ACOK13
BATSEL14
BST 25
FBSB 16
CCS4
LDO 21
VCC 26
CSS
P28
CSIN 17
PGND 19
DLO 20
CCV6
CCI5
CSS
N27
REF3
DAC7
GND12
GND29
PC2041U_0603_10V6K~D
1 2
PR2750_0603_5%~D
1 2
PR
366
100K
_040
2_1%
~D 12
G
D
S PQ81RHU002N06_SOT323
2
13
PC
114
10U
_120
6_6.
3V7K
~D
1
2
PC
259
10P
_040
2_50
V8J~
D1
2
PR
364
27.4
K_04
02_1
%~D 1
2
PR
149
10K_
0402
_1%
~D1
2
PC
121
0.1U
_040
2_10
V7K~
D
12
PR
341
15.8
K_04
02_1
%~D
12
PC
255
100P
_040
2_50
V8K
12
PC
258
0.01
U_0
402_
25V7
K~D
12
PC
273
10U
_120
6_25
V6M
~D
@
1
2
PU19BLM393DR_SO8~D
IN+5
IN-6 O 7
P8
G4
PC253220P_0402_50V7K~D
1
2
PC
254
0.01
U_0
402_
25V7
K~D
12
PR
362
301K
_040
2_1%
~D
12
PC
106
10U
_120
6_25
V6M
~D
1
2
PC
267
3300
PF_0
402_
50V7
K~D
12
PR335
0_0402_5%~D
1 2
PL19FBMA-L18-453215-900LMA90T_1812~D 1 2
PC
256
100P
_040
2_50
V8K
12
PQ79
IRF7
821_
SO
8~D
S1
S2
S3
G4
D8
D7
D6
D5
PR
367
100K
_040
2_5%
~D1
2
PC
113
10U
_120
6_6.
3V7K
~D
1
2
PR1380.01_2512_1%~D
4
2
1
3
PC
127
2200
P_04
02_5
0V7K
~D
12
PC110
0.01U_0402_25V7K~D
12
PR3360_0402_5%~D
12
PR342806K_0402_1%~D
12
PR373
1K_0603_1%~D
1 2
PU19ALM393DR_SO8~D
IN+3
IN-2O 1
P8
G4
PR
363
59K_
0402
_1%
~D
12
PC
203
0.1U
_060
3_25
V7K~
D
12
PR
148
4.7K
_040
2_5%
~D
12
PR3370_0402_5%~D
@
12
PC2210.1U_0402_10V7K~D
12
PC1021U_0805_25V4Z~D
12
PR3654.32M_0402_1%~D1 2
PC
257
100P
_040
2_50
V8K
12
PL205.6U_HMU1356-5R6_8.8A_20%~D
12
PC
128
0.1U
_060
3_25
V7K~
D
12
PQ76SI4810BDY_SO8~D
365 7 8
2
4
1
PC
103
2200
P_04
02_5
0V7K
~D
12
PC
119
0.01
U_0
402_
25V7
K~D
12
PC
105
10U
_120
6_25
V6M
~D
1
2
PC
118
0.01
U_0
402_
25V7
K~D
12P
R15
010
K_04
02_1
%~D
12
PC
112
0.1U
_060
3_25
V7K~
D
12
PR361
0_0402_5%~D
1 2
PC
122
1U_0
603_
10V6
K~D
12
1SS
355_
SOD
323~
DP
D54
21
PC2021U_0603_10V6K~D
1 2
PR27433_0603_1%~D
12
PC
9910
U_1
206_
25V6
M~D
1
2
PR142150K_0402_1%~D
12
PC
104
0.1U
_060
3_25
V7K~
D
12
PR368100_0402_5%~D
1 2
PC
212
0.01
U_0
402_
25V7
K~D
12
PD
40R
B75
1V_S
OD
323~
D
21
PR146
0_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PBAT_G
CHG_PBAT_N
CHG_PBATT_N
CHG_SBATT_N
CHG_SBATT_NCHG_SBAT
SBAT_G
CHG_PBAT
CHG_SBAT_N
+SDC_IN
+VCHGR
+PWR_SRC
+VCHGR
+PWR_SRC
PBATT+
PBATT+
SBATT+
+3.3V_ALW
+3.3V_ALW+3.3V_ALW
SBATT+
PBATT+
CHG_PBATT38
CHG_SBATT38
ACAV_IN18,39,50
SBAT_PRES#38,45
SBAT_LOW38
Title
Size Document Number Rev
Date: Sheet o f
0.6
Selector
51 63Tuesday, February 07, 2006
+DC_IN discharge path
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
LA-2792
PR
326
32.4
K_04
02_1
%~D
12
PD50
RB715F_SOT323
2
31
PQ72SI4835BDY_SO8~D
3 6
5
78
2
4
1
PR
318
33K_
0402
_5%
~D
12
PR310100K_0402_5%~D
12
PR31947K_0402_1%~D
1 2
PR32410K_0402_5%~D
1 2
PC
233
0.1U
_060
3_25
V7K~
D
12
PQ71SI4835BDY_SO8~D
36
5
78
2
4
1
PU15TC7SH32FU_SSOP5~D
I02
I11 O 4
P5
G3
G
D
S
PQ68RHU002N06_SOT323
2
13
G
D
SPQ74RHU002N06_SOT323
2
13
PR
311
33K_
0402
_5%
~D
12
PR30610K_0402_5%~D
12
PR
314
470K
_040
2_5%
~D
12
G
D
S
PQ63RHU002N06_SOT323
2
13
PR
317
10K_
0402
_5%
~D
12
G
D
S
PQ67RHU002N06_SOT323
2
13
PC
236
0.1U
_060
3_25
V7K~
D
@ 12
PU14ALM393DR_SO8~D
IN+3
IN-2 O 1
P8
G4
PR31210K_0402_5%~D
12
PR322100K_0402_5%~D
1 2
PC2340.1U_0603_25V7K~D
1 2
PR308100K_0402_5%~D@
12
PC
237
0.1U
_060
3_25
V7K~
D
12
PC2350.1U_0603_25V7K~D
1 2
PU14BLM393DR_SO8~D
IN+5
IN-6 O 7
P8
G4
PD49B540C~D
2 1
PR30910K_0402_5%~D
12
PR325100K_0402_5%~D
1 2
PD47B540C~D
2 1
PD48
RB715F_SOT323
2
31
PR
305
10K_
0402
_5%
~D1
2
PR31647K_0402_1%~D
1 2
PQ62SI4835BDY_SO8~D
365
78
2
4
1
PR
320
470K
_040
2_5%
~D
12
PR313100K_0402_5%~D
12
PC
232
2200
P_04
02_5
0V7K
~D
12
PR
323
42.2
K_04
02_1
%~D
12
PR307100K_0402_5%~D
12
G
D
S
PQ64RHU002N06_SOT323
2
13
PD51
RB715F_SOT323
2
31
FDS4935_SO8~D
PQ65
G2 2D28
S1 3D15
S2 1D27
G1 4D16
PQ70SI4835BDY_SO8~D
365
78
2
4
1
G
D
S
PQ73RHU002N06_SOT323
2
13
PR
315
470K
_040
2_5%
~D
12
PR321147K_0402_1%~D
1 2
PQ69SI4835BDY_SO8~D
3 65
78
2
4
1
PQ66SI4835BDY_SO8~D
365
78
2
4
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SDVOB_GREEN+
DVI_TX2+SDVOB_BLUE+
INT-
SDVOB_RED-
DVI_TX2-
+VSWINGDVI_SCLK
DVI_TX1-
DVI_TX0-
DVI_CLK+
SDVOB_BLUE-
DVI_TX1+
DVI_CLK-
SDVOB_GREEN-
DVI_TX0+
INT+
DVI_SDATA
SDVOB_RED+
SDVO_CTRLCLK
SDVO_CTRLDATA
DVI_TX2-
DVI_TX1+
DVI_TX1-
DVI_TX0+
DVI_TX0-
DVI_CLK+
DVI_CLK-
+VCC
+SPVCC
+SVCC
+PVCC1
+PVCC2
+AVCC
DVI_TX2+
+1.8V_RUN
+3.3V_RUN_R
+3.3V_RUN_R
+3.3V_RUN_R
+AVCC
+3.3V_RUN_R
+5V_RUN
+2.5V_RUN
+1.8V_RUN
SDVOB_BLUE+12
SDVOB_INT+12SDVOB_INT-12
SDVOB_RED+12SDVOB_RED-12
PLTRST#10,21,23,28,34
SDVOB_CLK+12
SDVOB_GREEN+12
SDVOB_CLK-12
SDVOB_GREEN-12
DVI_DETECT36
SDVOB_BLUE-12
SDVO_CTRLDATA 12SDVO_CTRLCLK 12
DVI_SDATA 36DVI_SCLK 36
DVI_TX2+ 36
DVI_TX2- 36
DVI_TX1+ 36
DVI_TX1- 36
DVI_TX0- 36
DVI_TX0+ 36
DVI_CLK- 36
DVI_CLK+ 36
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Internal LVDS
52 63Tuesday, February 07, 2006
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
A1 LOW: Address = 0x70
HIGH: Address = 0x72
C3001
10U_0805_10V4Z~D
1
2
C30
2510
U_0
805_
6.3V
6M~D
1
2
C30
3710
00P_
0402
_50V
7K~D
@
1
2
C3020
0.1U_0402_16V4Z~D
1
2
R30
012.
2K_0
402_
5%~D
12
C30
2310
0P_0
402_
50V8
J~D
@
1
2
R3018100_0402_5%~D
1 2
C30
160.
1U_0
402_
16V4
Z~D
1
2
C30
3010
U_0
805_
6.3V
6M~D
1
2
C30260.1U_0402_16V4Z~D
1
2
L3001BLM18PG181SN1_0603~D
12
C30220.1U_0402_16V4Z~D
12
C3027 0.1U_0402_16V4Z~D
1 2
R3015100_0402_5%~D
1 2
C3017
10U_0805_10V4Z~D
1
2
R30
134.
7K_0
402_
5%~D
12
R30
092.
2K_0
402_
5%~D
12
C30
3610
0P_0
402_
50V8
J~D
@
1
2
C30120.1U_0402_16V4Z~D
12
C30
310.
1U_0
402_
16V4
Z~D
1
2
R30101K_0402_5%~D
12
C3013
10U_0805_10V4Z~D
1
2
C3010
0.1U_0402_16V4Z~D
1
2
R30
144.
7K_0
402_
5%~D
12
C30140.1U_0402_16V4Z~D
12
U3001
SII1362ACTU_LQFP48~D
HTPLG29
PGN
D2
27
SDI+32SDI-33
EXT_RES35
SDADDC 9SCLDDC 8
SDSCL 5SDSDA 4
SDR+37SDR-38
SDG+40SDG-41
SDB+43SDB-44
SDC+46SDC-47
SPG
ND
3
RESET#2
PVC
C2
26
EXT_SWING25
PVC
C1
11
VCC
10VC
C34
AGN
D12
VCC
28
OVC
C1
AVC
C15
AVC
C21
SVC
C36
SVC
C42
SPVC
C48
GN
D7
TEST30
GN
D31
SGN
D39
SGN
D45
AGN
D18
AGN
D24
A1 6
TXC- 13TXC+ 14
TX0- 16TX0+ 17
TX1- 19TX1+ 20
TX2- 22TX2+ 23
L3006BLM18PG181SN1_0603~D
12
C3005
0.1U_0402_16V4Z~D
1
2
R3016100_0402_5%~D
1 2
C30
040.
1U_0
402_
16V4
Z~D
1
2
R3017100_0402_5%~D
1 2
C30
2410
0P_0
402_
50V8
J~D
@
1
2C
3039
1000
P_04
02_5
0V7K
~D
@
1
2
R3007 1K_0402_5%~D@ 1 2
L3003BLM18PG181SN1_0603~D
12
L3005BLM18PG181SN1_0603~D
12
C30
2910
0P_0
402_
50V8
J~D
@
1
2
L3004BLM18PG181SN1_0603~D
12
L3002BLM18PG181SN1_0603~D
12
C30
3810
00P_
0402
_50V
7K~D
@
1
2
C3011
0.1U_0402_16V4Z~D
1
2
C3019
0.1U_0402_16V4Z~D
1
2
C30
1510
U_0
805_
10V4
Z~D
1
2
C3028 0.1U_0402_16V4Z~D
1 2
C30
0310
U_0
805_
10V4
Z~D
1
2
R30081K_0402_5%~D
12
C30210.1U_0402_16V4Z~D
12
C3018
0.1U_0402_16V4Z~D
1
2
C30
3510
00P_
0402
_50V
7K~D
@
1
2
R3006 220_0402_5%~D
12
C3032
0.1U_0402_16V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Changed-List History 1
53 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
1 0.231 H/W 05/27 RogerSmart card pin definition not match thecage pin define
Change JSC pin connection, pin1 connect to GND, pin2 connect toSC_DET# ~ pin10 connect to +SC_PWR
2
05/27H/W403Remove power switch to save placementspacingRoger 0.2Remove SW1. Reseve R1793 pad for power switch
4 20 H/W 05/27 RogerDocking CRT HSYNC, VSYNC connect to theout put side of buffer
DOCK_HSYNC connect from U190 pin4 to docking connector pin 209,DOCK_VSYNC connect from U191 pin4 to docking connector pin 210 0.2
5 32 H/W 05/27 Roger Improve RJ45 center tap driving 0.2Connect +2.5VLAN to JIO pin 14 for RJ45 center tap
6 39 H/W 05/27 Roger SPI ROM pass through mode connect errorChange FDATAIN to ICHO_FDATAIN and connect from U216 pin 106 to U213pin5. Chagne FDATAOUT to ICHI_FDATAOUT and connect from U216 pin 108 toR1788 pin1
0.2
12,36 H/W 05/27 Roger Fix TV out issue Depop R23,R24,R25. And add R1790,R1791,R1792 75 ohms 0.2
7 Flash Recovery strapping issueRoger05/27H/W 0.2Change R474, R475 from 100K to 10K
8 H/W
39
05/30 Brike Change net from +3VALW to +3VSRCTo fix MEC5004 VCC1 power lading 0.2
43 05/30 Brike None Delete H21 and change H4 footprint from H_C176D122to H_C176D102 0.29 H/W
None12 0.2Will06/01H/W41 Add pullup to HDDC_EN# and MODC_EN#.
10 39 H/W 06/01 Will For delay MEC5004 internal 1.8V reg. Modified C1769 from 4.7UF to 22UF. 0.2
To improve rise time of serial DOfrom SPI ROM.11 0.2Will06/01H/W23 Modified R389 from 10K to 1K..
36 H/W 06/01 Will Fix Docking TV out issue. Modified R1790,R1791,R1792 from 75 ohms to 150Ohm. 0.213
39 H/W 06/01 Will None14 Change power on SPI ROM (pins 3 and 8) from +3VALW to +3VSUS. 0.2
3815 H/W 06/01 Will For GPIO control.Use ECE5018 GPIOC2 (pin 67), pin name MDC_RST_DIS#. Reservethis pin for MDC disable circuit. 0.2
16 12 H/W 06/01 Lester NoneRemove R34, R242, R37, R247, Q7, and Q33 to connect LDDC_CLK,LDDC_DATA directly to LVDS connector. 0.2
17 13 H/W 06/01 LesterIntel Checklist recommends a 1 nHferrite which calculates to 200 ohm. Change L34 to BLM18PG181SN1_0603. 0.2
06/01H/W0618 Add R32 0 ohm resistorAdd resistor for cystal drive currentlimiting
Lester 0.2
19 39 H/W 06/01 Will Correct SPI connection for SMSC recommandICH7M.P5 connect to MEC 5004.107, MEC5004.108 connect to SPI ROM.5.ICH7M.P2 connect to MEC 5004.105, MEC5004.106 connect to SPI ROM.2 0.2
20 38 H/W 06/02 RogerSMSC recommond add VBUS_DET pull upresistor Add R1440 100K for LAN_TPM_EN# (VBUS_DET) 0.2
33 H/W21 06/02 Roger Add MDC disable circuit Add R1441, R1442, R1443, Q64. ECE5018 pin 67 program MDC_RST_DIS# 0.2
3422 H/W 06/06 Roger None 0.2Change U8 NNCD6.8RL-A to D5 NNCD5.6LG
23 3 H/W 06/06 Roger None
ALL
Fixed USB table 0.2
24 3 H/W 06/13 Roger None 0.3Add PJP22, PJP24 for +5VMOD and +5VHDD. Delete R506
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Changed-List History 2
54 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
25 0.313 H/W 06/14 Roger Follow Intel CRBD14 pin2 connect to +VCCP, pin1 connect to R320 pin1, R320 pin2 connectto +2.5VRUN. D18 pin2 connect to +1.5VRUN, pin2 connect to R12 pin1, R12pin2 connect to +3VRUN_R
26 27 H/W 06/14 RogerU10 (STAC9200) pin21 (GPIO0) is anlogpower plane Change R156 pull up from +3VSUS to +VDDA 0.3
27 7 0.3H/W 06/14 RogerChange ITP debug to XDP debug definitionfor Yonah CPU
Change R387, R417, R391, R436, R416, R415 to 56 ohms. Add R33 56 ohms.Change R424 to 1K ohms.
28 39 H/W 06/14 Roger For easier flash EC code Add short pad and change R475 to 1K ohms 0.3
4029 Change R1793 to a pad like CMOS padFor easier power switchRoger06/14H/W 0.3
30 34 Remove H22,H23,H24,H25. Add JCLIP1,JCLIP2ME change mini card stand off to LatchRoger06/14H/W 0.3
31 42 H/W 06/14 RogerEMI reqest add caps for the splite powerplane that PCI bus routed Add C1806,C1807,C1808,C1809,C1810,C1811 0.3
Roger06/16H/W4132Reserve discharg circuit for +5VRUN,+3VRUN,+1.8VRUN,+1.5VRUN,+0.9V_DDR_VTT,+2.5VRUNpower rails
Add R1793,R1794,R1795,R1796,R1797,R1798,Q87,Q88,Q89,Q90,Q91,Q92 0.3
33 28 H/W 06/21 Add U3 (ST M45PE20) co-layout with U188 (AT45BCM021B)Gautam Reserve ST M45PE20 for LOM EEPROM 0.3
H/W4234EMI reqest add caps for the splite powerplane that PCI bus routedGary06/23
Add C1812~C1814 0.047uF_0402. Change C1810~C1813 from 0603 to 0402package 0.3
35 38 H/W 06/23 Roger Change R1362 pull up from +3VSRC to +3VRUN+3VRUN leakage at AC mode in S5 0.3
36 All H/W 06/24 Roger Follow Dell USB assignment recommendation Update USB table, block diagram and connection 0.3
37 39 H/W 06/24 Will 4.7uF cap for VR_Cap pin of REV B 5504 Change C1769 for 22uF 0805 size to 4.7uF 0603 size 0.3
38 All H/W 06/24 JoeyChange +3V/+5V design to follow Dellrecommendation Change +3VSRC to +3VALW except for LOM 0.3
39 28 H/W 06/24 GautamIEEE testing the voltage level are closerto the higher end of IEEE range
40 7 H/W 06/24 Lester Required by Intel for B0 Yonah. Add R1378 (51_0603_1%) for TEST2 pulldown 0.3
Change R1364 from 1.15K to 1.18K_0402_1% 0.3
41 39 H/W 06/24 Lester Required by Intel for B0 Yonah. Populate R1752 and add note "No stuff when doing flash recovery" 0.3
42 33 H/W 06/28 Rossana MDC signal by pass caps not require Delete C93, C82, C73 0.3
43 31,40 H/W 06/28 RossanaReseved USB port of OZ77C6 for Biometricsreader
Change JTPAD from 10 pins to 20 pins. Add USB_BIO+/- on U1 pin18,19connect to JTPAD pin9,11 0.3
44 30 H/W 06/28 Rossana Request by Dell Remove C1783, C1784 0.3
45 34 H/W 06/28 Rossana 0.3Remove L18, R149, and R144 - direct connect USB to Wireless LAN cardRequest by Dell
46 34 H/W 06/28 Rossana Request by Dell 0.3Add R1603 connect to JMINI2 pin46, outgoing signal BT_ACTIVE
47 34 H/W 06/28 Rossana Gerber Gate List issue 0.3Add series 0-ohms R1609, R1610 for pins 3 and 5 of JMINI2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Changed-List History 2
55 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
0.33448 Change C159 and C1785 from 10uF to 0.1uF06/28H/W Gerber Gate List issueRossana
49 34 H/W 06/28 Rossana Gerber Gate List issue Add T1 test point for JMINI1 pin 42 0.3
50 36 H/W 06/28 Rossana Gerber Gate List issue Add C1817~1820 for U180,U178,U179,U177 0.3
3951 Change R30 pull up from +3VSRC to +3VALWGerber Gate List issueRossana06/28H/W 0.3
52 43 06/28 RossanaChange sniffer switch type, the activedirection swap
WIRELESS_ON/OFF# connection from pin1 to pin 4 of JSNIFF, pin3 connectto GND, pin2 NC, pin 1 connect to SNIFFER#H/W 0.3
53 36 H/W 06/28 Rossana Gerber Gate List issue 0.3
Gerber Gate List issueRossana54 Add C1822 0.1uF_0402 and C1823,C1824 .47uF_0402 for QBUF power06/28H/W35 0.3
Add C1821 1000pF for +DOCK_PWR_SRC, add C1827 1000pF for DOCK_DC_IN
55 06/28 Rossana26,27 H/W Gerber Gate List issue Follow Dell "Travis_Audio_0628" reference circut design 0.3
56 39 H/W 06/29 Scott Gerber Gate List issue 0.3Change L4 form MURATA BLM11A121S to BLM18PG181SN1
57 24 H/W 06/30 Scott Gerber Gate List issue Remove C375, C37 for ICH_V5REF_RUN, remove C420 for ICH_V5REF_SUS 0.3
Scott06/30H/W2458 0.3Add R37 0.5 ohm 0603 resistor connect to L42 pin1Gerber Gate List issue
Scott59 24 H/W 06/30 0.3Gerber Gate List issue Populate C347 and C442
Scott60 0.3Change C450 for 220uF to 330uF poly capGerber Gate List issue06/30H/W24
61 RogerMatch Dell JTPAD pinout definition, add C62, C63 for BIO power railbypass40 H/W 06/30 Match Dell JTPAD pinout definition 0.3
62 26,27 H/WR162 change from 8.2K to 2.2K, remove D33, D34, Change C1800, C1801from 1uF to 2.2uF, change C534 from 0.1uF to 1uF, del C533.06/30 Gerber Gate List issue 0.3Rossana
63 26 H/W 0.3HP_NB_SENSE move from GPIO2 to GPIO0 of U10, add series resistor 0 ohmfor this signal06/30 Rossana Gerber Gate List issue
64 7 H/W 07/07 Roger Support A1 Yanah CPU 0.3De-pop R513, R514 for A1 yanah CPU
65 7 H/W 08/01 Roger Gerber Gate List issue item 6 0.4Change Change R417 to 150 ohm, R415 to 51 ohm, R387 to 39.2 ohm, R436to 27.4 ohm, R391 to 680 ohm, R424 to 22.6 ohm
66 38 H/W 08/01 Roger Gerber Gate List issue item 8 Change R110 from 68 ohm to 75 ohm for H_PROCHOT# pull up 0.4
67 43 H/W 08/01 0.4Change the voltage rail on sniffer LED pull-ups (at Q13 and Q16) from+3VALW to +3VSUSRoger Gerber Gate List issue item 9
68 H/W 08/01 Roger 0.4Remove unnecessary capacitor C1805None7
69 H/W 08/01 Roger Hall switch design on touch pad moudle 0.4Depop U46 and C5440
70 H/W 08/01 Roger38 Gerber Gate List issue item 19 Move NB_MUTE from U215 pin 107 to pin73 0.4
71 16,17 H/W 08/01 Roger 0.4Remove R178, pop R177Gerber Gate List issue item 20,21
72 10,23 H/W 08/01 Roger 0.4Depop R253, populate R1799Gerber Gate List issue item 22,23
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Date: Sheet o fLA-2791 0.6
Changed-List History 2
56 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
0.44273 Connect 2.5V_RUN_PWRGD net to LDO_POK pin. Add depop R4908/02H/W Gerber Gate List issue item3Roger
08/021874 Add R1800 31.6K ohm resistor for Vmargin circuit. 0.4Gerber Gate List issue item11RogerH/W
Change R389 from 1K to 10K75 23 H/W 0.408/02 Roger Gerber Gate List issue item5
76 33, 40 H/W Delete JBT and move components to JTAP. 0.408/04 Steven Conbine the BT and TP in 30 PIN connector.
77 42 H/W 08/04 Add Depop resister R3019. 0.4Steven Gerber Gate List issue item3
78 22, 23 H/W 08/04Chnage R425 from 33Ohm pull-down to 8.2KOhm pull-up. And add pull-upresister R3020 in SIO_RCIN#.Steven
For intel NAPA platform check list 1.5request. 0.4
79 19 H/W 08/08 Roger Follow Intel CRB circuit Pull up LDDC_CLK, LDDC_DATA to +3VRUN_R by R73, R74 0.4
80 16 H/W 08/09 Roger V_DDR_MCH_REF discharge issue 0.4Add R51 (100K_0402) connect to V_DDR_MCH_REF
H/W2381 Leakage issue when system into S3Roger08/09 Change SIO_EXT_SMI#, SIO_EXT_SCI# pull up to +3VSUS 0.4
36 H/W82 08/09 Roger Refer Dell docking reference circuit Remove R1320, R1319 0.4
83 12 Depop R357H/W 08/09 Roger 0.4Gerber Gate List issue item 28
84 28 H/W 0.4Add R53 4.7K resistor for LOM_SO pull down08/10 Roger Gerber Gate List issue item 30
85 28 H/W 08/10 0.4Connect BCM5752 pin C4 to ECE5018 pin75 net name LOM_CABLE_DETECT.Series no stuff resistor R55Roger Gerber Gate List issue item 33
86 38 H/W R1171 change pull up from +3VRUN to +3VSUS 0.408/10 Roger Gerber Gate List issue item 39
87 38 H/W 08/10 Roger 0.4Add a 4.7uF cap for ECE5018 VDDA33 couplingGerber Gate List issue item 42
Roger 0.4Add a 0 Ohm 0402 resistor R62 in series with the RTC_CELL and EMC5004pin 12188 39 H/W 08/10 Gerber Gate List issue item 43
0.4Roger R513, R514 pull up to +VCCP89 7 H/W 08/10 Follow Intel CRB circuit
0.4Add resistor R63 (0_0402_5%) between the BIA_PWM signal and MEC5004pin 7390 39 H/W Roger08/10 Gerber Gate List issue item 46
0.4Change ITP_DBRESET# connection from EMC5004 pin 55 to pin9691 39 H/W Roger08/10 Gerber Gate List issue item 47
92 22 H/W Roger 0.4Add no stuff C69 (0.1U_0402_16V4Z) between THRMTRIP_ICH# and GND08/10 Gerber Gate List issue item 50
93 41 H/W 08/10 Roger 0.4Change R1795 pin 1 connect from +1.8VRUN to +1.8VSUS for dischargeNone
94 23 H/W 08/10 Roger 0.4Move pull-up R388 to pin 1 side of R1787Gerber Gate List issue item 51
95 6 H/W 0.4Add C70 (0.1U_0402_16V4Z) for +CK_VDD_MAIN decoupling. Remove R290,R343, R329 to save spacing08/10 Roger Gerber Gate List issue item 29
96 7 H/W 0.4Remove R513 and R514 platform no longer use Yonah A0008/11 Roger Gerber Gate List issue item 68
97 42 H/W 08/11 Roger Gerber Gate List issue item 65 0.4Populate 0ohm for R49, R313, R319, R334
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Size Document Number Rev
Date: Sheet o fLA-2791 0.6
Changed-List History 2
57 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
4198 Gerber Gate List issue item 67Roger08/11H/W 0.4Change R494 to 20K
799 Gerber Gate List issue item 69RogerH/W 08/11 0.4Add no stuff C71 and C72 for +VCCP of JITP
100 7 Roger Gerber Gate List issue item 7008/11H/W Change R416 and R33 from 56 ohm to 54.9 ohm 0.4
101 12 H/W 08/11 Roger 0.4Delete R333 to follow reference schematicsGerber Gate List issue item 72
102 28 H/W 08/11 Roger Gerber Gate List issue item 34 0.4Add R68 (20K_0402_5%) and R70 (39K_0402_1%) for LAN_LOW_PWR voltagedivider connect to pin K5
0.4103 26,27,38 H/W 08/12DOCK_HP_MUTE# for GPIO2 of codec connect to ECE5018 pin 81. EAPD forGPIO3 of codec connect to additional Q11 gate Roger Gerber Gate List issue item 75
104 38 H/W 08/15 Roger Gerber Gate List issue item 38 0.4Chnge SYS_PME# pull up from +3VRUN to +3VALW. Add no stuff R71 in series
105 38 H/W 08/15 Roger Gerber Gate List issue item 41 0.4Remove HP_NB_SENSE from ECE5018 pin 106 to pin 82
23106 Roger Gerber Gate List issue item 188,189 0.4H/W 08/15 Depop R428,Change value of R75 to 10k ohms
107 40 H/W Roger Gerber Gate List issue item 48 0.408/16 Change R1750 and R1751 to L1 and L2
108 28 H/W Roger Gerber Gate List issue item 213 0.408/16 Depop U188, R1366 and populate U3, R1267 for ST AT45BCM021B
109 39 H/W 08/16 Roger Gerber Gate List issue item 217 0.4Remove R166. Move R1635 for AFT_INT# move to page 39
110 39 H/W 08/16 Roger Add pull up for open drain out put 0.4Add R93 pull up to +3VALW for BAT_SEL#
110 38 H/W 08/16 RogerMute internal speaker when docking aduiojack plug in 0.4Add pull down resistor for DOCK_HP_MUTE#
111 Follow Dell CoE schematicsRoger09/07H/W06 0.5Change C329, C333 from 33pF to 27pF
112 43 H/W 09/14 0.4Change R8 from 3.3K to 1K ohmsRoger Blue tooth LED too bright
113 41 H/W 0.4Populate Q89, R179509/14 Roger +1.8VSUS discharge low issue
114 39 H/W 09/14 Roger LID_CL# can't assert low 0.4Change R482 from 100K to 1M ohms
115 40 H/W 10/04 Brike Delete U46,C54,SW1 None
10/13H/W34, 39116 0.5Modified.Connect 8051TX to WWAN Pin 19 and Connect8051RX to WWAN Pin 42.Brike
117 H/W 10/15 Brike Gerber Gate List issue item 60 Add R97 0-ohm tuning resistor between R36 pin2 and X1 pin122 0.5
118 41 H/W 10/17 Brike Gerber Gate List issue item 66 Change R1795 to a 30 ohm 0603 resistor 0.5
0.5
Brike10/18H/W39119Add de-pop components R101, R110, R112, R114, R117, Q20, Q19, C54, D2002.And change C1769 to 22U.
MEC5004 per SMSC recommendations to addcircuit for improving POR issue. 0.5
change board ID to X02Brike10/18H/W38120 0.5Pop R95, R419 and De-pop R108, R405.
BrikeGerber Gate List issue item 77. Add 10pFcap between GND and pin2 of L1/L2.121 40 H/W 10/18 Add C66, C73. 0.5
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Size Document Number Rev
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Changed-List History 2
58 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
122 Change R75 pull-up to +3.3V_RUN.Gerber Gate List issue item 78. Pull upLAMP_STAT# to +3VRUNBrike10/18H/W23 0.5
123 6 H/W 10/19 BrikeGerber Gate List issue item 72. Inductordesign follow M07 design on L40,L32(Size:0805).
Change L32, L40 from 0603 to 0805. 0.5
124 23 H/W 10/19 BrikeGerber Gate List issue item 79.SATA_DET# is pull up to +3.3V_SUS. Change R784 pull up to +3.3V_SUS. 0.5
125 18 H/W 10/19 BrikeGerber Gate List issue item 74.MakeR1643 prior to bypass caps at +3VRUN.
Change R1643 prior to bypass caps " C152 and C517 " at +3VRUNpower rail . 0.5
126 9 H/W 10/20 Brike
Change the 32 high frequency decoupling caps, 0805 X5R, from 22uFto 10uF.Depop C354 and C618.Change C352, C496, C497, and C365 from 330uF/7mOhm to 330uF/6mOhm SP caps.
Gerber Gate List issue item 84 0.5
Connect PLTRST# instead of PLTRST_DELAY# to WLAN and WWAN connectors. 0.5Gerber Gate List issue item 82
Brike10/20H/W
127 34
128 23 H/W 10/20 Brike Add C79 0.1uF cap on IMVP_PWRGD to filter the glitchIMVP_PWRGD glitch issue 0.5
Q68 surge currentBrike10/21H/W Add R102 (0603) and C80 0.1uF cap Q68 pin1 for reduce surge current28 0.5129
Brike BT & HDD LED is on when the SNIFFER is turned on.
Added a circuit (FET and Resistors) to keep the BT LED & HDD LED off when the SNIFFER is turned on
0.5130 H/W
H/W131
10/21
10/21 Brike Depop R1440Gerber Gate List issue item 8138 0.5
40,43
0.534 H/W 10/22 Brike Add Intel WoWLAN Support Circuit132 Add pop components Q21 and R101, and un-pop componet R24.
18 H/W 10/24 0.5133 BrikeGerber Gate List issue item 89. ChangeOTP trip temperature to 88 deg C. Change R249 to 332K and R262 to 118K.
39 H/W 10/24 0.5134 BrikeGerber Gate List issue item 90. Pop SMSCworkround circuit for 11/7 build. Pop R101, R110, R112, R114, R117, Q20, Q19, C54, D2002.
39 H/W 10/24 0.5135 BrikeGerber Gate List issue item 91. Add a 0ohm pulldown resistor on TEST_PIN. Add R122 0Ohm resister.
43 H/W 10/24136 BrikeGerber Gate List issue item 111. Removeone of the pull-ups on SNIFFER_LED_OFF#. Remove Pull up resister R1447. 0.5
43 H/W137 10/24 Brike Gerber Gate List issue item 110. More R76 to pin 1 of Q66 and populate it. 0.5
10/24H/W34 0.5Add Intel WoWLAN Support Circuit Replace Q21 and R101 to D2003Brike138
20 H/W 10/24139 Brike Add resister R102 and R123. 0.5Gerber Gate List issue item 108. Add 39ohm resistors at output of U190 and U191.
18 H/W 10/24 0.5140 Brike
Gerber Gate List issue item 92. Addthermistor circuit to VCP2 (pin 40) ofEMC4000. Please route to 5V_CAL_SIO2#(pin 80, GPIO B4 on ECE5018).
Add thermistor circuit R479, R480, R481, C79, Q21.
141 43 H/W 10/24 BrikeGerber Gate List issue item 114.Modified SATA_ACT# LED sniffer disablecircuit.
Modified the circuit and Add and D2004. Chnage Q1 to 3904,R1449/1448 change to 10K and 1K. 0.5
142 40 H/W 10/25 BrikeGerber Gate List issue item 119. For fixthe IMVP_PWRGOOD glitch issue.
Change delay circuit R1764 from 200KOhm, C1788 to 470PF to +1.8V_runand +3V_run. 0.5
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Changed-List History 2
59 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
0.538 H/W 10/25 BrikeModified the circuit Pull up R1449 to +5V_SUS and R1445 to +5V_run.R2 move to Q1 pin 3, SNIFFER_LED change to GPIO82.
Gerber Gate List issue item 104. Modifiedthe SATA_ACT# circuit. 143
0.5
0.5
20 H/W 10/25 Brike144 Add D2005 (RB751) in U190, U191 Pin 5.Gerber Gate List issue item 116. Adddiode HSYNC and VSYNC buffers.
145 40, 43 H/W 10/26 Brike Modified HDD/BT disable circuit. Move 40 BT Disable circuit to 43.
146 19 H/W 10/26 Brike Add level shit circuit for BIA_PWM. Delete R520 and Add U8. 0.5
147 23 H/W 11/03 Brikethe delay circuit on +3.3V should get ridof the glitch Depop C82. 0.5
148 41 H/W 11/03 Brike Populate the HDD power switch circuit Pop Q51, R507, Q50 and Depop PJP24. 0.5
149 31 H/W 11/03 Brike For passing EMVCo test. Change R1424 from 220 to 330Ohm. 0.5
150 43 H/W 11/03 Brike SNIFFER_LED_OFF# is a push/pull signal. De-pop R1445. 0.5
151 27 H/W 11/03 Brike To improve audio quality Change C199 to 0.022uF and pop R164, depop R170. 0.5
152 39 H/W 11/11 Brike Change SMSC MEC5004 from version C to D.Change U216 P/N to D version. Depop R117, R114, R110, R101, R104,D2002, Q19, Q20, C54. And chnage C1769 value from 22UF to 4.7UF. 0.5
153 39 H/W 11/11 BrikeChange DOCK_SMB_CLK and DOCK_SMB_DAT forconsistent with other M07 platforms.
Change R99 and R100 resister from 100K to 8.2K Ohm. And R1618 change to10KOhm. 0.5
154 43 H/W 11/11 Brike For improve LED brightness issue.Change R2 value from 56Ohm to 330Ohm. And modified R15 from 150Ohm to100Ohm. 0.5
155 28 H/W 11/12 BrikeFor Q68 broken issue. Modified R120value for protect base pin. ChangeR120 from 0Ohm to 2KOhm. 0.5
156 20 H/W 11/12 BrikeFor Dell request change D32, D2005 toRB500. Change D32 and D2005 from RB751 to RB500 0.5
157 27 H/W 11/12 Brike For improve Audio THD+n performance. Change C113, C114 and C146 from 1UF to 2.2U. 0.5
158 27 H/W 11/27 Brike For adjust Audio gain to 15.6DB. Pop R170, De-pop R164. 0.5
159 42 H/W 12/06 Brike For improving SUSPWROK turn on issue. Modified Q7 to 2N7002. 0.6
160 52 H/W 12/06 Brike For solving DVI eye diagram issue.Change C3030, C3025 from 1uF to 10uF; R3006 to 220Ohm; R3015, R3016,R3017, R3018 to 100Ohm. 0.6
161 23, 38 H/W 12/06 BrikeFor solving HD warn boot parking soundissue.
Change HDDC_EN#, MODC_EN# from ICH7 to ECE5018 Pin 106, 107 (GPIOH2/3),and Depop R2148, R2149. 0.6
162 7 H/W 12/06 Brike Add a De-pop resister for CPU test 1 PIN. Add De-pop resister R1387. 0.6
163 39 H/W 12/07 BrikeAdd an damping resister for improvingSPI_CS# overshoot issue. Add 47Ohm resister R127. 0.6
164 39 H/W 12/07 BrikeFor solving SBAT_SMBDAT rising time overspec issue. Change R444 to 4.7KOhm resister. 0.6
165 6 H/W 12/12 BrikeFor Gerber Gating list item 14 Depoppullup resistor on ICH_CLKREQ#. Depop resister R1761. 0.6
166
167
38 H/W 12/12 BrikeFor Gerber Gating list item 17 Updateboard ID to A00 Pop R405, depop R419. 0.6
31 H/W 12/12 BrikeFor Gerber Gating list item 11 add 47pFcapacitors to the USB_BIO+/- pins tofix bio sensor ESD issue.
0.6Add 2 capaciotr C83, C84 in USB_BIO+/-.
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Changed-List History 2
60 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
41 H/W 12/14168 BrikeFor GPIOH[3:2] need, chnage pullupresister power plane to always. Change pullup resister R2148, R2149 for +3.3V_SUS to +3.3V_ALW. 0.6
169 41 H/W 12/15 BrikeFor Gerber Gating list item 18. Changepullup resister to 10K. Change pullup resister R2148, R2149 for 100K to 10KOhm. 0.6
170 18 H/W 12/15 BrikeFor Gerber Gating list item 1. Removepullup resister from 2.5V_RUN_PWRGD. Remove R116. 0.6
171 39 H/W 12/19 BrikeFor Gerber Gating list item 21. Add 0 ohmseries resistor to SPI_CS# at MEC5004. Add series resister R143 at MEC5004 side. 0.6
172 31 H/W 12/19 Brike For improving USB BIO sensor EMI issue. Add Pop L5, and depop resister R128, R137. 0.6
173 40 H/W 12/20 StevenFor DELL EMI request for add a 0.1uFcapacitor in JTPAD. Add 0.1uF capacitor C85. 0.6
174 28 H/W 12/30 StevenFor Q68 damage issue change form BCP69 toMBT35200 as ZRS solution. Use MBT35200 to replace Q68. Modified. 0.6
H/W7175 12/31 BrikeIntel Design Guide 1.0 to change H_RESETpull-up resister to 51Ohm. Change resister R416 to 51Ohm. 0.6
H/W176 39 01/04 BrikeFor enable MEC5004 BIOS write protectfunction. Pop R139 and de-pop R138. 0.6
27177 DePop R170, pop R164.For adjust Audio gain to 21.6 DB.Benson01/07H/W 0.6
178 28For Q68 issue to reserve soft startcircuit. Change R120 to 0Ohm, and depop C80.H/W 01/09 Brike 0.6
20 H/W 01/20For fixing issue with projector usinglong cable.179
Change R102,R123 from 39 ohm to 0 ohm0.6Brike
19 H/W 01/20 Change R235 from 200K ohm to 100K ohmFor stronger the VGS driving in Battery Mode
184 H/W 01/20 Steven31
22182 H/W 01/20 The Negative Resistance too low Change X1 spec from CL=20pF to 6 pF and C38,C40 from 12pF to 2.2pF
None Depop L5 ,pop R128,R137 33 ohm
181 6 H/W 01/20 The Drive Level too high Change R32 from 0 ohm to 470 ohm
180
01/20The Frequency too high & Drive Level too high38183
Change Y1 spec from CL=20pF to 12pF and C1451,C1452 from 22P to 15PH/W
Brike
Brike
Brike
Brike
0.6
0.6
0.6
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185 H/W 02/0739 Steven For solving primary battery hand issue. Change R447, R449 to 4.7KOHm; R444, R131 to 2.2KOhm. 0.6
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Changed-List History 1
61 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page#
1 0.2
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
0.2
2 46 PWR 06/01MAX8734 LDO soft start issue. Delete PR27 4.7_1210_5%(SD000007E8L)
Un-pop PC20 4.7U_1206_25V6K(SE093106M8L) 0.2
3 46 PWR PWR_SRC noise issue Un-pop PC252 100U_25V_M(SF10004M008) 0.2
4 44/45 PWR +3VALW change to +3VSRCRename net +3VALW to +3VSRC
0.2
5 47 PWR VCCP high/low side MOSFET change from IR to InfineonNo-stuff PC207 and PC208
PQ38 change from IR7821(SB57821008L) to BSO072N03S(SB00000418L)PQ40 change from IR7832(SB57832008L) to BSO072N03S(SB00000418L)Un-pop PC207 and PC208 10U_0805_6.3V5K(SE093106M8L)
0.2
46 PWR 06/01 SahaM4 input current more than MAX8734 LDO3output 100mA
Delete PU17 SN74AHC1G32DCKR OR GATE(SA00732018L), PR49 1K_0402_1%(SD03410018L)Add PR350 0_0402_5%(SD02800008L) connact LDO3 to ON3 PU18 74AHCT1G08GW AND GATE(SA00000L30L) PR352 1K_0402_1%(SD03410018L) PR351 0_0402_5%(SD02800008L)
Saha
06/01 Saha
06/01 Saha
06/01 Saha
6 PWR 06/01 Saha VCCP_1P05VP OCP issue(5A)47 PR224 change from 124K_0402_1%(SD03412438L) to 60.4K_0402_1%(SD03460428L) 0.2
7 PWR 06/01 Saha Choke height issue.(5.6mm change to 5.0mm)47/48 PL14 and PL27 change from 1.4U_HMU1356-1R4_15.5A H5.6mm(SH04814AM8L)to 1.4U_HMU1350-1R4_15A H5.0mm(SH000004H8L)
8 PWR 06/01 Saha44 PSID materiel change by Dell PQ1 change from BSS138_SOT23(SB50138008L) to FDV301_SOT23(SB50301008L)
PWR9 50 06/01 Saha New version MAX8731 PIN1 define GND Un-pop PR337 0_0402_5%(SD02800008L),Pop PR336 0_0402_5%(SD02800008L)
0.2
0.2
0.2
10 PWR50 06/02 Saha Add RC filter at pin 23 of MAX8731 Add PR360 1_0603_1%(SD014100B8L) PC253 220P_0402_50V7K(SE074221K8L) 0.2
11 PWR46/48 06/02 Saha Add support for Reliability voltagemargining tests
Add PR356, PR355 and PR359 0_0603_5%(SD01300008L) PR353 and PR354 0_0402_5%(SD02800008L) 0.2
PWR12 06/1648 PC70 and PC71 change from 330U_D3L_6.3V_R25(SGA00000N8L)to 330U_D2E_2.5VM_R15(SGA19331D0L)
Change output capactior rating voltagefrom 6.3V to 2.5V
Saha0.3
PWR13 06/2249 Change VCORE DPRSLPVR input resistor value PR248 change from 0_0402_5%(SD02800008L) to 499_0402_1%(SD03449900L)Saha 0.3
14 PWR 06/2250 Add power limit schematic Depop PR361 80.6K_0402_1%, PR362 200K_0402_1%, PR363 121K_0402_1%,PR364 3.01K_0402_1%, PR365 499K_0402_1%, PR366 100K_0402_1%,PR367 100K_0402_1%, PC254 0.01U_0402_25V8K, PC255 100P_0402_50V8K,PC256 100P_0402_50V8K, PC257 100P_0402_50V8K, PC258 0.01U_0402_25V8K,PC259 10P_0402_50J8K, PQ81 RHU002N06_SOT323, PU19 LM393DR_SO8
Saha 0.3
15 PWR 06/2946 Discreate 3VALW and 3VSRC.Add PU17 SN74AHC1G32DCKR OR GATE(SA00732018L), PR49 1K_0402_1%(SD03410018L) PQ82 FDC655BN_NL(SB000004P8L )Delete PR352 1K_0402_1%(SD03410018L) PR351 0_0402_5%(SD02800008L) PR350 0_0402_5%(SD02800008L) PU18 74AHCT1G08GW AND GATE(SA00000L30L)
Saha 0.3
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Title
Size Document Number Rev
Date: Sheet o fLA-2792 0.6
Changed-List History 2
62 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
18 47 PWR ISL6227 Issuechange 1.05V/1.5VHigh/Low side MOSFETchange 1.05V chokeadjust OCP and ISEN value
VCC Change from +5VRUN to +5VSUS.EN1 and EN2 change from RUNPWROK to RUN_ON.PR221 change from 20K_04-2_1%(SD03420028L ) to 19.6K_0402_1%(SD00000358L)PQ8 change from FDS6994S(SB56994008L) to FDS8880(SB000004U8L)Add PQ83 FDS6670AS(SB000004T8L)PQ38 change from BSO072N03S(SB00000418L) to FDS8880(SB000004U8L)PQ40 change from BSO072N03S(SB00000418L) to FDS6670AS(SB000004T8L)PL27 change from 1.4U_HMU1350(SH000004H8L) to 1.5U_SIL104(SH04215A08L)Add PC261 0.01U_0402(SE068103K8)Add PC262 and PC263 2200P_0402(SE074222K8L)PR219 change from 825_0402_1%(SD03482508L) to 1.43K_0402_1%(SD03414318L)PR220 change from 825_0402_1%(SD03482508L) to 2.1K_0402_1%(SD03421018L)PR223 change from 69.8K_0402_1%(SD03469828L) to 124K_0402_1%(SD03412438L)PR224 change from 60.4K_0402_1%(SD03460428L) to 124K_0402_1%(SD03412438L)
0.3Saha
19 PWR Saha49 ISL6260 Issue0.3
20 PWR50 Saha Change +VCHGR output CAP from 1206 to 1210 0.3
16 PWR 06/29 0.3Add PR27 0_1206_5%(SD00100000L)46 Saha Add V+ input Resistor
17 PWR 06/2945/51 Saha Rename +3VSRC to +3VALWBattery conn. and battery selector +3VSRCchange to +3VALW 0.3
06/29
Delete PR338, PR339 and PR340 2.7_0603_5%Change PC246, PC247, PC248 to 1500P_0805-----UnpopChange PH1 from ERTJ1VR103J(SL20000020L) to NCP15WM474J03RB(SL20000098L)PR284 change from 15.8K_0402_1%(SD03415828L) to 0_0402_5%(SD02800008L)Add PC260 0.1U_0603(SE042104K8L)
06/29
06/29 PC113 and PC114 change from 10U_1206(SE142106M8L) to 10U_1210(SE056106K8L)
08/1221 PWR47 Saha Add VSEN capacitor 0.4Add PC265 and PC264 100P_0402_50V8K(SE071101K8L)
22 08/1247 PWR Saha Delete PGOOD pull high resistor 0.4Delete PR283 100K_0402_1%(SD03410038L)De-pop PR195 100K_0402_1%(SD03410038L)
23 48 08/12PWR Saha Delete reliability test resistor Delete PR283 110K_0603_1%, PR359 0_0603_1%, and PR82 59.6K_0603_1% 0.4
24 49 08/12PWR Saha Adjust VCORE load line PR267 change from 7.87K_0402_1%(SD03478718L) to 9.09K_0402_1%(SD034909100)PR231, PR331, and PR270 change from 7.68K_0402_1%(SD00000238L) to7.68K_0805_1%(SD00000B08L)
0.4
25 49 08/12PWR Saha Delete H_PROCHOT# resistor Delete PR235 0_0402_5%(SD02800008L ) 0.4
26 50 PWR 10/17 Saha Add RC filter in FBSA/B PIN Add PR368 and PR369 100_0402_5%(SD02810008L)Add PC266 and PC267 0.01U_0603_50V7K(SE025103K8L)Un-pop PR371 and PR370 0_0402_5%
0.5
27 46 PWR 10/17 Saha EMI request: change BST3 resestor Change PR32 from 0_0603_5%(SD01300008L) to 2.2_0603_5%(SD013220B8L) 0.5
28 46 PWR 10/17 Saha change 3V out put CAP height change PC31 from 330U_6.3V_R25 H1.9(SGA00001C8L ) to330U_6.3V_R25 H2.8(SGA0000089L) 0.5
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D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2792 0.6
Changed-List History 2
63 63Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
29 PWR 10/17 0.5Populate PR361-PR367, PC254-259, PU19, PQ81. Change PR361 from 80.6k to 0. Change PR362 from 200k to 301k.Change PR363 from 121k to 59k. Change PR364 from 3.01k to 27.4k.Change PR365k from 499k to 4.32Meg.
50 Saha Populate UL circuit
30 PWR 10/2049 Saha Change VCC_CORE OCP, SOFT,and DPRSTP# value
PR260 change from 20K_0402_1%(SD03420028L) to 11.5K_0402_1%(SD03411520L)PC187 change from 0.022U_0402_16V7K(SE076223K8L) to0.01U_0402_16V7K(SE076103K8L)Add PR372 0_0402_5%(SD02800008L)Delete PR246 0_0402_5%(SD02800008L)Un-pop PR249 0_0402_5%(SD02800008L)
0.5
PWR31 Change PU6 BST resistorSaha10/2048 0.5PR73 change from 0_0603_5%(SD01300008L) to 1_0603_5%(SD013100B8L)
32 PWR Change PQ2 from RUH002N06 to 390444 10/20 Saha PQ2 change from RHU002N06(SB50206008L) to MMST3904(SB000002R0L) 0.5
33 49 PWR 11/12 Saha Adjust CPU Load Line
PR267 change from 9.09K_0402_1%(SD03490918L) to 10.5K_0402 _1%(SD03410528L)PR261 change from 3.57K_0402_1%(SD03435718L) to 2.47K_0402 _1%(SD03424318L)Add PC252 100U_25V_(6.3X7.7)(SF10004M08L)Add PC215 0.068U_10VX7R_0402 (SE102683K8L)
0.5
34 50 PWR 12/6 Saha Deeply dischargered battery problem.Add PD54 1SS355_sod323(SC1SS35500L)Add PR373 1K_0603_1%(SD01410018L) 0.5
35 50 PWR 12/6 Saha Follow Coe A09 schematic Add PC267 3300PF_0402_50V7K(SE074332K8L)Depop PC266 0.01U_0603_50V7K(SE025103K8L) 0.5
36 47 PWR 12/15 Saha Follow GGL 1214 item19. Depop PR12 0.6
37 49 50 46 PWR 1/7 Saha Add PC270~PC273 and PC268 10U_1206_25V6M(SE142106M8L)For acoustical issue 0.6