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International Journal of Electrical and
Electronics Engineering Research (IJEEER)
ISSN(P): 2250-155X; ISSN(E): 2278-943X
Vol. 4, Issue 6, Dec 2014, 95-106
TJPRC Pvt. Ltd.
DESIGN OF NEW MULTILEVEL INVERTER WITH FEWER SWITCHES FOR
INDUCTION MOTOR APPLICATIONS
JONNALA HEMALATHA1& G. G. RAJA SEKHAR2
1Research Scholar, Department of Electrical & Electronics Engineering KKR & KSR Institute of Technology & Sciences,
Guntur, Andhra Pradesh, India
2Associate Professor, Department of Electrical & Electronics Engineering, KKR & KSR Institute of Technology &
Sciences, KKR & KSR Institute of Technology & Sciences, Guntur, Andhra Pradesh, India
ABSTRACT
As of late, multilevel inverters (MLI) have picked up much consideration in the application regions of medium
voltage and high power owing to their different favorable circumstances, for example, lower regular mode voltage, lower
voltage weight on force switches, lower dv/dt degree to supply lower consonant substance in yield voltage and current.
Looking at two-level inverter topologies at the same force evaluations, MLI likewise have the favorable circumstances that
the symphonious parts of line-to-line voltages bolstered to load are diminished owing to its exchanging frequencies.
The most well-known MLI topologies characterized into three sorts are diode braced MLI (DC-MLI), flying capacitor MLI
(FC-MLI), and fell H-Bridge MLI (CHB-MLI). The crossover and awry half and half inverter topologies have been
produced as per the blend of existing MLI topologies or applying distinctive DC transport levels individually. This paper
proposes another Multilevel Inverter for Induction Motor Drive. The Inverter introduced gives a seven level yield voltage.
This inverter utilizes less number of switches when contrasted and the other kind of multi inventers like diode clipped,
flying capacitor, and fell inventers. This topology requires less number of transporter flags and entryway drivers,
particularly when utilized for larger amounts .As the power semiconductors play key role in Multilevel Inverters the
proposed system is much reliable, has less control complexity and fewer switches. The above discussed inverter is fed to a
induction motor drive and the performance of the motor is analyzed. Simulation results obtained from MATLAB /
SIMULINK shows the speed, torque characteristics of the motor and Seven level, Nine level and Eleven level output
voltage of inverter.
KEYWORDS:Multilevel Inverter, PWM, Induction Motor, Total Harmonic Distortion
I. INTRODUCTION
DC engines have been utilized amid the most recent century as a part of commercial enterprises for variable pace
control applications, in light of the fact that its flux and torque can be controlled effectively changing the field and
armature flows individually. However, they have the natural detriment of commutator and mechanical brushes, which
experience wear and tear with the progression of time. Much of the time, air conditioning engines are wanted to DC
engines, specifically, an affectation engine because of its ease, low support, lower weight, higher proficiency, enhanced
toughness and dependability. All these peculiarities make the utilization of affectation engines an obligatory in numerous
ranges of modern applications [1].
Moreover, four quadrant operation of instigation engine was additionally accomplished. Affectation engine is
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Impact Factor (JCC): 5.9638 Index Copernicus Value (ICV): 3.0
famously utilized as a part of commercial enterprises because of toughness and heartiness. The incitement engines were
fundamentally utilized for basically consistent velocity applications on account of the inaccessibility of the
variable-recurrence voltage supply. The progression of force gadgets has made it conceivable to fluctuate the recurrence of
the voltage [2]. Therefore, it has broadened the utilization of affectation engine in variable rate drive applications.The progression in Force gadgets and semiconductor engineering has set off the improvement of high power and rapid
semiconductor gadgets to accomplish a smooth, consistent and step less variety in engine speed. Applications of robust
state converters/inverters for customizable velocity impelling engine drive are broad in electro-mechanical frameworks for
a vast range of modern frameworks. The inverters are either Present Source Inverter (CSIs) or Voltage Source Inverters
(VSIs). Current source inverters are broadly utilized for the execution of completely generative incitement machine
variable rate drives. A paramount and appealing peculiarity of CSI is its great flaw insurance ability and the inalienable
recovery capacity. Then again, a CSI-nourished prompting engine experiences extreme torque throbs, particularly at low
speeds, which show themselves in cogging of the pole. The ordinary system of overcoming such issues in Voltage Source
Inverters (VSIs) is to beat width regulate the information voltage waveforms. Beat width tweaked voltage source inverters
are constantly utilized for air conditioning/DC/air conditioning change to give a variable air conditioning voltages to the
instigation engine. Then again, inverter sustained impelling engine experiences the vicinity of huge measure of sounds
which causes undesired engine warming, torque throb and EMI. The lessening in sounds calls for extensive measured
channels, bringing about expanded size and expense of the framework. In any case, the progressions in the field of force
gadgets and microelectronics made it conceivable to diminish the extent of music with multilevel inverters, in which the
quantity of levels of the inverters are expanded instead of expanding the span of the channels. This paper shows an outline
of another multilevel inverter topology named switching voltage (RV). This topology obliges less number of parts
contrasted with traditional topologies. It is additionally more proficient since the inverter has a part which works the
exchanging force gadgets at line recurrence. Subsequently, there is no requirement for all changes to work in high
recurrence which prompts easier and more dependable control of the inverter. This paper depicts the general multilevel
inverter schematic. A general technique for multilevel adjustment stage mien (PD) SPWM is used to drive the inverter and
can be stretched out to any number of voltage levels. The reenactment and test consequences of the proposed topology are
additionally exhibited.
II.MULTILEVEL INVERTER
A voltage level of three is thought to be the littlest number in multilevel converter topologies. Because of the
bi-directional switches, the multilevel VSC can work in both rectifier and Inverter modes. This is the reason more often
than not it is alluded to as an issue rather than an inverter in this dissertation [1]. As the quantity of levels achieves
endlessness, the yield THD methodologies zero. The quantity of the achievable voltage levels, in any case, is constrained
by voltage-lopsidedness issues, voltage clipping prerequisites, circuit format and bundling imperatives intricacy of the
controller, and, obviously, capital and upkeep costs [3].
Three distinctive major multilevel converter structures have been connected in mechanical applications: fell
H-spans converter with particular dc sources, diode clasped, and flying capacitors [6].The concept of multilevel converters
has been introduced since 1975. Separate DC-sourced full-bridge cells are placed in series to synthesize a staircase AC
output voltage. The term multilevel began with the three-level converter. In 1981, diode-clamped multilevel inverter also
called the Neutral-Point Clamped (NPC) inverter schemes were proposed. In 1992, capacitor-clamped (or flying capacitor)
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multilevel inverters, and in 1996, cascaded multilevel inverters were proposed. Although the cascade multilevel inverter
was invented earlier, its application did not prevail until the mid 1990s. The advantages of cascade multilevel inverters
were prominent for motor drives and utility applications. The cascade inverter has drawn great interest due to the great
demand of medium-voltage high-power inverters [4]. The cascade inverter is also used in regenerative-type motor driveapplications. Recently, some new topologies of multilevel inverters have emerged. This includes generalized multilevel
inverters, mixed multilevel, inverters, hybrid multilevel inverters and soft-switched multilevel inverters. These multilevel
inverters can extend rated inverter voltage and power by increasing the number of voltage levels. They can also increase
equivalent switching frequency without the increase of actual switching frequency, thus reducing ripple component of
inverter output voltage and electromagnetic interference effects.
III.PROPOSED MULTILEVEL TOPOLOGY
The circuit of the proposed multilevel inverter is demonstrated in Figure 1. The inverter planned gives seven level
of yield voltage. A sum of ten switches are utilized which are IGBT/Diodes. Six switches are utilized for level era and 4
switches are utilized for extremity era. Three sources are utilized for producing levels. Every voltage source is of same
range so this can likewise be called as symmetrical multilevel inverter. The quantity of bearer waves utilized is likewise
less as a part of this topology. For a routine seven level inverter utilizing PD-SPWM utilizes six bearer waves however the
proposed uses just three transporter waves. The proposed topology can be effortlessly reached out to three stage framework
additionally The switch S6 utilized as a part of the inverter can be copied and can be stretched out for any
Figure 1: Proposed Seven Level Inverter
Levels of Voltage:In the proposed inverter topology the full bridge is used to decide the polarity of the levels and
the remaining part of the inverter is the reason for the level generation. The switching sequence for the proposed converter
to generate seven level output voltage is shown below. In the proposed topology total ten switches are used per phase.
+3Vdc: The switches used for obtaining the voltage of 3Vdc are S1, S5, S7, S8.
+2Vdc: The switches used for obtaining the voltage of 2Vdc are S2, S6, S5, S7, S8.
+Vdc:The switches used for obtaining the voltage of Vdc are S2, S3, S5, S7, S8.
0: The switches used for obtaining the voltage of 0 are S2, S3, S4, S7, S8.
-3Vdc: The switches used for obtaining the voltage of -3Vdc are S1, S5, S9 , S10.
-2Vdc:The switches used for obtaining the voltage of -2Vdc are S2, S6, S5, S9 , S10.
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Impact Factor (JCC): 5.9638 Index Copernicus Value (ICV): 3.0
-Vdc:The switches used for obtaining the voltage of --Vdc are S2, S3, S5, S9 , S10 .
The PWM control strategy used for the proposed inverter topology is phase disposition Sinusoidal pulse width
Modulation (PD) SPWM with single reference and three carrier wave forms [7]. The below Figure 2 shows the PWM
strategy of the proposed inverter.
Figure 2: PWM Strategy for Proposed Inverter
The below Figure 3 shows the PD-SPWM pulses to the switches of the proposed converter. This shows that in the
proposed topology the number of switches conducting at an instant is very less when compared with the other topologies of
inverters like Cascaded, Flying Capacitor, and Neutral Point Clamped types[12-13] The switches in the polarity generation
section of the inverter also conduct only at zero crossings. So the switching losses are very less. As in Multilevel
converters Power Electronic switches play a key role, from this we can say that this topology is highly reliable, less control
complexity [9].
The proposed converter can be extended to any level of inverter by adding the appropriate switches and the DC
voltage sources. Figure 4 and Figure 5 shows the nine level and eleven level inverter topologies based on the proposed
concept. The number of required three-phase components according to output voltage levels (N) is illustrated in Table 1.
For a nine level inverter the number of switches used is 12 and for eleven level inverter 14 switches are used. The designed
circuits are simulated on both
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Figure 3: PWM Pulses for the Switches
Table 1: Number of Components for Three-Phase Inverters
Figure 4: Proposed Nine Level Inverter
MATLAB/SIMULINK as well as PLECS software packages and the results are presented. For either of the levels
the full bridge topology is common and the level generation section of the inverter circuit varies. The next section
describes about the loss calculations in the proposed converter topology. These losses are divided into IGBT losses as well
as the DIODE losses. From the calculated losses we can calculate the total power loss of the converter. The section V gives
a brief content on variable frequency Induction Motor Drives and this describes the importance of the Inverter for
controlling the speed of the Induction Motor Drive. The section IV describes the MATLAB/SIMULINK validation of the
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Impact Factor (JCC): 5.9638 Index Copernicus Value (ICV): 3.0
proposed topologies and the results showing the output voltages of seven, nine, and eleven level converters are presented
and the harmonic analysis is also presented. The Speed and Torque Curves of the Drive are also presented.
Figure 5: Proposed Eleven Level Inverter
IV. MATLAB/SIMULINK RESULTS
In this segment the reenactment results acquired for seven, nine and eleven level inverters are introduced. The
yield voltage waveforms and additionally the THD investigation are likewise examined. At last the Induction engine
trademark sustained by a three stage eleven level inverter is likewise shows. The beneath Figure demonstrates the seven
level yield voltage of the proposed inverter. Figure 7 demonstrates the yield voltage of the seven level inverter and Figure
18 shows the multilevel output voltages for nine level and eleven level inverter topologies, Figure 12 shows the three phase
voltage waveform of the proposed seven converter.
Figure 6: Matlab/Simulink Model of Seven-Level Inverter
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Figure 7: Simulation Output Voltage Wave Form of Seven Level Inverter
Figure 8: Simulation of Positive Polarity Voltage Wave Form of Seven Level Inverter
Figure 9: Simulation Output Voltage Wave Form of Seven Level Inverter with Filter
Figure 10: Simulation Output Current Wave Form of Seven Level Inverter with Filter
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Impact Factor (JCC): 5.9638 Index Copernicus Value (ICV): 3.0
Figure 11: Matlab/Simulink Model of Three-Phase Seven-Level Inverter
Figure 12: Simulation Output Voltage &Current Wave Form of Seven Level Inverter
Figure 13: Simulation Output Stator Current Wave form of Seven Level Inverter
Figure 14: Simulation Torque Wave Form of Seven Level Inverter
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Figure 15: Simulation Speed Wave Form of Seven Level Inverter
Figure 16: Matlab/Simulink Model of Nine-Level Inverter
Figure 17: Matlab/Simulink Model of Eleven-Level Inverter
Figure 18: Simulation Output Voltage Wave form of Nine & Eleven Level Inverter
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Impact Factor (JCC): 5.9638 Index Copernicus Value (ICV): 3.0
Table 2: Total Harmonic Distortion Analysis
Inverter Level THD%
SEVEN 8.21
NINE 3.62
ELEVEN 2.50
Table 2 shows the Total Harmonic Distortion comparison of the different levels. The THD values for phase
voltages presented in the table.
Figure 19: Simulation Output Stator Current Wave form of Eleven Level Inverter
Figure 20: Simulation Torque Wave form of Eleven Level Inverter
Figure 21: Simulation Speed Wave form of Eleven Level Inverter
V.CONCLUSIONS
This paper presents a novel less number of switches based nine and eleven level inverter. The proposed inverter is
simulated and the output waveforms show the efficiency of the inverter. This inverter is connected to the induction motor
drive and the results of speed, torque and stator current characteristics of the induction motor are also shown. Phase
disposition sinusoidal pulse width modulation is used to drive the inverter, and this technique uses very less number of
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carrier waves. The proposed topology can be extended to any number of levels by suitable changes in the circuit diagram.
One thing has to be considered that multilevel converters are no longer effective when considering the higher levels.
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