Development of AdvancedCollaborative Engineering Environments (CEEs)
Phase 1 Overview
Version 3a - October 23, 2001
Contact:
Georgia Tech
This general audience presentation contains selected content from the Phase 1 review held August 29-31, 2001 at JPL in Pasadena CA. Contact us for further information if needed.
Copyright © 1993-2001 by Georgia Tech Research Corporation, Atlanta, Georgia 30332-0415 USA. All Rights Reserved.Developed by eislab.gatech.edu. Permission to use for non-commercial purposes is hereby granted provided this notice is included.
2Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Development of AdvancedCollaborative Engineering Environments (CEEs)
Phase 1: CEE-based Stackup Design Tool
Period: December 2000 - September 2001
ContactsMichael L. Dickerson
[email protected] - NASA
Pasadena, California USAhttp://www.jpl.nasa.gov/
Russell S. [email protected] Institute of Technology
Atlanta, Georgia USAhttp://eislab.gatech.edu/
SynopsisCurrent engineering computing environments can be characterized as largely disjoint setsof tools that exchange information via labor-intensive processes. While some progresshas been made, a good deal of engineering knowledge is not available in effectiveelectronic forms, and interoperability among engineering processes is less than optimum.
For example, today engineers still often manually add numerous notes and sketches toCAD drawings. In spite of being in an electronic form, these notes and sketches are in arelatively low-level representation that is not easily processed by downstream tools.They are primarily intended for human consumption. These items typically requiremanual intervention and re-creation downstream, resulting in increased labor efforts andtranscriptions errors.
Thus, there is a great need to capture the higher level concepts behind these items (e.g.,PWB stackup design intent) in semantically rich knowledge containers. Associativitywith other types of information is also needed (e.g., other rich objects that exist in somecurrent CAD tools). This Phase 1 effort is aimed at a) developing a general methodologyand computing framework for capturing this ancillary information, and b) implementing aprototype PWB stackup tool in this framework to demonstrate this approach.
Phase 1 helps JPL/NASA move along the roadmap defined in Phase 0 to achieve a next-generation collaborative engineering environment. The target environment will leverageadvances in engineering information technology, including standards like STEP, toachieve fine-grain, modular interoperability among design objects and related tools.Techniques based on efforts including Georgia Tech CAD-CAE integration research willbe applied and enhanced, and new approaches will be developed as needed. The targetoutcome is a virtual collaborative engineering environment which increases product lifecycle effectiveness by an order of magnitude or greater.
Phase 2: October 2001 - September 2002
3Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Nomenclature ABB-SMM transformation idealization relation between design and analysis attributes APM-ABB associativity linkage indicating usage of one or more i
ABB analysis building blockAMCOM U. S. Army Aviation and Missile CommandAPM analyzable product modelCAD computer aided designCAE computer aided engineeringCBAM context-based analysis modelCOB constrained objectCOI constrained object instanceCOS constrained object structureCORBA common ORB architectureDAI design-analysis integrationEIS engineering information systemsESB engineering service bureauFEA finite element analysisFTT fixed topology templateGUI graphical user interfaceIIOP Internet inter-ORB protocolMRA multi-representation architectureORB object request brokerOMG Object Management Group, www.omg.comPWA printed wiring assembly (a PWB populated with components)PWB printed wiring boardSBD simulation-based designSBE simulation-based engineeringSME small-to-medium sized enterprise (small business)SMM solution method modelProAM Product Data-Driven Analysis in a Missile Supply Chain (ProAM) project (AMCOM)PSI Product Simulation Integration project (Boeing)STEP Standard for the Exchange of Product Model Data (ISO 10303).VTMB variable topology multi-bodyXAI X-analysis integration (X= design, mfg., etc.)XCP XaiTools ChipPackage™
XFW XaiTools FrameWork™
XPWAB XaiTools PWA-B™
4Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Primary Technical Team Georgia Tech
– Mfg. Research Center (MARC)
» Robbie Ludlow - PDM
» Russell Peak - Project mgt., STEP, analysis templates
» Nsikan Udoyen - Software development
» Miyako Wilson - Software development, STEP, objects
– Georgia Tech Research Institute (GTRI) Admin. Info Systems Team (AIST)
» Tonette Melvin - next-gen. human factors & user interfaces
» Allen Servedio - next-gen. software architecture
– ECS / ECRC / EIS Lab
» Tord Dennis - Metaphase PDM administration
» Chien Hsiung, M. Saadat, … - System admin. & computing support External collaborators
– Sponsor: NASA-JPL
– LKSoft, SDRC (Metaphase)
– PDES Inc. Electromechanical Team: Boeing, NASA-Goddard, Rockwell Collins, …
5Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Phase 1 Demonstration & Overview(Highlights from Aug. 2001 Meetings at JPL)
Motivation, Multi-Phase Context, and Phase 1 Scope Phase 1 Accomplishments Overview of Phase 2 Plans
6Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Example PWA Ancillary Information
Component AssemblyInstructions
Maximum HeightRestrictions
Stackup Notes
Conformal CoatingRestrictions
PWA = printed wiring assemblyPWB = printed wiring board
7Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Example PWB Ancillary Information
Outline DetailStackup Specs
Stackup Notes
8Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Current Situation (typical) CAx tools of diverse disciplines Each focuses on information subset
(some overlap) Much ancillary information
– Some captured as “dumb” notes & sketches in CAD » Human-oriented, not computer-sensible
– Much not captured at all – Lack of fine-grain explicit associativity
Problems – Manually intensive transformations– Error-prone transcription / re-creation downstream – Little knowledge capture
9Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Domain is Configuration Controlled Design of Electronic Assemblies, their Interconnection and Packaging
Product Enclosure
ExternallyVisible Connectors
Printed Circuit Assemblies
Die
Package
Packaged Part
InterconnectAssembly
Printed Circuit Substrate
Die
Copyright Rockwell Collins Inc.All Rights Reserved
STEP AP 210 (ISO 10303-210) Domain: Electronics DesignR
10Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
STEP AP210 Scope
Scope is “As-Required” & “As-Designed” Product Information – Design “In Process” & “Release”
Sharing Partners:– Engineering Domains– Design / Analysis– Manufacturing / Analysis
Sharing Across Several Levels of Supply Base
R
STEP AP210 Models
Assembly Models
• User View• Design View• Component Placement• Material product• Complex Assemblies with Multiple Interconnect
Component / Part Models
• Analysis Support • Package• Material Product• Properties• “White Box”/ “Black Box”• Pin Mapping
Requirements Models• Design• Constraints• Interface• Allocation
Functional Models
• Functional Unit• Interface Declaration• Network Listing• Simulation Models• Signals
Interconnect Models
• User View• Design View• Bare Board Design• Layout templates• Layers
planarnon-planar
conductive non-conductive
Configuration Mgmt• Identification• Authority • Effectivity • Control• Net Change
GD & T Model
• Datum Reference Frame• Tolerances
R
12Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
AncillaryInformation
Needed Tools
Tool B1 Tool C1... Tool Bn
Typical end-user tools (for novices experts)
Instance population tools(for experts)
AddressingInformation Capture Gaps
Existing Tools
Tool A1 Tool An
Product Model(e.g., AP210 + AP2xx + ...)
...
“dumb” information capture(only human-sensible,I.e., not computer-sensible)
Legend
13Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Target Situation (longer term)
Collaborative Engineering Environment with Advanced Interoperability
Domain Specific Analysis
Cross Domain Analysis
CAx Applications and PDMs
PDMSchema
AnalysisSchema(AP209)
Repository Schema Generator
Requirements Design & Analysis
Data Viewer
SystemEngineeringSchema
Catalog &ViewSchemas
Application Access/Translation Layer
ElectricalSchema(AP210)
MechanicalSchema(AP203)
Documentation Facility
(UML)
Mfg.Capabilities(AP220)
(Text, XML,
SGML, etc.)
(STEP)
(STEP)
(STEP)
(STEP, XML)
(STEP)
Model Development and Interactive Environment
RequestBrokerOrRemoteAccessMech.
ObjectsEntities,Relations &AttributesObject Oriented or Object Relational DBMS
Data Views and PDM
AnalysisAgents
Negotiation/CommunicationsAgents
Data Dictionary Facility
(Express)
Potential Standards-based Architecture (after G. Smith, Boeing)
14Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Phase 1 ScopeWork-in-Progress
Initial step towards vision Capture of representative ancillary information
– Focus: PWB stackup information – Extend Georgia Tech stackup tool (from ProAM) – STEP AP210 as information container structure– Develop & demonstrate methodology
Initial steps (Phases 1, 2): file-oriented– Use Metaphase as PDM capability– Manage files: ECAD file, MCAD file, Gerber file,
stackup tool file (AP210 subset), ... Next steps (Phases 2+):
Fine-grained interactive sharing (Accelis-type tools)
15Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
LKSoftLKSoft
Collaborative Engineering Environment Initial Steps - Phases 1, 2
Design Tools
Laminates Library
Product KnowledgeManagement System
Metaphase
ECAD Tools Mentor Graphics,
Cadence
Materials Library
PWB Stackup ToolXaiTools PWA-B
Nativefiles
AP210 file CC24
LKSoftSTEP s/w
JSD
AI
LKSoft, ...
Instance Browser/EditorSTEP-Book AP210,
SDAI-Edit,STI AP210 Viewer, ...
Work-In-Progress
AP210 file CCx1-xn
16Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Collaborative Engineering Environment Next Steps - Phases 2+
MetaphaseAccelis
Standards-BasedCoarse/Fine-Grained
Interoperability
Notes:Accelis & Metaphase are SDRC products.
Product KnowledgeManagement System
EngineeringMiddleware
LKSoftLKSoft
Design Tools
Laminates Library
ECAD Tools Mentor Graphics, Cadence
Materials Library
PWB Stackup ToolXaiTools PWA-B
LKSoftSTEP s/w
JSD
AI
LKSoft, ...
Instance Browser/EditorSTEP-Book AP210,
SDAI-Edit,STI AP210 Viewer, ...
J2EE-compliantWeb Application Server
Other Tools
AP210 content
17Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
MentorGraphics
LKSoft, …
AncillaryInformation
Added Tools
XaiToolsPWA-B LKSoft, …
Typical end-user tools (for novices experts)
Instance population tools(for experts)
Phases 1, 2 View
Existing ToolsMentor
Graphics
Product Model(AP210)
“dumb” information capture(only human-sensible,I.e., not computer-sensible)
Legend
STEP-Book AP210,SDAI-Edit,
STI AP210 Viewer, ...
Instance Browser/EditorPWB Stackup Tool
ECAD Tools
18Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Phase 1 Demonstration & Overview
Motivation, Multi-Phase Context, and Phase 1 Scope Phase 1 Accomplishments Overview of Phase 2 Plans
19Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Phase 1 Accomplishments Conceptual architecture and roadmaps Repository/PDM methodology in Metaphase
– Gained familiarity via initial test cases: PWA/Bs & mechanical assy. PWB stackup design tool
– Exemplifies ancillary info capture– In XaiTools PWA-B v1.1 (current-generation framework)
» Upgraded from v1.0 to support IS AP210 subset (prototype)– Supports laminates selection & post-lamination thickness calcs. (beta)– Added new graphical OEM/spec view (alpha)– Includes example analysis modules: warpage (beta)
Next-generation XaiTools PWA-B vM.1.a2 (alpha)– Web-based mockup illustrating target extended capabilities
AP210/STEP-based tool methodology Analysis module methodology & general-purpose tools
– XaiTools FrameWork v0.5 (beta/production)
20Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
PDM Contents
• Metaphase Introduction (adapted from SDRC)• Metaphase Familiarization and Support
Georgia Tech Support Team Georgia Tech Metaphase Training Timeline
• E-Widget v1.1 – Test Case 1 Test Case Introduction Product Structure Model Metaphase Model
• E-Widget v2.1 – Test Case 2 Test Case Introduction Product Structure Model Metaphase Model
21Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
PDM Contents (cont.)
• Warning Module PWA – Test Case 3 Test Case Introduction Product Structure Model Metaphase Model Detail – Path 1 Detail Path 2
• Metaphase Features Experienced• Metaphase Work Observations• Next Steps
Selected slides are included here from a larger PDM-oriented presentation.
Contact us for further information if interested.
22Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Benchmark ExampleExtended wing in-deck galley end tie (ewidget) - case 1
• Made up of three components• Entire assembly is welded together
Case 1 – E-Widget v1.1
End Block 1
End Block 2
Sheet Tie 2 Welds
Welds
23Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
usesXYZ-430
E-Widget v1.1
Described byManufacturing
DocumentMfg. Notes
MS PowerPoint Document
Described byDesign
Document
Described byDesign
DocumentXYZ-440_FEA
ANSYS File
XYZ-440CATIA v5 File
XYZ-440Back plate Type 3
End Block 1
XYZ-450
Corner Sheet 2 Described byDesign
DocumentXYZ-450
CATIA v5 File
Sheet Tie 2
XYZ-455Backplate Type 6
Described byDesign
DocumentXYZ-455
CATIA V5 File
End Block 2
Described byDesign
DocumentE-Widget Assembly
CATIA v5 File
E-Widget Version 1.1 – Product Structure Model
24Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
E-Widget v1.1 – Metaphase Model(In OMF Tool)
25Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Benchmark ExampleExtended wing in-deck galley end tie (ewidget) - case 2
• Made up of five components• End Block 1 is welded to Sheet Tie 2• End Block 2 is bolted to Sheet Tie 2
Case 1 – E-Widget v2.1
End Block 1
End Block 2
Sheet Tie 2 Bolts
Welds
26Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
usesXYZ-431
E-Widget v2.1
Described byManufacturing
DocumentMfg. Notes
MS PowerPoint Document
Described byDesign
Document
Described byDesign
DocumentXYZ-440_FEA
ANSYS File
XYZ-440CATIA v5 File
XYZ-500Bolt
Bolt1, Bolt2
Described byDesign
DocumentXYZ-500
CATIA v5 File
XYZ-455Backplate Type 6
Described byDesign
DocumentXYZ-455
CATIA V5 File
XYZ-455
Corner Sheet 2 Described byDesign
DocumentXYZ-455
CATIA v5 File
XYZ-440Back plate Type 3
End Block 1
Sheet Tie 2
End Block 2
Described byDesign
DocumentE-Widget Assembly
CATIA v5 File
E-Widget Version 2.1 – Product Structure Model
27Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
E-Widget v2.1 – Metaphase Model
28Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Benchmark ExampleWarning Module PWA – Case 3
29Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Warning Module PWA
PWA = printed wiring assemblyPWB = printed wiring board
U5
PWA
K1
PWB
R10; R46
30Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Warning Module PWA – Product Structure Model
usesABC-9010
Warning Module PWA
Described byDesign
Document
Described byDesign
Document
24052-4993Resistor RC1206
R10, R11, R12, R13, R14
Described byDesign
Document
24052-2003Resistor RC1206
R46, R47, R48
Described byDesign
Document
20135-5512 Digital Oscillator K_M28776_7
K1
Described byDesign
Document
22471-338
Relay TO_220_5_LF
U5
Described byDesign
Document
ABC-9230Warning Module PWB
Board 1
Mfg. NotesMS PowerPoint Document
PWA DesignSTEP File
Described byDesign
DocumentPWB Stack up Design
STEP File
Described byDesign
DocumentPWB Mfg. Notes
MS PowerPoint Document
Resistor Mfg. NotesMS PowerPoint Document
Resistor Mfg. NotesMS PowerPoint Document
K1 Mfg. NotesMS PowerPoint Document
U5 Mfg. NotesMS PowerPoint Document
31Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Warning Module PWA – Metaphase Model
32Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Item Info – ABC_9010 Assembly
33Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Metaphase Features Experienced in Examples
• OMF (Object Management Framework) Meta-document creation (design documents, etc.) Data file uploading and registering General user features Web-based access (e!Vista and Meta Web)
• APC (Advanced Part Configurator) Product structure creation
Part and component creation Relationship creation and management
• Customization and Advanced Tasks New data file type creation Direct Oracle data manipulation
34Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Phase 1 Accomplishments Conceptual architecture and roadmaps Repository/PDM methodology in Metaphase
– Gained familiarity via initial test cases: PWA/Bs & mechanical assy. PWB stackup design tool
– Exemplifies ancillary info capture– In XaiTools PWA-B v1.1 (current-generation framework)
» Upgraded from v1.0 to support IS AP210 subset (prototype)– Supports laminates selection & post-lamination thickness calcs. (beta)– Added new graphical OEM/spec view (alpha)– Includes example analysis modules: warpage (beta)
Next-generation XaiTools PWA-B vM.1.a2 (alpha)– Web-based mockup illustrating target extended capabilities
AP210/STEP-based tool methodology Analysis module methodology & general-purpose tools
– XaiTools FrameWork v0.5 (beta/production)
35Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
ProAM Design-Analysis IntegrationElectronic Packaging Examples: PWA/B
Analysis Modules (CBAMs) of Diverse Mode & Fidelity
Design Tools
Laminates DB
FEA Ansys
General MathMathematica
Analyzable Product Model
XaiToolsPWA-B
XaiToolsPWA-B
Solder JointDeformation*
PTHDeformation & Fatigue**
1D,2D
1D,2D,3D
Modular, ReusableTemplate Libraries
ECAD Tools Mentor Graphics,
Accel*
temperature change,T
material model
temperature, T
reference temperature, To
cte,
youngs modulus, E
force, F
area, A stress,
undeformed length, Lo
strain,
total elongation,L
length, L
start, x1
end, x2
mv6
mv5
smv1
mv1mv4
E
One D LinearElastic Model(no shear)
T
e
t
thermal strain, t
elastic strain, e
mv3
mv2
x
FF
E, A,
LLo
T, ,
yL
r1
12 xxL
r2
oLLL
r4
A
F
sr1
oTTT
r3L
L
m a t e r i a l
e f f e c t i v e l e n g t h , L e f f
d e f o r m a t i o n m o d e l
l i n e a r e l a s t i c m o d e l
L o
T o r s i o n a l R o d
G
J
r
2
1
s h e a r m o d u l u s , G
c r o s s s e c t i o n :e f f e c t i v e r i n g p o l a r m o m e n t o f i n e r t i a , J
a l 1
a l 3
a l 2 a
l i n k a g e
m o d e : s h a f t t o r s i o n
c o n d i t i o n r e a c t i o n
t s 1
A
S l e e v e 1
A t s 2
d s 2
d s 1
S l e e v e 2
L
S h a f t
L e f f
s
T
o u t e r r a d i u s , r o a l 2 b
s t r e s s m o s m o d e l
a l l o w a b l e s t r e s s
t w i s t m o s m o d e l
M a r g i n o f S a f e t y( > c a s e )
a l l o w a b l e
a c t u a l
M S
M a r g i n o f S a f e t y( > c a s e )
a l l o w a b l e
a c t u a l
M S
a l l o w a b l et w i s t Analysis Tools
PWBWarpage
1D,2D
Materials DB
PWB Stackup ToolXaiTools PWA-B
STEP AP210‡ GenCAM**,
PDIF*
‡ AP210 DIS WD1.7 * = Item not yet available in toolkit (all others have working examples) ** = Item available via U-Engineer.com
36Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Overview of PWB Stackup Design
Fabrication engineer designs PWB stackup details
Stackup Specs - PWA/B Designer
Layer 1: 1 Oz. Cu Foil
Layer 2: 2 Oz. Cu Foil
Layer 3: 1 Oz. Cu Foil
Layer 6: 1 Oz. Cu Foil
Layer 4: 1 Oz. Cu Foil
Layer 5: 2 Oz. Cu Foil
component
plane
signal
signal
plane
solder
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
.065
.055overbase
material
OR
1 Oz. Cu
1 Oz. Cu
1 Oz. Cu
1 Oz. Cu
2 Oz. Cu
2 Oz. CuM150P2P11184
M150P1P21184
3 x 1080
3 x 1080
2 x 2116
Design Alternative 1
Stackup Design - PWB Fabricator
3 X 106
3 X 106
M150P1P21184
M150P2P11184
M150P1P11184
1 Oz. Cu
1 Oz. Cu
1 Oz. Cu
2 Oz. Cu
2 Oz. Cu
…Design Alternative n
1 Oz. Cu
37Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Post-Lamination Thickness CalculationExample Design Requirement Check
Before: Typical Manual Worksheet(as much as 1 hour engr. time)
After: Tool-Aided Design (ProAM)
321
221
1 2/2/C
t
ytC
t
ytC
n
iii
n
iii
B
n
ithickessnestedthicknessationlapost1
__min_
filltoretkthicknessnestedp
isfnsetprepreg _sin__1
_
38Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Stackup DesignEnd User Scenarios
ap210.exp (IS CC24)
xxx.step(or other format)
MentorGraphics
mg-ap210
MG file(s)
XaiTools PWA-B
Translator
Board Station v8
(2), (4)
(1)
pwb_stackup.step
XaiTools PWA-B
COBServer
StackupTool
AnalysisModules
MathSolver
Mathematica v4.1
FEASolver
Ansys v5.6
files
v1 - OEM specv2 - OEM spec plus
stackup details
LaminatesDatabase
• OEM spec viewing & editing • Detailed stackup design• Post lamination thickness calc.• <other calcs.>
XaiTools FrameWork
• Warpage analysis• <PTH reliability analysis>• <other analysis>
(3)
(1), (5)
XaiTools PWA-B v1.2 Scope (in JPL Phase 1 Project)
39Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Stackup “OEM Spec”Editor/Viewer
Stackup Specs - PWA/B Designer
Layer 1: 1 Oz. Cu Foil
Layer 2: 2 Oz. Cu Foil
Layer 3: 1 Oz. Cu Foil
Layer 6: 1 Oz. Cu Foil
Layer 4: 1 Oz. Cu Foil
Layer 5: 2 Oz. Cu Foil
component
plane
signal
signal
plane
solder
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
.065
.055overbase
material
Layer 1: 1 Oz. Cu Foil
Layer 2: 2 Oz. Cu Foil
Layer 3: 1 Oz. Cu Foil
Layer 6: 1 Oz. Cu Foil
Layer 4: 1 Oz. Cu Foil
Layer 5: 2 Oz. Cu Foil
component
plane
signal
signal
plane
solder
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
.065
.055overbase
material
OR
1 Oz. Cu
1 Oz. Cu
1 Oz. Cu
1 Oz. Cu
2 Oz. Cu
2 Oz. CuM150P2P11184
M150P1P21184
M150P2P11184
M150P1P21184
3 x 1080
3 x 1080
2 x 2116
Design Alternative 1
Stackup Design - PWB Fabricator
3 X 106
3 X 106
M150P1P21184
M150P2P11184
M150P1P11184
M150P1P21184
M150P2P11184
M150P1P11184
1 Oz. Cu
1 Oz. Cu
1 Oz. Cu
2 Oz. Cu
2 Oz. Cu
…Design Alternative n
1 Oz. Cu
40Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Stackup “OEM Spec” ViewerExample Instances from 210-Based Designs
2 layer design
4 layer design 6 layer design
41Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Detailed Stackup Design
Stackup Specs - PWA/B Designer
Layer 1: 1 Oz. Cu Foil
Layer 2: 2 Oz. Cu Foil
Layer 3: 1 Oz. Cu Foil
Layer 6: 1 Oz. Cu Foil
Layer 4: 1 Oz. Cu Foil
Layer 5: 2 Oz. Cu Foil
component
plane
signal
signal
plane
solder
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
.065
.055overbase
material
Layer 1: 1 Oz. Cu Foil
Layer 2: 2 Oz. Cu Foil
Layer 3: 1 Oz. Cu Foil
Layer 6: 1 Oz. Cu Foil
Layer 4: 1 Oz. Cu Foil
Layer 5: 2 Oz. Cu Foil
component
plane
signal
signal
plane
solder
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
Epoxy Glass GF/ PGF
.065
.055overbase
material
OR
1 Oz. Cu
1 Oz. Cu
1 Oz. Cu
1 Oz. Cu
2 Oz. Cu
2 Oz. CuM150P2P11184
M150P1P21184
M150P2P11184
M150P1P21184
3 x 1080
3 x 1080
2 x 2116
Design Alternative 1
Stackup Design - PWB Fabricator
3 X 106
3 X 106
M150P1P21184
M150P2P11184
M150P1P11184
M150P1P21184
M150P2P11184
M150P1P11184
1 Oz. Cu
1 Oz. Cu
1 Oz. Cu
2 Oz. Cu
2 Oz. Cu
…Design Alternative n
1 Oz. Cu
42Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Iterative Design & Analysis PWB Stackup Design & Warpage Analysis
AnalyzableProduct Model
PWB Stackup Design Tool
1 Oz. Cu
1 Oz. Cu
1 Oz. Cu
1 Oz. Cu
2 Oz. Cu
2 Oz. CuTetra GF
Tetra GF
3 x 1080
3 x 1080
2 x 2116
2D Plane Strain Model
b L T
t
2
Detailed FEA Check
bi i i
i
w y
t w
/ 2
1D Thermal Bending Model
StackupRe-design
PWB Warpage Modules
Quick Formula-based Check
43Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Warpage Analysis ModulesCheck Warpage Requirement - Two Fidelity Levels
Detailed FEA Check
Quick Formula-based Check
b L T
t
2
bi i i
i
w y
t w
/ 2
44Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
total_thicknesspwa
layup layers[0]
layers[1]
layers[2]
TOTAL
CU1T
CU2T
POLYT
PREPREGT
TETRA1T
EXCU
ALPXCU
EXEPGL
ALPXEGL
TO
deformation model
ParameterizedFEA Model
ux mos model
Margin of Safety(> case)
allowable
actual
MS
UX
condition
UY
SX
associated_pwb
nominal_thickness
prepregs[0] nominal_thickness
top_copper_layer nominal_thickness
related_core nominal_thickness
prepregs[0] nominal_thicknesslayers[3]
primary_structure_material linear_elastic_model E
cte
primary_structure_material linear_elastic_model E
cte
reference temperature
temperatureDELTAT
APM ABB
SMM
PWB Warpage Modulesa.k.a. CBAMs: COB-based analysis templates
deformation model
Thermal Bending Beam
L
b
T
Treference
t
T
total diagonalassociated_pwb
total thickness
coefficient of thermal bending
al1
al2
al6
al3
t
TLb
2
warpage
wrapage mos model
allowable
MSactual
Marginof Safety
associated condition
al5
al4
temperature
reference temperature
pwa
APM
ABBPWB Thermal Bending Model
(1D formula-based CBAM)
PWB Plane Strain Model (2D FEA-based CBAM)
APM
45Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Phase 1 Accomplishments Conceptual architecture and roadmaps Repository/PDM methodology in Metaphase
– Gained familiarity via initial test cases: PWA/Bs & mechanical assy.
PWB stackup design tool (in XaiTools PWA-B v1.1) Next-generation XaiTools PWA-B vM.1.a2 (alpha)
– Web-based mockup illustrating target extended capabilities AP210/STEP-based tool methodology Analysis module methodology & general-purpose
tools – XaiTools FrameWork v0.5 (beta/production)
46Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Next-Generation XaiTools PWA-B Mockup Demonstration Overview
Initial mockup illustrating key envisioned extensions– Helps identify and refine end user scenarios– Status: Needs end user feedback and several more iterations– Provides basis for next steps:
» Software architecture refinement» Working prototype and production tools
Assumptions– Use PDM system and other information stores underneath– Re-use existing tools where feasible
(provide smart glue and gap fillers) Mockup demo
– Starts with an in-progress PWA/B design (some Mentor design has been done and loaded into the PDM)
– Shows main usage scenario, plus a few side paths Starting Points: http://eislab.gatech.edu/tools/XaiTools/PWA-B/vM.1.a2/readme.txt
http://eislab.gatech.edu/tools/XaiTools/PWA-B/vM.1.a2/mockup/
Selected screen shots are included here. See links below for further information.
47Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Design Requirements & ObjectivesProvide Context, Purpose, & Status Checks
48Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Stackup Detailed Design: Build-Up Type
49Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Stackup Detailed Design: Laminate Selection & Thickness Check
50Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Stackup Detailed Design: Warpage Checks
51Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Stackup Detailed Design: Warpage FEA Model Details
52Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Stackup Design: Updated Requirements Status
Other scenarios:(done as ppt animation in the following slides; not implemented in web mockup yet):
Interacting with underlying fine-grained multi-directional constrained objects (COBs )
See also Short Course slides for other COB views/tools:
Ex. COB Tree Browser (an object-oriented spreadsheet)
Shows ABC_9010 PWA - instance with PWB attributes and relations
54Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Using COBs for Multi-Directional Design K1 Digital Oscillator - State 0: Unspecified Standoff Height
D e f i n i t i o n s ( n o t t o s c a l e ) S c a l e d
z
h s o
h ch a h s r
t p w b
P W A C o m p o n e n t L o c a t i o n : K 1 D i g i t a l O s c i l l a t o r
A t t r i b u t e s
F i g u r e s U p d a t e
o r i g i n . x : 0 . 7 1 2 5 i n c h e si
o r i g i n . y : 2 . 4 8 7 5 i n c h e si
o r i g i n . z : i n c h e so
r o t a t i o n : 0 . 7 1 2 5 i n c h e si
s u r f a c e : T o p i
m a x . h e i g h t ( a b s o l u t e ) , h a : i n c h e s
s t a n d o f f h e i g h t , h s o : i n c h e si
o
m a x . h e i g h t ( s u r f a c e r e l a t i v e ) , h s r : i n c h e so
c o m p o n e n t b o d y h e i g h t , h c : i n c h e s0 . 5 0 0i
z
h s o
h ch a h s r
t p w bu n k n o w n
C o n s t r a i n t S c h e m a t i c - I
0 . 5 0 0 i n .0 . 0 6 0 i n .
2 0 1 3 5 - 5 5 1 2 d i g i t a l o s c i l l a t o rA B C _ 9 2 3 0 W a r n i n g M o d u l e P W B
c o m p o n e n t
l w
h
c o m p o n e n t , c
r 2
socsr hhh
s t a n d o f f h e i g h t , h s o :
m a x . h e i g h t ( s u r f a c e r e la t i v e ) , h s rr 1
pwbsra thh m a x . h e i g h t ( a b s o l u t e ) , h a
p w b
l w
p w b
t
r 3
pwbso thz zo r i g i n
0 . 5 0 0 i n .0 . 0 6 0 i n .
2 0 1 3 5 - 5 5 1 2 d i g i t a l o s c i l l a t o rA B C _ 9 2 3 0 W a r n i n g M o d u l e P W B
0 . 5 0 0 i n .0 . 0 6 0 i n .
2 0 1 3 5 - 5 5 1 2 d i g i t a l o s c i l l a t o rA B C _ 9 2 3 0 W a r n i n g M o d u l e P W B
c o m p o n e n t
l w
h
c o m p o n e n t , c
r 2
socsr hhh
s t a n d o f f h e i g h t , h s o :
m a x . h e i g h t ( s u r f a c e r e la t i v e ) , h s rr 1
pwbsra thh m a x . h e i g h t ( a b s o l u t e ) , h a
p w b
l w
p w b
t
r 3
pwbso thz zo r i g i n
c o m p o n e n t
l w
hc o m p o n e n t
l w
h
c o m p o n e n t , c
r 2
socsr hhh
s t a n d o f f h e i g h t , h s o :
m a x . h e i g h t ( s u r f a c e r e la t i v e ) , h s rr 1
pwbsra thh m a x . h e i g h t ( a b s o l u t e ) , h a
p w b
l w
p w b
t
r 3
pwbso thz zo r i g i n
55Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Using COBs for Multi-Directional Design K1 Digital Oscillator - State 1: Input Standoff Height
D e fin it io n s (n o t to s c a le ) S c a le d
z
h s o
h ch a h s r
tp w b
P W A C o m p o n e n t L o c a t io n : K 1 D ig ita l O s c il la to r
A ttr ib u te s
F ig u re s
z
h s o
h ch a h s r
tp w b0 .0 5 0 - 0 .1 0 0 in .
0 .5 5 0 - 0 .6 0 0 in .
U p d a te
o r ig in .x : 0 .7 1 2 5 in c h e si
o r ig in .y : 2 .4 8 7 5 in c h e si
o r ig in .z : 0 .1 1 0 -0 .1 6 0 in c h e so
ro ta t io n : 0 .7 1 2 5 in c h e si
s u r fa c e : T o p i
m a x . h e ig h t (a b s o lu te ) , h a : in c h e s
s ta n d o ff h e ig h t, h s o : in c h e s0 .0 5 0 - 0 .1 0 0i
0 .6 1 0 - 0 .6 6 0o
m a x . h e ig h t (s u r fa c e re la t iv e ) , h s r : in c h e s0 .5 5 0 - 0 .6 0 0o
c o m p o n e n t b o d y h e ig h t, h c : in c h e s0 .5 0 0i
C o n s t r a i n t S c h e m a t i c - I
c o m p o n e n t
l w
hc o m p o n e n t
l w
h
c o m p o n e n t , c
r 2
socsr hhh
s t a n d o f f h e i g h t , h s o :
m a x . h e i g h t ( s u r f a c e r e la t i v e ) , h s rr 1
pwbsra thh m a x . h e i g h t ( a b s o l u t e ) , h a
p w b
l w
p w b
t
r 3
pwbso thz zo r i g i n
0 . 6 1 0 - 0 . 6 6 0 i n . 0 . 5 5 0 - 0 . 6 0 0 i n .
0 . 5 0 0 i n .
0 . 0 5 0 - 0 . 1 0 0 i n .
0 . 0 6 0 i n .
0 . 1 1 0 - 0 . 1 6 0 i n .
2 0 1 3 5 - 5 5 1 2 d i g i t a l o s c i l l a t o rA B C _ 9 2 3 0 W a r n i n g M o d u l e P W B
56Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Using COBs for Multi-Directional Design K1 Digital Oscillator - State 2: Output Standoff Height
D e fin it io n s (n o t to s c a le ) S c a le d
z
h s o
h ch a h s r
tp w b
P W A C o m p o n e n t L o c a t io n : K 1 D ig ita l O s c il la to r
A ttr ib u te s
F ig u re s U p d a te
z
h s o
h ch a h s r
tp w b0 .1 5 0 - 0 .2 0 0 in .
0 .6 5 0 - 0 .7 0 0 in .
o r ig in .x : 0 .7 1 2 5 in c h e si
o r ig in .y : 2 .4 8 7 5 in c h e si
o r ig in .z : 0 .1 1 0 -0 .1 6 0 in c h e so
ro ta t io n : 0 .7 1 2 5 in c h e si
s u r fa c e : T o p i
m a x . h e ig h t (a b s o lu te ) , h a : in c h e s
s ta n d o ff h e ig h t, h s o : in c h e s
0 .6 1 0 - 0 .6 6 0o
m a x . h e ig h t (s u r fa c e re la t iv e ) , h s r : in c h e s0 .5 5 0 - 0 .6 0 0o
c o m p o n e n t b o d y h e ig h t, h c : in c h e s0 .5 0 0i
0 .0 5 0 - 0 .1 0 0o
C o n s t r a i n t S c h e m a t i c - I
c o m p o n e n t
l w
hc o m p o n e n t
l w
h
c o m p o n e n t , c
r 2
socsr hhh
s t a n d o f f h e i g h t , h s o :
m a x . h e i g h t ( s u r f a c e r e la t i v e ) , h s rr 1
pwbsra thh m a x . h e i g h t ( a b s o l u t e ) , h a
p w b
l w
p w b
t
r 3
pwbso thz zo r i g i n
0 . 5 0 0 i n .0 . 0 6 0 i n .
0 . 2 1 0 - 0 . 2 6 0 i n .
0 . 7 1 0 - 0 . 7 6 0 i n . 0 . 6 5 0 - 0 . 7 0 0 i n .
0 . 1 5 0 - 0 . 2 0 0 i n .
2 0 1 3 5 - 5 5 1 2 d i g i t a l o s c i l l a t o rA B C _ 9 2 3 0 W a r n i n g M o d u l e P W B
0.550 - 0.600i
z
hso
hcha hsr
tpwb0.050 - 0.100 in.
0.550 - 0.600 in.
0.210-0.260o
0.710 - 0.760o
0.150 - 0.200o
0.650 - 0.700i
z
hso
hcha hsr
tpwb0.150 - 0.200 in.
0.650 - 0.700 in.
57Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Next-Generation XaiTools PWA-B Extensions Illustrated in Mockup
Extensions
Other envisioned extensions (not included yet) – Design alternative comparisons, multi-sequence stackups, …
1) Depicts Design Req. and Objectives (DR&Os) in hierarchy context, with analysis modules associated to them. a) Gives linkage to ap233 type of systems engineering information b) Could have various hierarchy views (by assembly-part relationships, by requirements breakdown,
by discipline, …) 2) Shows stackup in context of other design parts and features, including others that are “ancillary” (i.e.,
not captured in tools like Mentor - e.g., K1 stand-off height) 3) Shows linkage with PDM/repository 4) Shows underlying constrained (COBs) and various views for advanced associativity
a) I/O changes, constraint schematics, … 5) Puts product-specific GUIs (definition figures, …) in context with generic COBs
a) Product-specific GUIs generated by late-bound information structure 6) Envisions COTS plugins and/or interfaces (knowledge-based “glue” and gap fillers to minimize re-
invention)
58Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Phase 1 Accomplishments Conceptual architecture and roadmaps Repository/PDM methodology in Metaphase
– Gained familiarity via initial test cases: PWA/Bs & mechanical assy. PWB stackup design tool
– Exemplifies ancillary info capture– In XaiTools PWA-B v1.1 (current-generation framework)
» Upgraded from v1.0 to support IS AP210 subset (prototype)– Supports laminates selection & post-lamination thickness calcs. (beta)– Added new graphical OEM/spec view (alpha)– Includes example analysis modules: warpage (beta)
Next-generation XaiTools PWA-B vM.1.a2 (alpha)– Web-based mockup illustrating target extended capabilities
AP210/STEP-based tool methodology Analysis module methodology & general-purpose tools
– XaiTools FrameWork v0.5 (beta/production)
59Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Development method for AP210 instances (e.g., stackup OEM view)
Define end user-oriented information requirements Create an ARM instance Mapping from ARM to AIM Create an AIM instance Load and test instance
– In STEP processing tools (e.g, Expresso)– In applications - see 210-based tool development slides
(e.g., LKSoft STEP Book, XaiTools PWA-B, …) Repeat process for more instances and expanded
information requirements
A summary is given here.Contact us for further information.
60Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
2 layer example – Information requirementStackup Specs - PWA/B Designer
Layer 1: 1 Oz. Cu Foil
Layer 2: 2 Oz. Cu Foil
Primary
plane
Epoxy Glass IPC4101/24 (GF/ PGF)
.045
.055overbase
material
Secondary
other signal
61Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
STEP Information ModelARM Instance - OEM view Example - Layer Sequence requirement
Design_layer_stratum_9
Stratum_surface_156 (Primary)
Stratum_surface_201 (Secondary)
Documentation_layer_stratum_13
Stratum_surface_210 (Primary)
Stratum_surface_147 (Secondary)
adjacent_stratum_surface_definition_202
Design_layer_stratum_23
Stratum_surface_148 (Primary)
Stratum_surface_161(Secondary)
adjacent_stratum_surface_definition_215
……..…………………
interconnect_module_secondary_surface_165
interconnect_module_primary_surface_164
interconnect_module_surface_feature_163
stratum_concept_to_physical_usage_view_relationship_157
stratum_concept_to_physical_usage_view_relationship_166
62Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
AP210 instance file (p21) – 2 layer example/* conductive layer 1 */
#100=STRATUM('zz conductive layer 1', 'zz description', #101,#4);
#101=PRODUCT_DEFINITION_FORMATION( 'zz conductive layer 1', 'primary design layer stratum', #102);
#102=PRODUCT('zz conductive layer 1', 'zzname', 'zzdesc', (#3));
#103=PRODUCT_RELATED_PRODUCT_CATEGORY( 'design layer', $, (#102));
/* conductive layer 2 */
#200=STRATUM('zz conductive layer 2', 'zz description', #201, #4);
#201=PRODUCT_DEFINITION_FORMATION( 'zz conductive layer 2', 'non primary design layer stratum', #202);
#202=PRODUCT( 'zz conductive layer 2', 'zzname', 'zzdesc', (#3) );
#203=PRODUCT_RELATED_PRODUCT_CATEGORY( 'design layer', $, (#202));
/* */
/* Stratum to Stratum Technology */
/* */
/* conductive layer 1 */
#110=PROPERTY_DEFINITION_RELATIONSHIP('technology usage', 'zz desc = conductive layer1 to stratum technology', #111, #112 );
#111=PROPERTY_DEFINITION('zz conductive layer 1', 'zzlabel', #100 );
#112=PROPERTY_DEFINITION('zzname = stratum technology', 'zzlabel',#113);
…………………….
63Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Development method for AP210-based tools(e.g., OEM Stackup Spec Viewer)
Create Java objects to hold info. about the view desired view (e.g., OEMViewLayer)
Create a graphical viewer for the OEMViewLayer. Define mapping from AP210 instance to the
OEMViewLayer. Using JSDAI, develop a code to map JSDAI-
AP210 into OEMViewLayer.– read in AP210 instance file and create JSDAI ap210
model into memory– Extract info from JSDAI ap210 model and create
OEMViewLayers Etc.
A summary is given here.Contact us for further information.
64Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Phase 1 Accomplishments Conceptual architecture and roadmaps Repository/PDM methodology in Metaphase
– Gained familiarity via initial test cases: PWA/Bs & mechanical assy. PWB stackup design tool
– Exemplifies ancillary info capture– In XaiTools PWA-B v1.1 (current-generation framework)
» Upgraded from v1.0 to support IS AP210 subset (prototype)– Supports laminates selection & post-lamination thickness calcs. (beta)– Added new graphical OEM/spec view (alpha)– Includes example analysis modules: warpage (beta)
Next-generation XaiTools PWA-B vM.1.a2 (alpha)– Web-based mockup illustrating target extended capabilities
AP210/STEP-based tool methodology Analysis module methodology & general-purpose tools
– XaiTools FrameWork v0.5 (beta/production) See XAI Central (last slide)
65Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
An Introduction to X-Analysis Integration (XAI) Short Course Outline
Part 1: Constrained Objects (COBs) Primer– Nomenclature
Part 2: Multi-Representation Architecture (MRA) Primer – Analysis Integration Challenges – Overview of COB-based XAI
Part 3: Example Applications» Airframe Structural Analysis (Boeing)» Circuit Board Thermomechanical Analysis
(DoD: ProAM; JPL/NASA)» Chip Package Thermal Analysis (Shinko)
– Summary
Part 4: Advanced Topics & Current Research
Analysis TemplateMethodology
66Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
X-Analysis Integration Techniquesa. Multi-Representation Architecture (MRA)
1 Solution Method Model
ABB SMM
2 Analysis Building Block
4 Context-Based Analysis Model3
SMMABB
APM ABB
CBAM
APM
Design Tools Solution Tools
Printed Wiring Assembly (PWA)
Solder Joint
Component
PWB
body3body2
body1
body4
T0
Printed Wiring Board (PWB)
SolderJoint
Component
AnalyzableProduct Model
b. Explicit Design-Analysis Associativity
c. Analysis Module Creation Methodology
I n f o r m a l A s s o c i a t i v i t y D i a g r a m
C o n s t r a i n e d O b j e c t - b a s e d A n a l y s i s M o d u l eC o n s t r a i n t S c h e m a t i c V i e w
P l a n e S t r a i n B o d i e s S y s t e m
P W A C o m p o n e n t O c c u r r e n c e
CL
1
m a t e r i a l ,E( , )g e o m e t r y
b o d y
p l a n e s t r a i n b o d y , i = 1 . . . 4P W B
S o l d e rJ o i n t
E p o x y
C o m p o n e n tb a s e : A l u m i n a
c o r e : F R 4
S o l d e r J o i n t P l a n e S t r a i n M o d e l
t o t a l h e i g h t , h
l i n e a r - e l a s t i c m o d e l
A P M A B B
3 A P M 4 C B A M
2 A B Bc
4b o d y 3b o d y
2b o d y
1h oT
p r i m a r y s t r u c t u r a l m a t e r i a l
ii
i
1 S M M
D e s i g n M o d e l A n a l y s i s M o d e l
A B B S M M
s o l d e rs o l d e r j o i n t
p w b
c o m p o n e n t
1 . 2 5
d e f o r m a t i o n m o d e l
t o t a l h e i g h t
d e t a i l e d s h a p e
r e c t a n g l e
[ 1 . 2 ]
[ 1 . 1 ]
a v e r a g e
[ 2 . 2 ]
[ 2 . 1 ]
cT c
T s
i n t e r - s o l d e r j o i n t d i s t a n c ea p p r o x i m a t e m a x i m u m
s j
L s
p r i m a r y s t r u c t u r a l m a t e r i a l
t o t a l t h i c k n e s s
l i n e a r - e l a s t i c m o d e l
P l a n e S t r a i n
g e o m e t r y m o d e l 3
a
s t r e s s - s t r a i nm o d e l 1
s t r e s s - s t r a i nm o d e l 2
s t r e s s - s t r a i nm o d e l 3
B o d i e s S y s t e m
x y , e x t r e m e , 3
T 2
L 1
T 1
T 0
L 2
h 1
h 2
T 3
T s j
h s
h c
L c
x y , e x t r e m e , s jb i l i n e a r - e l a s t o p l a s t i c m o d e l
l i n e a r - e l a s t i c m o d e l
p r i m a r y s t r u c t u r a l m a t e r i a l l i n e a r - e l a s t i c m o d e l
c o m p o n e n to c c u r r e n c e
s o l d e r j o i n ts h e a r s t r a i nr a n g e
[ 1 . 2 ]
[ 1 . 1 ]l e n g t h 2 +
3 A P M 2 A B B 4 C B A M
F i n e - G r a i n e d A s s o c i a t i v i t y
ProductModel Selected Module
Analysis Module Catalogs
MCAD
ECAD
Analysis Procedures
CommercialAnalysis Tools
Ansys
Abaqus
Solder Joint Deformation Model
Idealization/Defeaturization
CommercialDesign Tools
PWB
Solder Joint
Component
APM CBAM ABB SMM
Ubiquitous Analysis(Module Usage)
Ubiquitization(Module Creation)
CAE
Physical Behavior Research,Know-How, Design Handbooks, ...
67Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
COB-Enhanced XAI Interoperability FrameworkCompany/Product-Independent View
v0.5.0 Capabilities - June, 2001
Libraries
MCAD: CATIA v5
ECAD: Mentor Graphics (STEP AP210 WD)PWB Layup ADT, ChipPackage ADT
FEA: AnsysMath: Mathematica
ConstraintSolver
COB Schemas
x.cos, x.exp
Analysis Module Tools(product-specific)
Mathematica
Template Libraries: CBAMs, ABBs, APMsInstances: Usage/adaptation of templates
SolutionTools
COB Instances
x.coi, x.step
Tool Forms(parameterized
tool models / SMMs)
Design Tools
COB/Object Manager COB Mgt. ToolsNavigators
Editors (text)
API / WrapperCORBA
CAD Tools
MaterialProperties Mgr.
MATDB-like files
Std. PartsManager
FASTDB-like files
XaiTools
68Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Using Internet/Intranet-based Analysis SolversThick Client Architecture
Client PCs
XaiTools
Thick Client
Users
Internet
June’99-Present:EIS Lab - Regular internal use
U-Engineer.com - Demo usage: - US - Japan
Nov.’00-Present:Electronics Co. - Began production usage (dept. Intranet)
Future:Company Intranet and/or
U-Engineer.com(commercial) - Other solvers
Iona orbixdj
Mathematica
Ansys
Internet/Intranet
XaiTools AnsysSolver Server
XaiTools AnsysSolver Server
XaiTools Math.Solver Server
CORBA Daemon
XaiTools AnsysSolver Server
FEA Solvers
Math Solvers
CORBA Servers
CO
RB
A IIO
P..
.
Engineering Service BureauHost Machines
69Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Web Services (J2EE, .NET, …) Apache, IIS
Tomcat, WebSphere, WebLogic + Accelis …
Idealization Tools*
Libraries
Synthesis Tools*
ICAD, ...
SA, MCAD, ...
COB-Enhanced XAI Interoperability FrameworkCompany/Product-Independent View
XaiTools with Envisioned Extensions - June 2001
PKM/PLM/PDM*:pgpdm, Enovia, Metaphase ...
DBMS*MySQL, Oracle, SQL Server, ...
MCAD: CATIAI-DEAS*, Pro/E*, UG *, AutoCAD*, ...
ECAD: Mentor Graphics (STEP AP210)PWB Layup ADT, ChipPackage ADT
Accel (PDIF, GenCAM)*, ...
FEA: Ansys, Elfini*, Abaqus*, ...Math: Mathematica, MathCAD*, Matlab*, ...
Optimizers: ConMin, iSIGHT*, ModelCenter*, ... In-House Codes
ConstraintSolver
Schemas
objects, x.xml*x.cos, x.exp
Analysis Module Tools(product-specific)
Mathematica
Template Libraries: Analysis Packages*, CBAMs, ABBs, APMs, Conditions*Instances: Usage/adaptation of templates
SolutionTools
Instances
objects, x.xml*x.coi, x.step
Tool Forms(parameterized
tool models/full* SMMs)
Object Managers
Design Tools
Object / COB Middleware
asterisk (*) =In-progress/envisioned extensions
Simulation Mgt. Tools
COB User ToolsNavigators
Editors (text & graphical*)
Pullable Views*,Condition Mgr*, ...
API / WrappersCORBA,
SOAP*, Jini*
CAD Tools
MaterialProperties Mgr.
MATDB*,Mvision*, ...
Std. PartsManager
FASTDB*, ...
*
*
*
t e m p e r a t u r e c h a n g e , T
c t e ,
y o u n g s m o d u lu s , E
s t r e s s ,
s h e a r m o d u lu s , G
p o is s o n s r a t io ,
s h e a r s t r e s s , s h e a r s t r a in ,
t h e r m a l s t r a in , t
e la s t ic s t r a in , e
s t r a in ,
r 2
r 1)1(2
EG
r 3
r 4Tt
Ee
r 5
G
te
Constraint Manager XaiTools
Neutral APIsOMG CAD Services,
CADScript, …
70Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Potential Web Application Server (WAS) Framework(replaces all but a few distinct pieces of XaiTools FrameWork)
Ex: Accelis Framework (SDRC)• Uses J2EE-based WAS:
• WebLogic - BEA• WebSphere - IBM
• Web-based user interfaces
Supported Standard Wrappers • Product knowledge mgt. tools (PKM/PLM/PDM)• CAD tools• CAE tools (solvers)• Documentation tools
New Tools (WIP)* • Constrained object tools - Constraint managers & algorithms - User tools (viewers, editors) - Toolkits
* = R&D underway at GIT
71Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Phase 1 Demonstration & Overview
Motivation, Multi-Phase Context, and Phase 1 Scope Phase 1 Accomplishments Overview of Phase 2 Plans
– Refine architecture and tool roadmaps» Investigate Mentor Graphics ICX, DMS, …
– Enable pilot trials of stackup design scenarios» Establish near-term capabilities for each subsystem» Demonstrate roadmap progress
– Extend capabilities for AP210-based stackup design
72Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
LKSoftLKSoft
Collaborative Engineering Environment Initial Steps - Phases 1, 2
Design Tools
Laminates Library
Product KnowledgeManagement System
Metaphase
ECAD Tools Mentor Graphics,
Cadence
Materials Library
PWB Stackup ToolXaiTools PWA-B
Nativefiles
AP210 file CC24
LKSoftSTEP s/w
JSD
AI
LKSoft, ...
Instance Browser/EditorSTEP-Book AP210,
SDAI-Edit,STI AP210 Viewer, ...
AP210 file CCx1-xn
Phase 2 Approach• Increase maturity of each subsystem and path• Pilot full end user scenarios
73Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Stackup DesignEnd User Scenarios
ap210.exp (IS CC24)
xxx.step(or other format)
MentorGraphics
mg-ap210
MG file(s)
XaiTools PWA-B
Translator
Board Station v8
(2), (4)
(1)
pwb_stackup.step
XaiTools PWA-B
COBServer
StackupTool
AnalysisModules
MathSolver
Mathematica v4.1
FEASolver
Ansys v5.6
files
v1 - OEM specv2 - OEM spec plus
stackup details
LaminatesDatabase
• OEM spec viewing & editing • Detailed stackup design• Post lamination thickness calc.• <other calcs.>
XaiTools FrameWork
• Warpage analysis• <PTH reliability analysis>• <other analysis>
(3)
(1), (5)
Phase 2 Considerations• MGC ICX tool - stackup specs, impedance calcs.• Multi-PDM federation: MP, MGC DMS, NASA pgpdm• AP210 translator link• Next-gen XaiTools (web-based)• SOAP-based CAE tool links
74Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
Expected Benefits STEP AP 210-based method
» Depth, extendibility Capture of ancillary information
– Representative tool: PWB stackup design» Graphics, automation» Tangible end user benefits» Technique illustration
– “Better, faster, cheaper”» Increased product model completeness» Reduced downstream errors» Increased automation» Increased knowledge retention
75Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC
For Further Information ...
EIS Lab web site: http://eislab.gatech.edu/– Publications, project overviews, tools, etc.– See: X-Analysis Integration (XAI) Central
http://eislab.gatech.edu/research/XAI_Central.doc
XaiTools™ home page: http://eislab.gatech.edu/tools/XaiTools/
Pilot commercial ESB: http://www.u-engineer.com/– Internet-based self-serve analysis– Analysis module catalog for electronic packaging– Highly automated front-ends to general FEA & math tools