uP7535
1uPI Semiconductor Corp., http://www.upi-semi.comRev. P04, File Name: uP7535-DS-P0401
Dual-Input Triple-Output Power Multiplexerin PSOP-8L for USB High Side Switch
Compliant to USB SpecificationsOperating Range: 4.5 V to 5.5 VOutput Voltage Switch to 5VSB at S3/S4/S5
400mA Continuous Load Current500mΩΩΩΩΩ High Side Switch
Output Voltage Switch to 5VCC at S0/S1/S21.2A Continuous Load Current150mΩΩΩΩΩ High Side Switch
Low Quiescent Current: 100uA TypicalSlow Turn On and Fast Turn OffEnable Active-HighPb-Free (RoHS Compliant)UL Approved: E338429TuV EN60950-1 Certification
The uP7535 is a current limited, dual-input triple-outputpower multiplexer acting as a high side switch for USBapplications where heavy capacitive loads and short-circuitsare likely to be encountered. It switches output voltages to5VSB at S3/S4/S5 states with 500mΩ switches and 400mAcapacity; to 5VCC at S0/S1/S2 states with 150mΩswitches and 1.2A capacity. The outputs can be parallelledto provide totally 3.0A output current at S0/S1/S2 states.
Optimal switch logic according to S3# and 5VCC statusensures seamless output voltage transition.
When the output load exceeds the current-limit thresholdor a short is present, the uP7535 asserts over currentprotection and limits the output current to a safe level bydriving the power switches into saturation mode.
Other features include soft-start to limit inrush currentduring plug-in, thermal shutdown to prevent catastrophicswitch failure from high-current loads, under-voltage lockout(UVLO) to ensure that the device remains off unless thereis a valid input voltage present. The uP7535 is available inPSOP-8L package.
Notebook and Desktop PCsUSB Power ManagementACPI Power DistributionHot-Plug Power Supplies
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8USA5357Pu L8-POSP 8S5357Pu
8USB5357Pu L8-POSP 8SB5357Pu
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General Description
Applications
Ordering Information
Pin Configuration & Typical Application Circuit
Features
Note: uPI products are compatible with the current IPC/JEDEC J-STD-020 requirement. They are halogen-free,RoHS compliant and 100% matte tin (Sn) plating that aresuitable for use in SnPb or Pb-free soldering processes.
1
2
3
4 5
6
7
8S3#
5VCC
5VCC
GND 5VSB
VOUT2
VOUT1
uP7535ASU8
VOUT3
9GND
1
2
3
4 5
6
7
8S3#
EN
5VCC
GND 5VSB
VOUT2
VOUT1
uP7535BSU8
VOUT3
9GND
VOUT11
uP7535BSU8
S3#
5VCC
8
7
6
5
VOUT1
2
3
4
VOUT2
VOUT3
5VSB
S3#
EN
5VCC
GND
VOUT3
VOUT2
5VSB
uP7535
2uPI Semiconductor Corp., http://www.upi-semi.comRev. P04, File Name: uP7535-DS-P0401
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Functional Block Diagram
Functional Pin Description
5VC
CU
VLO
5VSBU
VLO
Thermal
Shutdow
n
Switch
Logic
Charge Pum
p& C
urrent Limit
Switch
Logic
Charge Pum
p& C
urrent Limit
Switch
Logic
Charge Pum
p& C
urrent Limit
5VSB
VOU
T2
VOU
T1
VOU
T3
5VCC
S3#
GND
Q1
Q2
Q4
Q3
Q6
Q5
EN
uP7535
3uPI Semiconductor Corp., http://www.upi-semi.comRev. P04, File Name: uP7535-DS-P0401
The uP7535 is a current limited, dual-input triple-outputpower multiplexer acting as a high side switch for USBapplications where heavy capacitive loads and short-circuitsare likely to be encountered. It switches output voltages to5VSB at S3/S4/S5 states with 500mΩ switch and 400mAcapacity; to 5VCC at S0/S1/S2 states with 150mΩ switchand 1.2A capacity. The outputs can be parallelled to providetotally 3A output current at S0/S1/S2 states.
Optimal switch logic according to S3# and 5VCC statusensures seamless output voltage transition.
When the output load exceeds the current-limit thresholdor a short is present, the uP7535 asserts overcurrentprotection and limits the output current to a safe level bydriving the power switches into saturation mode.
Other features include soft-start to limit inrush currentduring plug-in, thermal shutdown to prevent catastrophicswitch failure from high-current loads, under-voltage lockout(UVLO) to ensure that the device remains off unless thereis a valid input voltage present. The uP7535 is available inPSOP-8L package.
Power SwitchesEach output contains two N-Channel MOSFETs Q1/Q3/Q5 and Q2/Q4/Q6 as power switches that supply outputcurrent to VOUT pins. The sources of Q1/Q3/Q5 and Q2/Q4/Q6 are connected together to the VOUT1/VOUT2/VOU3respectively, the drain of Q1/Q3/Q5 are connected to 5VCCpins and the drain of Q2/Q4/Q6 are connected to 5VSBpin. The MOSFETs are without body diode and preventcurrent flows when turned off.
Q2/Q4/Q6 are 500mΩ MOSFETs with 400mA capacity andQ1/Q3/Q5 are 150mΩ MOSFETs with 1.2A capacity. Thepower switches are driven by internal charge pumps andcontrolled by S3# and 5VCC status. The uP7535 switchesthe output voltages to 5VSB through Q2/Q4/Q6 at S3/S4/S5 states, to 5VCC through Q1/Q3/Q5 at S0/S1/S2 states.
Charge Pumps and DriversAn internal charge pump supplies power to the driver circuitand provides the necessary voltage to pull the gate of theMOSFET above the source. The driver controls the gatevoltage of the power switch. To limit large current surgesand reduce the associated electromagnetic interference(EMI) produced, the driver incorporates circuitry thatcontrols the rise times and fall times of the output voltage.
Chip Enable and Soft Start
Pulling the EN pin lower than 0.4V disables the outputvoltages and reduces its quiescent current down to 1uAtypically. Pulling the EN pin higher than 1.5V enables theoutput voltages. The uP7535 features soft start function toeliminate the inrush current into downstream and voltagedroop of upstream when hot-plug-in with capacitive loads.The soft start interval is 1.3ms typically. The input currentto charge up the load capacitor is proportional to itscapacitance. The uP7535 current limit function may beactive during the plug-in of extreme large capacitive load.
Over Current LimitThe uP7535 continuously monitors the output current forover current protection to protect the system power, thepower switch, and the load from damage during output short
Functional Description
Figure 1. Typical Timing Diagram
5VSB
EN
5VSB_DRV
VOUT
S3#
5VCC
5VCC_DRV
T1 T2 T3T4
T5T6
T7T8
T9 T10
uP7535
4uPI Semiconductor Corp., http://www.upi-semi.comRev. P04, File Name: uP7535-DS-P0401
circuit or soft start interval. When an overload or short circuitis encountered, the current-sense circuitry sends a controlsignal to the driver. The driver in turn reduces the gatevoltage and drives the power FET into its saturation region,which switches the output into a constant-current modeand holds the current constant while varying the voltage onthe load. The current limit level is typical 1.8A when thepower switch operates in linear region and is typical 1.5Ain saturation region.
Undervoltage LockoutA voltage sense circuit monitors the input voltage. Whenthe input voltage is below approximately 4.3V, a controlsignal turns off the power switch.
Overtemperature ProtectionThe uP7535 continuously monitor the operating temperatureof the power switch for overtemperature protection. TheuP7535 asserts overtemperature and turns off the powerswitch to prevent the device from damage if the junctiontemperature rises to approximately 135OC due overcurrentor short-circuit conditions. Hysteresis is built into thethermal sense, the switch will not turns back on until thedevice has cooled approximately 20 degrees. If the faultcondition is not removed, the switch will pulse on and offas the temperature cycles between these limits.
Functional Description
uP7535
5uPI Semiconductor Corp., http://www.upi-semi.comRev. P04, File Name: uP7535-DS-P0401
(5VSB = 5V, TA = 25OC, unless otherwise specified)
Supply Input Voltage, 5VSB (Note 1) ----------------------------------------------------------------------------------------------- -0.3V to +5.7VSupply Input Voltage, 5VSB Compliant with LPS (Limited Power Source) Requirement --------------------------- < 8A/100VAOther Pins ------------------------------------------------------------------------------------------------------------------------------------- -0.3V to +5.7VStorage Temperature Range ----------------------------------------------------------------------------------------------------------- -65OC to +150OCJunction Temperature ------------------------------------------------------------------------------------------------------------------------------------ 150OCLead Temperature (Soldering, 10 sec) ------------------------------------------------------------------------------------------------------------ 260OCESD Rating (Note 2)
HBM (Human Body Mode) --------------------------------------------------------------------------------------------------------------------- 2kVMM (Machine Mode) ----------------------------------------------------------------------------------------------------------------------------- 200V
Package Thermal Resistance (Note 3)PSOP-8L θJA ------------------------------------------------------------------------------------------------------------------------------ 50°C/W
Power Dissipation, PD @ TA = 25°CPSOP-8L ------------------------------------------------------------------------------------------------------------------------------------------ 2.0W
Operating Junction Temperature Range (Note 4) ------------------------------------------------------------------------ -40°C to +125°COperating Ambient Temperature Range -------------------------------------------------------------------------------------- -40°C to +85°CSupply Input Voltage, 5VSB ------------------------------------------------------------------------------------------------------ +4.5V to +5.5V
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siseretsyHOLVU -- 002 -- Vm
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tnerruCtnecseiuQ IQ V5=CCV5=#3S,xTUOVnodaoloN -- 002 003 Au
tnerruCnwodtuhS I NDHS .V5=CCV5=#3S,V0=NE -- 1 5 Au
CCV5tupnIylppuS
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tnerruCtupnIylppuS -- 4.5 8.01 A
tuokcoLegatloVrednU V OLVU gnisirCCV5 -- 3.4 5.4 V
siseretsyHOLVU -- 002 -- Vm
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tnerruCegkaeLesreveR V TUO V0=BSV5,V5.5= -- -- 1 Au
Absolute Maximum Rating
Thermal Information
Recommended Operation Conditions
Electrical Characteristics
uP7535
6uPI Semiconductor Corp., http://www.upi-semi.comRev. P04, File Name: uP7535-DS-P0401
Note 1. Stresses beyond those listed as the above Absolute Maximum Ratings may cause permanent damage tothe device. These are for stress ratings only. Functional operation of the device at these or any otherconditions beyond those indicated in the Recommended Operation Condition section of the specifications isnot implied. Exposure to absolute maximum rating conditions for extended periods may remain possibilityto affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution recommended.Note 3. θJA is measured in the natural convection at TA = 25°C on a low effective thermal conductivity test board of
JEDEC 51-3 thermal measurement standard.Note 4. The device is not guaranteed to function outside its operating conditions.Note 5. These items are not tested in production, specified by design.
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timiLtnerruC
6Q/4Q/2QrofdlohserhTtimiLtnerruC8USA5357Pu -- 57.0 5.1 A
8USB5357Pu 5.0 0.1 A
5Q/3Q/1QrofdlohserhTtimiLtnerruC -- 8.1 6.3 A
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tupnI#3S
hgiHtupnI V HI 4.1 -- -- V
woLtupnI V LI -- -- 4.0 V
emiTyaleDhgiHotwoL#3S T HL -- 01 -- sm
emiTyaleDwoLothgiH#3S T LH -- 03 -- su
tupnINE
hgiHtupnI V HI 4.1 -- -- V
woLtupnI V LI -- -- 4.0 V
emiTyaleDhgiHotwoLNE T HL -- 051 -- su
noitcetorPerutarepmeTrevO
leveLdlohserhTnwodtuhSlamrehT ngiseDyB -- 531 -- OC
siseretsyHnwodtuhSlamrehT ngiseDyB -- 03 -- OC
uP7535
7uPI Semiconductor Corp., http://www.upi-semi.comRev. P04, File Name: uP7535-DS-P0401
VOUT1 (2V/Div)
EN (2V/Div)
VOUT1 (2V/Div)
EN (2V/Div)
VOUT1 (2V/Div)
5VSB (2V/Div)
S3# (2V/Div)
5VCC (2V/Div)
Typical Operation Characteristics
VOUT1 (2V/Div)
5VSB (2V/Div)VOUT1 (2V/Div)
5VSB (2V/Div)
5VCC (2V/Div)
VOUT1 (2V/Div)
5VSB (2V/Div)
S3# (2V/Div)
5VCC (2V/Div)
Power On by 5VSB
Time (4ms/Div)COUT1 = 10uF, S3# = 0V
Power On by 5VCC
Time (4ms/Div)COUT = 10uF, 5VSB = S3# = 5V, 5VCC = 4.5V
S3# from High to Low
Time (100us/Div)5VSB = 4.5V, 5VCC = 5.5V, COUT1 = 10uF
S3# from Low to High
Time (2ms/Div)5VSB = 4.5V, 5VCC = 5.5V, COUT1 = 10uF
Turn On with S3# = Low
Time (400us/Div)5VSB = 5V, COUT1 = 10uF, IOUT1 = 100mA
Turn On with S3# = High
Time (400us/Div)5VSB = 5VCC = 5V, COUT1 = 10uF, IOUT1 = 100mA
uP7535
8uPI Semiconductor Corp., http://www.upi-semi.comRev. P04, File Name: uP7535-DS-P0401
100
120
140
160
180
200
220
240
-50 0 50 100 150200250300350400450500550600650700
-50 0 50 100 150
Typical Operation Characteristics
POR Threshold Level vs. Temperature
Junction Temperature (OC)
PO
R T
hres
hold
Lev
el (V
)
Control Input Level vs. Temperature
Junction Temperature (OC)
Con
trol I
nput
Thr
esho
ld L
evel
(V)
Q2/Q4/Q6 On Resistance vs. Temperature
Junction Temperature (OC)
Q2/
Q4/
Q6
On
Res
ista
nce
(mΩ
)
Q1/Q3/Q5 On Resistance vs. Temperature
Junction Temperature (OC)
Q1/
Q3/
Q5
On
Res
ista
nce
(mΩ
)
4
4.05
4.1
4.15
4.2
4.25
4.3
4.35
4.4
-50 0 50 100 150
5VSB/5VCCFalling
5VSB/5VCCRising
0.20.30.40.50.60.70.80.91
1.11.2
-50 0 50 100 150
EN/S3#Falling
EN/S3#Rising
VOUT1 (2V/Div)
IOUT1 (500mA/Div)
VOUT1 (2V/Div)
IOUT1 (1A/Div)
OCP for 5VSB OCP for 5VCC
Time (1ms/Div)COUT = 10uF, S3# = 0V
Time (1ms/Div)COUT = 10uF, S3# = 5V
uP7535
9uPI Semiconductor Corp., http://www.upi-semi.comRev. P04, File Name: uP7535-DS-P0401
0
40
80
120
160
200
-50 0 50 100 150
Quiescent Current vs. Temperature
Junction Temperature (OC)S3# = 5VCC = 0V.
Qui
esce
nt C
urre
nt (
uA)
Typical Operation Characteristics
uP7535
10uPI Semiconductor Corp., http://www.upi-semi.comRev. P04, File Name: uP7535-DS-P0401
Application InformationThe uP7535 is a current limited, dual-input triple-outputpower multiplexer acting as a high side switch for USBapplications where heavy capacitive loads and short-circuitsare likely to be encountered. It switches output voltages to5VSB at S3/S4/S5 states with 600mΩ switch and 200mAcapacity; to 5VCC at S0/S1/S2 states with 180mΩ switchand 1.5A capacity. The outputs can be parallel to providetotally 3.0A output current at S0/S1/S2 states.
Optimal switch logic according to S3# and 5VCC statusensures seamless output voltage transition.
When the output load exceeds the current-limit thresholdor a short is present, the uP7535 asserts overcurrentprotection and limits the output current to a safe level bydriving the power switches into saturation mode.
Other features include soft-start to limit inrush currentduring plug-in, thermal shutdown to prevent catastrophicswitch failure from high-current loads, under-voltage lockout(UVLO) to ensure that the device remains off unless thereis a valid input voltage present. The uP7535 is available inPSOP-8L package.
Input and output capacitorsBypass the supply input pins with a single 4.7uF capacitoras close as possible to the uP7535. A 4.7uF output capacitorat the output pin is recommended even much larger outputcapacitors are already available at the output of the uP7535,especially if the output capacitors are more than 2 inchesaway on the PCB. The inrush current to charge the outputcapacitors is calculated as:
SS
OUTOUTIN T
VCI ×= (A)
Special care should be paid to large output capacitorapplications. Take COUT = 1000uF as example, the inrushcurrent is IIN = 1000uF x 5V / 1.3ms = 3.8A. This is higherthan the current limit threshold of Q1/Q3/Q5 and Q2/Q4/Q6. In this case, the output voltage ramp up time iscontrolled by the current limit function of Q1/Q3/Q5 andQ2/Q4/Q6 as shown in Figure 1. Note that output voltageramping up slew rates are different due to different outuptcapacitors.
Time: 4ms/Div
VOUT1 (2V/Div)
IOUT2 (1AV/Div)
5VSB (2V/Div)
VOUT2 (2V/Div)
Figure 1. Turn on into 5VSB COUT2 = 1500uF, COUT1 = 10uF.
The output voltage undergoes an abrupt drop when a devicewith large input capacitors is hot plugged into the output ofuP7535 as shown in Figure 2, where a device with 1500uFis hot plugged into uP7535 output with 470uF outputcapacitor. The output voltage ramp up time is controlled bythe current limit level.
Time: 4ms/Div
VOUT1 (2V/Div)
IOUT2 (1AV/Div)
VOUT2 (2V/Div)
Figure 2. Hot plug application with S3# = 0V.
Thermal ConsiderationTemperature effect should be well considered when dealingwith voltage drop and power dissipation. The maximumRDS(ON) of the power switch is 160mΩ of Q2 under 25OCjunction temperature. If the device is expected to operateat 125OC junction temperature, the RDS(ON) of Q2 will become
160mΩ * (1 + (125OC - 25OC) * 0.5%/OC) = 240mΩ
uP7535
11uPI Semiconductor Corp., http://www.upi-semi.comRev. P04, File Name: uP7535-DS-P0401
Application Informationwhere 0.5%/OC is the approximated temperature coefficientof the RDS(ON).
If the maximum load current is expected to be 1.2A, themaximum voltage will become
1.2A * 240mΩ = 288mV
This in turn will cause power dissipation as
1.2A * 288mV = 346mW
The temperature raise is calculated as
346mW * 50OC/W = 17OC
The junction temperature is calculated as TA + 17OC, whereTA is the expected maximum ambient temperature. A fewiterations are required until get final solutions.
The thermal resistance θJA highly depends on the PCBdesign. Copper plane under the exposed pad is an effectiveheatsink and is useful for improving thermal conductivity.Figure 3 show the relationship between thermal resistanceθJA vs. copper area on a standard JEDEC 51-7 (4 layers,2S2P) thermal test board at TA = 25OC. A 50mm2 copperplane reduces θJA from 75OC/W to 50OC/W and increasesmaximum power dissipation from 1.33W to 2W.
60 7050403020100
60
70
50
40
30
90
100
80
The
rmal
Res
ista
nce θ JA
(OC
/W)
Copper Area (mm2)
Figure 3. Thermal Resistance èJA vs. Copper Area
PCB Layout ConsiderationPlace the uP7535 as close to the USB connector aspossible to minimize the parasitic elements.
Place local bypass capacitors as closed as possible to
the 5VSB and 5VCC pins. Use short and wide tracesto minimize parasitic resistance and inductance.
The exposed pad should be soldered on GND planewith maximum area and with multiple vias to inner layerof ground place for improved thermal performance.
Keep the power trace short and wide to minimize theparasitic resistance along the trace.
uP7535
12uPI Semiconductor Corp., http://www.upi-semi.comRev. P04, File Name: uP7535-DS-P0401
Note1.Package Outline Unit Description:
BSC: Basic. Represents theoretical exact dimension or dimension targetMIN: Minimum dimension specified.MAX: Maximum dimension specified.REF: Reference. Represents dimension for reference use only. This value is not a device specification.TYP. Typical. Provided as a general value. This value is not a device specification.
2.Dimensions in Millimeters.3.Drawing not to scale.4.These dimensions no not include mold flash or protrusions. Mold flash or protrusions shell not exceed 0.15mm.
Package Information
0.32 - 0.52
4.80 - 5.00
5.80 - 6.20
3.81 BSC
0.05 - 0.250.18 - 0.25
0.40 - 0.90
0.20 BSC
7.00 REF
1.50 REF
0 .70 REF 1.27 REF
1.27 BSC3.80 - 4.00
5.50 REF
4.00 REF
Recommended Solder Pad Layout
1.75 MAX
1.45 - 1.60
2.20 BSC
3.00 BSC
2.20 REF
3.00 REF