Download - Evk1100 Schematics Revc
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLOCK Circuitry
RESET Circuitry
RTC Clock
CPU Main Clock
Spare Clock
Decoupling capacitance
1.8V output
1.8V Core power supply
1.8V PLL power supply
3.3V core power supply
3.3V I/O power supply
C
(NM : Not Mounted)
PROCESSOR
EVK1100
A3
1 13Tuesday, December 18, 2007
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
ATMEL Nantes SA
La Chantrerie BP 70602
44306 Nantes Cedex 3
FRANCE
PB
5P
B6
PB
7P
B8
PB
9P
B10
PB
11
PB
12
PB
13
PB
14
PB
15
PB
16
PA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15PA16PA17PA18PA19PA20PA21PA22PA23PA24PA25PA26PA27PA28PA29PA30
PC5PC4PC3PC2PC1PC0
USB1
PB
17
PB
18
PB
19
PB
20
PX0PX1PX2PX3PX4PX5PX6PX7PX8PX9PX10PX11PX12PX13PX14PX15PX16PX17PX18PX19PX20PX21PX22PX23PX24PX25PX26PX27PX28PX29PX30PX31
PX33PX34PX35PX36PX37PX38PX39
JTAG0JTAG1
JTAG3JTAG2
PX32
PB
21
PB
22
PB
23
PB
24
PB
25
PB
26
PB
27
PB
28
PB
0
PB
29
PB
30
PB
31
PB
1P
B2
PB
3P
B4
PC0PC1PC2PC3PC4PC5
USB2
Xin32Xout32Xin0Xout0Xin1Xout1
RESETn
Xin32 Xout32
Xin0 Xout0
RESETn
Xin1 Xout1
PC[5..0]
PA[30..0]
PB[31..0]
PX[39..0]
USB[2..1]
JTAG[3..0]
PC[5..0]
VCC3
ADVREFAGND
VDDOUT
VDDANA
VDDIO
VDDIO VDDIOVDDIO
VDDIN
VD
DS
YS
VD
DC
OR
E
VDDSYS
VDDCORE VDDCOREVDDCOREVDDCORE
VDDOUT
VDDANA
AGND
VDDIO
VBUS
VDDIN
C117
33n
C118
33n
C120
33n
C119
33n
C4
22p
C5
22p
XC2Q12.0-SMU4-30-30/30-
C30
100n
C126
33n
C123
33n
C35
100n
C102
2.7n
XC5
Q13FC1450000614
C110
33n
C1052.2u
C17
100n
C116
33n
R84 39R
C113
33n
C29
100n
C2
22p
C1
100n
R110k
C3
22p
TP71TESTPAD
SW1SKRAALE010
13
4
2
C103
2.7n
C111
33n
C16
100n
C27
100n
R85 39R
C114
33n
R200R
C374.7u
U16
AT32UC3A0512-0ESAL
2527303234394143454748505354565758606264667374757677787980
122123
88
90
96
98
100
102
104
106
111
113
115
119
121
126
127
134
136
139
141
143
3 5 6 9 11
13
14
15
19
20
21
22
8586
124125132133
1241012242631333538404244465961636567878991959799101103105107110112114118120135137140142144
23
129130131128
82
7170
81
116
108
109
94
93
84
72
68
83
69
55
52
51
49
37
36
29
28
18
17
16
87 117
138
92
PA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15PA16PA17PA18PA19PA20PA21PA22PA23PA24PA25PA26PA27PA28PA29PA30
PB
0P
B1
PB
2P
B3
PB
4P
B5
PB
6P
B7
PB
8P
B9
PB
10
PB
11
PB
12
PB
13
PB
14
PB
15
PB
16
PB
17
PB
18
PB
19
PB
20
PB
21
PB
22
PB
23
PB
24
PB
25
PB
26
PB
27
PB
28
PB
29
PB
30
PB
31
PC0PC1PC2PC3PC4PC5
PX0PX1PX2PX3PX4PX5PX6PX7PX8PX9
PX10PX11PX12PX13PX14PX15PX16PX17PX18PX19PX20PX21PX22PX23PX24PX25PX26PX27PX28PX29PX30PX31PX32PX33PX34PX35PX36PX37PX38PX39
RESET_n
TCKTDOTDI
TMS
ADVREF
DPDM
VDDANA
VD
DIO
_7
VD
DIO
_6
GN
D_8
GN
D_7
VD
DIO
_5
VD
DP
LL
GN
D_6
VBUS
AGND
VD
DIO
_4
VD
DC
OR
E_3
GN
D_5
VD
DC
OR
E_2
NC
GN
D_4
VD
DIO
_3
VD
DC
OR
E_1
GN
D_3
GN
D_2
VD
DIN
VD
DO
UT
GN
D_1
VD
DIO
_2
GN
D_9
VD
DC
OR
E_4
VD
DIO
_1
C101
2.7n
C121
2.2u
C104
2.7n
XC1Q12.0-SMU4-30-30/30-
R180R
C112
33n
C106
2.2u
C6
22p
C108
2.7n
C28
100n
C7
22p
C115
33n
C109
33n
C122
470p
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Shall only be added if TPS2020B
Host VBUS generation
with Overcurrent Detection in output
Board USB powered
Device current limiter
VDDANA intends to provide a clean 3.3V power supply for analog blocks
VDDIO intends to provide a clean 3.3V power supply for ATUC3A0512 buffers
VDDIN intends to provide a clean 3.3V power supply for ATUC3A0512 internal
regulator
VCC3 intends to provide a clean 3.3V power supply for all peripherals
Test Point duplicated to allow one
present on each side of the board
5V Regulator
C
3.3V Regulator
(NM : Not Mounted)
POWER
EVK1100
A3
2 13Tuesday, December 18, 2007
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
ATMEL Nantes SA
La Chantrerie BP 70602
44306 Nantes Cedex 3
FRANCE
PX33 Over_Current_DetectPB17
PX[39..0]PB[31..0]
VCC5VCC5
VBUS
VBUS
VBUS_INVCC5
Vin
VBUS_IN
VDDIN
VDDANA
AGND
GND
VCC5
VDDIO
VCC3
VCC5 V3
Vin
R87 0R
U2
TPS2020D
1
23
45
678
GN
D
IN1IN2
ENOC
OUT1OUT2OUT3
TP32
TESTPAD
TP31
TESTPAD
R142 2.2k
R141
0R
R79 0R
TP14
TESTPAD
TP13
TESTPAD
R22 0R
TP74
TESTPAD
TP8
TESTPAD
D8EL15-21UGC
21
R80
0R
TP12
TESTPAD
R23 0R
TP16
TESTPAD
U17
LMS8117ADTX-3.3
3 2
1
VIN VOUT
GND
TP17
TESTPAD
TP33
TESTPAD
R747k
TP43
TESTPAD
TP9
TESTPAD
R647k
TP2
TESTPAD
J3
PJ-002AH-SMT
2314
TP15
TESTPAD
C244.7u
C41100n
TP1
TESTPAD
R8 0R
C25100n
C69
10n
SW2
MMS 228 T
21
3
78
6
D10
MBRS340T3G
21
C822 uF
R3 47k
L5
MSS1278-153MLB
C67470n
C1047u
C184.7u
U4
TPS2020D
123
45
678
GN
DIN1IN2
ENOC
OUT1OUT2OUT3
TP3
TESTPAD
U12
LM2678SD-5.0/NOPB
1
23
4
56
7
8
9
1011
121314
15
NC1
VIN1VIN2
CB
NC2NC3
FB
ON/OFF
GN
DNC4NC5
SWITCH3SWITCH2SWITCH1
PG
ND
TP10
TESTPAD
C20100n
TP42
TESTPADR2 0R
C40
GRM188R60J105KA01
TP72TESTPAD
D9MBRS340T3G
2 1
R86150R
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
C
Not Mounted
(NM : Not Mounted)
ETHERNET
EVK1100
A4
3 13Tuesday, December 18, 2007
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
ATMEL Nantes SA
La Chantrerie BP 70602
44306 Nantes Cedex 3
FRANCE
PB7PB8PB9
PB15
PB1
PA24
PB0
PB2PB3
PB5PB6
TX_ENTX0TX1
RX1RX0
RX_ERMDCMDIO
RX_DV
RX1RX0
TX0TX1
TX_EN
RX_ERRX_DV
RE
SE
Tn
MD
C
MD
IO
REF_CLK
REF_CLK
PA[30..0]
PB[31..0]
VCC3
VCC3VDDANAVDDANA
AGND
AGND
VDDANA
VCC3
VCC3
VCC3 VCC3
VCC3
VCC3
VCC3
VCC3
VDDANA
VCC3
U13
DP83848I1 2 3 4 5 6 7 8 9 10
11
12
18
1314151617
192021222324
25
26
27
28
29
30
31
32
33
34
35
36
373839404142434445464748
TX
_C
LK
TX
_E
NT
XD
_0
TX
D_1
TX
D_2
TX
D_3/S
NI_
MO
DE
PW
R_D
OW
N/IN
TT
CK
TD
OT
MS
TR
ST
TD
I
PFBIN1
RD -RD +
AGNDTD -TD +
AGNDRESERVED6RESERVED7
AVDD33PFBOUT
RBIAS
25M
Hz_O
UT
LE
D_A
CT
/CO
L/A
N_E
NLE
D_S
PE
ED
/AN
1LE
D_LIN
K/A
N0
RE
SE
TM
DIO
MD
CIO
VD
D33
X2
X1
IOG
ND
DG
ND
PFBIN2RX_CLKRX_DV/MII_MODECRS/CRS_DV/LED_CFGRX_ER/MDIX_ENCOL/PHYAD0RXD_0/PHYAD1RXD_1/PHYAD2RXD_2/PHYAD3RXD_3/PHYAD4IOGNDIOVDD33
R139
220R
C100100n
TP49
TESTPAD
R133
2.2
k
R134
2.2
k
C92 100n
+C93 10uF/10VR135 2.2k
TP44
TESTPAD
TP50
TESTPAD
R131 150R
R138
2.2
kR12751R
C90 100n
TP45
TESTPAD
C91 100n
TP51
TESTPAD
R97 4.7k
R12851R
R136
1.5
k
C128
33n
C39
100n
TP46
TESTPAD
R17100R
R12951R
TP52TESTPAD
C32 GRM188R60J105KA01
R132 18R
C33 GRM188R60J105KA01
R19
100R
TP47
TESTPAD
R13051R
C127
33n
C38
100n
U1450MHzCFPS73
12
34
NCGND
OutputVCC
R98 2.2kR99 2.2k
TP48
TESTPAD
C99100n 1
2
3
4
5
6
7
8
75R
75R
75R
75R
1nF Green
Yellow
TD+
TD-
RD-
RD+
CT
CT
GND
Shield
Shield
NC
J18
J3026G01DNLT
3
4
7
8
5
6
10 1211
12
1314
9
LE
DA
CT
_LIN
K
LE
DA
CT
_LIN
K
LE
DLIN
K
LE
DLIN
K
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
C
(NM : Not Mounted)
USB
EVK1100
A
4 13Tuesday, December 18, 2007
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
ATMEL Nantes SA
La Chantrerie BP 70602
44306 Nantes Cedex 3
FRANCE
USB1USB2
PA11
USB_ID
USB_ID
USB[2..1]
PA[30..0]
VBUS
TP73TESTPAD TP5
TESTPAD
TP6
TESTPAD
J5
MUSB-05-F-AB-SM-A
123
567
4
89
VBUSD-D+
GNDSHIELD1SHIELD2
ID
SHIELD3SHIELD4
TP7
TESTPAD
TP22
TESTPAD
R25 0R
TP11
TESTPAD
TP20
TESTPAD
TP21
TESTPAD
TP4
TESTPAD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DECOUPLING CAPACITOR
CLOSE TO THE DEVICE
DATAFLASH
SD/MMC
SPI
C
(NM : Not Mounted)
SPI
EVK1100
A
5 13Tuesday, December 18, 2007
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
ATMEL Nantes SA
La Chantrerie BP 70602
44306 Nantes Cedex 3
FRANCE
PA11
PA13
PA10
PA12
PA18
PA2PA7
PA14
PA19
PA17PA16PA15
RESETnSPI1_SCK
SPI1_CS0
SPI1_SCKSPI1_MOSI
SPI1_MISO
SPI1_CS1
SPI0_CS0
SPI0_MOSI
SPI1_CS0SPI1_SCK
SPI1_MOSISPI1_MISO
SPI1_MOSISPI1_MISOSPI1_CS1
SPI0_CS0
SPI0_MOSI
SPI_CARDDETECTSPI_WRITEPROTECTn
SPI_CARDDETECTSPI_WRITEPROTECTn
SPI0_MISO
SPI0_SCK
PA[30..0]
PA[30..0]SPI1_CS2
SPI0_SCKSPI0_MISO
VCC3
VCC3
VCC3
VCC3 VCC3 VCC3 VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
R115 0RR118 0R
R92100k
U8
1234 5
678SI
SCKRESETCS WP
VCCGND
SO
R34
100k
C44 100n
TP
53
TE
ST
PA
D
R28100k
R35100k
C46
100n
C45
100n
J7
SCDA1A0900
7891
52
101211
4
3614
13D0D1D2D3
CLKCMD
DETECTWPSW_COM
VDD
VSS1VSS2VSS3
NC
R33
100k
TP
54
TE
ST
PA
D
R32100k
R29100k
TP
55
TE
ST
PA
DR30100k
TP
56
TE
ST
PA
D
J6
PIN HEADER 1x6 PIP
123456
R112 0RT
P57
TE
ST
PA
D
R31100k
TP
58
TE
ST
PA
D
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TWI Interface available on a a 4 pins footprint
Do not cable any component.
Hearder 4 footprint.
TWI
Standard UART on
USART_0
Pin Direction Signal to connect to a modem
J9.1 Input DCD Data Carrier Detect
J9.2 Input RXD Received Data
J9.3 Output TXD Transmitted Data
J9.4 Output DTR Data Terminal Ready
J9.5 Signal Ground
J9.6 Input DSR Data Set Ready
J9.7 Output RTS Request To Send
J9.8 Input CTS Clear To Send
J9.9 Input RI Ring Indicator
USART_1 supports modem interface
(UC3A as DTE)
C
USART 0USART 1
(NM : Not Mounted)
USART
EVK1100
A4
6 13Tuesday, December 18, 2007
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
ATMEL Nantes SA
La Chantrerie BP 70602
44306 Nantes Cedex 3
FRANCE
CTS0TX0
RX0
PA4PA3
PA1PA0PA5
PA6
PB23PB24
PA8PA9
PB25PB26
CTS1
RTS1
RI1
Rx1
DTR1
PA29PA30
DCD1DSR1
Tx1
TX0
RTS0
SDASCL
U0_TxU0_CTS
U0_RxU0_RTS
PA[30..0]
4,5
PA[30..0]
4,5
U0_TxU0_Rx
U0_CTSU0_RTS
PA[30..0]
4,5
U1_DCDU1_DSR
U1_RxU1_Tx
PB[31..0]
4,5
U1_RTSU1_CTS
U1_DTRU1_RI
U1_Tx
U1_DCDU1_DSR
U1_RI
U1_DTR
U1_RxU1_CTS
U1_RTS
PA[30..0]
4,5SDASCL
VCC3
VCC3
VCC3
VCC3
VCC3 VCC3
C47 100n
C50 100n
R42 0R
R89
10k
R88
10k
TTL/CMOS RS-232
U10
MAX3241EEUI+
282412
273
1413
1918 5
4
109
25
26
23
12 11
2021
171615
678
22
C1+C1-C2+C2-
V+V-
T1INT2IN
R1OUTR2OUT R2IN
R1IN
T2OUTT1OUT
GN
DV
CC
EN
T3IN T3OUT
R2OUTBR1OUTB
R3OUTR4OUTR5OUT
R3INR4INR5IN
SHDN
C48 100n
R43 0R
R45 0RR46 0R
R39 0R
TP23 TESTPAD
R40 0R
R38 0R
R530R
R540R
C51 100n
C53 100n
U9 MAX3232ECAE+
15
2
6
16
13
45
1110129
147138
GN
D
V+
V-
VC
CC1+C1-
C2+C2-
T1INT2INR1OUTR2OUT
T1OUTT2OUT
R1INR2IN
R41 0R
R5710k
R48 10k
TP28 TESTPAD
TP24 TESTPAD
R47 0R
R44 0R
TP30 TESTPADJ9
17SM209SB64
1
2
3
4
5
6
7
8
9
11
10
C54 100n
TP29 TESTPAD
J10
PIN HEADER 1x4 PIP
1234
C55 100n
TP25 TESTPAD
TP27 TESTPAD
C49 100nJ8
17SM209SB64
1
2
3
4
5
6
7
8
9
11
10
R49 0R
R50 0R
R51 0R
C52 100n
R52 0R
TP26 TESTPAD
C56 100n
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Temperature PotentiometerPhotoresistor
JOYSTICKSensors
Bicolore Leds on PB bus :
LED4, LED5, LED6 & LED7 on PWM channels
C
PUSH BUTTONS
SENSORS
LEDS
(NM : Not Mounted)
SENSORS
EVK1100
A3
7 13Tuesday, December 18, 2007
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
ATMEL Nantes SA
La Chantrerie BP 70602
44306 Nantes Cedex 3
FRANCE
PX19
PX22
PA21PA22PA23
PA25
PB27PB28PB29PB30
PB19PB20
PX16
PA26PA20PA27PA28
PB21PB22
ADC0 ADC2
ADC1
USW1 USW2 USW3
USW2
USW3
USW1
PA[30..0]
4,5
ADC1ADC2
ADC0
PA[30..0]
4,5
Joy_BJoy_A
EXTINT
LED2LED1LED0
LED4LED5
LED3
PB[31..0]
4,5
PX[39..0]
4,5
EXTINT
Joy_CJoy_D
PB[31..0]
4,5
LED6LED7
LE
D6
LE
D5
LE
D4
LE
D7
LED2 LED3LED0 LED1
Joy_A Joy_B
Joy_DJoy_C
AVCC3
VCC3
AVCC3AVCC3AVCC3
VCC3 VCC3 VCC3VCC3
VCC3 VCC3
VCC3 VCC3
VCC3 VCC3 VCC3VCC3 VCC3
R75150R
TW1
PT10-5034-BLACK
R61
PT-10MV 10 104 A 2020
13
2
TP61TESTPAD
R70150R
SW7SKRHABE010
1
2
3
4
5
6
7 8
A
CTR
C
B
COM
D
Shield1 Shield2
R137200k
R73150R
TP59TESTPAD
TP68
TESTPAD
TP66 TESTPADTP64 TESTPAD
R8110k
R6610k
R76150R
SW6SKRAALE010
13
4
2
TP69
TESTPAD
D7EL15-21UGC
21
TP62TESTPAD
R63
0R
G R
D2SML-020MLT1
2
34
R6510k
C58
100n
SW4SKRAALE010
13
4
2
C60
100n
TP67
TESTPAD
R74150R
R71150R
R58100k
R62NCP18WF104J03RB
12
TP60TESTPAD
C59
100n
D4EL15-21UGC
21
D11
TEMT6000
21
R72150R
R6810k
R6710k
D5EL15-21UGC
21
R9110k
R6410k
R9010k
SW5SKRAALE010
13
4
2
R69150R
G R
D3SML-020MLT1
2
34
C57
10n
TP65TESTPAD
D6EL15-21UGC
21
TP63TESTPAD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SDRAM
C
(NM : Not Mounted)
MEMORIES
EVK1100
A
8 13Tuesday, December 18, 2007
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
ATMEL Nantes SA
La Chantrerie BP 70602
44306 Nantes Cedex 3
FRANCE
PX0PX1PX2PX3PX4PX5PX6PX7PX8PX9
PX10PX11
PX17PX18
PX20PX21
PX23
PX25PX26PX27PX28PX29PX30PX31
PX34PX35PX36PX37PX38PX39
PX32
PB16
PB10PB11PB12PB13PB14
PX24
PX14
PX[39..0]
4,5
SDA10A13A14
SDWEn
SDCKE
D14D15
D8D9D10D11D12D13
D6D7
D0D1D2D3D4D5D6
D7
D0D1D2D3D4D5
D8D9D10
D14D15
D11D12D13
A8A9
A11
SDA10
A13A14
A16A17
A2A3A4A5A6A7
DQM0
SDCKESDCK
RASnCASnSDWEn
PB[31..0]
4,5
DQM1
A11
SDCK
A16A17
CS1nRASnCASn
DQM0DQM1
A2A3A4A5A6A7A8A9A10
A10
CS1n
VCC3
VCC3
VCC3
C61
100n
C124
33n
C125
33n
R77 4.7k
C65
100n
U11
MT48LC16M16A2
1
2
3
45
6
78
9
1011
12
13
14
15
16171819
2021
22
23242526
27
28
293031323334
3536
3738
39
40
41
42
43
4445
46
4748
49
5051
52
53
54
VDD1
DQ0
VDDQ1
DQ1DQ2
VSSQ4
DQ3DQ4
VDDQ2
DQ5DQ6
VSSQ3
DQ7
VDD2
DQML
WECASRASCS
BA0BA1
A10
A0A1A2A3
VDD3
VSS3
A4A5A6A7A8A9
A11A12
CKECLK
DQMH
NC
VSS2
DQ8
VDDQ3
DQ9DQ10
VSSQ2
DQ11DQ12
VDDQ4
DQ13DQ14
VSSQ1
DQ15
VSS1R93 4.7k
C34
4.7u
C31
4.7u
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
JTAG INTERFACE
Pin Header SMD 2,54mm
NEXUS INTERFACE
C
(NM : Not Mounted)
MEMORIES
EVK1100
A
9 13Tuesday, December 18, 2007
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
ATMEL Nantes SA
La Chantrerie BP 70602
44306 Nantes Cedex 3
FRANCE
JTAG0JTAG1JTAG2JTAG3
PB10PB11PB12PB13PB14PB16PB17PB19PB20PB21
PB4
JTAG_TCKJTAG_TDOJTAG_TMSEVTOJTAG_TDI
RESETn
RESETn
JTAG_TCK
JTAG_TDO
JTAG_TMS
EVTO
JTAG_TDI MD05MD04MD03MD02MD01
MCKOMSEO1MSEO0
MD00
JTAG_TCKJTAG_TDOJTAG_TDIJTAG_TMS
JTAG[3..0]
4,5
MD00MD01MD02MD03
PB[31..0]
4,5
MD04MD05
MCKO
MSEO0
EVTOEVTIn
EVTIn
MSEO1
VCC3
VCC3
VCC3
VCC3VCC3 VCC3
J58
STL2-660VTT-10U
1 23 45 67 89 10
C79
100n
TP
35
TE
ST
PA
DT
P36
TE
ST
PA
D
R7810k
J57
2-5767004-2
13579
1113151719212325272931333537
2468101214161820222426283032343638
39 4041 4243
135791113151719212325272931333537
2468
101214161820222426283032343638
GND1 GND2GND3 GND4GND5
C78
100n
TP
34
TE
ST
PA
D
TP
37
TE
ST
PA
DT
P38
TE
ST
PA
D
TP
39
TE
ST
PA
D
C77
100n
TP
40
TE
ST
PA
D
TP
41
TE
ST
PA
D
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
No component shall be implemented for this connector
Only a footprint of Header 1.27mm shall be present on PCB
This connector allows easy connection of peripheral in the
prototyping area
C
(NM : Not Mounted)
EXPANSION
EVK1100
A4
10 13Tuesday, December 18, 2007
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
ATMEL Nantes SA
La Chantrerie BP 70602
44306 Nantes Cedex 3
FRANCE
PA5PA7
PA2PA4PA6
PA10PA12PA14
PA8
PA18PA20PA22
PA16
PA26PA28PA30
PA24
PA0
PA11PA13PA15
PA9
PA19PA21PA23
PA17
PA27PA29
PA25
PA1PA3
PC4
PX3PX5PX7
PX1
PX19PX21PX23
PX17PX18PX20PX22
PX16
PX27PX29PX31
PX25PX26PX28PX30
PX24
PX35PX37PX39
PX33PX34PX36PX38
PX32
PX11PX13PX15
PX9PX10PX12PX14
PX8
PX2PX4PX6
PX0
PC5
PB11PB13PB15
PB9
PB19PB21PB23
PB17
PB27PB29PB31
PB25
PB5
PB26PB28PB30
PB24
PB2PB4PB6
PB0
PB10PB12PB14
PB8
PB18PB20PB22
PB16
PB3
PB7
PB1
RESETn
PB[31..0]
PB[31..0]
PB[31..0]
PB[31..0]
PB[31..0]
PB[31..0]
PB[31..0]
PB[31..0]
PC[5..0] PC[5..0]
PA[30..0]
PA[30..0]
PA[30..0]
PA[30..0]PA[30..0]
PA[30..0]
PA[30..0]
PA[30..0]
PX[39..0] PX[39..0]
PX[39..0] PX[39..0]
PX[39..0] PX[39..0]
PX[39..0] PX[39..0]
PX[39..0] PX[39..0]
GND
GND VCC3
VCC3
GND VCC3
GND VCC3
GND VCC3
GND VCC3
GND VCC3
R140 0R
J27
2x40 FEMALE HEADER
2468
101214161820222426283032343638404244464850525456586062646668707274767880
135791113151719212325272931333537394143454749515355575961636567697173757779
J26
2x20 FEMALE HEADER
123456789101112131415161718192021232527293133353739
22242628303234363840
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EA-DIP204-4 Blue white LCD
KS0073 controller
C
(NM : Not Mounted)
LCD
EVK1100
A
11 13Tuesday, December 18, 2007
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
ATMEL Nantes SA
La Chantrerie BP 70602
44306 Nantes Cedex 3
FRANCE
LCD_C
LCD_ADJ2
LCD_VSSLCD_VDD
PB18LCD_A
LCD_ADJ2
LCD_ADJ2
SPI1_MISO
SPI1_MOSISPI1_SCK
SPI1_CS2
RESETn
PB[31..0]
VCC3GND
VCC5
VCC3
VCC3
VCC3
R8210k
TP70
TESTPAD
C76
100n
R10318RLCD Module 4
X 20 Characters
LCD1
DIP204-4e
6
16
5
789
1011121314
4
123
1718
15
E
RES
R/W
D0D1D2D3D4D5D6D7
RS
VSSVDDVEE
AC
NC
R105
3266W-1-502_LF
13
2
R21 0R
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
24 lines of array
+ 1 line of VCC
+ 1 line of VSS
C
(NM : Not Mounted)
PROTO
EVK1100
A4
12 13Tuesday, December 18, 2007
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
ATMEL Nantes SA
La Chantrerie BP 70602
44306 Nantes Cedex 3
FRANCE
VCC3
J66 PIN HEADER 1x16
12345678910
11
12
13
14
15
16
J67 PIN HEADER 1x16
12345678910
11
12
13
14
15
16
J68 PIN HEADER 1x16
12345678910
11
12
13
14
15
16
PCB1
A0609.3.1000.B
J69 PIN HEADER 1x16
12345678910
11
12
13
14
15
16
J70 PIN HEADER 1x16
12345678910
11
12
13
14
15
16
E14
MOUNTING HOLE
J71 PIN HEADER 1x16
12345678910
11
12
13
14
15
16
E15
MOUNTING HOLE
J60 PIN HEADER 1x16
12345678910
11
12
13
14
15
16
J72 PIN HEADER 1x16
12345678910
11
12
13
14
15
16
J73 PIN HEADER 1x1612345678910
11
12
13
14
15
16
E16
MOUNTING HOLE
J61 PIN HEADER 1x16
12345678910
11
12
13
14
15
16
J74 PIN HEADER 1x16
12345678910
11
12
13
14
15
16
J75 PIN HEADER 1x16
12345678910
11
12
13
14
15
16
E17
MOUNTING HOLE
J85 PIN HEADER 1x16
12345678910
11
12
13
14
15
16
E10
SJ-5076
E11
SJ-5076
E13
SJ-5076
E12
SJ-5076
E2
FIDUCIAL
E1
FIDUCIAL
E3
FIDUCIAL
J62 PIN HEADER 1x16
12345678910
11
12
13
14
15
16
J63 PIN HEADER 1x16
12345678910
11
12
13
14
15
16
J64 PIN HEADER 1x16
12345678910
11
12
13
14
15
16
J65 PIN HEADER 1x16
12345678910
11
12
13
14
15
16
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
C
ERRATAREV C/
USART 0U0_CTS (PA.4) must be connected to U9.9U0_RTS (PA.3) must be connected to U9.10U9.8 (R2IN) must be connected to J8.7U9.7 (T2OUT) must be connected to J8.8
USART 1U10.11 (DTR1) must be connected to J9.6U10.8 (DSR1) must be connected to J9.4
LEDSLED 5/Green is connected to GPIO PB.19 and not to PB.20LED 5/Red is connected to GPIO PB.20 and not to PB.19LED 6/Green is connected to GPIO PB.21 and not to PB.22LED 6/Red is connected to GPIO PB.22 and not to PB.21
SPIWrong Silkscreen : MISO and SCK are swapped
ERRATA
EVK1100
A
13 13Tuesday, December 18, 2007
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
ATMEL Nantes SA
La Chantrerie BP 70602
44306 Nantes Cedex 3
FRANCE