Digital Logic and
State Machine Design
Lab 2
CS CS 22042204CS CS 22042204
As you wait for the lab to start : Use PeopleSoft userid and password to login to the LABS domain Look at the course web site :
http://cis.poly.edu/cs2204 Open the Lab 2 presentation Read slides 2 and 3
Spring Spring 20142014Spring Spring 20142014
Lab 2CS 2204 Spring 2014 Page 2
Lab 2 Outline Presentation
Using CS2204 Lab & Engineering Fundamentals Engineering Environment Fundamentals Digital Design Trends
• Digital Design Techniques Using Term Project (pages 1 – 7)
The term project operation• The input/output relationship ≡ Purpose ≡ Game rules
Individual work Programming the FPGA chip Learning the rules of the game Playing the three different versions of the Ppm game Understanding the concept of the machine player strategy
New Handouts Term Project
Read also next slide
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While waiting for lab to start, do the following : Reserve seats for your partners
Make sure there are enough seats next to you Only the last group arriving to the seats are on two rows
• These two rows are rows 2 and 3 and the seats are near the wall
Login to the LABS domain Create a CS2204 folder on the S drive and on your laptop
If you cannot login nor see the S drive go to 337RH after this lab
Take a look at the course web site : http://cis.poly.edu/cs2204 Download this presentation and term project files to your
CS2204 folder
If you have not formed a team, look around to form a team and sit next to your partners if you can
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Engineering Environment Fundamentals Engineering Environment, especially the
digital engineering environment, is demanding
Technology advances rapidly A very dynamic environment
• Constant learning• Constant adaptation• Global team work
Even experienced engineers can be stressed out
Students need to keep this in mind and get ready for that environment
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Engineering Environment Fundamentals Companies ask job candidates
Can you adapt ?Are you flexible ?Are you a team player ?
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Engineering Environment Fundamentals Students need to take the advantage of
their college study to be ready Students need to learn how to learn fastStudents need to have a solid technical
foundationStudents need to practice interacting with
people Their peers, senior people and junior people
• This is often summarized as communication skills, but it is more than that
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Taking the Advantage of College Study Each course and professor are different,
students adapt to the course and professor
Different courses and professors help students Learn how to learn in a short time period Gain the technical foundation of their area Learn how to interact with people
Labs are a good medium to acquire them
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Today’s Engineering Environment Globalized Tight deadlines Tight budgets Managers and employers seek for two
pointsAre you systems oriented ?
Can you relate parts ? Can you solve problems ?
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Are You Systems Oriented ? On a global scale ?
They want to see that not only that You know your part (block) of the system (black box)
but other parts (blocks) and You can relate all the parts
But, you need to be prepared for thatThis can be an opportunity to prove yourself !You can say “No“ !
But, it should not be the following• “My job is only this part (block) ! I do not know the
other parts”
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Can You Solve Problems ? On a global scale ?
You are expected to say “Yes, I can do it” But, you need to know how to approach solving problems !
• Studying past exams is not a good practice to be ready Do not be afraid of taking on problems Do not be afraid of learning more
This can be an opportunity to prove yourself ! If you are systems oriented, it is easier to be a problem
solver You can say “No“ !
But, it should not be one of the following• I cannot do it !• I do not know about it ! • I never learned !
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Today’s Engineering Environment These two points become even more important
when there is an economic recession which forces companies
To outsource To reduce staffing
While they manufacture about the same number of systems
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Engineering Environment Fundamentals Technical Performance is not everything
Especially as you become more senior You will supervise junior engineers
• Junior engineers will look upon you
Non-technical skills means one knows what to do how, where and when
First thing first, be patient (cool) and do not lose temper In addition, senior engineers need to
Speak well Be good listeners Inspirational Motivational Firm and fair
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Engineering Environment Fundamentals Do not take anything that is not earned
Respect intellectual property (IP) How would you feel if it was your IP ?
But, do not be on a one-person crusade Do not be : “I do my work and do not need anyone”
• Perhaps today ! How about tomorrow ? We are not machines
• We all need each other
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Engineering Environment Fundamentals Help others
No one can survive aloneCommunicate with people around you
Practice it• You will need it when you are a senior engineer
Help before you ask for help
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Engineering Environment Fundamentals Find the balance between working hard
and helping others Hint for success
Smile As a senior engineer/project manager/supervisor you
need to be approachable by junior engineersHave you smiled today ?
If no, why ?
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CS2204 engineering environment Problem solutions for systems
Keep focusing on the big picture Technical and non-technical dynamics
Learn/practice with teammates, TAs and the professor Do not ignore the non-technical side
Team-oriented labs and homework Rules and regulations to acquire technical and
non-technical skills The professor and TAs are the project manager
and senior engineers and students are junior engineers
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College Training for Engineering Environment Take the advantage of your courses to learn and
improve engineering environment basics By training yourself in similar situations
Would you arrive late to a team meeting as an engineer ?• Do the same with your partners !
Would you complete your project assignment late ?• Do the same for your term project !
Would you argue with your project manager ?• Discuss with your professor ! How, where and when ?
Be patient, do not lose temper
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Digital Design Trends Current digital design techniques
Top-down designTeam-based designCore-based design
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Top-down design One does not start with gates and FFs One does not start with chips and PCBs One starts with simple concepts, few details
Gradually adds more details until all the details are obtained
All the gates and FFs and their interconnections
The design is done layer by layer A layer implements the layer above
Upper layers are simpler than lower layers• A layer is less complex than the layer below• A layer is built on the layer below
…
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Top-down design Layered design
The design is done layer by layer The design starts with the top layer, the simplest layer
• After completing the top layer moves down the layer below• There are more details on the 2nd layer• Then, the next layer below with more details
The design completes with the bottom layer !
…
The simplest level : Start with this level
The most complex level : The last level to work on
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Top-down design Block-based design
Structured design A layer has a number of blocks/components
Upper layers are simpler than lower layers A layer has less details than the layer below
• A layer has less number of blocks/components than the layer below
…
The simplest level : Start with this level
The most complex level : The last level to work on
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Block-Based Design One starts the design of a complex circuit, by
considering it as a black box This is the top layer that has just one block, the black
box !
The internal components, details, are ignored Dealing with many details in the beginning is frustrating
and time consuming Deal with simplest issues first, the top layer :
The input/output relationship, design goals and technology
of the black box is studied
.
.
.
Digital productas a black boxInputs Outputs
.
.
.
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Block-Based Design Once familiar with the input/output relationship, we break it
up into simpler blocks and study each block separately satisfying
The input/output relationship, design goals and technology One continues to partition (sub)blocks until each one is so
simple one can design it very quickly by using gates and FFs
One moves down layer by layer and increases the number of (sub)blocks (details) until there are only gates & FFs
(Sub)blocks can be designed and tested separately at the same time
Proceed partitioning and testing until a (sub)block is completed
.
.
.Inputs Outputs
.
.
.
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CS2204 Top-Down Design The term project is just one black box in the beginning of
the semester All we will be concerned about is its operation, the
input/output relationship, that is how to play the game Today we will study the input/output relationship
The black box will then be partitioned into six blocks : Control Unit Input/Output Human Play Play Check Points Calculation Machine Play
These six blocks are partitioned into subblocks and so on
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Current Digital Design Techniques Top-down design Team-based design
Even if top-down design is used, today’s digital circuits cannot be finished by the projected completion time unless a team of people designs it in parallel
Expected introduction of the product to the market• Time-to-market (TTM) : 18 months typical• The work starts with the first team meeting where the
top level view of the product is given by the project manager
►The black-box view & the input/output relationship
(operation), design goals, technology
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Team-Based Design Block-based design fits well since each team
member can design a separate block TTM is divided into periods of work or project phases
to make sure team members are synchronized Time is saved
However team members must cooperate well for an acceptable product
Team-based design can be inefficient if members do not know each other’s block
• For example there can be duplicated circuits !
This is what we call it being systems oriented
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Team-Based Design CS2204 team-based design
3- or 4-student teams are formed in the beginning of the semester
There are six project phases which are called experiments
Experiment 1 through Experiment 6 to make sure team members understand all the blocks and each other’s block
• Also learn new subjects to complete the design TTM is May 2, 2014 !
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Current Digital Design Techniques Top-down design Team-based design Core-based design
In today’s competitive digital product market, top-down design and team-based design are not enough to be ahead of the competition
A complex block is licensed from another company Intellectual Property (IP) is licensed Time is saved
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Core-Based Design The most difficult block is identified The team searches around the world to see if
there is a company that has a product similar to the block that can be licensed
The team makes sure the licensed product satisfies The input/output relationship, design goals (speed, cost,
power, etc.) of the block and technology
The company is asked for licensing in return for a one-time fee or for a percentage of each product sold
The licensed block is called core since it is the most complex part and the remaining ones are designed ‘around” the core
The remaining, simpler, blocks are designed by the team members
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Core-Based Design CS2204 core-based design
Student will design only one block out of six blocks
The Control Unit Block : core The Input/Output Block : core The Human Play Block : core The Play Check Block : core The Points Calculation Block : core The Machine Play Block : non-core
• The Machine Play Block uses all other blocks except the Human Play Block
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Lab Grade Students receive a lab grade
5% of the term grade Lab work
• Lab attendance, arrival, departure• Concentration on lab work• How well he/she cooperates with the teammates
Term project (Experiment 6) grade based on the Term Project Check List handout
Arriving late would delay the team work Also, teammates cannot synchronize well If this happens frequently, the team member would fall
behind the teammates• Exam grades would go down as well
Labs affect the term grade more Labs are on all exams Labs reinforce lecture topics
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Lab Grade Calculating the lab grade
5% of the term grade Term project (Experiment 6) grade based on the Term
Project Check List handout : 80 Lab work : 90 based on
• Lab attendance, arrival, departure• Concentration on lab work• How well he/she cooperates with the teammates
The lab grade : (0.90 * 0.80) * 5 = (0.72) * 5 = 3.6
Labs affect the term grade more Labs are on all exams Labs reinforce lecture topics
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Developing the term project A student who has fallen behind
Lectures Labs Homework assignments
cannot develop the term project ! When it is week 11, 12, 13, you may
realize you cannot design the machine player !
It is too late !
If a partner falls behind the team falls behind
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The Term Project, Ppm The term project game is human vs. machine
Player 1 : human, Player 2 : machine
When the game starts Three random digits are generated A 2-digit code is generated
After the random digits and code are generated Player 1 has the turn Then Player 2 plays, then Player 1 plays, and so on…
Unless a player has an adjacency, then the player plays again !
The game continues until one has more than (255)10 points
Game is restarted by resetting
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Digilent NEXYS-2FPGA Board
LED lights
Power switch
XilinxSpartan-3EFPGA chip
USB cablemust beconnectedto this port
7-segmentdisplays
Push buttonsSlide switches
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The Xilinx XLA5 FPGA board The board circuits
1) FPGA and its associated circuitry Placed around the FPGA chip
• We should not touch the FPGA area
2) I/O devices Switches, push buttons, LED
lights and 7-segment displays as well as
Serial, VGA,PS/2 and other ports
3. Memory chips There are two memory chips on the
board a 16-Mbyte Flash EPROM and 16-Mbyte SDRAM
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The Term Project, Ppm When a player has the turn, a binary-
coded decimal (BCD) random digit (RD) is given
0 ≤ RD ≤ 9
The player has two optionsPlay the random digitSkip the play, so the opposing player gets the
turn The skipping player does not lose points The opposing player gets a new random digit
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The Term Project, Ppm Playing the random digit means
Play RD directly on a position (overwrite it)Add it to a position displayThe result of direct playing/addition is stored
on the same position The player earns
• Regular reward points + code reward points If there is an adjacency, the player plays again after
getting a new random digit
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The Term Project, Ppm If the random digit is played on a position directly
The largest digit played is 9
If the random digit is added to a position display The largest result is F If the result exceeds F, there is a display overflow : the
result is subtracted (16)10
PD2 = A & RD = 9 A + 9 – (16)10 = 3 PD2• The display blinks at a high rate
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The Term Project, Ppm The code for each game
A 2-digit codeOn the rightmost two displaysBoth code digits are non-zeroThe digits are invisible to the playersThe digits can be discovered by observing
reward points earned after each play
3 2 1 0
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The Term Project, Ppm After playing the random digit, the player
earns two types of reward pointsTotal reward points = Regular reward points + code reward points
Regular reward points Based on the adjacency of the digit
played Code reward points
• Playing one of the two code digits on display 0 or 1 Code digits are always on
displays 0 and 1
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The Term Project, Ppm Regular reward points earned when digit K
is played If there is NO adjacency (0 adjacency)
K regular reward points earned• Basic reward
If there is at least one adjacency (2 * K) reward points if there is one adjacency (4 * K) reward points if two adjacencies (8 * K) reward if three adjacencies The player plays again, after getting a new random digit The leftmost and rightmost displays are not adjacent !
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The Term Project, Ppm Code reward points earned when digit K is
played on position 0 or 1 If the other position does not have the other
code digit Earn code reward points
• (8 * K) reward points
If the other position has the other code digit Earn code reward points
• (Code) reward points
• It is a 2-digit reward which can be up to FF = (255)10
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The Term Project, Ppm Assume that
The displays are 7FE9The random digit is 5The code is 2E
If a player plays 5 on position 0 with an addition• The displays become 7FEE
The other position does not have the other code digit
• The player earns (2*E) + (8*E) = (2*14) + (8*14) = (140)10 points
3 2 1 0
Regular reward points
Code reward points
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The Term Project, Ppm Assume that
The displays are 7FE9The random digit is 5The code is EE
If a player plays 5 on position 0 with an addition• The displays become 7FEE
The other position has the other code digit
• The player earns (2*E) + (EE) = (2*14) + (238) = 28 + 238 = (266)10 points
The game is over !
3 2 1 0
Regular reward points
Code reward points
The player exceeds (255)10 points and wins the game
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The Term Project, Ppm We will use the term adjacency, meaning the
number of adjacencies The adjacency ≡ The number of adjacencies
The number of identical digits next to the digit played
The leftmost and rightmost displays are not adjacent !
3 2 1 06 A 1 6
No adjacency !
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The Term Project, Ppm Largest adjacencies do not mean largest regular
rewards Displays are 55AF and RD is 5, where and how do you
play ? A points oriented player plays on position 1 with and
addition to earn (30)10 points as displays would have 55FF• There is one adjacency• The player plays again
Looking for largest adjacencies ? You would play on position 1 directly to earn (20)10 points as displays would have 555F
• There are two adjacencies• The player plays again• The displays are kept small
But, if the code is Fx, one would play 55FF• The player plays again
The leftmost and rightmost displays are not adjacent !
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The Term Project, Ppm Largest adjacencies do not mean largest regular
rewards Displays are 234A and RD is 4, where and how do you
play ? A points oriented player plays on position 0 with and addition
to earn (14)10 points as displays would have 234E Looking for largest adjacencies ? You would play on position 0
directly to earn (8)10 points as displays would have 2344• There is one adjacency• The player plays again
If the code is 5E, • One would play with an addition to have 234E to earn (126)10 points
There is no adjacency The player does not play again
If the code is 4E, • One would play with an addition to have 234E to earn (92)10 points
There is no adjacency The player does not play again
The leftmost and rightmost displays are not adjacent !
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The Term Project, Ppm Players can try to play so that
There are adjacencies now and in the near future
Adding the random digit to large digits result in display overflows and small rewards (earnings) unless there are adjacencies (of these small digits of course)
The code digits are tracked The code digits are invisible and so discovering them
requires continuous effort on both players
Thinking needed Players must have strategies to play
where and how to win games
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The Term Project, Ppm Having a strategy is not enough for all playing situations
The primary strategy cannot decide how to play sometimes When there are equally playable positions
• A secondary playing strategy is needed
Displays : CAAC RD : 2
Primary strategy : Maximize regular reward points
Play on Position 2 with an addition ?
CCAC
Play on Position 1 with an addition ?
CACC
Which position will be played on ?
What is the code ? Not Cx ?
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The Term Project, Ppm Secondary strategies
Play on the rightmost vs play on the leftmost Play directly vs play with an addition We will show secondary strategies within parentheses
Play on the(rightmost)largest regular reward position (directly)(Action 0)
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The Term Project, Ppm Secondary strategies
We will show secondary strategies within parantheses What if playing directly conflicts with playing on the
righmost ? Playing directly on the left results in the same goal (points,
adjacencies, etc.) as playing with an addition on the right ! Due to implementation reasons this semester, we will select
playing directly on the left !Play on the(rightmost)largest regular reward position (directly)(Action 0)
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The Term Project, Ppm Having a strategy is not enough for all playing situations
Due to implementation reasons this semester, we will select playing directly on the left !
Displays : 4E37 RD : 4
Primary strategy : Maximize adjacencies
Play on Position 2 with directly ?
4437
Play on Position 1 with an addition ?
4E77
Which position will be played on ?
What is the code
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The Term Project, Ppm Polytechnic Playing Machine, Ppm
The term project is human vs. machine
There are two other Ppm versions which are not term projects
Machine vs. machine Human vs. human
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The Term Project, Ppm Course web site machine player
Its primary strategy considers now and near future Six different actions
• It keeps track of the code digits and plays them if it can• It often looks for adjacencies• It tries to keep digits small to avoid display overflows• It plays aggressively only when it is behind or close to
winning• Its secondary strategy is always play on the rightmost of
playable positions except in the case playing a code digit
Its design is sped up by inputting random digits from switches SW3 – SW0
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Course web site machine player
From page 42 of the Term Project handout
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Strategy of Player 1 of ppmmvsm
From page 48 of the Term Project Handout
Figure 31. The playing strategy of Player 1 machine player at the course web site.
Play on the (rightmost)largest
(Action 0)if equal)(directlyposition rewardregular
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Xilinx Project Development Steps in the CS2204 lab Develop the schematic
Use pencil and paper to design circuitsDo integrity testsTest the schematic via functional simulations
Do a Xilinx IMPLEMENTATION It generates the bit file after mapping the
components to the CLBs of the chip Do timing simulations to test the schematic
Download the bit file to the FPGA and test the design on the board
Program the chip and test the design
Today
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QUESTIONS ?
Do not leave the lab before your partners finish► Help your partners
Make sure you have the LABS account and see the S driveMake sure you have installed WebPACK 12.4 on your laptop
Make sure you create a CS2204 folder on both
Start thinking about forming teams before leaving the lab
DigitalLogic and
State Machine Design
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Today’s Individual Xilinx Work We will not develop a Xilinx project We will play the Ppm game on the board
To start learning about the lab hardware and software To learn the playing rules To start thinking about the machine player we will
design We will think about its playing strategy
We will study three versions of the Ppm game : ppmhvsm (the termproject), ppmmvsm and ppmhvsh
To understand the playing better To have a better idea about the playing strategy of our
machine player
We will read the Term Project handout
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Today’s Individual Xilinx Work (High Level Steps)
1. Download the term project from the course web site to the CS2204 folder
Ppm human vs. machine project : termproject
2. Extract (unzip) termproject The termproject folder will be created for the project
3. Start the Xilinx ISE software
Note that during the semester the CS2204 folder that is mentioned is the CS2204 folder on the S drive
After the lab session copy all the new work from your S drive to your laptop
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Today’s Individual Xilinx Lab Work (High Level Steps)
4. Analyze the term project on the FPGA board to learn how the game is played
a) Open the ppm project in the termproject folderb) Program the FPGA chipc) Play the game against the machine player to learn the game
rulesd) Think about the playing strategy of the machine player that
will be designed5. Download, extract, open, study and play the other two
types of the Ppm game to think more about the machine player’s strategy
Human vs. human : ppmhvsh Machine vs. machine : ppmmvsm
6. Stay in the lab and do other work to save time for the futureWhen we indicate to click on a button or icon
or to enter a keyword, we will use boldface characters
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Today’s Individual Xilinx Lab Work (detailed steps)
1. Download the zipped term project file “termproject“ from the Term Project section at the course web site to the CS2204 folder
Download the way you download web files
2. Extract (unzip) “termproject” in the CS2204 folder The term project file is zipped and so unzip it
Right click on the zipped “termproject” file Click “OK” for the warning : Opening these files might be
harmful to your computer Click on “Extract All…”
• Make sure that you do not have a termproject folder inside a termproject folder so that it is S;\CS2204\termproject not S;\CS2204\termproject\termproject
Afterwards, the “termproject” folder is created If you cannot unzip, ask from the TA to help you
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Today’s Individual Xilinx Work3. Start the Xilinx ISE software
Double click on the Xilinx ISE Design Suite 12.4 icon on your Desktop :
Xilinx will show a “Tip of the Day” window in the foreground and the “ISE Project Navigator” window in the background :
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Today’s Individual Xilinx Work4. Analyze the term project on the FPGA board to learn how the
game is playeda) Open the ppm project in the termproject folder
The ISE opens the last project you worked on by default• Though this can be changed by changing the Preferences settings
If you did not open any Xilinx project, it will not open any project as you saw on the previous slide and see below
Click on OK to close the “Tip of the Day” window :
Note that this window can be turned off by clicking on this :
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Today’s Individual Xilinx Work4. Analyze the term project on the FPGA board to learn how
the game is playeda) Open the ppm project in the termproject folder
After the “Tip of the Day” window is closed you will see the following :
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Today’s Individual Xilinx Work4. Analyze the term project on the FPGA board to learn how
the game is playeda) Open the ppm project in the termproject folder
Click on Open Project... on the “Start” panel on the left to start opening the term project
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Today’s Individual Xilinx Work4. Analyze the term project on the FPGA board to learn how the
game is playeda) Open the ppm project in the termproject folder
The “Open Project”window will pop up asking you to select the project folder which is termproject
Select the project folder S;\CS2204\termproject by using typical Windows operations
• You will see the partial content of the termproject folder where all six folders the “Xilinx ISE Project” file are shown :
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Today’s Individual Xilinx Work4. Analyze the term project on the FPGA board to learn how the
game is playeda) Open the ppm project in the termproject folder
Double click on “Xilinx ISE Project” :
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Today’s Individual Xilinx Work4. Analyze the term project on the FPGA board to learn how the
game is playeda) Open the ppm project in the termproject folder
Xilinx will open the term project :
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Today’s Individual Xilinx Work4. Analyze the term project on the FPGA board to learn how the
game is playeda) Open the ppm project in the termproject folder
The ISE opens the last project you worked on by default• If you started ISE for the first time and opened the term project then closed ISE
and then started ISE, you will see the term project automatically opened :
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Today’s Individual Xilinx Work4. Analyze the term project on the FPGA board to learn how the
game is playeda) Open the ppm project in the termproject folder
The ISE opens the last project you worked on by default• If you started ISE for the first time and opened the term project then closed ISE
and then started ISE, you will the see term project automatically opened
Click on OK to close the “Tip of the Day” window
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Today’s Individual Xilinx Work4. Analyze the term project on the FPGA board to learn how the
game is playeda) Open the ppm project in the termproject folder
The ISE opens the last project you worked on by default• If you started ISE for the first time and opened the term project then closed ISE
and then started ISE, you will the see term project automatically opened
After the “Tip of the Day” window is the term project is shown completely :
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The left section is a number of tiled panels where the top one is still the “Start” panel
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The right section is a single panel which is the “Design Summary” panel
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The bottom section is a single panel which is the “Console” panel
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The left section is a number of panels tiled where the top one is still the “Start” panel
Click on Close on the left tiled panels until you see the ”Design” panel
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The left section is a number of panels tiled where the top one is still the “Start” panel
Click on Close on the left tiled panels until you see the ”Design” panel You will click three times :
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The “Design” panel view shows the current “Implementation” of the project :
It shows the hierarchy of the project
The name of the project is ppm
The FPGA chip used is the XC3S500E-5fg320
The name of the schematic file is ppm.sch
The list of all user designed macros (black boxes) with their labels (U125, U152,…) in the schematics
The list shown is not complete !
One has to scroll down !
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The “Design” panel view show the current “Implementation” of the project :
The list of all user designed macros (black boxes) with their labels (U125, U152,…) in the schematics
The list is now complete !
After scrolling down !
The User Constraints File of the project
The User Constraints File allows the project designer to indicate • Which input/output devices (switches, push buttons, LED lights, 7-segment displays, the USB controller, flash memory, etc.) are used
• Which pins of the FPGA chip they are connected to
It shows the hierarchy of the project
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The “Design” panel view show the current “Implementation” of the project :
It shows any process running for the project
We will be concerned with only three processes for the project
These three processes are Synthesize Implement Design Generate programming File
We will these three steps Xilinx IMPLEMENTATION
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The “Design” panel view show the current “Implementation” of the project :
It shows any process running for the project
We will be concerned with only three processes for the project
These three processes are Synthesize Implement Design Generate programming File
sign indicates the process has been completed successfully but there are warnings
sign indicates the process has been completed successfully without warnings nor errors
sign indicates that the project has been changed and the process has to be run
sign indicates that the project has an error and has to be corrected
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The “Design” panel view show the current “Implementation” of the project :
It shows any process running for the project
We will be concerned with only three processes for the project
These three processes are Synthesize Implement Design Generate programming File
The goal of these processes is to• Check for errors• Check for potential issues that can cause timing problems• Generate a file, the “bit file,” to program the FPGA chip
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The “Design” panel view show the current “Implementation” of the project :
It shows any process running for the project
We will be concerned with only three processes for the project
These three processes are Synthesize Implement Design Generate programming File
If there is one of the two symbols next to the “Generate Programming File” process :
• One can program the FPGA chip : The bit file is ready !• By downloading it to the FPGA chip
The “Generate Programming File” process generates the bit file !
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The “Design” panel view show the current “Implementation” of the project :
It shows any process running for the project
We will be concerned with only three processes for the project
These three processes are Synthesize Implement Design Generate programming File
To program the FPGA chip we will use another software package !
We will use ADEPT from Digilent !
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The right section is a number of stacked up panels where the top one is the “ISE Design Summary” panel
It summarizes the ppm Project Status
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The right section is a number of stacked up panels where the top one is the “ISE Design Summary” panel
The panel below it is the ISE Design Suite Info Center• We will not use this panel much this semester
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The right section is a number of stacked up panels where the top one is the “ISE Design Summary” panel
It summarizes the ppm Project Status• It gives a summary of the last Synthesis, Implementation Design and Generate
Programming File steps
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The right section is a number of stacked up panels where the top one is the “ISE Design Summary” panel
It summarizes the ppm Project Status• It gives a summary of the last Synthesis, Implementation Design and Generate
Programming File steps
The summary shown is not complete !
One has to scroll down !
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The right section is a number of stacked up panels where the top one is the “ISE Design Summary” panel
It summarizes the ppm Project Status• It gives a summary of the last Synthesis, Implementation Design and Generate
Programming File steps
The summary shown is nowcomplete !
after scrolling down !
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The right section is a number of stacked up panels where the top one is the “ISE Design Summary” panel
It summarizes the ppm Project Status• It gives a summary of the last Synthesis, Implementation Design and Generate
Programming File steps
We will pay attention to these two entries all the time !
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The right section is a number of stacked up panels where the top one is the “ISE Design Summary” panel
It summarizes the ppm Project Status• It gives a summary of the last Synthesis, Implementation Design and Generate
Programming File steps
We will pay attention to these two entries all the time !
No Errors65 Warnings
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The bottom section is a single panel which is the “Console” panel It shows messages from the ISE Project Navigator
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The bottom section is a single panel which is the “Console” panel
It shows messages from the ISE Project Navigator• Warnings are in pink with the following symbol in the beginning :• Errors are pink with the following symbol in the beginning :• All other messages are in black without any symbol !
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The “Design” panel view show the current “Implementation” of the project
Double click on ppm (ppm.sch) to view the six schematics
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The “Design” panel view show the current “Implementation” of the project :
Double click on ppm (ppm.sch) to view the six schematics Notice that as the schematic file is open the first schematic sheet is shown
and also the left panel changes to the “Options” panel:
First schematic sheet : Control Unit
First schematic sheet
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The “Design” panel view show the current “Implementation” of the project :
Double click on ppm (ppm.sch) to view the six schematics Click on 2 to the left of the schematic sheet to view the second schematic
sheet :
Secondschematic sheet
Second schematic sheet : Input/Output Block
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The “Design” panel view show the current “Implementation” of the project :
Double click on ppm (ppm.sch) to view the six schematics Click on 3 to the left of the schematic sheet to view the third schematic
sheet :
Thirdschematic sheet Third
schematic sheet : Human Play Block
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The “Design” panel view show the current “Implementation” of the project :
Double click on ppm (ppm.sch) to view the six schematics Click on 4 to the left of the schematic sheet to view the fourth schematic
sheet :
Fourthschematic sheet Fourth
schematic sheet : Play Check Block
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The “Design” panel view show the current “Implementation” of the project :
Double click on ppm (ppm.sch) to view the six schematics Click on 5 to the left of the schematic sheet to view the fifth schematic
sheet :
Fifthschematic sheet Fifth
schematic sheet : Points CalculationBlock
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The “Design” panel view show the current “Implementation” of the project :
Double click on ppm (ppm.sch) to view the six schematics Click on 6 to the left of the schematic sheet to view the sixth schematic
sheet :
Sixthschematic sheet
Sixthschematic sheet : Machine PlayBlock
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The “Design” panel view show the current “Implementation” of the project :
There are six schematics !
The Term Project handout discusses the schematics in detail !
We will cover these schematics in detail !
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Xilinx Projects on the Screen : Three sections are shown when a Xilinx project is open
The “Design” panel view show the current “Implementation” of the project :
There are six schematics ! This is the result of the first partitioning of the ppm black box
The Term Project handout discusses the schematics in detail !
We will cover these schematics in detail !
Ppm13 19
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Today’s Individual Xilinx Work4. Analyze the term project on the FPGA board to
learn how the game is playeda) Open the project from the Project Manager
• Blocks 1, 2, 3, 4 and 5 are core blocks• All of their circuits are given except the macro (black
box), M1, in Block 4
• Block 6 completely non-core• Students will replace all the circuits in this block with
their own circuits Including the macros (black
boxes) M2, M3 and M4
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Today’s Individual Xilinx Lab Work4. Analyze the term project on the FPGA board to
learn how the game is playeda) Open the project from the Project Manager
• Each block (schematic) consists of subblocks and subsubblocks• Subblocks and subsubblocks are identified by their
names and distance and lines between them• Common document processor editing rules and key
sequences apply to edit schematics
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Xilinx ISE Project Navigator Window Summary Three panels shown
The left section is a number of tiled panels where the top one is now the “Options” panel The right section is a number of stacked up panels where the top one is now the “ppm.sch”
schematic panel Notice the sixth schematic sheet on the right
The bottom section the “Console” panel
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Xilinx ISE Project Navigator Window Summary Three panels shown
Click on Close on the left panels until you see the ”Design” panel You will click two times :
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Xilinx ISE Project Navigator Window Summary Three panels shown
We now have the ”Design” panel on the left Click on ppm (ppm.sch) to see the processes for the project
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Xilinx ISE Project Navigator Window Summary Three panels shown
We now have the processes of the ppm project on the left side
Notice a check mark for “Generate Programming File”
The bit file is ready ! We can program the FPGA chip !
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Today’s Individual Xilinx Lab Work4. Analyze the term project on the FPGA board to learn
how the game is playedb) Program the FPGA chip
i. Make sure your PC is connected to the USB switch and the FPGA board is connected to the USB switch
ii. Press on the correct button of the USB switch so that your PC is selected to communicate with the FPGA board
USB cable must beconnected to this port
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b) Program the FPGA chip Use the steps below every time you want to use the FPGA board
iv. Turn on the FPGA board, by switching the power switch on• You will see that the board will turn on the “POWER” LED light• After a few seconds the 7-segment displays will show “run” and the “DONE”
LED light will be turned on• Then the 7-segment displays will show “PASS” then “128” then “PASS” then
“128,” etc. continuously
Power switch
Power LED light
DONE LED light
7-segmentdisplays
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b) Program the FPGA chip Use the steps below every time you want to use the FPGA board
v. Minimize the “ISE Project Navigator” window to be able to start the Digilent ADEPT software
vi. Double click on the Digilent ADEPT icon on your Desktop• You will see that ADEPT window is shown where the FPGA board is immediately
recognized as the NEXYS-2 board
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b) Program the FPGA chip Use the steps below every time you want to use the FPGA board
vii. Click on the FPGA Browse… button to select the bit file
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b) Program the FPGA chip Use the steps below every time you want to use the FPGA board
viii. The “Open” window will pop up to allow you to switch to the right project folder and select the right bit file
• ADEPT always shows the last project folder accessed• If no bit file has ever been selected, it shows the default folder
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b) Program the FPGA chip Use the steps below every time you want to use the FPGA board
viii. The “Open” window will pop up to allow you to switch to the right project folder and select the right bit file
• By performing typical Microsoft operations select the termproject folder in which the bit file will be listed
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b) Program the FPGA chip Use the steps below every time you want to use the FPGA board
ix. Double click on the “ppm.bit” file in the window so that ADEPT opens it
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b) Program the FPGA chip Use the steps below every time you want to use the FPGA board
x. ADEPT will show that it read the file by displaying “ppm.bit” in the FPGA Browse area
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b) Program the FPGA chip Use the steps below every time you want to use the FPGA board
xi. Click on the FPGA Program button to program the FPGA chip
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b) Program the FPGA chip Use the steps below every time you want to use the FPGA board
xi. Click on the FPGA Program button to program the FPGA chip• ADEPT will show the progression of programming on the bottom• The programming takes less than a second !
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b) Program the FPGA chip Use the steps below every time you want to use the FPGA board
xii. When the programming is successfully over the ADEPT window will be as shown below
• It will indicate that the programming is successful by placing the “Programming Successful.” comment on the bottom
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b) Program the FPGA chip Use the steps below every time you want to use the FPGA board
xii. When the programming is successfully over the FPAG board will show four zeros on the 7-segment displays
• The game is ready to be played by following the rules of the game !
7-segmentdisplays
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Today’s Individual Xilinx Lab Work4. Analyze the term project on the FPGA board to learn how
the game is playedc) Play the game against the machine player to learn the game
rules FPGA I/O devices
From page 2 of the Term Project Handout
Please be gentle with the push buttons and switches
SW7 SW6 SW5 SW4 SW3 SW2 SW1 SW0
LD7 LD6 LD5 LD4 LD3 LD2 LD1 LD0
BTN3 BTN2 BTN1 BTN0
STR
All zero when the
Position Displays
A display blinks fast if display overflow
Reset P1play/ Shpts/
All displays blink if points limit exceeded
P2play
FPGA is downloaded/reset
P1add
Figure 2. FPGA Board Input/Output device utilization of the Ppm Term Project.
PD3 PD2 PD1 PD0
RDAdd
P1SEL
7-segment displays Switches
LED Lights
Push buttons
NextRDs/
Random Digit
Use SW3-SW0 as RD Code digitsCode digits
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Today’s Individual Xilinx Lab Work4. Analyze the term project on the FPGA board to
learn how the game is playedc) Play the game against the machine player to learn the
game rules The term project game is human vs. machine
• Player 1 : human, Player 2 : machine When the game starts always Player 1 has the turn
• Then Player 2 plays, then Player 1 plays, and so on… The game continues until one has more than
(255)10 points
Game is restarted by resetting (BTN1)
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Today’s Individual Xilinx Lab Work4. Analyze the term project on the FPGA
board to learn how the game is playedc) Play the game against the machine player to
learn the game rules When a player has the turn, a BCD random digit
(RD) is given The player has two options :
• Play the random digit• Skip the play, so the other player gets turn
► That player gets a new random digit as well
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Today’s Individual Xilinx Lab Work4. Analyze the term project on the FPGA
board to learn how the game is playedc) Play the game against the machine player to
learn the game rules Playing the random digit means
• Play RD directly on a position• Add it to a position display• The result of direct playing/addition is stored on the same
position ► After a play the player earns Regular reward points + Code reward points
If there is an adjacency, the player plays again after getting a new random
digit
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Today’s Individual Xilinx Lab Work4. Analyze the term project on the FPGA
board to learn how the game is playedc) Play the game against the machine player to
learn the game rules If the random digit is played on a position directly
• The largest digit can be 9
If the random digit is added to a position display• The largest digit can be F• If the result exceeds F, there is a display overflow : the
result is subtracted (16)10
► PD2 = A & RD = 9 ► A + 9 => A + 9 – (16)10 = 3 PD2
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Today’s Individual Xilinx Lab Work4. Analyze the term project on the FPGA
board to learn how the game is playedc) Play the game against the machine player to
learn the game rules There are adjacencies now and in the near future
• Adding the random digit to large digits result in display overflows and small rewards (earnings) unless there are adjacencies (of these small digits of course)
The code digits are tracked• The code digits are invisible and so discovering them
requires continuous effort on both players Thinking needed Players must have strategies to play where and
how to win games
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Today’s Individual Xilinx Lab Work4. Analyze the term project on the FPGA
board to learn how the game is playedc) Play the game against the machine player to learn the
game rules The course web site machine player strategy looks for
Six different actions• It keeps track of the code digits and plays them if it can• It often looks for adjacencies• It tries to keep digits small to avoid display overflows• It plays aggressively only when it is behind or close to
winning• Its secondary strategy is always play on the rightmost of
playable positions except in the case playing a code digit Its design is sped up by inputting random digits from
switches SW3 – SW0
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Today’s Individual Xilinx Lab Work4. Analyze the term project on the FPGA
board to learn how the game is playedc) Play the game against the machine player to
learn the game rules Largest adjacencies do not mean largest regular
rewards• Displays are 8404 and RD is 4, how would do you play ?• One needs to keep track of the code digits as well
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Today’s Individual Xilinx Lab Work4. Analyze the term project on the FPGA board to
learn how the game is playedd) Think about the playing strategy of the machine
player you will design Study the playing strategy of the term project
machine player at the course web site Start thinking about the playing strategy to
employ for your machine player• Read the Term Project handout
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Course web site machine player playing strategy
From page 42 of the Term Project Handout
Not close to winning
Plays for an adjacency
Plays on a 0
Plays for largest regular reward
Player 2 is behind
Close to winning
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Today’s Individual Xilinx Lab Work5. Download, extract, open, study and
play the other two types of the Ppm game to think more about the machine player’s strategy
Human vs. human : ppmhvsh Master the rules of the game by playing against
your partner Machine vs. machine : ppmmvsm
• Observe how the two machine players play against each other using ppmmvsm
• Use ppmmvsm project to further think about the playing strategy of the machine player that you will design
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Today’s Individual Xilinx Lab Work6. Stay in the lab and do other work to
save time for the future Read all the slides one more time Help your partners if you have a team
already If you do not have a team today
• Look around to form a team• Help your neighbor who is sharing the FPGA board with
you
Do the current homework assignment Study the term project handout and course
material
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Assignment by next lab Make sure that you have installed Xilinx
WebPACK 12.4 on your laptop by using the Installing Xilinx WebPACK 12.4 presentation
It must be 12.4, not 13.2
Make sure that you have formed your team with no more than 4 people on the team with students from your lab session
Go through this presentation and repeat all the ISE related steps so that you are familiar with the ISE software
Read all the handouts and presentations
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QUESTIONS ?
DigitalLogic and
State Machine Design
Think about forming teams before leaving the lab
Organize your S drive and laptopCreate a CS2204 folder on both
Check the course web site all the time : http://cis.poly.edu/cs2204