![Page 1: R. W. Ericksonecee.colorado.edu/~ecen5797/course_material/Lecture28.pdfTransistor gate driver b(t) i load (t) b(t) dT s T s t v(t) v g (t) i load (t) d(t) Switching converter Disturbances](https://reader033.vdocument.in/reader033/viewer/2022043003/5f816039f7f7323e190f6f75/html5/thumbnails/1.jpg)
R. W. EricksonDepartment of Electrical, Computer, and Energy Engineering
University of Colorado, Boulder
![Page 2: R. W. Ericksonecee.colorado.edu/~ecen5797/course_material/Lecture28.pdfTransistor gate driver b(t) i load (t) b(t) dT s T s t v(t) v g (t) i load (t) d(t) Switching converter Disturbances](https://reader033.vdocument.in/reader033/viewer/2022043003/5f816039f7f7323e190f6f75/html5/thumbnails/2.jpg)
Fundamentals of Power Electronics Chapter 9: Controller design1
Chapter 9. Controller Design
9.1. Introduction9.2. Effect of negative feedback on the network transfer
functions9.2.1. Feedback reduces the transfer function from disturbances
to the output9.2.2. Feedback causes the transfer function from the reference
input to the output to be insensitive to variations in the gainsin the forward path of the loop
9.3. Construction of the important quantities 1/(1+T) andT/(1+T) and the closed-loop transfer functions
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Fundamentals of Power Electronics Chapter 9: Controller design2
Controller design
9.4. Stability9.4.1. The phase margin test9.4.2. The relation between phase margin and closed-loop
damping factor9.4.3. Transient response vs. damping factor
9.5. Regulator design9.5.1. Lead (PD) compensator9.5.2. Lag (PI) compensator9.5.3. Combined (PID) compensator9.5.4. Design example
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Fundamentals of Power Electronics Chapter 9: Controller design4
9.1. Introduction
Output voltage of aswitching converterdepends on duty cycled, input voltage vg, andload current iload.
+–
+
v(t)
–
vg(t)
Switching converter Load
Pulse-widthmodulator
vc(t)
Transistorgate driver
b(t)
iload(t)
b(t)
TsdTs t v(t)vg(t)
iload(t)
d(t)
Switching converter
Disturbances
Control input
}}
v(t) = f(vg, iload, d )
![Page 5: R. W. Ericksonecee.colorado.edu/~ecen5797/course_material/Lecture28.pdfTransistor gate driver b(t) i load (t) b(t) dT s T s t v(t) v g (t) i load (t) d(t) Switching converter Disturbances](https://reader033.vdocument.in/reader033/viewer/2022043003/5f816039f7f7323e190f6f75/html5/thumbnails/5.jpg)
Fundamentals of Power Electronics Chapter 9: Controller design5
The dc regulator application
Objective: maintain constantoutput voltage v(t) = V, in spiteof disturbances in vg(t) andiload(t).Typical variation in vg(t): 100Hzor 120Hz ripple, produced byrectifier circuit.
Load current variations: a significant step-change in load current, suchas from 50% to 100% of rated value, may be applied.A typical output voltage regulation specification: 5V ± 0.1V.
Circuit elements are constructed to some specified tolerance. In highvolume manufacturing of converters, all output voltages must meetspecifications.
v(t)vg(t)
iload(t)
d(t)
Switching converter
Disturbances
Control input
}}
v(t) = f(vg, iload, d )
![Page 6: R. W. Ericksonecee.colorado.edu/~ecen5797/course_material/Lecture28.pdfTransistor gate driver b(t) i load (t) b(t) dT s T s t v(t) v g (t) i load (t) d(t) Switching converter Disturbances](https://reader033.vdocument.in/reader033/viewer/2022043003/5f816039f7f7323e190f6f75/html5/thumbnails/6.jpg)
Fundamentals of Power Electronics Chapter 9: Controller design6
The dc regulator application
So we cannot expect to set the duty cycle to a single value, and obtaina given constant output voltage under all conditions.Negative feedback: build a circuit that automatically adjusts the dutycycle as necessary, to obtain the specified output voltage with highaccuracy, regardless of disturbances or component tolerances.
![Page 7: R. W. Ericksonecee.colorado.edu/~ecen5797/course_material/Lecture28.pdfTransistor gate driver b(t) i load (t) b(t) dT s T s t v(t) v g (t) i load (t) d(t) Switching converter Disturbances](https://reader033.vdocument.in/reader033/viewer/2022043003/5f816039f7f7323e190f6f75/html5/thumbnails/7.jpg)
Fundamentals of Power Electronics Chapter 9: Controller design7
Negative feedback:a switching regulator system
+–
+
v
–
vg
Switching converterPowerinput
Load–+
Compensator
vrefReference
input
HvPulse-widthmodulator
vc
Transistorgate driver
b Gc(s)
H(s)
ve
Errorsignal
Sensorgain
iload
![Page 8: R. W. Ericksonecee.colorado.edu/~ecen5797/course_material/Lecture28.pdfTransistor gate driver b(t) i load (t) b(t) dT s T s t v(t) v g (t) i load (t) d(t) Switching converter Disturbances](https://reader033.vdocument.in/reader033/viewer/2022043003/5f816039f7f7323e190f6f75/html5/thumbnails/8.jpg)
Fundamentals of Power Electronics Chapter 9: Controller design8
Negative feedback
vref
Referenceinput
vcve(t)
Errorsignal
Sensorgain
v(t)vg(t)
iload(t)
d(t)
Switching converter
Disturbances
Control input
}}+– Pulse-width
modulatorCompensator
v(t) = f(vg, iload, d )
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Fundamentals of Power Electronics Chapter 9: Controller design9
9.2. Effect of negative feedback on thenetwork transfer functions
Small signal model: open-loop converter
Output voltage can be expressed as
wherev(s) = Gvd(s) d(s) + Gvg(s) vg(s) – Zout(s) i load(s)
Gvd(s) = v(s)d(s) vg = 0
i load = 0
Gvg(s) = v(s)vg(s) d = 0
i load = 0
Zout(s) = – v(s)i load(s) d = 0
vg = 0
+–
+– 1 : M(D) Le
C Rvg(s) j(s)d(s)
e(s)d(s)
iload (s)
+
v(s)
–
![Page 10: R. W. Ericksonecee.colorado.edu/~ecen5797/course_material/Lecture28.pdfTransistor gate driver b(t) i load (t) b(t) dT s T s t v(t) v g (t) i load (t) d(t) Switching converter Disturbances](https://reader033.vdocument.in/reader033/viewer/2022043003/5f816039f7f7323e190f6f75/html5/thumbnails/10.jpg)
Fundamentals of Power Electronics Chapter 9: Controller design10
Voltage regulator system small-signal model
• Use small-signalconverter model
• Perturb andlinearize remainderof feedback loop:
vref(t) = Vref + vref(t)
ve(t) = Ve + ve(t)
etc.Reference
input
Errorsignal
+–
Pulse-widthmodulator
Compensator
Gc(s)
Sensorgain
H(s)
1VM
+–
+– 1 : M(D) Le
C Rvg(s) j(s)d(s)
e(s)d(s)
iload (s)
+
v(s)
–
d(s)
vref (s)
H(s)v(s)
ve(s) vc(s)
![Page 11: R. W. Ericksonecee.colorado.edu/~ecen5797/course_material/Lecture28.pdfTransistor gate driver b(t) i load (t) b(t) dT s T s t v(t) v g (t) i load (t) d(t) Switching converter Disturbances](https://reader033.vdocument.in/reader033/viewer/2022043003/5f816039f7f7323e190f6f75/html5/thumbnails/11.jpg)
Fundamentals of Power Electronics Chapter 9: Controller design11
Regulator system small-signal block diagram
Referenceinput
Errorsignal
+–
Pulse-widthmodulatorCompensator
Sensorgain
H(s)
1VM Duty cycle
variation
Gc(s) Gvd(s)
Gvg(s)Zout(s)
ac linevariation
Load currentvariation
+
–+
Output voltagevariation
Converter power stage
vref (s) ve(s) vc(s) d(s)
vg(s)
iload(s)
v(s)
H(s)v(s)
![Page 12: R. W. Ericksonecee.colorado.edu/~ecen5797/course_material/Lecture28.pdfTransistor gate driver b(t) i load (t) b(t) dT s T s t v(t) v g (t) i load (t) d(t) Switching converter Disturbances](https://reader033.vdocument.in/reader033/viewer/2022043003/5f816039f7f7323e190f6f75/html5/thumbnails/12.jpg)
Fundamentals of Power Electronics Chapter 9: Controller design12
Solution of block diagram
v = vrefGcGvd / VM
1 + HGcGvd / VM+ vg
Gvg
1 + HGcGvd / VM– i load
Zout
1 + HGcGvd / VM
Manipulate block diagram to solve for . Result isv(s)
which is of the form
v = vref1H
T1 + T + vg
Gvg
1 + T – i loadZout
1 + T
with T(s) = H(s) Gc(s) Gvd(s) / VM = "loop gain"
Loop gain T(s) = products of the gains around the negativefeedback loop.
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Fundamentals of Power Electronics Chapter 9: Controller design13
9.2.1. Feedback reduces the transfer functionsfrom disturbances to the output
Original (open-loop) line-to-output transfer function:
Gvg(s) = v(s)vg(s) d = 0
i load = 0
With addition of negative feedback, the line-to-output transfer functionbecomes:
v(s)vg(s) vref = 0
i load = 0
=Gvg(s)
1 + T(s)
Feedback reduces the line-to-output transfer function by a factor of1
1 + T(s)
If T(s) is large in magnitude, then the line-to-output transfer functionbecomes small.
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Fundamentals of Power Electronics Chapter 9: Controller design14
Closed-loop output impedance
Original (open-loop) output impedance:
With addition of negative feedback, the output impedance becomes:
Feedback reduces the output impedance by a factor of1
1 + T(s)
If T(s) is large in magnitude, then the output impedance is greatlyreduced in magnitude.
Zout(s) = – v(s)i load(s) d = 0
vg = 0
v(s)– i load(s) vref = 0
vg = 0
= Zout(s)1 + T(s)
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Fundamentals of Power Electronics Chapter 9: Controller design15
9.2.2. Feedback causes the transfer function from thereference input to the output to be insensitive to
variations in the gains in the forward path of the loop
Closed-loop transfer function from to is:
which is independent of the gains in the forward path of the loop.This result applies equally well to dc values:
v(s)vref
v(s)vref(s) vg = 0
i load = 0
= 1H(s)
T(s)1 + T(s)
If the loop gain is large in magnitude, i.e., || T || >> 1, then (1+T) ! T andT/(1+T) ! T/T = 1. The transfer function then becomes
v(s)vref(s) 5
1H(s)
VVref
= 1H(0)
T(0)1 + T(0) 5
1H(0)
![Page 16: R. W. Ericksonecee.colorado.edu/~ecen5797/course_material/Lecture28.pdfTransistor gate driver b(t) i load (t) b(t) dT s T s t v(t) v g (t) i load (t) d(t) Switching converter Disturbances](https://reader033.vdocument.in/reader033/viewer/2022043003/5f816039f7f7323e190f6f75/html5/thumbnails/16.jpg)
Fundamentals of Power Electronics Chapter 9: Controller design16
9.3. Construction of the important quantities1/(1+T) and T/(1+T)
Example
T(s) = T0
1 + stz
1 + sQtp1
+ stp1
2 1 + stp2
At the crossover frequency fc, || T || = 1
fp1
QdB
– 40 dB/decade
| T0 |dB
fz
fc fp2
– 20 dB/decade
Crossoverfrequency
f
|| T ||
0 dB
–20 dB
–40 dB
20 dB
40 dB
60 dB
80 dB
– 40 dB/decade
1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz
![Page 17: R. W. Ericksonecee.colorado.edu/~ecen5797/course_material/Lecture28.pdfTransistor gate driver b(t) i load (t) b(t) dT s T s t v(t) v g (t) i load (t) d(t) Switching converter Disturbances](https://reader033.vdocument.in/reader033/viewer/2022043003/5f816039f7f7323e190f6f75/html5/thumbnails/17.jpg)
Fundamentals of Power Electronics Chapter 9: Controller design17
Approximating 1/(1+T) and T/(1+T)
T1 + T 5
1 for || T || >> 1T for || T || << 1
11+T(s) 5
1T(s) for || T || >> 1
1 for || T || << 1
![Page 18: R. W. Ericksonecee.colorado.edu/~ecen5797/course_material/Lecture28.pdfTransistor gate driver b(t) i load (t) b(t) dT s T s t v(t) v g (t) i load (t) d(t) Switching converter Disturbances](https://reader033.vdocument.in/reader033/viewer/2022043003/5f816039f7f7323e190f6f75/html5/thumbnails/18.jpg)
Fundamentals of Power Electronics Chapter 9: Controller design18
Example: construction of T/(1+T)
T1 + T 5
1 for || T || >> 1T for || T || << 1
fp1
fz fcfp2
– 20 dB/decade
– 40 dB/decade
Crossoverfrequency
f
|| T ||
0 dB
–20 dB
–40 dB
20 dB
40 dB
60 dB
80 dB
T1 + T
1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz
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Fundamentals of Power Electronics Chapter 9: Controller design19
Example: analytical expressions for approximatereference to output transfer function
v(s)vref(s) = 1
H(s)T(s)
1 + T(s) 51
H(s)
v(s)vref(s) = 1
H(s)T(s)
1 + T(s) 5T(s)H(s) = Gc(s)Gvd(s)
VM
At frequencies sufficiently less that the crossover frequency, the loopgain T(s) has large magnitude. The transfer function from the referenceto the output becomes
This is the desired behavior: the output follows the referenceaccording to the ideal gain 1/H(s). The feedback loop works well atfrequencies where the loop gain T(s) has large magnitude.At frequencies above the crossover frequency, || T || < 1. The quantityT/(1+T) then has magnitude approximately equal to 1, and we obtain
This coincides with the open-loop transfer function from the referenceto the output. At frequencies where || T || < 1, the loop has essentiallyno effect on the transfer function from the reference to the output.
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Fundamentals of Power Electronics Chapter 9: Controller design20
Same example: construction of 1/(1+T)
11+T(s) 5
1T(s) for || T || >> 1
1 for || T || << 1fp1
QdB
– 40 dB/decade
| T0 |dB
fz
fc fp2Crossoverfrequency
|| T ||
0 dB
–20 dB
–40 dB
20 dB
40 dB
60 dB
80 dB
–60 dB
–80 dB
f1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz
QdB
– | T0 |dBfp1
fz
11 + T
– 40 dB/decade+ 40 dB/decade
+ 20 dB/decade
– 20 dB/decade
![Page 21: R. W. Ericksonecee.colorado.edu/~ecen5797/course_material/Lecture28.pdfTransistor gate driver b(t) i load (t) b(t) dT s T s t v(t) v g (t) i load (t) d(t) Switching converter Disturbances](https://reader033.vdocument.in/reader033/viewer/2022043003/5f816039f7f7323e190f6f75/html5/thumbnails/21.jpg)
Fundamentals of Power Electronics Chapter 9: Controller design21
Interpretation: how the loop rejects disturbances
Below the crossover frequency: f < fcand || T || > 1
Then 1/(1+T) ! 1/T, anddisturbances are reduced inmagnitude by 1/ || T ||
Above the crossover frequency: f > fcand || T || < 1
Then 1/(1+T) ! 1, and thefeedback loop has essentiallyno effect on disturbances
11+T(s) 5
1T(s) for || T || >> 1
1 for || T || << 1
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Fundamentals of Power Electronics Chapter 9: Controller design22
Terminology: open-loop vs. closed-loop
Original transfer functions, before introduction of feedback (“open-looptransfer functions”):
Upon introduction of feedback, these transfer functions become(“closed-loop transfer functions”):
The loop gain:
Gvd(s) Gvg(s) Zout(s)
1H(s)
T(s)1 + T(s)
Gvg(s)1 + T(s)
Zout(s)1 + T(s)
T(s)
![Page 23: R. W. Ericksonecee.colorado.edu/~ecen5797/course_material/Lecture28.pdfTransistor gate driver b(t) i load (t) b(t) dT s T s t v(t) v g (t) i load (t) d(t) Switching converter Disturbances](https://reader033.vdocument.in/reader033/viewer/2022043003/5f816039f7f7323e190f6f75/html5/thumbnails/23.jpg)
Fundamentals of Power Electronics Chapter 9: Controller design16
9.3. Construction of the important quantities1/(1+T) and T/(1+T)
Example
T(s) = T0
1 + stz
1 + sQtp1
+ stp1
2 1 + stp2
At the crossover frequency fc, || T || = 1
fp1
QdB
– 40 dB/decade
| T0 |dB
fz
fc fp2
– 20 dB/decade
Crossoverfrequency
f
|| T ||
0 dB
–20 dB
–40 dB
20 dB
40 dB
60 dB
80 dB
– 40 dB/decade
1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz
![Page 24: R. W. Ericksonecee.colorado.edu/~ecen5797/course_material/Lecture28.pdfTransistor gate driver b(t) i load (t) b(t) dT s T s t v(t) v g (t) i load (t) d(t) Switching converter Disturbances](https://reader033.vdocument.in/reader033/viewer/2022043003/5f816039f7f7323e190f6f75/html5/thumbnails/24.jpg)
Fundamentals of Power Electronics Chapter 9: Controller design36
Transient response vs. damping factor
0
0.5
1
1.5
2
0 5 10 15tct, radians
Q = 10
Q = 50
Q = 4
Q = 2
Q = 1
Q = 0.75
Q = 0.5Q = 0.3Q = 0.2
Q = 0.1
Q = 0.05Q = 0.01
v(t)
![Page 25: R. W. Ericksonecee.colorado.edu/~ecen5797/course_material/Lecture28.pdfTransistor gate driver b(t) i load (t) b(t) dT s T s t v(t) v g (t) i load (t) d(t) Switching converter Disturbances](https://reader033.vdocument.in/reader033/viewer/2022043003/5f816039f7f7323e190f6f75/html5/thumbnails/25.jpg)
Fundamentals of Power Electronics Chapter 9: Controller design23
9.4. Stability
Even though the original open-loop system is stable, the closed-looptransfer functions can be unstable and contain right half-plane poles. Evenwhen the closed-loop system is stable, the transient response can exhibitundesirable ringing and overshoot, due to the high Q -factor of the closed-loop poles in the vicinity of the crossover frequency.When feedback destabilizes the system, the denominator (1+T(s)) terms inthe closed-loop transfer functions contain roots in the right half-plane (i.e.,with positive real parts). If T(s) is a rational fraction of the form N(s) / D(s),where N(s) and D(s) are polynomials, then we can write
T(s)1 + T(s) =
N(s)D(s)
1 + N(s)D(s)
= N(s)N(s) + D(s)
11 + T(s) = 1
1 + N(s)D(s)
= D(s)N(s) + D(s)
• Could evaluate stability byevaluating N(s) + D(s), thenfactoring to evaluate roots.This is a lot of work, and isnot very illuminating.
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Fundamentals of Power Electronics Chapter 9: Controller design23
9.4. Stability
Even though the original open-loop system is stable, the closed-looptransfer functions can be unstable and contain right half-plane poles. Evenwhen the closed-loop system is stable, the transient response can exhibitundesirable ringing and overshoot, due to the high Q -factor of the closed-loop poles in the vicinity of the crossover frequency.When feedback destabilizes the system, the denominator (1+T(s)) terms inthe closed-loop transfer functions contain roots in the right half-plane (i.e.,with positive real parts). If T(s) is a rational fraction of the form N(s) / D(s),where N(s) and D(s) are polynomials, then we can write
T(s)1 + T(s) =
N(s)D(s)
1 + N(s)D(s)
= N(s)N(s) + D(s)
11 + T(s) =
11 + N(s)D(s)
= D(s)N(s) + D(s)
• Could evaluate stability byevaluating N(s) + D(s), thenfactoring to evaluate roots.This is a lot of work, and isnot very illuminating.
Fundamentals of Power Electronics
Effect of feedback on transfer function poles
Feedback moves the poles of the system transfer functions• Good news: we can use feedback to alter the poles and
improve the frequency response• Bad news: if you re not careful, feedback can move the poles
into the right half of the complex s-plane (poles have positivereal parts), leading to an unstable system
G(s)
+–
H(s)
T(s)
vout(s)ve(s) G(s)vin(s)
Open loop Closed loop
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Fundamentals of Power Electronics
Example
G(s) = 1001 + s 3
The gain G(s) below has three poles at s = – 1
Re(s)
Im(s)
–1xxx
Complex s-plane
+—
T(s)
vout(s)ve(s)G(s)
vin(s)
G(s) = 1001 + s 3
H(s) = 1
Add a simple feedback loop:
How does thefeedbackchange thepoles?
Fundamentals of Power Electronics
Exact closed-loop transfer function
For our simple example, the closed-loop transfer function is
Factor denominator numerically:
which has poles at s = – 5.64 (LHP)
and at s = +1.32 ± j4.07 (RHP)
The RHP poles indicate that theclosed-loop system is unstable.
Re(s)
Im(s)
–5.64
x
x
x
j4.07
+1.32
— j4.07
voutvin
= 1H
T1 + T = G
1 + G =
1001 + s 3
1 + 1001 + s 3
= 100101 + 3s + 3s2 + s3
voutvin
= 100101 + 3s + 3s2 + s3 = 100
s + 5.64 s – 1.32 – j4.07 s – 1.32 + j4.07
![Page 28: R. W. Ericksonecee.colorado.edu/~ecen5797/course_material/Lecture28.pdfTransistor gate driver b(t) i load (t) b(t) dT s T s t v(t) v g (t) i load (t) d(t) Switching converter Disturbances](https://reader033.vdocument.in/reader033/viewer/2022043003/5f816039f7f7323e190f6f75/html5/thumbnails/28.jpg)
Fundamentals of Power Electronics
Example
G(s) = 1001 + s 3
The gain G(s) below has three poles at s = – 1
Re(s)
Im(s)
–1xxx
Complex s-plane
+—
T(s)
vout(s)ve(s)G(s)
vin(s)
G(s) = 1001 + s 3
H(s) = 1
Add a simple feedback loop:
How does thefeedbackchange thepoles?
Fundamentals of Power Electronics
Exact closed-loop transfer function
For our simple example, the closed-loop transfer function is
Factor denominator numerically:
which has poles at s = – 5.64 (LHP)
and at s = +1.32 ± j4.07 (RHP)
The RHP poles indicate that theclosed-loop system is unstable.
Re(s)
Im(s)
–5.64
x
x
x
j4.07
+1.32
— j4.07
voutvin
= 1H
T1 + T = G
1 + G =
1001 + s 3
1 + 1001 + s 3
= 100101 + 3s + 3s2 + s3
voutvin
= 100101 + 3s + 3s2 + s3 = 100
s + 5.64 s – 1.32 – j4.07 s – 1.32 + j4.07
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Fundamentals of Power Electronics
Transient response of closed-loop system
One can take the inverse Laplace Transform to find the output waveformvout(t) for a given input. The resulting expression has terms that dependon the poles, of the form
vout(t) = K1e– 5.64t +K2e (1.32 – j4.07)t + K 2*e (1.32 + j4.07)t
The terms with positive real exponents, corresponding to the RHPpoles, lead to growing oscillations that are unstable responses.
Reason: the inverse Laplace transform of K2e (1.32 – j4.07)t + K 2*e (1.32 + j4.07)t is
K2 e1.32t cos 4.07t + K2
Fundamentals of Power Electronics Chapter 9: Controller design24
Determination of stability directly from T(s)
• Nyquist stability theorem: general result.• A special case of the Nyquist stability theorem: the phase margin test
Allows determination of closed-loop stability (i.e., whether 1/(1+T(s))contains RHP poles) directly from the magnitude and phase of T(s).A good design tool: yields insight into how T(s) should be shaped, toobtain good performance in transfer functions containing 1/(1+T(s))terms.
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Fundamentals of Power Electronics Chapter 9: Controller design24
Determination of stability directly from T(s)
• Nyquist stability theorem: general result.• A special case of the Nyquist stability theorem: the phase margin test
Allows determination of closed-loop stability (i.e., whether 1/(1+T(s))contains RHP poles) directly from the magnitude and phase of T(s).A good design tool: yields insight into how T(s) should be shaped, toobtain good performance in transfer functions containing 1/(1+T(s))terms.
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Fundamentals of Power Electronics Chapter 9: Controller design25
9.4.1. The phase margin test
A test on T(s), to determine whether 1/(1+T(s)) contains RHP poles.The crossover frequency fc is defined as the frequency where
|| T(j2!fc) || = 1 ! 0dB
The phase margin "m is determined from the phase of T(s) at fc , asfollows:
"m = 180˚ + #T(j2!fc)
If there is exactly one crossover frequency, and if T(s) contains noRHP poles, then
the quantities T(s)/(1+T(s)) and 1/(1+T(s)) contain no RHP poleswhenever the phase margin "m is positive.
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Fundamentals of Power Electronics Chapter 9: Controller design26
Example: a loop gain leading toa stable closed-loop system
!T(j2!fc) = – 112˚
"m = 180˚ – 112˚ = + 68˚
fc
Crossoverfrequency
0 dB
–20 dB
–40 dB
20 dB
40 dB
60 dB
f
fp1fz
|| T ||
0˚
–90˚
–180˚
–270˚
m
� T
� T|| T ||
1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz
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Fundamentals of Power Electronics! Chapter 9: Controller design!27!
Computation of crossover frequency!
fc
Crossoverfrequency
0 dB
–20 dB
–40 dB
20 dB
40 dB
60 dB
f
fp1fz
|| T ||
0˚
–90˚
–180˚
–270˚
m
� T
� T|| T ||
1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz
1. The expression for T(s) is:!
T (s) = T0
✓1 +
s
!z
◆
1 +
s
Q!p1+
✓s
!p1
◆2!
2. Write the equation of the asymptote for f > fz:!
kT (j!)k = T0
✓!
!z
◆
✓!
!p1
◆2 = T0f2p1
fzf
3. Equate to 1, and solve for f (= fc):!
fc = T0f2p1
fz
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Fundamentals of Power Electronics! Chapter 9: Controller design!28!
Computation of phase!
fc
Crossoverfrequency
0 dB
–20 dB
–40 dB
20 dB
40 dB
60 dB
f
fp1fz
|| T ||
0˚
–90˚
–180˚
–270˚
m
� T
� T|| T ||
1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz
T (s) = T0
✓1 +
s
!z
◆
1 +
s
Q!p1+
✓s
!p1
◆2!
Exact expression for phase:!
\T (j!) = tan�1
✓!
!z
◆� tan�1
2
6664
1
Q
✓!
!p1
◆
1�✓
!
!p1
◆2
3
7775
Expression for phase asymptote over frequency range as illustrated near fc:!
\T (j!) ⇡ (+45
�/dec) log10
✓!
!z/10
◆� 180
�
Evaluate one of the above to find ∠T(jωc), then compute phase margin:!
ϕm = 180˚ + ∠T(jωc)!
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Fundamentals of Power Electronics! Chapter 9: Controller design!29!
Example: a loop gain leading to"an unstable closed-loop system!
∠T(j2πfc) = – 230˚!
ϕm = 180˚ – 230˚ = – 50˚!
fc
Crossoverfrequency
0 dB
–20 dB
–40 dB
20 dB
40 dB
60 dB
f
fp1
fp2
|| T ||
0˚
–90˚
–180˚
–270˚
� T
� T|| T ||
m (< 0)
1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz