-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0Cover Page
B
1 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0Cover Page
B
1 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0Cover Page
B
1 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
2010-03-24 Rev 2.0Intel Processor(CFD/ARD) / PCH(HM57/HM55/PM55)
NWQAA
LA-6062P SchematicREV 2.0
Marseille 10G
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0Block Diagram
2 59Tuesday, March 23, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0Block Diagram
2 59Tuesday, March 23, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0Block Diagram
2 59Tuesday, March 23, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Touch Pad
page 38
MDC 1.5 Conn
Int.KBDpage 44
BANK 0, 1, 2, 3
Intel Arrandale /Clarksfield
Clock GeneratorRTM890N
page 43
Fan Control
rPGA-989 200pin DDRIII-SO-DIMM X2
EC ROM (256KB)
page 14
1.5V DDRIII 800/1066/1333 MT/spage 5,6,7,8,9,10
page 44
page 25
Memory BUS(DDRIII)
BGA-951
page 6
Intel Ibex Peak
VGA Thermal Sensor
page 11,12
page 28,29,30,31,32,33,34,35,36
page 45
ENE KB926 D3/E0
Dual Channel
page 37
SATA HDD
ADM1032ARMZ-2
5V 3GHz(300MB/s)SATA port 1
HD Audio 3.3V/1.5V 24MHzLPC BUS3.3V 33 MHz
USB5V 480MHz
5V 3GHz(300MB/s)SATA port 5
page 37
eSATA
SATA port 4
page 44Debug Port
HDMI Conn.
page 27
USB5V 480MHz
SATA ODDpage 37
5V 3GHz(300MB/s)
USB port 35V 480MHz
USBpage 37
USB port 3
Power Circuit DC/DC
page 46
RTC CKT.page 28
page 47,48,49,50,51,52 53,54,55,56
DC/DC Interface CKT.
PCIE-Express 16X 2.5GHz
NVIDIA N11M GE1, 64bit with 512MB/1GB
NVIDIA N11P GE1, 128bit with 1GB/2GB
APL5607
page 13,14,15,16,17,18,19,20,21,22,23,24
DMI X4
VGA (DDR3)
1.5V 2.5GHz(250MB/s)PCIe 1x
page 28
SPI ROM (4MB)
2.5GHzUSB port 8page 38
FingerPrinter
Int. CameraUSB port 11page 25
USB port 0,1page 37
USB/B Right Left USBUSB port 2page 37
USB port 5page 38
BT connUSB port 9page 38
Felica
PCIeMini Card WiMax
PCIeMini Card WLAN
USB port 13
PCIe port 2page 39
page 39
Express CardUSB
USB port 4USB port 10
PCIeMini Card
PCIeMini Card JET
USB port 12
PCIe port 4page 39
page 39
Express CardPCIe
PCIe port 3
MIC ConnSPK ConnInt.
page 42ALC269
HDA Codec
PCIe port5JMB385C/389C
page 41
1.5V 2.5GHz(250MB/s)PCIe 1x
PCIe 1x1.5V 2.5GHz(250MB/s)
RJ45 RTL8105E 10/100MRTL8111E 1G
page 40page 40
PCIe port 1
HDMI-CECpage 27
EC SMBus
page 38B-CAS
page 39SIM
page 39
page 39
page 42
page 25
FDI X82.7GHz
Level Shifterpage 27
page 26
CRT
LVDS Conn.page 25
3G/TV#1TV#2
CIRpage 43
G-Sensorpage 44
EC SMBus
SATA port 5
SATA port 4
SATA port 1
page 37
Audio & USB/BLS-6064P
Cap Sensor & Light Sensor/BLS-6062P
TP& Light Pipe/BLS-6061P
Power/B_FPCDA300006F00
page 45
Power On/Off CKT.page 45
page 45
LED/BLS-6063P
page 38
Finger Printer/BLS-6065P
page 36
page 45
JPIO(HP & MIC)
page 37
Cardreader
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0Power Tree
3 59Tuesday, March 23, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0Power Tree
3 59Tuesday, March 23, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0Power Tree
3 59Tuesday, March 23, 2010
200910/9 2010/01/23Compal Electronics, Inc.
B+
RT8205EGQW
AO-3415 +LCD_VDD
LCD_ENVDD
AO-3413
BT_PWR#
P-CHANNEL
+3VALWDESIGN CURRENT 5A
APW7138NITRL
+BT_VCC
+VTT
ISL62883HRZ +CPU_COREDESIGN CURRENT 48A
VR_ON
RT8209BGQW
SUSP#
+1.05VS
VTTP_EN
DESIGN CURRENT 7A
N-CHANNEL
SI4800+3VS
SUSP
P-CHANNEL
DESIGN CURRENT 18A
DESIGN CURRENT 180mA
DESIGN CURRENT 1.5A
DESIGN CURRENT 4A
+5VALWDESIGN CURRENT 5A
N-CHANNEL
SI4800
SUSP
+5VSDESIGN CURRENT 4A
APW7138NITRL +VGA_COREDESIGN CURRENT 28A
SUSP# or DGPU_PWR_EN
Ipeak=5A, Imax=3.5A, Iocp min=7.9
Ipeak=5A, Imax=3.5A, Iocp min=7.7
Ipeak=7A, Imax=4.9A, Iocp min=7.7
Ipeak=18A, Imax=12.6A, Iocp min=19.8
AO-3413 +3V_LAN
WOL_EN#
P-CHANNEL DESIGN CURRENT 330mA
+3VL+5VL
DESIGN CURRENT 0.1A
DESIGN CURRENT 0.1A
AO-3413P-CHANNEL +5VS_L_BCAS
DESIGN CURRENT 0.5A
BCPWON
AO-3413P-CHANNEL +5VS_LED
DESIGN CURRENT 400mA
KB_LED
G9191+3VS_HDPDESIGN CURRENT 300mA
+5VS
LDO
AO-3413P-CHANNEL +FLICA_VCC
DESIGN CURRENT 0.5A
FELICA_PWR
AO-3413
DGPU_PWR_EN
P-CHANNEL +3VS_DGPUDESIGN CURRENT 0.5A
Ipeak=15A, Imax=10.5A, Iocp min=16.5
RT8209BGQW+1.5VDESIGN CURRENT 15A
SUSP#
N-CHANNEL
FDS6676AS
SUSP
+1.5VS
G2992F1U
SUSP or 0.75VR_EN#
+0.75VSDESIGN CURRENT 1.5A
DESIGN CURRENT 2A
MP2121DQ
SUSP#
+1.8VSDESIGN CURRENT 2A
AO-3413
DGPU_PWR_EN
P-CHANNEL +1.05VS_DGPUDESIGN CURRENT 3A
N-CHANNEL
FDS6676AS
VGA_PWROK
+VRAM_1.5VSDESIGN CURRENT 10A
N-CHANNEL
SUSP
+1.5V_CPUDESIGN CURRENT 2A
AO-3413P-CHANNEL +5VS_ODD
DESIGN CURRENT 1.6A
ODD_EN#
FDS6676AS
ADP3211AMNR2G +GFX_COREDESIGN CURRENT 22A
GFXVR_EN
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0Notes List
Custom
4 59Tuesday, March 23, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0Notes List
Custom
4 59Tuesday, March 23, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0Notes List
Custom
4 59Tuesday, March 23, 2010
200910/9 2010/01/23Compal Electronics, Inc.
G3 LOW LOWLOW
BTO Option Table
STATESIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S3# SLP_S4# SLP_S5#
+3VL+5VL
O
O
X
O
X
O
O
X
LOW LOWLOW
LOW LOW
LOW
HIGH HIGHHIGH
HIGH HIGHHIGH
HIGH
HIGH
HIGH
Voltage Rails ( O MEANS ON X MEANS OFF )
O
O
X
S3
+3VS
X
+3VALW
+5VS
S1
O
+CPU_CORE
OO
OO
X
X X
+VTT
powerplane
O
O
O
O
O
X
S5 S4/ Battery only
X X
B+
State
+1.5VS
+1.5V
S5 S4/AC & Batterydon't exist
S5 S4/AC
+5VALW
S0
O
O
+1.05VS+0.75VS
+1.8VS
+RTCVCC
O
O
O
O
O
O
+VSB
+VGA_CORE
Platform
Discrete (DIS@)Calpella
SKU CPUArrandale
Optimus (OPT@)
PCHHM55@/HM57@
HM55@/HM57@/PM55@
VGA
Clarksfield/Arrandale
N/A
N11P@/N11M@
Arrandale HM55@/HM57@ N11P@/N11M@
UMA(OPT@)
KB Light
KB Light
KBL@
CEC
DHDMI@
CIR
MINI PCI-E SLOT
3G@ TV@ WIMAX@
3G TV Tuner WIMAX
G-SENSOR
Fingerprint
Fingerprint
FP@
GSENSOR@
BLUE TOOTH
Function
BTO
Function
BTO
explain
FELICA@
description
Felica BLUE TOOTH
BT@
explain 10/100M Giga
8105E@ 8111E@
LAN
description
CIR
CIR@
Function
BTO
explain UMA
IHDMI@
description
HDMI
Discrete/Optimus
HDMI@
COMMON
CEC@
Modem
Modem
MDC@
CPU
Arrandale Clarksfield
M1@ M3@
SLOT1SLOT2
HDMI
LAN Fingerprint Modem CIR KB Light
Felica BLUE TOOTH G-SENSOR
G-SENSOR
SKU
DIS@ OPT@
Discrete Optimus
SKU
LVDS
OPTFH@3D@
3D Panel
Discrete Optimus
S3 Power Saving
Camera & Mic
Camera & Mic
Camera & Mic
CAM@
Felica
Function
BTO
explain
description
PS@NOPS@
No Power Saving
Clarksfield with S3 Power Saving
PSM3@
Power Saving
Arrandale Clarksfield
S3 Power Saving
GPU
VRAM
8PCS@
New Card
New Card
New Card
NEW@
N11P & N11E N11M
N11MGE@
N11M-GE1N11P
N11P@
+VRAM_1.5VS
+GFX_CORE
+3VS_DGPU+1.05VS_DGPU
N11E
N11E@
N11M-OP1
N11MOP@
+3VL Cap. Sensor Virtual I2C
1010 0100 bA4 H
PCH SM Bus Address
1010 0000 b
D2 H
A0 H
Clock Generator
HEX
DDR SO-DIMM 1
Address
DDR SO-DIMM 0
1101 0010 b
Device
G-Sensor
HEXDevice AddressPower
NVIDIA GPUHDMI-CEC 34 H 0011 0100 b 1001 1010 b9A H
WLAN/WIMAX
+3VS
New Card
+3VS+3VS+3VS+3VS Light Sensor
HEX HEX
16 H
EC SM Bus1 Address
Device Address Address
EC SM Bus2 Address
Device
0001 0110 bSmart Battery 96 H 1001 0110 bPCH
Power
PowerPower
+3VL+3VL
40 H
+3VS+3VS+3VS+3VS+3VS Clock Generator
3G+3VS
52 H0100 0000 b0101 0010 b
NO3D@
JMB385C/389C
JMB389@
Function
BTO
explain JMB385C
JMB385@
description
Card reader
JMB389C
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SM_RCOMP_0
DRAMPWROK
H_COMP0
PECI
SM_RCOMP_1SM_RCOMP_2
SM_DRAMRST#_CPU
CLK_PEG#
CLK_CPU_BCLK
CATERR#
VTTPWROK_CPU
CLK_PEG
H_CPURST#
H_THERMTRIP#
H_PWRGOOD
CLK_CPU_BCLK#
PMSYNCH
DRAMPWROK
PM_EXTTS#_R
PM_EXTTS#_R
CLK_CPU_XDP_R
XDP_BPM#0XDP_BPM#1XDP_BPM#2XDP_BPM#3
XDP_PRDY#XDP_PREQ#
XDP_TCKXDP_TMSXDP_TRST#
XDP_TDI_RXDP_TDO_R
XDP_TDO_MXDP_TDI_M
XDP_DBRESET#
XDP_TDI_R XDP_TDI
XDP_TDO
XDP_TDI_M
XDP_TDO_R
XDP_TDO_M
TAPPWRGD
BUF_PLT_RST#_R
CLK_CPU_XDP#_R
XDP_TCK_R
TP_SKTOCC#
H_PROCHOT#PM_EXTTS#0
H_COMP3
H_COMP2
H_COMP1CLK_CPU_XDP#CLK_CPU_XDP
PM_EXTTS#0
XDP_RST#_RH_CPURST#
H_PWRGOOD1_R
DRAMPWROKVTTPWROK
SM_DRAMRST#_CPU
XDP_DBRESET#_R
XDP_TDIXDP_TMS_R
XDP_RST#_R
XDP_PREQ#_RXDP_PRDY#_R
XDP_BPM#0_RXDP_BPM#1_R
XDP_BPM#2_RXDP_BPM#3_R
H_PWRGOOD H_PWRGOOD_RTAPPWRGD_RTAPPWRGD
CLK_CPU_XDP#CLK_CPU_XDP
XDP_TDOXDP_TRST#_R
XDP_PRDY# XDP_PRDY#_R
XDP_PREQ# XDP_PREQ#_R
XDP_TCK
XDP_TMS_R
XDP_TCK_R
XDP_TMS
XDP_TRST#
XDP_BPM#1
XDP_BPM#2_R
XDP_BPM#1_R
XDP_BPM#2
XDP_BPM#0_R
XDP_TRST#_R
XDP_BPM#0
XDP_BPM#3
XDP_DBRESET#_R
XDP_BPM#3_R
XDP_DBRESET#
DRAMPWROK
VTTPWROK_CPU
PECI
PMSYNCH
H_PWRGOOD
DRAMPWROK
BUF_PLT_RST#
CLK_CPU_BCLK CLK_CPU_BCLK#
CLK_PEG CLK_PEG#
PM_EXTTS#
H_THERMTRIP#
XDP_DBRESET#
VTTPWROKRST_GATE
SM_DRAMRST#
VTTPWROK_CPU
+VTT
+VTT
+1.5V_CPU
+VTT
+3VS
+VTT
+3VALW
+VTT
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0CPU_CLK/MISC/JTAG/XDP
Custom
5 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0CPU_CLK/MISC/JTAG/XDP
Custom
5 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0CPU_CLK/MISC/JTAG/XDP
Custom
5 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Scan Chain(Default)
CPU Only
GMCH Only
STUFF -> R20, R23, R27NO STUFF -> R21, R26
STUFF -> R20, R21NO STUFF -> R23, R26, R27
NO STUFF -> R20, R21, R23STUFF -> R26, R27
JTAG MAPPING
XDP Connector
Unused by Clarksfield rPGA989
DDR3 Compensation SignalsLayout Note:Please theseresistors near Processor
Routed as a single daisy chain
For S3 CPU Power Saving
Add C140 for RST_GATE Glitch issue
Power has removed VR_TT#
Close to CPU for EMI
1 2R21 0_0402_5%
@R21 0_0402_5%
@
1 2R452 0_0402_5%
@R452 0_0402_5%
@
1
2
R1151_0402_5%
R1151_0402_5%
1 2C163 0.1U_0402_16V4Z
PS@
C163 0.1U_0402_16V4Z
PS@
2
13
G
DS
Q41BSS138_NL_SOT23-3
PS@
G
DS
Q41BSS138_NL_SOT23-3
PS@
R301.5K_0402_1% R301.5K_0402_1%
1 2R42 0_0402_5%@R42 0_0402_5%@
1 2R18 49.9_0402_1%R18 49.9_0402_1%
112233445566778899101011111212131314141515161617171818191920202121222223232424
GND 25GND 26
JXDP
MOLEX_52435-2472
@JXDP
MOLEX_52435-2472
@
1 2R40 0_0402_5%
@R40 0_0402_5%
@
IN11
IN22
G
3
O 4
P
5 U10
SN74AHC1G08DCKR_SC70-5PS@
U10
SN74AHC1G08DCKR_SC70-5PS@
R29750_0402_1%PS@
R29750_0402_1%PS@
12 C4881000P_0402_50V7K@
C4881000P_0402_50V7K@
12 C4871000P_0402_50V7K@
C4871000P_0402_50V7K@
R33 1.5K_0402_1%
PS@
R33 1.5K_0402_1%
PS@
12R312 1K_0402_5%R312 1K_0402_5%
1 2R36 1K_0402_5%R36 1K_0402_5%
1
2
R230_0402_5%
R230_0402_5%
12R15 10K_0402_5%R15 10K_0402_5%
1 2R51 0_0402_5%
@R51 0_0402_5%
@
1 2R454 0_0402_5%
@R454 0_0402_5%
@
1
2
R1068_0402_5%@
R1068_0402_5%@
1 2R41 0_0402_5%@R41 0_0402_5%@
1 2R8 130_0402_1%R8 130_0402_1%
12R19 0_0402_5%
NOPS@
R19 0_0402_5%
NOPS@
1 2R455 0_0402_5%
@R455 0_0402_5%
@
1 2R3 49.9_0402_1%R3 49.9_0402_1%
1 2R35 0_0402_5%@R35 0_0402_5%@
1
2
C10.1U_0402_10V6K
@
C10.1U_0402_10V6K
@
1 2R1 20_0402_1%R1 20_0402_1%
SM_RCOMP[1] AM1SM_RCOMP[2] AN1
SM_DRAMRST# F6
SM_RCOMP[0] AL1
BCLK# B16BCLK A16
BCLK_ITP# AT30BCLK_ITP AR30
PEG_CLK# D16PEG_CLK E16
DPLL_REF_SSCLK# A17DPLL_REF_SSCLK A18
CATERR#AK14
COMP3AT23
PECIAT15
PROCHOT#AN26
THERMTRIP#AK15
RESET_OBS#AP26
VCCPWRGOOD_1AN14
VCCPWRGOOD_0AN27
SM_DRAMPWROKAK13
VTTPWRGOODAM15
RSTIN#AL14
PM_EXT_TS#[0] AN15PM_EXT_TS#[1] AP15
PRDY# AT28PREQ# AP27
TCK AN28TMS AP28
TRST# AT27
TDI AT29TDO AR27
TDI_M AR29TDO_M AP29
DBR# AN25
BPM#[0] AJ22BPM#[1] AK22BPM#[2] AK24BPM#[3] AJ24BPM#[4] AJ25BPM#[5] AH22BPM#[6] AK23BPM#[7] AH23
COMP2AT24
PM_SYNCAL15
TAPPWRGOODAM26
COMP1G16
COMP0AT26
SKTOCC#AH24
C
L
O
C
K
S
MISC
THERMAL
PWR MANAG
EMENT
D
D
R
3
M
I
S
C
J
T
A
G
&
B
P
M
JCPUB
IC,AUB_CFD_rPGA,R0P9 @
C
L
O
C
K
S
MISC
THERMAL
PWR MANAG
EMENT
D
D
R
3
M
I
S
C
J
T
A
G
&
B
P
M
JCPUB
IC,AUB_CFD_rPGA,R0P9 @
12R13 10K_0402_5%R13 10K_0402_5%
R31750_0402_1%
R31750_0402_1%
1 2R20 0_0402_5%R20 0_0402_5%
1 2R450 0_0402_5%
@R450 0_0402_5%
@
1 2R9 68_0402_5%R9 68_0402_5%
1
2
C1400.047U_0402_25V6KPS@
C1400.047U_0402_25V6KPS@
12R14 51_0402_5%R14 51_0402_5%
1
2
R281.1K_0402_1%NOPS@
R281.1K_0402_1%NOPS@
1 2R451 0_0402_5%
@R451 0_0402_5%
@
12R12 0_0402_5%R12 0_0402_5%
1 2R453 0_0402_5%
@R453 0_0402_5%
@
1 2R26 0_0402_5%
@R26 0_0402_5%
@12R250_0402_5% R250_0402_5%
1 2R449 0_0402_5%
@R449 0_0402_5%
@
T41 PADT41 PAD
1 2R7 24.9_0402_1%R7 24.9_0402_1%
1
2
R123100K_0402_5%
PS@R123
100K_0402_5%
PS@
1 2R456 0_0402_5%
@R456 0_0402_5%
@
1 2R4 49.9_0402_1%R4 49.9_0402_1%
1
2
R293K_0402_1%NOPS@
R293K_0402_1%NOPS@
1 2R32 1K_0402_5%@R32 1K_0402_5%@
1 2R6 100_0402_1%R6 100_0402_1%
1 2R27 0_0402_5%R27 0_0402_5%
1 2R2 20_0402_1%R2 20_0402_1%
12R52 0_0402_5%
@R52 0_0402_5%
@
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DMI_CTX_PRX_P2DMI_CTX_PRX_P3
DMI_CTX_PRX_P0DMI_CTX_PRX_P1
DMI_PTX_CRX_N2DMI_PTX_CRX_N1DMI_PTX_CRX_N0
DMI_PTX_CRX_N3
DMI_PTX_CRX_P2DMI_PTX_CRX_P3
DMI_PTX_CRX_P0DMI_PTX_CRX_P1
DMI_CTX_PRX_N2DMI_CTX_PRX_N3
DMI_CTX_PRX_N0DMI_CTX_PRX_N1
PEG_RBIAS
PCIE_CTX_GRX_N2PCIE_CTX_GRX_N1PCIE_CTX_GRX_N0
PCIE_CTX_GRX_N4
PCIE_CTX_GRX_N7
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_N5
PCIE_CTX_GRX_N8PCIE_CTX_GRX_N9PCIE_CTX_GRX_N10
PCIE_CTX_GRX_N6
PCIE_CTX_GRX_N11PCIE_CTX_GRX_N12
PCIE_CTX_GRX_N15PCIE_CTX_GRX_N14PCIE_CTX_GRX_N13
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_N1PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_N13
PCIE_CTX_GRX_P1
PCIE_CTX_GRX_P7
PCIE_CTX_GRX_P2PCIE_CTX_GRX_P3
PCIE_CTX_GRX_P0
PCIE_CTX_GRX_P4PCIE_CTX_GRX_P5
PCIE_CTX_GRX_P8
PCIE_CTX_GRX_P11PCIE_CTX_GRX_P10PCIE_CTX_GRX_P9
PCIE_CTX_GRX_P6
PCIE_CTX_GRX_P15PCIE_CTX_GRX_P14PCIE_CTX_GRX_P13PCIE_CTX_GRX_P12
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_P1PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_P5PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_P10PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_P12PCIE_CTX_C_GRX_P13PCIE_CTX_C_GRX_P14
PCIE_GTX_C_CRX_N2PCIE_GTX_C_CRX_N1PCIE_GTX_C_CRX_N0
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_N8PCIE_GTX_C_CRX_N9PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_N11PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_N15PCIE_GTX_C_CRX_N14PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_P2PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_P4PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_P11PCIE_GTX_C_CRX_P10PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_P15PCIE_GTX_C_CRX_P14PCIE_GTX_C_CRX_P13PCIE_GTX_C_CRX_P12
PEG_COMP
+FAN1
+FAN1
FDI_CTX_PRX_N0FDI_CTX_PRX_N1FDI_CTX_PRX_N2FDI_CTX_PRX_N3FDI_CTX_PRX_N4FDI_CTX_PRX_N5FDI_CTX_PRX_N6FDI_CTX_PRX_N7
FDI_CTX_PRX_P0FDI_CTX_PRX_P1FDI_CTX_PRX_P2FDI_CTX_PRX_P3FDI_CTX_PRX_P4FDI_CTX_PRX_P5FDI_CTX_PRX_P6FDI_CTX_PRX_P7
FDI_FSYNC1FDI_FSYNC0
FDI_LSYNC0
FDI_INT
FDI_LSYNC1
FDI_FSYNC1
FDI_LSYNC0
FDI_INT
FDI_LSYNC1
FDI_FSYNC0
DMI_PTX_CRX_P3DMI_PTX_CRX_P2DMI_PTX_CRX_P1DMI_PTX_CRX_P0
DMI_PTX_CRX_N3DMI_PTX_CRX_N2DMI_PTX_CRX_N1DMI_PTX_CRX_N0
DMI_CTX_PRX_P3DMI_CTX_PRX_P2DMI_CTX_PRX_P1DMI_CTX_PRX_P0
DMI_CTX_PRX_N3DMI_CTX_PRX_N2DMI_CTX_PRX_N1DMI_CTX_PRX_N0
EN_DFAN1
FAN_SPEED1
PCIE_CTX_C_GRX_N[0..15]
PCIE_CTX_C_GRX_P[0..15]
PCIE_GTX_C_CRX_N[0..15]
PCIE_GTX_C_CRX_P[0..15]
FDI_CTX_PRX_N0FDI_CTX_PRX_N1FDI_CTX_PRX_N2FDI_CTX_PRX_N3FDI_CTX_PRX_N4FDI_CTX_PRX_N5FDI_CTX_PRX_N6FDI_CTX_PRX_N7
FDI_CTX_PRX_P0FDI_CTX_PRX_P1FDI_CTX_PRX_P2FDI_CTX_PRX_P3FDI_CTX_PRX_P4FDI_CTX_PRX_P5FDI_CTX_PRX_P6FDI_CTX_PRX_P7
FDI_FSYNC0FDI_FSYNC1
FDI_INT
FDI_LSYNC0FDI_LSYNC1
+5VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0CPU_DMI/FDI/PEG/FAN
Custom
6 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0CPU_DMI/FDI/PEG/FAN
Custom
6 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0CPU_DMI/FDI/PEG/FAN
Custom
6 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
1A
FAN Control Circuit
10mil
Close to CPU
1 2C51 0.1U_0402_16V7KC51 0.1U_0402_16V7K
1 2C42 0.1U_0402_16V7KC42 0.1U_0402_16V7K
1 2C48 0.1U_0402_16V7KC48 0.1U_0402_16V7K
1 2C43 0.1U_0402_16V7KC43 0.1U_0402_16V7K
12R34 10K_0402_5%R34 10K_0402_5%
1 2C58 0.1U_0402_16V7KC58 0.1U_0402_16V7K
DMI_RX#[0]A24DMI_RX#[1]C23DMI_RX#[2]B22DMI_RX#[3]A21
DMI_RX[0]B24DMI_RX[1]D23DMI_RX[2]B23DMI_RX[3]A22
DMI_TX#[0]D24DMI_TX#[1]G24DMI_TX#[2]F23DMI_TX#[3]H23
DMI_TX[0]D25DMI_TX[1]F24
DMI_TX[3]G23DMI_TX[2]E23
FDI_TX#[0]E22FDI_TX#[1]D21FDI_TX#[2]D19FDI_TX#[3]D18FDI_TX#[4]G21FDI_TX#[5]E19FDI_TX#[6]F21FDI_TX#[7]G18
FDI_TX[0]D22FDI_TX[1]C21FDI_TX[2]D20FDI_TX[3]C18FDI_TX[4]G22FDI_TX[5]E20FDI_TX[6]F20FDI_TX[7]G19
FDI_FSYNC[0]F17FDI_FSYNC[1]E17
FDI_INTC17
FDI_LSYNC[0]F18FDI_LSYNC[1]D17
PEG_ICOMPI B26PEG_ICOMPO A26
PEG_RBIAS A25PEG_RCOMPO B27
PEG_RX#[0] K35PEG_RX#[1] J34PEG_RX#[2] J33PEG_RX#[3] G35PEG_RX#[4] G32PEG_RX#[5] F34PEG_RX#[6] F31PEG_RX#[7] D35PEG_RX#[8] E33PEG_RX#[9] C33
PEG_RX#[10] D32PEG_RX#[11] B32PEG_RX#[12] C31PEG_RX#[13] B28PEG_RX#[14] B30PEG_RX#[15] A31
PEG_RX[0] J35PEG_RX[1] H34PEG_RX[2] H33PEG_RX[3] F35PEG_RX[4] G33PEG_RX[5] E34PEG_RX[6] F32PEG_RX[7] D34PEG_RX[8] F33PEG_RX[9] B33
PEG_RX[10] D31PEG_RX[11] A32PEG_RX[12] C30PEG_RX[13] A28PEG_RX[14] B29PEG_RX[15] A30
PEG_TX#[0] L33PEG_TX#[1] M35PEG_TX#[2] M33PEG_TX#[3] M30PEG_TX#[4] L31PEG_TX#[5] K32PEG_TX#[6] M29PEG_TX#[7] J31PEG_TX#[8] K29PEG_TX#[9] H30
PEG_TX#[10] H29PEG_TX#[11] F29PEG_TX#[12] E28PEG_TX#[13] D29PEG_TX#[14] D27PEG_TX#[15] C26
PEG_TX[0] L34PEG_TX[1] M34PEG_TX[2] M32PEG_TX[3] L30PEG_TX[4] M31PEG_TX[5] K31PEG_TX[6] M28PEG_TX[7] H31PEG_TX[8] K28PEG_TX[9] G30
PEG_TX[10] G29PEG_TX[11] F28PEG_TX[12] E27PEG_TX[13] D28PEG_TX[14] C27PEG_TX[15] C25
P
C
I
E
X
P
R
E
S
S
-
-
G
R
A
P
H
I
C
S
DMI
Intel(
R) FDI
JCPUA
IC,AUB_CFD_rPGA,R0P9 @
P
C
I
E
X
P
R
E
S
S
-
-
G
R
A
P
H
I
C
S
DMI
Intel(
R) FDI
JCPUA
IC,AUB_CFD_rPGA,R0P9 @
1 2C61 0.1U_0402_16V7KC61 0.1U_0402_16V7K
1
2
C510U_0805_10V4ZC510U_0805_10V4Z
1 2R39 750_0402_1%R39 750_0402_1%
1 2C70 0.1U_0402_16V7KC70 0.1U_0402_16V7K
1 2C55 0.1U_0402_16V7KC55 0.1U_0402_16V7K
1 2C39 0.1U_0402_16V7KC39 0.1U_0402_16V7K
1 2C60 0.1U_0402_16V7KC60 0.1U_0402_16V7K
1 2C69 0.1U_0402_16V7KC69 0.1U_0402_16V7K
1
2
C310U_0805_10V4Z
C310U_0805_10V4Z
1 2R689 1K_0402_5%
DIS@R689 1K_0402_5%
DIS@
1 2C49 0.1U_0402_16V7KC49 0.1U_0402_16V7K
1 2R697 1K_0402_5%
DIS@R697 1K_0402_5%
DIS@
112233
GND4GND5
JFAN
ACES_85204-0300N
@JFAN
ACES_85204-0300N
@
1 2R690 1K_0402_5%
DIS@R690 1K_0402_5%
DIS@
1
2C6
0.01U_0402_16V7K@
C60.01U_0402_16V7K
@
1 2C47 0.1U_0402_16V7KC47 0.1U_0402_16V7K
1 2C52 0.1U_0402_16V7KC52 0.1U_0402_16V7K
1 2C41 0.1U_0402_16V7KC41 0.1U_0402_16V7K1 2C40 0.1U_0402_16V7KC40 0.1U_0402_16V7K
1 2C56 0.1U_0402_16V7KC56 0.1U_0402_16V7K
1 2C46 0.1U_0402_16V7KC46 0.1U_0402_16V7K
1 2R696 1K_0402_5%
DIS@R696 1K_0402_5%
DIS@
1 2C50 0.1U_0402_16V7KC50 0.1U_0402_16V7K
1 2C65 0.1U_0402_16V7KC65 0.1U_0402_16V7K
1 2C45 0.1U_0402_16V7KC45 0.1U_0402_16V7K1 2C44 0.1U_0402_16V7KC44 0.1U_0402_16V7K
1 2R695 1K_0402_5%
DIS@R695 1K_0402_5%
DIS@
1 2C53 0.1U_0402_16V7KC53 0.1U_0402_16V7K
1 2C67 0.1U_0402_16V7KC67 0.1U_0402_16V7K
1 2R38 49.9_0402_1%R38 49.9_0402_1%
1 2C57 0.1U_0402_16V7KC57 0.1U_0402_16V7K
1 2C64 0.1U_0402_16V7KC64 0.1U_0402_16V7K1 2C63 0.1U_0402_16V7KC63 0.1U_0402_16V7K
1 2C59 0.1U_0402_16V7KC59 0.1U_0402_16V7K
1 2C54 0.1U_0402_16V7KC54 0.1U_0402_16V7K
1
2C41000P_0402_25V8J@
C41000P_0402_25V8J@
1 2C68 0.1U_0402_16V7KC68 0.1U_0402_16V7K
1 2C66 0.1U_0402_16V7KC66 0.1U_0402_16V7K
EN1VIN2VOUT3VSET4
GND 8GND 7GND 6GND 5
U1
APL5607KI-TRG_SO8
U1
APL5607KI-TRG_SO8
1 2C62 0.1U_0402_16V7KC62 0.1U_0402_16V7K
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D63DDR_A_D62
DDR_A_D8
DDR_A_D5DDR_A_D4DDR_A_D3
DDR_A_D7DDR_A_D6
DDR_A_D59DDR_A_D58DDR_A_D57DDR_A_D56
DDR_A_D47DDR_A_D46
DDR_A_D43DDR_A_D42DDR_A_D41DDR_A_D40
DDR_A_D45DDR_A_D44
DDR_A_D39DDR_A_D38
DDR_A_D35DDR_A_D34DDR_A_D33DDR_A_D32
DDR_A_D37DDR_A_D36
DDR_A_D61DDR_A_D60
DDR_A_D2DDR_A_D1DDR_A_D0
DDR_A_D55DDR_A_D54
DDR_A_D51DDR_A_D50DDR_A_D49DDR_A_D48
DDR_A_D53DDR_A_D52
DDR_A_D31DDR_A_D30
DDR_A_D27DDR_A_D26DDR_A_D25DDR_A_D24
DDR_A_D15DDR_A_D14
DDR_A_D11DDR_A_D10DDR_A_D9
DDR_A_D13DDR_A_D12
DDR_A_D29DDR_A_D28
DDR_A_D23DDR_A_D22
DDR_A_D19DDR_A_D18DDR_A_D17DDR_A_D16
DDR_A_D21DDR_A_D20
DDR_A_BS2DDR_A_BS1DDR_A_BS0
DDR_A_WE#
DDRA_SCS0# DDRB_SCS0#DDRB_SCS1#
DDRA_CLK1#DDRB_CLK1#
DDRB_CLK0#DDRA_CLK0
DDRA_CKE1DDRB_CKE1
DDRB_CKE0DDRA_CLK0#
DDRA_ODT1DDRA_ODT0 DDRB_ODT0
DDRB_ODT1
DDRA_SCS1#
DDRA_CLK1DDRB_CLK1
DDR_B_D32DDR_B_D33
DDR_B_D36DDR_B_D37DDR_B_D38DDR_B_D39
DDR_B_D48DDR_B_D49
DDR_B_D52DDR_B_D53DDR_B_D54DDR_B_D55
DDR_B_D50DDR_B_D51
DDR_B_D56DDR_B_D57
DDR_B_D60DDR_B_D61DDR_B_D62DDR_B_D63
DDR_B_D58DDR_B_D59
DDR_B_D34DDR_B_D35
DDR_B_D40DDR_B_D41
DDR_B_D44DDR_B_D45DDR_B_D46DDR_B_D47
DDR_B_D42DDR_B_D43
DDR_B_D0DDR_B_D1
DDR_B_D4DDR_B_D5DDR_B_D6DDR_B_D7
DDR_B_D16DDR_B_D17
DDR_B_D20DDR_B_D21DDR_B_D22DDR_B_D23
DDR_B_D18DDR_B_D19
DDR_B_D24DDR_B_D25
DDR_B_D28DDR_B_D29DDR_B_D30DDR_B_D31
DDR_B_D26DDR_B_D27
DDR_B_D2DDR_B_D3
DDR_B_D8DDR_B_D9
DDR_B_D12DDR_B_D13DDR_B_D14DDR_B_D15
DDR_B_D10DDR_B_D11
DDR_A_DM5
DDR_A_DM2DDR_A_DM1
DDR_A_DM6
DDR_A_DM4DDR_A_DM3
DDR_A_MA14
DDR_A_MA0DDR_A_MA1
DDR_A_MA4
DDR_A_DM0
DDR_A_MA2DDR_A_MA3
DDR_A_MA5DDR_A_MA6DDR_A_MA7DDR_A_MA8DDR_A_MA9
DDR_A_MA12DDR_A_MA13
DDR_A_MA11DDR_A_MA10
DDR_A_DQS#0DDR_A_DQS#1
DDR_A_DQS#3DDR_A_DQS#2
DDR_A_DQS#5DDR_A_DQS#4
DDR_A_DQS#6DDR_A_DQS#7
DDR_A_DM7
DDR_A_DQS1
DDR_A_DQS3
DDR_A_DQS5
DDR_A_DQS0
DDR_A_DQS2
DDR_A_DQS6DDR_A_DQS7
DDR_A_DQS4
DDR_A_MA15
DDR_B_DQS7
DDR_B_DQS0
DDR_B_DQS5
DDR_B_DQS1
DDR_B_DQS4DDR_B_DQS3
DDR_B_DQS6
DDR_B_DQS2
DDR_B_DQS#1
DDR_B_DQS#5
DDR_B_DQS#7
DDR_B_DQS#3DDR_B_DQS#4
DDR_B_DQS#0
DDR_B_DQS#6
DDR_B_DQS#2
DDR_B_DM3
DDR_B_DM1
DDR_B_DM5DDR_B_DM6DDR_B_DM7
DDR_B_DM2
DDR_B_DM0
DDR_B_DM4
DDR_B_MA2DDR_B_MA3
DDR_B_MA10DDR_B_MA11
DDR_B_MA8DDR_B_MA9
DDR_B_MA0DDR_B_MA1
DDR_B_MA6DDR_B_MA7
DDR_B_MA4DDR_B_MA5
DDR_B_MA14
DDR_B_MA12DDR_B_MA13
DDR_B_MA15
DDR_B_BS2DDR_B_BS1DDR_B_BS0
DDR_B_WE#
DDRA_CKE0
DDR_A_CAS#DDR_A_RAS#
DDR_B_RAS#DDR_B_CAS#
DDRB_CLK0
DDR_A_D[0..63]
DDR_A_BS1DDR_A_BS2
DDR_A_BS0
DDR_A_WE#
DDRA_CLK0 DDRB_CLK0
DDRA_CLK1
DDRA_CLK0#
DDRB_CLK1
DDRA_CLK1# DDRB_CLK1#
DDRB_CLK0# DDRA_CKE0 DDRB_CKE0
DDRA_CKE1
DDRA_SCS0#
DDRB_CKE1
DDRA_SCS1# DDRB_SCS1# DDRB_SCS0#
DDRA_ODT0 DDRB_ODT0 DDRA_ODT1 DDRB_ODT1
DDR_B_D[0..63]
DDR_A_MA[0..15]
DDR_A_DQS[0..7]
DDR_A_DM[0..7]
DDR_A_DQS#[0..7]
DDR_B_MA[0..15]
DDR_B_DQS#[0..7]
DDR_B_DQS[0..7]
DDR_B_DM[0..7]
DDR_B_BS1DDR_B_BS2
DDR_B_BS0
DDR_B_WE#DDR_A_CAS#DDR_A_RAS#
DDR_B_RAS#DDR_B_CAS#
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0CPU_DDR3
B
7 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0CPU_DDR3
B
7 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0CPU_DDR3
B
7 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Unused by Clarksfield rPGA989Unused by Clarksfield rPGA989
SB_BS[0]AB1SB_BS[1]W5SB_BS[2]R7
SB_CAS#AC5SB_RAS#Y7SB_WE#AC6
SB_CK[0] W8
SB_CK[1] V7
SB_CK#[0] W9
SB_CK#[1] V6
SB_CKE[0] M3
SB_CKE[1] M2
SB_CS#[0] AB8SB_CS#[1] AD6
SB_ODT[0] AC7SB_ODT[1] AD1
SB_DM[0] D4SB_DM[1] E1SB_DM[2] H3SB_DM[3] K1SB_DM[4] AH1SB_DM[5] AL2SB_DM[6] AR4SB_DM[7] AT8
SB_DQS[4] AG2
SB_DQS#[4] AH2
SB_DQS[5] AL5
SB_DQS#[5] AL4
SB_DQS[6] AP5
SB_DQS#[6] AR5
SB_DQS[7] AR7
SB_DQS#[7] AR8
SB_DQS[0] C5
SB_DQS#[0] D5
SB_DQS[1] E3
SB_DQS#[1] F4
SB_DQS[2] H4
SB_DQS#[2] J4
SB_DQS[3] M5
SB_DQS#[3] L4
SB_MA[0] U5SB_MA[1] V2SB_MA[2] T5SB_MA[3] V3SB_MA[4] R1SB_MA[5] T8SB_MA[6] R2SB_MA[7] R6SB_MA[8] R4SB_MA[9] R5
SB_MA[10] AB5SB_MA[11] P3SB_MA[12] R3SB_MA[13] AF7SB_MA[14] P5SB_MA[15] N1
SB_DQ[0]B5SB_DQ[1]A5SB_DQ[2]C3SB_DQ[3]B3SB_DQ[4]E4SB_DQ[5]A6SB_DQ[6]A4SB_DQ[7]C4SB_DQ[8]D1SB_DQ[9]D2SB_DQ[10]F2SB_DQ[11]F1SB_DQ[12]C2SB_DQ[13]F5SB_DQ[14]F3SB_DQ[15]G4SB_DQ[16]H6SB_DQ[17]G2SB_DQ[18]J6SB_DQ[19]J3SB_DQ[20]G1SB_DQ[21]G5SB_DQ[22]J2SB_DQ[23]J1SB_DQ[24]J5SB_DQ[25]K2SB_DQ[26]L3SB_DQ[27]M1SB_DQ[28]K5SB_DQ[29]K4SB_DQ[30]M4SB_DQ[31]N5SB_DQ[32]AF3SB_DQ[33]AG1SB_DQ[34]AJ3SB_DQ[35]AK1SB_DQ[36]AG4SB_DQ[37]AG3SB_DQ[38]AJ4SB_DQ[39]AH4SB_DQ[40]AK3SB_DQ[41]AK4SB_DQ[42]AM6SB_DQ[43]AN2SB_DQ[44]AK5SB_DQ[45]AK2SB_DQ[46]AM4SB_DQ[47]AM3SB_DQ[48]AP3SB_DQ[49]AN5SB_DQ[50]AT4SB_DQ[51]AN6SB_DQ[52]AN4SB_DQ[53]AN3SB_DQ[54]AT5SB_DQ[55]AT6SB_DQ[56]AN7SB_DQ[57]AP6SB_DQ[58]AP8SB_DQ[59]AT9SB_DQ[60]AT7SB_DQ[61]AP9SB_DQ[62]AR10SB_DQ[63]AT10
D
D
R
S
Y
S
T
E
M
M
E
M
O
R
Y
-
B
JCPUD
IC,AUB_CFD_rPGA,R0P9@
D
D
R
S
Y
S
T
E
M
M
E
M
O
R
Y
-
B
JCPUD
IC,AUB_CFD_rPGA,R0P9@
SA_BS[0]AC3SA_BS[1]AB2SA_BS[2]U7
SA_CAS#AE1SA_RAS#AB3SA_WE#AE9
SA_CK[0] AA6
SA_CK[1] Y6
SA_CK#[0] AA7
SA_CK#[1] Y5
SA_CKE[0] P7
SA_CKE[1] P6
SA_CS#[0] AE2SA_CS#[1] AE8
SA_ODT[0] AD8SA_ODT[1] AF9
SA_DM[0] B9SA_DM[1] D7SA_DM[2] H7SA_DM[3] M7SA_DM[4] AG6SA_DM[5] AM7SA_DM[6] AN10SA_DM[7] AN13
SA_DQS[0] C8
SA_DQS#[0] C9
SA_DQS[1] F9
SA_DQS#[1] F8
SA_DQS[2] H9
SA_DQS#[2] J9
SA_DQS[3] M9
SA_DQS#[3] N9
SA_DQS[4] AH8
SA_DQS#[4] AH7
SA_DQS[5] AK10
SA_DQS#[5] AK9
SA_DQS[6] AN11
SA_DQS#[6] AP11
SA_DQS[7] AR13
SA_DQS#[7] AT13
SA_MA[0] Y3SA_MA[1] W1SA_MA[2] AA8SA_MA[3] AA3SA_MA[4] V1SA_MA[5] AA9SA_MA[6] V8SA_MA[7] T1SA_MA[8] Y9SA_MA[9] U6
SA_MA[10] AD4SA_MA[11] T2SA_MA[12] U3SA_MA[13] AG8SA_MA[14] T3SA_MA[15] V9
SA_DQ[0]A10SA_DQ[1]C10SA_DQ[2]C7SA_DQ[3]A7SA_DQ[4]B10SA_DQ[5]D10SA_DQ[6]E10SA_DQ[7]A8SA_DQ[8]D8SA_DQ[9]F10SA_DQ[10]E6SA_DQ[11]F7SA_DQ[12]E9SA_DQ[13]B7SA_DQ[14]E7SA_DQ[15]C6SA_DQ[16]H10SA_DQ[17]G8SA_DQ[18]K7SA_DQ[19]J8SA_DQ[20]G7SA_DQ[21]G10SA_DQ[22]J7SA_DQ[23]J10SA_DQ[24]L7SA_DQ[25]M6SA_DQ[26]M8SA_DQ[27]L9SA_DQ[28]L6SA_DQ[29]K8SA_DQ[30]N8SA_DQ[31]P9SA_DQ[32]AH5SA_DQ[33]AF5SA_DQ[34]AK6SA_DQ[35]AK7SA_DQ[36]AF6SA_DQ[37]AG5SA_DQ[38]AJ7SA_DQ[39]AJ6SA_DQ[40]AJ10SA_DQ[41]AJ9SA_DQ[42]AL10SA_DQ[43]AK12SA_DQ[44]AK8SA_DQ[45]AL7SA_DQ[46]AK11SA_DQ[47]AL8SA_DQ[48]AN8SA_DQ[49]AM10SA_DQ[50]AR11SA_DQ[51]AL11SA_DQ[52]AM9SA_DQ[53]AN9SA_DQ[54]AT11SA_DQ[55]AP12SA_DQ[56]AM12SA_DQ[57]AN12SA_DQ[58]AM13SA_DQ[59]AT14SA_DQ[60]AT12SA_DQ[61]AL13SA_DQ[62]AR14SA_DQ[63]AP14
D
D
R
S
Y
S
T
E
M
M
E
M
O
R
Y
A
JCPUC
IC,AUB_CFD_rPGA,R0P9@
D
D
R
S
Y
S
T
E
M
M
E
M
O
R
Y
A
JCPUC
IC,AUB_CFD_rPGA,R0P9@
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCSENSEVSSSENSE
CPU_VID5
VSSSENSE_R
H_DPRSLPVR_R
H_PSI#
IMVP_IMON
CPU_VID4CPU_VID3
VTT_SENSE
CPU_VID6
CPU_VID0
CPU_VID2
VCCSENSE_R
H_VTTSELECT
CPU_VID1
VSS_SENSE_VTT
VSSSENSE VCCSENSE
VTT_SENSE VSS_SENSE_VTT
H_PSI#
CPU_VID0 CPU_VID1
CPU_VID3 CPU_VID2
CPU_VID5 CPU_VID4
CPU_VID6 H_DPRSLPVR
H_VTTSELECT
IMVP_IMON
+CPU_CORE
+CPU_CORE+VTT
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0CPU_POWER-1
Custom
8 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0CPU_POWER-1
Custom
8 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0CPU_POWER-1
Custom
8 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Auburndale:48AClarksfield: 65A Clarksfield: 21A
Auburndale:18A
Close to CPU
(Place these capacitors under CPU socket Edge, top layer) (Place these capacitors between inductor and socket on Bottom)
(Place these capacitors under CPU socket, top layer)
(Place these capacitors on CPU cavity, Bottom Layer)
TOP side (under inductor)VTT Rail
Auburndale +1.1VS_VTT=1.05V Clarksfield +1.1VS_VTT=1.1V
H_VTTSELECT = low, 1.1V
H_VTTSELECT = high, 1.05V
Check list:
+CPU_CORE: 6x 470uF, 12x 22uF, 17x 10uF
+VTT: 4x 330uF, 7x 22uF, 8x 10uF
Material Note (+VTT):390uF/ 10mohm, number are 3,power x1, HW x2
CRB default setting: VID[6:0]=[0100111]
5/25: Add for power team request.
Change C144 to 4.5mm height at DVT
1
2
+C122
330U_D2_2.5VM_R9M
+C122
330U_D2_2.5VM_R9M
1 2+C144 330U_2.5V_M_R17+C144 330U_2.5V_M_R17
1 2C91 22U_0805_6.3V6MC91 22U_0805_6.3V6M
1
2C103
10U_0805_10V4K
C103
10U_0805_10V4K
1
2
+C125
330U_D2_2.5VM_R9M
@+C125
330U_D2_2.5VM_R9M
@
1
2
C108
22U_0805_6.3V6M
C108
22U_0805_6.3V6M
1 2C85 10U_0805_10V4KC85 10U_0805_10V4K
1 2R67 100_0402_1%R67 100_0402_1%
1 2R65 0_0402_5%R65 0_0402_5%
1
2C102
10U_0805_10V4K
C102
10U_0805_10V4K
1
2
C109
22U_0805_6.3V6M
C109
22U_0805_6.3V6M
1 2C92 10U_0805_10V4KC92 10U_0805_10V4K
1
2C104
10U_0805_10V4K
C104
10U_0805_10V4K
1 2C81 10U_0805_10V4KC81 10U_0805_10V4K
1
2
C107
22U_0805_6.3V6M
C107
22U_0805_6.3V6M
1
2
C117
22U_0805_6.3V6M
C117
22U_0805_6.3V6M
1
2
C129
22U_0805_6.3V6M
C129
22U_0805_6.3V6M
1
2C75
10U_0805_10V4K
C75
10U_0805_10V4K
1 2C88 10U_0805_10V4KC88 10U_0805_10V4K
1 2R62 0_0402_5%R62 0_0402_5%
1
2
C106
22U_0805_6.3V6M
C106
22U_0805_6.3V6M
1
2
C118
22U_0805_6.3V6M
C118
22U_0805_6.3V6M
1
2
+C123
330U_D2_2.5VM_R9M
+C123
330U_D2_2.5VM_R9M
1
2C98
10U_0805_10V4K
C98
10U_0805_10V4K
1
2C72
10U_0805_10V4K
C72
10U_0805_10V4K
1
2
C114
22U_0805_6.3V6M
C114
22U_0805_6.3V6M
1
2
C119
22U_0805_6.3V6M
C119
22U_0805_6.3V6M
1
2C71
10U_0805_10V4K
C71
10U_0805_10V4K
1
2C76
10U_0805_10V4K
C76
10U_0805_10V4K
1
2
C150
22U_0805_6.3V6M
C150
22U_0805_6.3V6M1
2
C105
22U_0805_6.3V6M
C105
22U_0805_6.3V6M
1
2C73
10U_0805_10V4K
C73
10U_0805_10V4K
1
2
C115
22U_0805_6.3V6M
C115
22U_0805_6.3V6M
1
2
C120
22U_0805_6.3V6M
C120
22U_0805_6.3V6M
1 2C89 10U_0805_10V4KC89 10U_0805_10V4K
1
2C99
10U_0805_10V4K
C99
10U_0805_10V4K
1
2
C158
22U_0805_6.3V6M
C158
22U_0805_6.3V6M
1
2C74
10U_0805_10V4K
C74
10U_0805_10V4K
1
2
C113
22U_0805_6.3V6M
C113
22U_0805_6.3V6M
1
2C77
10U_0805_10V4K
C77
10U_0805_10V4K
1
2
+C121
330U_D2_2.5VM_R9M
+C121
330U_D2_2.5VM_R9M
1 2C94 10U_0805_10V4K
@
C94 10U_0805_10V4K
@
1 2C83 10U_0805_10V4KC83 10U_0805_10V4K
1 2R66 0_0402_5%R66 0_0402_5%
1
2
C127
22U_0805_6.3V6M
C127
22U_0805_6.3V6M
1
2C78
10U_0805_10V4K
C78
10U_0805_10V4K
1 2+C267 390U_2.5V_M_R10+C267 390U_2.5V_M_R10
1
2
C112
22U_0805_6.3V6M
C112
22U_0805_6.3V6M
1
2
+C124
330U_D2_2.5VM_R9M
+C124
330U_D2_2.5VM_R9M
1 2C90 10U_0805_10V4KC90 10U_0805_10V4K
1
2C100
10U_0805_10V4K
C100
10U_0805_10V4K
1
2
C110
22U_0805_6.3V6M
C110
22U_0805_6.3V6M
1 2R64 100_0402_1%R64 100_0402_1%
1
2C79
10U_0805_10V4K
C79
10U_0805_10V4K
1
2
C128
22U_0805_6.3V6M
C128
22U_0805_6.3V6M
ISENSE AN35
VTT_SENSE B15
PSI# AN33
VID[0] AK35VID[1] AK33VID[2] AK34VID[3] AL35VID[4] AL33VID[5] AM33VID[6] AM35
PROC_DPRSLPVR AM34
VTT_SELECT G15
VCC_SENSE AJ34
VSS_SENSE_VTT A15
VCC1AG35VCC2AG34VCC3AG33VCC4AG32VCC5AG31VCC6AG30VCC7AG29VCC8AG28VCC9AG27VCC10AG26VCC11AF35VCC12AF34VCC13AF33VCC14AF32VCC15AF31VCC16AF30VCC17AF29VCC18AF28VCC19AF27VCC20AF26VCC21AD35VCC22AD34VCC23AD33VCC24AD32VCC25AD31VCC26AD30VCC27AD29VCC28AD28VCC29AD27VCC30AD26VCC31AC35VCC32AC34VCC33AC33VCC34AC32VCC35AC31VCC36AC30VCC37AC29VCC38AC28VCC39AC27VCC40AC26VCC41AA35VCC42AA34VCC43AA33VCC44AA32VCC45AA31VCC46AA30VCC47AA29VCC48AA28VCC49AA27VCC50AA26VCC51Y35VCC52Y34VCC53Y33VCC54Y32VCC55Y31VCC56Y30VCC57Y29VCC58Y28VCC59Y27VCC60Y26VCC61V35VCC62V34VCC63V33VCC64V32VCC65V31VCC66V30VCC67V29VCC68V28VCC69V27VCC70V26VCC71U35VCC72U34VCC73U33VCC74U32VCC75U31VCC76U30VCC77U29VCC78U28VCC79U27VCC80U26VCC81R35VCC82R34VCC83R33VCC84R32VCC85R31VCC86R30VCC87R29VCC88R28VCC89R27VCC90R26VCC91P35VCC92P34VCC93P33VCC94P32VCC95P31VCC96P30VCC97P29VCC98P28VCC99P27VCC100P26
VTT0_33 AF10VTT0_34 AE10VTT0_35 AC10VTT0_36 AB10VTT0_37 Y10VTT0_38 W10VTT0_39 U10VTT0_40 T10VTT0_41 J12VTT0_42 J11
VTT0_1 AH14VTT0_2 AH12VTT0_3 AH11VTT0_4 AH10VTT0_5 J14VTT0_6 J13VTT0_7 H14VTT0_8 H12VTT0_9 G14
VTT0_10 G13VTT0_11 G12VTT0_12 G11VTT0_13 F14VTT0_14 F13VTT0_15 F12VTT0_16 F11VTT0_17 E14VTT0_18 E12VTT0_19 D14VTT0_20 D13VTT0_21 D12VTT0_22 D11VTT0_23 C14VTT0_24 C13VTT0_25 C12VTT0_26 C11VTT0_27 B14VTT0_28 B12VTT0_29 A14VTT0_30 A13VTT0_31 A12VTT0_32 A11
VSS_SENSE AJ35
VTT0_43 J16VTT0_44 J15
P
O
W
E
R
CPU CORE SUPPLY
1
.
1
V
R
A
I
L
P
O
W
E
R
S
E
N
S
E
L
I
N
E
S
C
P
U
V
I
D
S
JCPUF
IC,AUB_CFD_rPGA,R0P9@
P
O
W
E
R
CPU CORE SUPPLY
1
.
1
V
R
A
I
L
P
O
W
E
R
S
E
N
S
E
L
I
N
E
S
C
P
U
V
I
D
S
JCPUF
IC,AUB_CFD_rPGA,R0P9@
1 2C87 22U_0805_6.3V6MC87 22U_0805_6.3V6M
1
2
C116
22U_0805_6.3V6M
C116
22U_0805_6.3V6M
1
2C101
10U_0805_10V4K
C101
10U_0805_10V4K
1
2
C111
22U_0805_6.3V6M
C111
22U_0805_6.3V6M
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.8VS_H_PLL
SUSPSUSP
GFXVR_DPRSLPVR
GFXVR_EN
GFXVR_IMON
GFXVR_VID_5GFXVR_VID_6
GFXVR_VID_0GFXVR_VID_1GFXVR_VID_2GFXVR_VID_3GFXVR_VID_4
VSS_AXG_SENSE_RVCC_AXG_SENSE_R
SUSP
GFXVR_EN
GFXVR_VID_0 GFXVR_VID_1 GFXVR_VID_2 GFXVR_VID_3 GFXVR_VID_4 GFXVR_VID_5 GFXVR_VID_6
GFXVR_IMON
VCC_AXG_SENSE VSS_AXG_SENSE
+VTT
+VTT
+1.8VS
+1.5V_CPU
+VTT
+VTT
+1.5V+1.5V_CPU
+1.5V
+VSB
+1.5V_CPU +1.5V
+GFX_CORE
+GFX_CORE+GFX_CORE
+GFX_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0CPU_POWER-2
Custom
9 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0CPU_POWER-2
Custom
9 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0CPU_POWER-2
Custom
9 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Clarksfield: 21AAuburndale:18A
Clarksfield: 1.35AAuburndale:1.35A
Clarksfield: 5AAuburndale:3A
(Place these capacitors under CPU socket, top layer)
(Place these capacitors under CPU socket Edge, top layer)
(Place these capacitors under CPU socket, top layer)
For S3 CPU Power Saving
Change R136 to 470 ohm for GFX issue
For EMI
For EMI
For EMI
22A
Close to CPU
Change C271 to OS-CON at PVT
Co-layout with C271
1
2C2
5
6
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
@
C
2
5
6
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
@
1 2R510 100_0402_1%
OPT@R510 100_0402_1%
OPT@1
2
C266
22U_0805_6.3V6M
OPT@C266
22U_0805_6.3V6M
OPT@
1 2R117 0_0402_5%OPT@R117 0_0402_5%OPT@
1 2C186 0.1U_0402_16V4ZC186 0.1U_0402_16V4Z
1 2R418
220K_0402_5%PS@
R418
220K_0402_5%PS@
1
2
C286
1U_0402_6.3V4Z
OPT@C286
1U_0402_6.3V4Z
OPT@
1
2
C145
22U_0805_6.3V6M
C145
22U_0805_6.3V6M
1
2
+ C216
390U_2.5V_M_R10
+ C216
390U_2.5V_M_R10
6
1
2
Q46A
2N7002DW-T/R7_SOT363-6
PS@Q46A
2N7002DW-T/R7_SOT363-6
PS@
1
2
C1511U_0402_6.3V4Z
C1511U_0402_6.3V4Z
1
2C2
5
7
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
@
C
2
5
7
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
@
1 2C185 0.1U_0402_16V4ZC185 0.1U_0402_16V4Z
S1S2S3G4
D 8D 7D 6D 5
Q33
FDS6676AS_SO8
PS@Q33
FDS6676AS_SO8
PS@
1
2
C133
1U_0402_6.3V4Z
C133
1U_0402_6.3V4Z
1
2
C247
1U_0402_6.3V4Z
OPT@C247
1U_0402_6.3V4Z
OPT@
1
2
C143
10U_0805_10V4K
C143
10U_0805_10V4K
1 2R136 470_0402_5%
OPT@
R136 470_0402_5%
OPT@
1
2
C135
1U_0402_6.3V4Z
C135
1U_0402_6.3V4Z
C2470_0402_5%DIS@
C2470_0402_5%DIS@
1
2
C137
1U_0402_6.3V4Z
C137
1U_0402_6.3V4Z
1
2
C152
1U_0402_6.3V4Z
C152
1U_0402_6.3V4Z
1
2C2
5
8
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
@
C
2
5
8
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
@
1
2
C4720.1U_0402_25V6
PS@
C4720.1U_0402_25V6
PS@
1
2
C138
22U_0805_6.3V6M
C138
22U_0805_6.3V6M
T54 PADT54 PAD
1 122PJ31
JUMP_43X79
@PJ31
JUMP_43X79
@
1
2
C272
47P_0402_50V8J
@C272
47P_0402_50V8J
@
1
2C1
6
0
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
@
C
1
6
0
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
@
1
2
C139
22U_0805_6.3V6M
C139
22U_0805_6.3V6M
3
5
4
Q46B
2N7002DW-T/R7_SOT363-6
PS@Q46B
2N7002DW-T/R7_SOT363-6
PS@1
2
C279
47P_0402_50V8J
@C279
47P_0402_50V8J
@
12R687 1K_0402_5%DIS@
R687 1K_0402_5%DIS@
1
2
C134
1U_0402_6.3V4Z
C134
1U_0402_6.3V4Z
1
2
C248
10U_0805_6.3V6M
OPT@C248
10U_0805_6.3V6M
OPT@
1
2
C153
2.2U_0603_6.3V4Z
C153
2.2U_0603_6.3V4Z
1
2
C280
47P_0402_50V8J
@C280
47P_0402_50V8J
@
1 122PJ30
JUMP_43X79
@PJ30
JUMP_43X79
@
1
2
+C271330U_2.5V_M_R17
OPT@
+C271330U_2.5V_M_R17
OPT@
1
2
C146
22U_0805_6.3V6M
C146
22U_0805_6.3V6M
1
2
C17910U_0805_10V4KPS@
C17910U_0805_10V4KPS@
1
2
C249
22U_0805_6.3V6M
OPT@C249
22U_0805_6.3V6M
OPT@
1
2
C141
22U_0805_6.3V6M
C141
22U_0805_6.3V6M
1 2R142 0_0402_5%OPT@R142 0_0402_5%OPT@
1
2
C136
1U_0402_6.3V4Z
C136
1U_0402_6.3V4Z
1
2
C281
47P_0402_50V8J
@C281
47P_0402_50V8J
@
1
2
+C494330U_D2_2VM_R6M
@
+C494330U_D2_2VM_R6M
@
1
2
C155
22U_0805_6.3V6M
C155
22U_0805_6.3V6M
1 2C180 0.1U_0402_16V4ZC180 0.1U_0402_16V4Z
C154
4.7U_0603_6.3V6K
C154
4.7U_0603_6.3V6K
1
2
C147
22U_0805_6.3V6M
C147
22U_0805_6.3V6M
1
2
R424470_0805_5%
PS@
R424470_0805_5%
PS@
1
2
C142
22U_0805_6.3V6M
C142
22U_0805_6.3V6M
1
2
C250
10U_0805_6.3V6M
OPT@C250
10U_0805_6.3V6M
OPT@
GFX_VID[0] AM22GFX_VID[1] AP22GFX_VID[2] AN22GFX_VID[3] AP23GFX_VID[4] AM23GFX_VID[5] AP24GFX_VID[6] AN24
GFX_VR_EN AR25GFX_DPRSLPVR AT25
GFX_IMON AM24
VAXG_SENSE AR22VSSAXG_SENSE AT22
VAXG1AT21VAXG2AT19VAXG3AT18VAXG4AT16VAXG5AR21VAXG6AR19VAXG7AR18VAXG8AR16VAXG9AP21VAXG10AP19VAXG11AP18VAXG12AP16VAXG13AN21VAXG14AN19VAXG15AN18VAXG16AN16VAXG17AM21VAXG18AM19VAXG19AM18VAXG20AM16VAXG21AL21VAXG22AL19VAXG23AL18VAXG24AL16VAXG25AK21VAXG26AK19VAXG27AK18VAXG28AK16VAXG29AJ21VAXG30AJ19VAXG31AJ18VAXG32AJ16VAXG33AH21VAXG34AH19VAXG35AH18VAXG36AH16
VTT1_45J24VTT1_46J23VTT1_47H25
VTT1_48K26VTT1_49J27VTT1_50J26VTT1_51J25VTT1_52H27VTT1_53G28VTT1_54G27VTT1_55G26VTT1_56F26VTT1_57E26VTT1_58E25
VDDQ1 AJ1VDDQ2 AF1VDDQ3 AE7VDDQ4 AE4VDDQ5 AC1VDDQ6 AB7VDDQ7 AB4VDDQ8 Y1VDDQ9 W7
VDDQ10 W4VDDQ11 U1VDDQ12 T7VDDQ13 T4VDDQ14 P1VDDQ15 N7VDDQ16 N4VDDQ17 L1VDDQ18 H1
VTT0_59 P10VTT0_60 N10VTT0_61 L10VTT0_62 K10
VCCPLL1 L26VCCPLL2 L27VCCPLL3 M26
VTT1_63 J22VTT1_64 J20VTT1_65 J18VTT1_66 H21VTT1_67 H20VTT1_68 H19
P
O
W
E
R
G
R
A
P
H
I
C
S
V
I
D
s
GRAPHICS
D
D
R
3
-
1
.
5
V
R
A
I
L
S
FDI
PEG & DMI
S
E
N
S
E
L
I
N
E
S
1
.
1
V
1
.
8
V
JCPUG
IC,AUB_CFD_rPGA,R0P9 @
P
O
W
E
R
G
R
A
P
H
I
C
S
V
I
D
s
GRAPHICS
D
D
R
3
-
1
.
5
V
R
A
I
L
S
FDI
PEG & DMI
S
E
N
S
E
L
I
N
E
S
1
.
1
V
1
.
8
V
JCPUG
IC,AUB_CFD_rPGA,R0P9 @
12R71 0_0805_5%R71 0_0805_5%
1 2C205 0.1U_0402_16V4ZC205 0.1U_0402_16V4Z
1 2R509 100_0402_1%
OPT@R509 100_0402_1%
OPT@
1
2
R417820K_0402_5%PS@
R417820K_0402_5%PS@
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_NCTF1H_NCTF2
H_NCTF6H_NCTF7
CFG3
CFG6CFG5CFG4
CFG7
CFG10CFG9CFG8
CFG11
CFG15CFG14CFG13
CFG18CFG17CFG16
CFG0CFG1CFG2
+VREF_DQA_M3+VREF_DQB_M3
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0CPU_GND/RESERVED
Custom
10 59Tuesday, March 23, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0CPU_GND/RESERVED
Custom
10 59Tuesday, March 23, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0CPU_GND/RESERVED
Custom
10 59Tuesday, March 23, 2010
200910/9 2010/01/23Compal Electronics, Inc.
WW41 Recommend not pull downPCIE2.0 Jitter is over on ES1
(SA_DIMM_VREF)(SB_DIMM_VREF)
CFG0 - PCI-Express Configuration Select
*1:Single PEG0:Bifurcation enabled
*1 :Normal Operation0 :Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
CFG4 - Display Port Presence
*:Default
*1:Disabled; No Physical Display Port attached to Embedded Display Port0:Enabled; An external Display Port device is connected to the Embedded Display Port
CFG3 - PCI-Express Static Lane Reversal
Reserve via for test
T6PAD T6PAD
1 2R753.01K_0402_1% @ R753.01K_0402_1% @1 2R763.01K_0402_1% @ R763.01K_0402_1% @
VSS161K27VSS162K9VSS163K6VSS164K3VSS165J32VSS166J30VSS167J21VSS168J19VSS169H35VSS170H32VSS171H28VSS172H26VSS173H24VSS174H22VSS175H18VSS176H15VSS177H13VSS178H11VSS179H8VSS180H5VSS181H2VSS182G34VSS183G31VSS184G20VSS185G9VSS186G6VSS187G3VSS188F30VSS189F27VSS190F25VSS191F22VSS192F19VSS193F16VSS194E35VSS195E32VSS196E29VSS197E24VSS198E21VSS199E18VSS200E13VSS201E11VSS202E8VSS203E5VSS204E2VSS205D33VSS206D30VSS207D26VSS208D9VSS209D6VSS210D3VSS211C34VSS212C32VSS213C29VSS214C28VSS215C24VSS216C22VSS217C20VSS218C19VSS219C16VSS220B31VSS221B25VSS222B21VSS223B18VSS224B17VSS225B13VSS226B11VSS227B8VSS228B6VSS229B4VSS230A29
VSS_NCTF1 AT35VSS_NCTF2 AT1VSS_NCTF3 AR34VSS_NCTF4 B34VSS_NCTF5 B2VSS_NCTF6 B1VSS_NCTF7 A35
VSS231A27VSS232A23VSS233A9
VSS
N
C
T
F
JCPUI
IC,AUB_CFD_rPGA,R0P9 @
VSS
N
C
T
F
JCPUI
IC,AUB_CFD_rPGA,R0P9 @
CFG[0]AM30CFG[1]AM28CFG[2]AP31CFG[3]AL32CFG[4]AL30CFG[5]AM31CFG[6]AN29CFG[7]AM32CFG[8]AK32CFG[9]AK31CFG[10]AK28CFG[11]AJ28CFG[12]AN30CFG[13]AN32CFG[14]AJ32CFG[15]AJ29CFG[16]AJ30CFG[17]AK30
RSVD34 AH25RSVD35 AK26
RSVD38 AJ26
RSVD_NCTF_42 AT3
RSVD39 AJ27
RSVD_NCTF_40 AP1RSVD_NCTF_41 AT2
RSVD_NCTF_43 AR1
RSVD_TP_86H16
RSVD45 AL28RSVD46 AL29RSVD47 AP30RSVD48 AP32RSVD49 AL27RSVD50 AT31RSVD51 AT32RSVD52 AP33RSVD53 AR33
RSVD_NCTF_54 AT33RSVD_NCTF_55 AT34RSVD_NCTF_56 AP35RSVD_NCTF_57 AR35
RSVD58 AR32
RSVD_NCTF_30C35RSVD_NCTF_31B35
RSVD_NCTF_28A34RSVD_NCTF_29A33
RSVD27J28RSVD26J29
RSVD16A19RSVD15B19
RSVD17A20RSVD18B20
RSVD20T9RSVD19U9
RSVD22AB9RSVD21AC9
RSVD_NCTF_23C1RSVD_NCTF_24A3
RSVD_TP_66 AA5RSVD_TP_67 AA4RSVD_TP_68 R8
RSVD_TP_71 AA2RSVD_TP_72 AA1RSVD_TP_73 R9
RSVD_TP_69 AD3
RSVD_TP_74 AG7
RSVD_TP_70 AD2
RSVD_TP_75 AE3
RSVD_TP_76 V4RSVD_TP_77 V5RSVD_TP_78 N2
RSVD_TP_81 W3RSVD_TP_82 W2RSVD_TP_83 N3
RSVD_TP_79 AD5
RSVD_TP_84 AE5
RSVD_TP_80 AD7
RSVD_TP_85 AD9
RSVD36 AL26RSVD_NCTF_37 AR2
RSVD1AP25RSVD2AL25RSVD3AL24RSVD4AL22RSVD5AJ33RSVD6AG9RSVD7M27RSVD8L28RSVD9J17RSVD10H17RSVD11G25RSVD12G17RSVD13E31RSVD14E30
RSVD32 AJ13RSVD33 AJ12
RSVD_TP_59 E15RSVD_TP_60 F15
KEY A2RSVD62 D15RSVD63 C15RSVD64 AJ15RSVD65 AH15
VSS AP34
R
E
S
E
R
V
E
D
JCPUE
IC,AUB_CFD_rPGA,R0P9@
R
E
S
E
R
V
E
D
JCPUE
IC,AUB_CFD_rPGA,R0P9@
VSS1AT20VSS2AT17VSS3AR31VSS4AR28VSS5AR26VSS6AR24VSS7AR23VSS8AR20VSS9AR17VSS10AR15VSS11AR12VSS12AR9VSS13AR6VSS14AR3VSS15AP20VSS16AP17VSS17AP13VSS18AP10VSS19AP7VSS20AP4VSS21AP2VSS22AN34VSS23AN31VSS24AN23VSS25AN20VSS26AN17VSS27AM29VSS28AM27VSS29AM25VSS30AM20VSS31AM17VSS32AM14VSS33AM11VSS34AM8VSS35AM5VSS36AM2VSS37AL34VSS38AL31VSS39AL23VSS40AL20VSS41AL17VSS42AL12VSS43AL9VSS44AL6VSS45AL3VSS46AK29VSS47AK27VSS48AK25VSS49AK20VSS50AK17VSS51AJ31VSS52AJ23VSS53AJ20VSS54AJ17VSS55AJ14VSS56AJ11VSS57AJ8VSS58AJ5VSS59AJ2VSS60AH35VSS61AH34VSS62AH33VSS63AH32VSS64AH31VSS65AH30VSS66AH29VSS67AH28VSS68AH27VSS69AH26VSS70AH20VSS71AH17VSS72AH13VSS73AH9VSS74AH6VSS75AH3VSS76AG10VSS77AF8VSS78AF4VSS79AF2VSS80AE35
VSS81 AE34VSS82 AE33VSS83 AE32VSS84 AE31VSS85 AE30VSS86 AE29VSS87 AE28VSS88 AE27VSS89 AE26VSS90 AE6VSS91 AD10VSS92 AC8VSS93 AC4VSS94 AC2VSS95 AB35VSS96 AB34VSS97 AB33VSS98 AB32VSS99 AB31
VSS100 AB30VSS101 AB29VSS102 AB28VSS103 AB27VSS104 AB26VSS105 AB6VSS106 AA10VSS107 Y8VSS108 Y4VSS109 Y2VSS110 W35VSS111 W34VSS112 W33VSS113 W32VSS114 W31VSS115 W30VSS116 W29VSS117 W28VSS118 W27VSS119 W26VSS120 W6VSS121 V10VSS122 U8VSS123 U4VSS124 U2VSS125 T35VSS126 T34VSS127 T33VSS128 T32VSS129 T31VSS130 T30VSS131 T29VSS132 T28VSS133 T27VSS134 T26VSS135 T6VSS136 R10VSS137 P8VSS138 P4VSS139 P2VSS140 N35VSS141 N34VSS142 N33VSS143 N32VSS144 N31VSS145 N30VSS146 N29VSS147 N28VSS148 N27VSS149 N26VSS150 N6VSS151 M10VSS152 L35VSS153 L32VSS154 L29VSS155 L8VSS156 L5VSS157 L2VSS158 K34VSS159 K33VSS160 K30
VSS
JCPUH
IC,AUB_CFD_rPGA,R0P9 @
VSS
JCPUH
IC,AUB_CFD_rPGA,R0P9 @
T5PAD T5PAD
T7PAD T7PAD
1 2R743.01K_0402_1% @ R743.01K_0402_1% @
T4PAD T4PAD
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D3
DDR_A_DM1
DDR_A_D18
DDR_A_DM3
DDR_A_D27
DDR_A_MA3
DDRA_CLK0#
DDR_A_D41
DDR_A_D30
DDR_A_MA7
DDR_A_RAS#
DDR_A_D1DDR_A_D5
DDR_A_DQS0
DDR_A_D12
DDR_A_D24
DDR_A_DM7
DDR_A_DQS3
DDR_A_D62
DDR_A_BS2
DDR_A_D43
DDR_A_DQS6
DDR_A_D46
DDR_A_BS0
DDR_A_MA13
DDR_A_D40
DDR_A_D51
DDR_A_D59
DDR_A_D22
DDR_A_D28
DDR_A_BS1
DDR_A_D37
DDR_A_D45
DDR_A_D53
DDR_A_D26
DDR_A_MA5
DDR_A_CAS#
DDR_A_D35
DDR_A_DM2
DDR_A_MA15
DDR_A_MA6
DDR_A_MA2
DDR_A_D47
DDR_A_D52
DDR_A_DM5
DDRA_CLK1#
DDR_A_DQS#5
DDR_A_DM6
DDR_A_D25
DDR_A_D49
DDR_A_D56DDR_A_D57
DDR_A_DQS1
DDR_A_D20
DDR_A_MA8
DDR_A_D34
DDR_A_MA4
DDRA_ODT0
DDR_A_D60
DDR_A_D32
DDR_A_DQS4
DDR_A_D29
DDR_A_MA14
DDRA_CLK1
DDRA_SCS0#
DDR_A_D38
DDR_A_D61
PM_SMBDATA
DDR_A_D0
DDR_A_D19
DDR_A_MA10
DDR_A_D58
DDR_A_D21
DDR_A_D31
DDR_A_MA1
DDR_A_WE#
DDR_A_D23
DDR_A_D36
DDR_A_D54
PM_SMBCLK
DDR_A_D8DDR_A_D13
DDR_A_D48
DDR_A_D55
DDR_A_DQS#1
DDR_A_D11
DDR_A_D16
DDRA_SCS1#
DDR_A_D50
DDR_A_DM0
DDR_A_D14
DDR_A_D17
DDR_A_DQS2
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS#3
DDR_A_MA0
DDRA_ODT1
DDR_A_D39
DDR_A_DQS7
DDR_A_D7
DDR_A_D15
DDR_A_DQS#6
DDR_A_D44
DDR_A_DQS5
DDR_A_D63
PM_EXTTS#
DDR_A_D9
DDR_A_D4
DDRA_CKE0
DDR_A_MA12
DDR_A_D42
DDR_A_D2
DDR_A_D10
DDR_A_DQS#0
DDR_A_D6
DDR_A_DQS#2
DDR_A_MA9
DDRA_CKE1
DDR_A_MA11
DDR_A_DM4
DDR_A_DQS#7
DDRA_CLK0
SM_DRAMRST#
RST_GATE
+DDR_VREF_CA_DIMMA
DDRA_CKE1 DDRA_CKE0
DDR_A_RAS#
DDRA_ODT1
DDR_A_BS0
DDRA_CLK0#
DDR_A_WE#
DDR_A_BS2
PM_SMBCLK
DDRA_ODT0
DDR_A_BS1
DDRA_SCS0# DDR_A_CAS#
DDRA_CLK1
DDRA_SCS1#
PM_SMBDATA
SM_DRAMRST#
PM_EXTTS#
DDRA_CLK1# DDRA_CLK0
DDR_A_DQS#[0..7]
DDR_A_DQS[0..7]
DDR_A_D[0..63]
DDR_A_DM[0..7] DDR_A_MA[0..15]
RST_GATE
+1.5V
+V_DDR3_DIMM_REF
+3VS
+0.75VS
+1.5V
+VREF_DQA
+0.75VS
+1.5V+1.5V +0.75VS
+1.5V
+VREF_DQA
+VREF_DQB
+VREF_DQA_M3
+VREF_DQB_M3
+V_DDR3_DIMM_REF
+1.5V
+VREF_DQA
+VREF_DQB
+1.5V
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0DDRIII-SODIMM0
Custom
11 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0DDRIII-SODIMM0
Custom
11 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NWQAA LA-6062P M/B 2.0DDRIII-SODIMM0
Custom
11 59Wednesday, March 24, 2010
200910/9 2010/01/23Compal Electronics, Inc.
Reverse TypeDDR3 SO-DIMM A
Close to JDDRL.1
close to JDDRL.126
Layout Note:Place near JDDRL
Layout Note:Place near JDDRL1.203 and 204
Layout Note: Place these 4 Caps nearCommand and Control signals of DIMMA
M3@: Clarksfield
For S3 CPU Power Saving
M1@: Arrandale
For Clarksfield S3 CPU Power Saving
Change C218 to OSCON at DVT
1
2
R122100K_0402_5%
PSM3@R122
100K_0402_5%
PSM3@
VREF_DQ1VSS3DQ05DQ17VSS9DM011VSS13DQ215DQ317VSS19DQ821DQ923VSS25DQS1#27DQS129VSS31DQ1033DQ1135VSS37DQ1639
VSS 2DQ4 4DQ5 6VSS 8
DQS0# 10DQS0 12
VSS 14DQ6 16DQ7 18VSS 20
DQ12 22DQ13 24
VSS 26DM1 28
RESET# 30VSS 32
DQ14 34DQ15 36
VSS 38DQ20 40
DQ1741VSS43DQS2#45DQS247VSS49DQ1851DQ1953VSS55DQ2457DQ2559VSS61DM363VSS65DQ2667DQ2769VSS71
CKE073VDD75NC77BA279VDD81A12/BC#83A985VDD87A889A591VDD93A395A197VDD99CK0101CK0#103VDD105A10/AP107BA0109VDD111WE#113CAS#115VDD117A13119S1#121VDD123TEST125VSS127DQ32129DQ33131VSS133DQS4#135DQS4137VSS139DQ34141DQ35143VSS145DQ40147DQ41149VSS151DM5153VSS155DQ42157DQ43159VSS161DQ48163DQ49165VSS167DQS6#169DQS6171VSS173DQ50175DQ51177VSS179DQ56181DQ57183VSS185DM7187VSS189DQ58191DQ59193VSS195SA0197VDDSPD199
DQ21 42VSS 44DM2 46VSS 48
DQ22 50DQ23 52
VSS 54DQ28 56DQ29 58
VSS 60DQS3# 62DQS3 64
VSS 66DQ30 68DQ31 70
VSS 72
CKE1 74VDD 76A15 78A14 80
VDD 82A11 84A7 86
VDD 88A6 90A4 92
VDD 94A2 96A0 98
VDD 100CK1 102
CK1# 104VDD 106BA1 108
RAS# 110VDD 112S0# 114
ODT0 116VDD 118
ODT1 120NC 122
VDD 124VREF_CA 126
VSS 128DQ36 130DQ37 132
VSS 134DM4 136VSS 138
DQ38 140DQ39 142
VSS 144DQ44 146DQ45 148
VSS 150DQS5# 152DQS5 154
VSS 156DQ46 158DQ47 160
VSS 162DQ52 164DQ53 166
VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186DQS7 188
VSS 190DQ62 192DQ63 194
VSS 196EVENT# 198
SDA 200SA1201VTT203
GND1205
SCL 202VTT 204
BOSS1 206GND2207 BOSS2 208
JDDRL
FOX_AS0A626-U2SN-7F_204P@
JDDRL
FOX_AS0A626-U2SN-7F_204P@
1 2C171 10U_0805_6.3V6MC171 10U_0805_6.3V6M
12R920_0402_5%
M1@
R920_0402_5%
M1@1
2C1
5
6
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
C
1
5
6
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
12C172 1U_0402_6.3V4ZC172 1U_0402_6.3V4Z
1
2
R1161K_0402_1%PSM3@
R1161K_0402_1%PSM3@
1 2C168 10U_0805_6.3V6MC168 10U_0805_6.3V6M
12C175 1U_0402_6.3V4ZC175 1U_0402_6.3V4Z
1
2C1
6
2
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
C
1
6
2
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
12C169 1U_0402_6.3V4ZC169 1U_0402_6.3V4Z
2
13
G
DS
Q39BSS138_NL_SOT23-3
PSM3@
G
DS
Q39BSS138_NL_SOT23-3
PSM3@
1
2C1
6
1
2
.
2
U
_
0
6
0
3
_
6
.
3
V
4
Z
C
1
6
1
2
.
2
U
_
0
6
0
3
_
6
.
3
V
4
Z
1
2
R1141K_0402_1%PSM3@
R1141K_0402_1%PSM3@
12C177 1U_0402_6.3V4ZC177 1U_0402_6.3V4Z
1
2
R121100K_0402_5%
PSM3@R121
100K_0402_5%
PSM3@
1 2C167 0.1U_0402_16V4ZC167 0.1U_0402_16V4Z
1
2C1
5
7
2
.
2
U
_
0
6
0
3
_
6
.
3
V
4
Z
C
1
5
7
2
.
2
U
_
0
6
0
3
_
6
.
3
V
4
Z
1 2C173 0.1U_0402_16V4ZC173 0.1U_0402_16V4Z
12R95 0_0402_5%
M3@
R95 0_0402_5%
M3@
12R94 0_0402_5%
M3@
R94 0_0402_5%
M3@
1
2
C182
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
C182
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
1
2
R1151K_0402_1%PSM3@
R1151K_0402_1%PSM3@
1
2
C181
2
.
2
U
_
0
6
0
3
_
6
.
3
V
4
Z
C181
2
.
2
U
_
0
6
0
3
_
6
.
3
V
4
Z
1 2C164 0.1U_0402_16V4ZC164 0.1U_0402_16V4Z1 2C166 10U_0805_6.3V6MC166 10U_0805_6.3V6M
12R930_0402_5%
M1@
R930_0402_5%
M1@
1 2+C218 390U_2.5V_M_R10+C218 390U_2.5V_M_R10
1 2C178 10U_0805_6.3V6MC178 10U_0805_6.3V6M
1 2R9010K_0402_5%R9010K_0402_5%
1
2
R
9
1
1
0
K
_
0
4
0
2
_
5
%
R
9
1
1
0
K
_
0
4
0
2
_
5
%
1
2
R801K_0402_1%PS@
R801K_0402_1%PS@
1 2C165 10U_0805_6.3V6MC165 10U_0805_6.3V6M
1 2R89
0_0402_5%
R89
0_0402_5%
1 2C176 10U_0805_6.3V6MC176 10U_0805_6.3V6M
1
2
R791K_0402_1%
R791K_0402_1%
2
13
G
DS
Q40BSS138_NL_SOT23-3
PSM3@
G
DS
Q40BSS138_NL_SOT23-3
PSM3@
1
2
R1111K_0402_1%PSM3@
R1111K_0402_1%PSM3@
1
2
R811K_0402_1%
R811K_0402_1%
1 2C174 10U_0805_6.3V6MC174 10U_0805_6.3V6M
1 2C170 0.1U_0402_16V4ZC170 0.1U_0402_16V4Z
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDR_B_D25
DDR_B_D26
DDR_B_D32
DDR_B_D55
DDR_B_D8
DDR_B_MA12
DDR_B_D43
DDR_B_DQS#6
DDR_B_BS1
PM_SMBCLK
DDR_B_D1DDR_B_DQS#0
DDR_B_D15
DDR_B_D48
DDR_B_DM7
DDR_B_D30
DDR_B_D38
DDR_B_D52DDR_B_D53
DDR_B_D20DDR_B_D17
DDR_B_BS2
DDR_B_D50DDR_B_D51
DDR_B_D23
DDR_B_MA6
DDRB_ODT0
DDR_B_D47
DDR_B_D9
DDR_B_D18
DDR_B_MA10
DDR_B_DQS#3
DDR_B_MA15
DDR_B_D46
DDRB_ODT1
DDR_B_D16
DDR_B_DQS#4
DDR_B_D35
DDR_B_D56
DDR_B_D29
DDR_B_MA11
DDR_B_MA4
DDR_B_D0
DDR_B_D13
DDR_B_D41
DDR_B_D21
DDRB_CKE1
DDR_B_MA7
DDR_B_D36
DDR_B_DM4
DDR_B_D54
DDR_B_D63
DDR_B_DQS#1SM_DRAMRST#
DDR_B_D19
DDR_B_D24
DDR_B_MA8
DDR_B_MA3
DDR_B_CAS#
DDR_B_D57
DDR_B_DQS3
DDR_B_MA14
DDRB_SCS0#
DDR_B_DQS#7
PM_EXTTS#
DDR_B_BS0
DDR_B_D44DDR_B_D45
DDR_B_DM0
DDR_B_D2
DDRB_CKE0
DDR_B_MA9
DDR_B_MA13
DDR_B_D49
DDR_B_D61
DDR_B_D11
DDR_B_DQS0
DDR_B_MA1
DDRB_CLK0#
DDRB_SCS1#
DDR_B_D33
DDR_B_D31
DDR_B_MA2
DDR_B_DQS5
DDR_B_DM6
DDR_B_DQS7
DDR_B_D3
DDR_B_D4DDR_B_D5
DDR_B_D6
DDR_B_MA5
DDR_B_D34
DDR_B_DM5
DDR_B_D58
DDR_B_D28
DDR_B_MA0
DDRB_CLK1#
DDR_B_D62
DDR_B_D42
DDR_B_DQS6
DDR_B_D39
DDR_B_DQS#5
DDR_B_D60
DDR_B_DQS1
DDR_B_D10
DDR_B_D12
DDR_B_D40
DDR_B_DM2
DDR_B_D22
DDR_B_D7
DDR_B_DM1
DDR_B_DQS#2DDR_B_DQS2
DDR_B_DM3
DDRB_CLK0
DDR_B_DQS4
DDR_B_RAS#
PM_SMBDATA
DDR_B_D14
DDR_B_D27
DDR_B_D59
DDRB_CLK1
DDR_B_D37
DDR_B_WE#
+DDR_VREF_CA_DIMMB
DDRB_CLK1#
DDR_B_CAS#
PM_SMBDATA
DDR_B_RAS# DDR_B_BS0
DDRB_ODT1
DDRB_CLK0#
DDRB_CKE1
DDR_B_BS1
DDR_B_BS2
DDRB_CLK0
DDRB_SCS1#
PM_EXTTS#
DDRB_SCS0#
DDRB_CLK1
DDRB_ODT0
DDRB_CKE0
PM_SMBCLK
SM_DRAMRST#
DDR_B_WE#
DDR_B_DQS#[0..7]
DDR_B_DQS[0..7] DDR_B_D[0..63]
DDR_B_MA[0..15] DDR_B_DM[0..7]
+0.75VS
+V_DDR3_DIMM_REF
+1.5V
+3VS
+1.5V
+VREF_DQB
+0.75VS
+1.5V+0.75VS+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET O