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Designing with SmartFusion
Wendy Lockhart Sr. Manager, Design Solutions
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Agenda
SmartFusion Overview
SmartFusion Design Flows Embedded design FPGA design Analog design
MSS Configurator and Embedded Example
Ecosystem
SmartFusion Design Hardware
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What is SmartFusion?
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SmartFusion: Innovative, Intelligent, Integration
Proven FPGA fabric
Complete ARM® Cortex™-M3 MCU subsystem...& it’s ‘hard’
Programmable analog
In a flash-based device
In production now!
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Why SmartFusion is a Smart Decision
No-compromise integration Complete ARM Cortex-M3
subsystem running at 100 MHz Proven flash-based FPGA fabric Programmable high-voltage analog
Full customization Design the exact system you need Hardware and software co-design
IP protection FlashLock® technology with AES
encryption
Ease-of-use Optimized for hardware and
software co-design
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No-Compromise FPGA Fabric
Proven flash-based FPGA fabric 60,000 to 500,000 system gates 350 MHz system performance Embedded SRAMs and FIFOs Up to 128 FPGA I/Os
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No-Compromise Microcontroller Subsystem (MSS)
100 MHz 32-bit ARM Cortex-M3 processor Bus matrix with up to 16 Gbps throughput 10/100 Ethernet MAC SPI, I2C, UART, 32-bit Timers Up to 512 KB flash and 64 KB of SRAM External memory controller 8-channel DMA controller 32 GPIOs; Extendable via the FPGA Fabric Up to 41 MSS I/Os
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Programmable Analog
Analog compute engine (ACE) offloads CPU from analog tasks
Voltage, current and temp monitors 12-bit (SAR) ADCs @ up to 600 Ksps Sigma-Delta DACs Up to ten 50 ns high-speed comparators Up to 32 analog inputs and 3 outputs
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Innovative Intelligent Integration
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SmartFusion: New Level of Design
SmartFusion is the combination of FPGA, hard ARM Cortex-M3 and Programmable Analog
Therefore we address three types of design FPGA Design Embedded Design Analog Design
The designers may be three individuals or more likely two Have to address expectations of each type Have to simplify analog usage for any user Have to provide full capabilities of each traditional design flow
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SmartFusion Design Flow
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Embedded Design - Design Entry
C/C++, Drivers, Hard Peripherals
Providing source code, drivers and examples speed time to market
Partners for Middleware and OS Support
Configure device with MSS configurator
Automatically generate firmware drivers and sample code
Design Entry
Build Options
Build
Simulation
Download
Debug
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Embedded Design – Convert to Target Device
Compiler, Builder, Linker
The quality of the compiler affects performance of the design and size of code space required
SoftConsole includes GNU GCC
Keil MDK includes RealView C/C++
IAR Workbench includes IAR ARM Compiler
Design Entry
Build Options
Build
Simulation
Download
Debug
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Embedded Design - Verification and Debug
Debugger, SW Breakpoints,
A large amount of time is spent in debug iterations, so ease of use is critical
SoftConsole includes GNU GDB debug
Keil includes μVision Debugger
IAR includes C-SPY Debugger
Design Entry
Build Options
Build
Simulation
Download
Debug
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FPGA Design - Design Entry
RTL, IP Cores, Soft Peripherals Graphical design entry helps
integrate IP and RTL design blocks for ease of use
Select IP cores from catalog SmartDesign auto connects
recognized ports
Design Entry
Synthesis
Layout
Verification
Programming
Debug
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FPGA Design - Convert to Target Device
Synthesis, Place and Route
Using device specific features improves design efficiency and performance
Synplicity Synthesis from Synopsys automatically instantiates standard features
Timing Driven Layout optimizes for performance
Power Driven Layout optimizes for power
Design Entry
Synthesis
Layout
Verification
Programming
Debug
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FPGA Design - Verification and Debug
Simulation, Testbench, Probe points Verifying designs early in the flow
helps reduce cycle time Use functional and post layout
Modelsim simulation from Mentor Graphics
Perform timing analysis for clock frequencies
Reduce power consumption with power analysis and power driven layout
Design Entry
Synthesis
Layout
Verification
Programming
Debug
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Simplifying Analog Design
Configuring the Analog Compute Engine Voltage Monitor Current Monitor Temperature Monitor Sample Sequence
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SmartFusion Design Flow
FPGA Design Use Actel traditional design
tools evolved over many years and users
Embedded Design Use Industry standard
Embedded design tools and IP
Analog Design Develop graphical analog
configurators that are intuitive but provide full design flexibility
MSS Configurator and Embedded Design Flow
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MSS Configurator Usage
Provides a common method to configure MSS Allows sharing of MSS configuration between designers Allows Embedded designer to work without using FPGA
design flow
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Relating the Device to the Configurator
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MSS Configurator
Configure the MSS peripherals and I/Os
Create or import hardware configuration
Automatically generate drivers for peripherals
Configure programmable analog components
Enables connection of FPGA fabric designs and IP to MSS
MSS configurator enables co-design between multiple users
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New Embedded Design Flow
Take the standard Embedded Design Flow
Add the ability to configure your peripherals
Auto generate memory map
Auto generate sample code and drivers
Code Entry
Compiler
Assembler
Linker
Simulation
Load
Debug
MSS Configurator
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MSS Configurator
Launch from your Embedded Software IDE
So far supports GNU (SoftConsole), Keil and IAR Can be setup in each one as External tool
Launch from software IDE or standalone
Generate drivers for selected software IDE
Generates sample code projects for selected software IDE
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Starting From Software IDE - SoftConsole
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Invoking MSS Configurator
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Replicates Device Block Diagram
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MSS Clock Configurator
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Analog Configuration
Configuring the analog Compute Engine Voltage Monitor Current Monitor Temperature Monitor
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SmartFusion I/Os: Very Flexible
Analog
MSS
FPGA
3 Types of I/Os Some I/Os are MUXed
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GPIO Configuration Dialog
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Re-use I/O from Unused Peripherals
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Control MSS I/O Options Directly
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Generate Drivers and Sample Code
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Program the Configuration to the Device
Many device configurations do not require FPGA flow Only GPIO extension through the FPGA fabric
The MSS Configurator also creates the System Boot
Continue with Embedded design after device configuration
Standard program and debug performed Through FlashPro for SoftConsole Through J-Link or U-Link interfaces for Keil and IAR
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Embedded Design Complete
Once you have your device configured You can work directly with the Cortex-M3
But we have ignored the FPGA What if I now want to add 2 more UARTs to my system And a high performance timer
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FPGA Design Made Easy
From the FPGA design side The Microcontroller subsystem is treated as block IP And APB3 bus can be used to connect the MSS to the FPGA Fabric Add peripherals such as UART, GPIO and Timers SmartDesign auto connects recognized signals
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Successful Integration
Combining Hard ARM Cortex-M3 Processor
Full set of peripherals
On chip NVM and SRAM
With full feature FPGA
And Programmable Analog
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Leads to Easy to Use Design Flow
Start Embedded design before FPGA completion
Clear definition of MSS Boundaries and memory map
Ability to use industry standard compile and debug
Ability to port RTOS and middleware for Cortex-M3
Standard Program and Debug interfaces
With the ability to add peripherals when need to the FPGA
SmartFusion Software Stack and Ecosystem
www.actel.com/products/smartfusion/ecosystem.aspx
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SmartFusion Software Stack Application Layer
Middleware
OS/RTOS
Drivers
Hardware Abstraction Layer
Hardware Platform Actel SmartFusion
Actel CMSIS-based HAL
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µC/OS-III, RTX, Unison, FreeRTOS
TCP/IP, HTTP, SMTP, DHCP, LCD
Customer Secret Sauce
SmartFusion stack accelerates application development
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Ecosystem Partners: Still Growing
EDACompile/Debug
RTOS
Actel HAL, drivers and IDE
ARM Cortex-M3 processor Leverage ARM ecosystem
GNU, Keil and IAR Compilers and debuggers
Micrium, RoweBots OS and middleware
Mentor and Synopsys Synthesis, simulation and
debug
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ARM Ecosystem
Linked through our website Instruction Set documentation Design Examples Design recommendations
ARM Cortex-M3 Training resources Both ARM or third party available
IP for existing Cortex-M3 implementations Easy to port to our architecture Dependent on peripherals needed
CMSIS Cortex Microcontroller Software Interface Standard
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Actel SoftConsole = GNU / GCC
Some customers will want to use open source This is almost a religion Don’t want to be controlled with evil corporate software
Although we supply SoftConsole it is open source Eclipse based IDE
We have GNU GCC Compiler GDB Debugger
Download from Actel website Free license included in Libero
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Keil
MDK-ARM Microcontroller Development Kit
Give customers access to the full ARM C/C++ Compiler quality Includes RTX RTOS Kernel µVision4 user friendly debug Simulation without hardware Includes Examples and Templates
Availability FREE Evaluation Version from Keil Full version for sale from Keil
MDK-ARM, MDK-ARM-B Already supplied by distribution in many areas FAE licenses available free
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IAR
IAR Embedded Workbench IDE with project management tools and editor Highly optimizing C and C++ compiler for ARM C-SPY® debugger with ARM simulator, JTAG support and support
for RTOS-aware debugging on hardware
Availability FREE Evaluation Version from IAR Full version for sale from IAR Already supplied by distribution in many areas FAE licenses available free
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Software IDE Comparison
Refer to SmartFusion PIB or Product Catalog
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Micrium - µC/OS-III RTOS
Leading RTOS for ARM based products in our markets
Supporting SmartFusion with the following µC/OS-II, The Real-Time Kernel with source code µC/OS-III, The Real-Time Kernel with object code *NEW TCP/IP stack object code µC/Probe for debug
Can be used in development License required to use in a product Time saved in development more than pays for the license
Highly Recommend for information – mini videos RTOS - Understanding why your customer should use an RTOS µC/Probe – using µC/Probe to save time in debug
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RoweBots – Unison OS
Ultra Tiny Linux OS for SmartFusion Modular Memory Footprint easily fits on chip Memory Fully POSIX and LINUX compliant
Free - Unison V4 with non-Commercial TCP/IP Licensed – Unison V5 with multiple Add-on modules
FAT file system, advanced networking, wireless, advanced TCP, graphics, bus support
Download Eval from Actel RoweBots
Partner Page
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Keil – RTX RTOS
Royalty-free, deterministic RTOS with source code Specifically designed for ARM and Cortex-M CPUs
Availability of RTX for SmartFusion RTX Kernel included as part of MDK-ARM (µVision4) RTX Source code available in RL-ARM bundle
Download Eval Version from Keil Website
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FreeRTOS
FreeRTOS™ mini Real Time Kernel FreeRTOS is a scale-able real time kernel designed specifically for
small embedded systems FreeRTOS version is 6.0.1 Portable, open source, royalty free Free to download and free to deploy RTOS under GPL
Can be used in commercial applications without any requirement to expose your proprietary source code
Delivered through Actel website Webserver Demo design with source files for both Eval and Dev Kits
SmartFusion Webserver Demo Using uIP and FreeRTOS http://www.actel.com/documents/SmartFusion_Webserver_uIPRTOS_UG.PDF
SmartFusion Design Hardware Selection
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SmartFusion Evaluation Kit
$99 - Low price compact evaluation kit for SmartFusion Pre-programmed demo design Source files and tutorials to accelerate learning curve Demonstrate SmartFusion features as SoC
FPGA, ARM Cortex-M3, Peripherals and Analog with on-chip NVM
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SmartFusion Development Kit
$999 – Full feature development kit
Use when additional interfaces and peripherals are needed
Use when more code space is required.
Use for developing complex systems with full RTOS
Design Examples and tutorials to accelerate learning curve
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Comparing Eval. Kit vs. Dev. Kit
Connections Eval. Kit Dev. Kit USB for power and HyperTerminal
Program and debug (Actel) Built into board LCPSRVI header for Keil and IAR debug
10/100 Ethernet interface
Mixed-signal header
Digital expansion header (A2F500) -
Memory expansion header (IGLOO® PLUS) -
RS485 DB9 connector -
2 x CAN DB9 connectors (to FPGA I/O) -
2 x RJ45 EtherCAT (to SPI) -
I2C headers (jumpers select target) -
SPI headers (jumpers select target) -
DirectC header -
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Comparing Evaluation Kit vs. Development Kit
Digital Resources Eval . Kit Dev. Kit 8 MB SPI flash memory
Off-chip SRAM 3.3 V – 2Mx16 SRAM1.8 V – 8Mx16 PSRAM
–
Off-chip flash 3.3 V – 4Mx16 NOR flash1.8 V – 8Mx16 NOR flash
–
Device reset switch
Device PU-N switch
User switches for designs 2 5User LEDs for designs 8 4OLED
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Evaluation Kit vs. Development Kit
Analog Resources Eval. Kit Dev. Kit POT for current monitor
Connected to AT0 and AC0
Voltage monitor supply rails 10 V, 3.3 V, 1.5 V
Temperature monitor connected to AT1
SDD DACOUT to ADC0in ADC to voltage input
Additional Analog resources on the Development Kit Review Dev Kit User’s Guide for full details
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Additional Resources
Online and live trainings Live training Webinars Customer 2 day Training Courses
Design Flow Tutorials Hello World design flow tutorial for SoftConsole, Keil and IAR FPGA flow introduction tutorial for FPGA only design Analog Front End Tutorial FPGA Fabric tutorial – connecting to FPGA to Cortex-M3
Design Examples – Short description and source files Examples for each peripheral Examples for grouped functions
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Summary
SmartFusion Design integrates many aspects FPGA, Embedded, Analog, IP, Solutions…
Ecosystem brings together experts to help you
Actel & partners offer trainings and webinars for customers
Visit web pages often for updates
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