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Wired CommunicationJustin Selig
ECE 3400
10-13-2017
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Overview
• Serial vs Parallel Communication
• Serial: UART, SPI, I²C, …
• Best approaches for your robot
• Answer any Q&A
• Parallel use cases
Justin Selig, 2017
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SerialParallel
Multiple wires
transmit data
simultaneously
Single wire or differential pair for
transmitting data
Justin Selig, 2017
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• Simpler design
• Slower data transmission rate?
• Theoretically can transmit data at much higher rates proportional to number of parallel wires
SerialParallel
But…
• Suffers from Inter-symbol Interference (ISI) and noise.
• Mutual capacitance and inductance between wires
• Potential for increased noise: need to keep wires short
But…
• Has greater bandwidth
• Less noise in channel
• Bumping up power by using differential pair doubles SNR
• Twisted pairs can span large distances
Justin Selig, 2017
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Serial Communication
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Universal Asynchronous Receiver-Transmitter (UART)
USB TTL Serial Cable
• Peer-to-peer
• Asynchronous: need specified baud-rate
• 7 or 8-bits at a time (optional parity bit)Justin Selig, 2017
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Transmitter
Receiver
Justin Selig, 2017
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Let’s Take it Apart!
Justin Selig, 2017
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• What’s wrong with UART?
• Asynchronous: must agree ahead of time on bit rate – otherwise garbage data is seen
• Complex hardware – need to deal with data synchronization and extra start, stop, parity bits
• Peer-to-peer: Cannot extend to multiple devices
• What else can we do?
Serial Peripheral Interface (SPI)
Justin Selig, 2017
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Serial Peripheral Interface (SPI)
• 1 Master, ≥ 1 Slaves
• 4 wires for communication + power, gnd:• Clock: (SCK, CLK)
• Slave Select: (SS, CS)
• Master-out-slave-in (MOSI)
• Master-in-slave-out (MISO)
• Synchronous
• Flexible data packet format
Justin Selig, 2017
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Justin Selig, 2017
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Serial Peripheral Interface (SPI)
3. Daisy Chain
1. Independent Slave
2. Multiple Select LinesJustin Selig, 2017
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Let’s Take it Apart!
Justin Selig, 2017
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• What’s wrong with SPI?
• Requires more pins than UART• Multiple slaves = master needs multiple SSi for slaves 1, 2, 3, …, i
• What else can we do?
Serial Peripheral Interface (SPI)
• Advantages:
• High throughput: 10-20 Mb/s
• Only allows one master per bus
• Supports arbitrary number of slaves
• Easi(er) to implement: simple shift register
Justin Selig, 2017
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Inter-Integrated Circuit (I²C)
• Two signal lines:• Clock: SCL
• Data: SDA
• 1 master at any time, ≥ 1 slaves
• Multi-master, multi-slave bus
• Master generates clock signal
• 2 frames:• Address frame (7-bits)
• Data frame (8-bits)
Justin Selig, 2017
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Justin Selig, 2017
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SDA
SCL
Master S1 S2
0x01 0x02 0x03
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Inter-Integrated Circuit (I²C)
1) Master signals START by lowering SDA while SCL high
2) Bus considered busy until STOP
START STOP
Justin Selig, 2017
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SDA
SCL
Master S1 S2
0x01 0x02 0x03
Master pulls SDA low
Master starts clock SCL
Justin Selig, 2017
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Master sends 7-bit
address over bus
indicating “write”
Master pulls SDA low
Master starts clock
SCL
Eg. Master wants to send 0x02 its credit card number
Justin Selig, 2017
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SDA
SCL
Master S1 S2
0x01 0x02 0x03
Master sends 7-bit address over bus
Master sends “write” bit
0000010
Justin Selig, 2017
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SDA
SCL
Master S1 S2
0x01 0x02 0x03
Slave pulls SDA low to acknowledge it
is being talked to (open drain)
0000010
Justin Selig, 2017
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Master sends 7-bit
address over bus
indicating “write”
Master pulls SDA low
Master starts clock
SCL
Eg. Master wants to send 0x02 its credit card number
Slave pulls SDA
low to signal
“ACK”
Slave may force
“clock stretch”
to force pause
Master sends 8-bit
data over bus
Slave
signals
“ACK”
Master
pulls
SDA high
Justin Selig, 2017
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Some other interesting ones…
• CAN
• USART
• SATA
• DVI
• HDMI
• DisplayPort
• Ethernet
• RS-232
• USB
• Firewire
• MIDI
• Optical Fiber
Justin Selig, 2017
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Parallel Communication
Justin Selig, 2017
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Some Parallel Protocols…
• PCI, PCIe, ATA, SCSI, Front Side Bus, IEEE-1284
• Less common nowadays due to decreasing cost and better performance of ICs which use serial protocols
• No longer considered better in terms of:• Speed
• Cable Length
• Hardware complexity
• But… easy to implement on FPGA
Justin Selig, 2017
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FPGAs are made to be Parallelizable
2-bits for message type/header
(eg. moved to new location; found treasure at square, etc.)
For example:
3-bits for message body
(eg. moved to square 4,5; square 7,7 is type wall, etc.)
1-bit for started, stopped mapping…
. and so on …
.
.
Justin Selig, 2017
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FPGAs are made to be Parallelizable
wire inputs [n:0];
assign inputs = GPIO_0_D[m:0];
…
always @ (*) begin
if (inputs{1:0} == 2’d3) begin
grid_array[x][y] = inputs{5:2};
end
…
reg [2:0] grid_array [n-1:0][n-1:0];
wire [2:0] square_color;
assign square_color = GPIO_0_D[k:k-2];
…
always @ (*) begin
if (square_color == 3’d0) begin
grid_array[x][y] = square_color;
end
…Plenty of ways
to implement
(pseudocode):
msg header
msg body
Drawback: Consumes a lot of pins
Arduino sends
color directly.
Reserved GPIO
pins specifically
for color.
Arduino sends
msg header {1:0}
+ body {5:2}
indicating color
change should
take place at
square x,y.
Justin Selig, 2017
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Alternatively
• Implement one of the serial communication protocols• http://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf
• https://www.nxp.com/docs/en/user-guide/UM10204.pdf
• http://www.bosch-semiconductors.de/media/ubk_semiconductors/pdf_1/canliteratur/can2spec.pdf
• Come up with your own!
Justin Selig, 2017
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Recap
• Most wired communication protocols take advantage of serial bitstreams or packets.
• Asynchronous == Un-clocked
• Parallel communication for your robot is a natural fit for the FPGA but will consume plenty of GPIO pins.
• Taking things apart is fun.
Justin Selig, 2017