MNL_DQP-1500-O1 Rev B

DQP-1500DRQ3B Compatible

Option Modulefor NuVAX and NuPDPq

Owner’s Manual

DQP-1500-OMRevision B

Owner's Manual for the

DQP-1500

DRQ3B Compatible Option Module for NuVAX and NuPDPq

DQP-1500-OMRevision B, April 10, 2013

MicroVAX, PDP-11, Qbus and VMS are trademarks of Hewlett Packard Corporation.

The material in this manual is for informational purposes only and is subject to changewithout notice.

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Contents

1 Installation ..................................................................................................... 11. Set the switches on the DQP-1500 controller ............................................................... 2

A. Base Address ....................................................................................................... 2B. Vector Address ................................................................................................... 3C. Extended Block Mode ......................................................................................... 5D. Interrupt Priority Level........................................................................................ 5

2. Install the Holdoff time jumper on the DQP-1500 ....................................................... 63. Open the system enclosure............................................................................................ 74. Install the DQP-1500 module. ...................................................................................... 85. Cable the DQP-1500 to the Bus Adapter ...................................................................... 96. Cable the DQP-1500 to the adapter panel................................................................... 107. Cable the CPX-1104 adapter to user equipment ......................................................... 128. Power up and verify the NuVAX system. .................................................................. 13

Run an individual MDM device test ...................................................................... 13Run the MDM System Exerciser............................................................................ 14

9. Power up and verify the NuPDPq system................................................................... 15

2 General Description .................................................................................... 17DRQ3B Interface Description............................................................................................. 17Port 0 Signals ...................................................................................................................... 18Port 1 Signals ...................................................................................................................... 19Specifications ...................................................................................................................... 20

Physical .................................................................................................................. 20Interface.................................................................................................................. 20Electrical................................................................................................................. 20PCI Local Bus ........................................................................................................ 20Performance............................................................................................................ 20Environmental ........................................................................................................ 20

Appendix A DRQ3B Interface Connector............................................................ 21Pin Assignments.................................................................................................................. 21

Contents

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TablesTable 1-1: Register Address Offsets ........................................................................................ 3Table 1-2: Vector Address Offsets .......................................................................................... 4Table 1-3: Interrupt Priority Level Switch Settings................................................................. 5Table 1-4: Holdoff Timer Jumper Settings .............................................................................. 6

IllustrationsFigure 1-1: DQP-1500 Module................................................................................................ 1Figure 1-2: Base Address Switch Setting ................................................................................ 2Figure 1-3: Vector Address Switch Setting ............................................................................. 4Figure 1-4: Inserting the Board into the PCI Slot .................................................................... 8Figure 1-5: Connecting the DQP-1500 and the Bus Adapter .................................................. 9Figure 1-6: CPX-1104 Adapter Panel.................................................................................... 10Figure 1-7: Cabling the Option Module to the Adapter Panel ............................................... 11Figure 1-8: Cabling the CPX-1104 Adapter Panel to User Equipment ................................. 12

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1 Installation

This chapter lists the steps involved in installing the DQP-1500 hardware.

The DQP-1500 module is shown in Figure 1-1. Refer to this figure as you follow the stepsoutlined below.

100-PinInterface

Connector

LED Indicators

P2

Bus Adapter Interface Connector

P3

P1

Connector for Additional Option Cards

Top Post

Bottom PostSwitch U3

Switch U8

Address

Vector

P5MaintenanceConnector

Status Indicators:Red indicates that there is a problem with the board.Green indicates Qbus activity.

Figure 1-1: DQP-1500 Module

Installation

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1. Set the switches on the DQP-1500 controller

Two switch-packs on the DQP-1500 allow you to set the base address, base interrupt vector,operating mode and interrupt priority level.

A. Base AddressThe DQP-1500's base address is set using switch-pack U8. The factory setting for the baseaddress is 177607408. If a system has more than one DQP-1500 or DRQ3B installed, thesecond base address is 177607608. Additional DQP-1500 modules are given addresses inincrements of 208.

NOTE

Like the DRQ3B, the DQP-1500 has a floating base address. This means thatif there are other devices with floating addresses of lower rank, the DQP-1500

base address may be higher than 177607408.

The base address is set by switches in switch U8. Setting a switch to Closed (On) sets alogical 1 in the address. Figure 1-1 shows the location of switch-pack U8 on the module.Figure 1-2 shows the use of each switch position and the correspondence between baseaddress bits and the switch settings.

The registers on the board are offset from the base address. Throughout this manual, whenan actual address is given for a register, the location is determined using the factoryconfiguration base address. If the module has a different base address, the actual addressesof all the other registers are different. The offsets for each register on the module are listedin Table 1-1.

Figure 1-2: Base Address Switch Setting

1 2 3 4 5 6 7 8 9 10

0 0 1 0

OPEN (OFF) = 0

Device Address (160740)

Generatedby Board

15 13 0

Sw itchpack U8

To set a sw itch posit ion open, pressdown on the side marked " Open"(depressed side shown in black).

CLOSED (ON) = 1

2 1141617

Match to One

1 1 1 1 1 0 0 1 1 1 0 0 0 0

12 11 10 9 8 7 6 5 4 3

1 6 0 7 4 0

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Register Octal Offset

DMA Data Window register Base address

DMA Address Window register Base address +2

Port Configuration register Base address +4

Port 0 Data register Base address +6

Port 1 Data register Base address +10

Transfer Count register Base address +12

Function registers (input andoutput)

Base address +14

Status register Base address +16

Table 1-1: Register Address Offsets

The DMA registers, which are accessed through the DMA Data Window register and theDMA Address Window register, have addresses independent of the base address.

B. Vector AddressWhen the DQP-1500 generates an interrupt, processing is diverted to an address defined bythe module's vector address. The DQP-1500 supports two separate vector addresses: one forthe FIFO related interrupts, and one for the DMA channel interrupts. A vector addressdefines the starting location of the interrupt service routine which handles the interrupt.

The factory configuration for the DQP-1500 vector base address is 3008. Additional DQP-1500's are given vector addresses in increments of 108. Thus, a second DQP-1500 installedin a system is assigned a vector address of 3108.

Note:

The DQP-1500 has a floating vector address. This means that if there areother devices with floating vector addresses of lower rank,

the DQP-1500 vector address may be higher than 3008.

Table 1-2 shows how the vector addresses are offset from the vector base address. Thefactory configurations shown are valid only for the first DQP-1500 installed in a system.Second DQP-1500's have vector addresses offset from a base address of 3208.

Installation

4

Register Octal Offset from VectorBase Address

Factory Configuration

FIFO 0 3008

DMA Channels +4 3048

Table 1-2: Vector Address Offsets

When an interrupt occurs, the DQP-1500 generates the vector according to which interruptoccurred. When a FIFO related interrupt occurs, the vector address generated is 3008. Whena DMA interrupt from either port occurs, the DQP-1500 generates a vector address of 3048.

Positions 1 through 7 of switch-pack U3 are used to set the vector base address of the DQP-1500. Setting a switch to Closed sets a logical 1 in the address. Figure 1-1 shows thelocation of switch-pack U3. Figure 1-3 shows the use of each switch position and thecorrespondence between the vector address bits and the switches in switch-pack U3.

Figure 1-3: Vector Address Switch Setting

1 2 3 4 5 6 7 8 9 10

0 0 0 0

OPEN (OFF) = 0

Standard Vector Address 300

Generatedby Board

15 13 0

Sw itchpack U3

To set a sw itch posit ion open, pressdown on the side marked " Open"(depressed side shown in black).

CLOSED (ON) = 1

2 1141617

Alw ays Zero

0 0 0 0 0 0 0 1 1 0 0 0 0 0

12 11 10 9 8 7 6 5 4 3

0 0 0 3 0 0

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C. Extended Block ModeThe extended block mode option increases data transfer rates by approximately 20% to 2.6megabytes/second. Extended mode may only be used in MicroVAX based systems, PDP-11based systems do not support extended block mode.

Set extended mode by setting position 8 of switch-pack U3 Closed (On), disable extendedblock mode by setting position 8 to the Open or Off. The factory setting is extended blockmode enabled.

D. Interrupt Priority LevelAll Qbus interrupts are assigned a priority level. The highest priority level is 7. Interruptswith a higher priority are serviced first by the CPU. The DQP-1500 can be assigned apriority level between 4 and 7. The factory configuration is for a priority level of 4.

The priority level is set using positions 9 and 10 of switch-pack U3. Table 1-3 shows howthe switches are set for each priority level.

Priority Level Switch Position 9 Switch Position 10

4 1 1

5 1 0

6 0 1

7 0 0

Note:

A one is selected by setting the switch in the Closed or On position.A 0 is selected by setting the switch in the Open or Off position.

Table 1-3: Interrupt Priority Level Switch Settings

Installation

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2. Install the Holdoff time jumper on the DQP-1500

A jumper on the DQP-1500 allows you to set the Holdoff time. Whenever the DQP-1500releases the bus, it waits a short period of time before it again requests control of the bus.This time period is call the holdoff time. The DQP-1500 can be set for one of two selectableholdoff times: 1 microsecond or 2.7 microseconds.

The holdoff time of 2.7 microseconds ensures that all other modules installed in a systemhave an opportunity to acquire the bus. However, the maximum throughput rates of theDQP-1500 cannot be achieved using this setting. The 1 microsecond holdoff time, whenused with the extended block mode, allows the maximum performance rates of the DQP-1500 to be obtained. However, when the DQP-1500 is set for 1 microsecond holdoff time,modules placed in the backplane further from the CPU than the DQP-1500 may havedifficulty acquiring the bus. The factory setting is for a holdoff time of 2.7 microseconds.

The three wirewrap posts at P3 on the board are used to select the holdoff time. Thesejumpers share a center post. To change the factory configured holdoff time, remove thejumper from between the center post and bottom post and install it between the center postand top post. The top post is near P3 on the silkscreen.

Figure 1-1 shows the location of the jumpers. Table 1-4 shows the jumper settings.

NoteThe holdoff times given are approximate and can

vary slightly from request to request.

Holdoff Jumper P31.0 microsecond Center and top posts

2.7 microseconds (Factory setting) Center and bottom posts

Table 1-4: Holdoff Timer Jumper Settings

Installation

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3. Open the system enclosure

To open the NuVAX or NuPDPq system enclosure:

A. If the system is running, shut down the system software as described in the systemmanual.

B. Remove power to the system unit.

C. Open the enclosure by removing two thumb screws and sliding the cover towards the rearand lifting. Replace the two thumb screws into the chassis rear panel.

D. Remove the PCI card retainer rail by first lifting the black release knob and then liftingthe rail up and out.

Note: Use the anti-static wrist strap supplied with your system unit toprevent damage to the equipment. Clip the free end of the strap tothe metal frame of the enclosure.

Installation

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4. Install the DQP-1500 module.

The DQP-1500 is installed in an option slot next to the bus adapter or other option module.

A. If the back of the expansion chassis or system unit has a metal cover plate over theopening of the slot you have selected, remove the anchor screw that holds the cover inplace then slide the cover out of the slot.

B. Position the DQP-1500 with the gold fingers on the edge of the module next to the PCIconnector of the selected slot. Gently rock the module into the PCI connector while youfit the metal bulkhead into the slot opening. Be sure that the connectors are firmly seated.

Note: If the enclosure contains RFI clips along the slot, take care wheninserting the module not to push the clips out of alignment.

C. Secure the DQP-1500 using the anchor screw that you removed in Step A. Retain thecover plate for future use.

Figure 1-4: Inserting the Board into the PCI Slot

D. Remove the anti-static wrist strap, replace the cover on the enclosure and secure.

You are now ready to connect the data cables.

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5. Cable the DQP-1500 to the Bus Adapter

Use the supplied CAB-5011-1 cable to connect the first DQP-1500 to the BQP-230x or BPQ-230x bus adapter as shown in Figure 1-5. Additional DQP-1500 controllers are added usingthe CAB-5011-1 as shown in the figure. Align the arrow on the connectors with the red lineon the cable.

Figure 1-5: Connecting the DQP-1500 and the Bus Adapter

NOTE:Use care when removing the 60-pin ribbon cable. Use the pull tab and pull the cable straight

out from the connector to avoid damage to the connector.

DQP-1500

DQP-1500

Bus Adapter

Installation

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6. Cable the DQP-1500 to the adapter panel

The CPX-1104 adapter panel is shown in Figure 1-6.

J1

J2

J4

J5

J3

11

1

DQP-1500Connector

50-Pin DRQ3BConnectorsNot used

Figure 1-6: CPX-1104 Adapter Panel

Use the supplied 8-foot cable to connect the DQP-1500 to the adapter panel. The adapterpanel is provided with screw slots for RETMA rack mount or wall mount. It has no-mar feetfor desktop or floor use.

Installation

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Adapter cable

Adapter Panel

OptionModule

Figure 1-7: Cabling the Option Module to the Adapter Panel

Installation

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7. Cable the CPX-1104 adapter to user equipment

J1 and J2 on the CPX-1104 adapter panel correspond to J1 and J2 on Digital's DRQ3B.Connect user cables to the adapter the same as you would connect to a DRQ3B. If you areunsure, refer to the connector pin assignments in Appendix B. Be sure to align the triangleson each connector with pin 1.

J3

J2J1

J1 J2

User equipmentwith DRQ3B interface

To NuVAX orNuPDPq System

Figure 1-8: Cabling the CPX-1104 Adapter Panel to User Equipment

Installation

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8. Power up and verify the NuVAX system.

This step describes how to verify installation of the DQP-1500 in a NuVAX system. TheDQP-1500 is supplied with a CAB-1105-3 loop-back cable to allow you to run Digital’sMDM diagnostics as described below. Install CAB-1105-3 between J1 and J2 on the CPX-1104 panel before running diagnostics. Figure 1-6 shows the location of J1 and J2 on thepanel.The following convention is used below:

user input In examples, user input is shown in bold type.

Run an individual MDM device test

Using the Webserver, stop the emulator, select the MDM configuration, and restart theemulator.

After about 20 seconds the MDM start-up banner appears and then prompts for the date andtime. It is not critical to set the date and time so just press the return key [cr].

Next it will ask for the mode of operation, type: 1 [cr] to select the ‘Menu Mode.’

At the ‘Main Menu’ type: 4 [cr] to enter the ‘Service Menu.’

At the ‘Service Menu’ type: 1 [cr] to enter the ‘Set test and message Menu.’

At the ‘Set test and message Menu’ type: 3 [cr] to enable ‘Stop testing on error.’Next type 0 [cr] to return to the ‘Service Menu.’

At the ‘Service Menu’ type: 3 [cr] to enable the ‘Device Menu.’After all device drivers are loaded enter a [cr] and a device list is displayed.

Review the list of devices to determine which you wish to test.Type the number associated with the device and a return to enter the device test menu.

Type: 2[cr] to run the device functional tests.Install a loop-back test cable, if requested, and type [cr] to continue.After all tests have run or an error occurs, type: 0[cr] to return to the test menu.

Type: 3[cr] to run the device exerciser test.Install a loop-back test cable, if requested, and type [cr] to continue.

Allow all devices to make 10 passes before stopping.This exerciser runs until a Ctrl C is typed or an error occurs.Type: [cr] to return to the test menu.

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Run the MDM System Exerciser

Using the Webserver, stop the emulator, select the MDM configuration, and restart theemulator.

After about 20 seconds the MDM start-up banner appears and then it prompts for the dateand time. It is not critical to set the date and time so just press the return key [cr].

Next it will ask for the mode of operation, type: 1 [cr] to select the ‘Menu Mode.’

At the ‘Main Menu’ type: 4 [cr] to enter the ‘Service Menu.’

At the ‘Service Menu’ type: 1 [cr] to enter the ‘Set test and message Menu.’

At the ‘Set test and message Menu’ type: 3 [cr] to enable ‘Stop testing on error.’Next type 0 [cr], to return to the ‘Service Menu’.

At the ‘Service Menu’ type: 3 [cr] to enable the ‘Device Menu.’

After all device drivers are loaded enter a [cr] and a device list is displayed.

Review the list of devices to determine which you do not wish to include in the testing.

It is best to disable the testing of all mass storage devices preventing the accidentaldestruction of important files.

Type the number of a device to disable and a return, then type: 1 [cr] to disable the testing.Next type 0 [cr], to return to the ‘Device Menu’.

When you have completed device disabling, type: 0 [cr] this will return you to the ‘ServiceMenu’.

At the ‘Service Menu’ type: 2 [cr] to start the system exerciser. The program will pause andwait for confirmation for any device that requires that a loop-back be installed. Type [cr] toconfirm the request or type a Ctrl C to stop the process and return to the ‘Service Menu’.After loop-back confirmation completes, each device will perform a function test and then alldevices will have their exercisers started and they will run concurrently until an error isencountered or testing is terminated by typing a Ctrl C.

Installation

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9. Power up and verify the NuPDPq system

This step describes how to verify installation in a PDPq system.

The following conventions are used in this manual:

output In examples, computer output is shown in this type.user input In examples, user input is shown in bold type.

A. Apply power to the computer system and wait for the self-test to complete.

B. The DQP-1500 is supplied with a CAB-1105-3 loop-back cable to allow you to runDigital’s XXDP diagnostics as described below. The diagnostic software is designated asDRQ3B Functional test CZDRQA0.

C. Loop-back cable CAB-1105-3 must be installed between J1 and J2 on the CPX-1104panel when running the module and system level diagnostics. The location of J1 and J2are shown in Figure 1-6.

D. To run the diagnostic, type:

R CZDRQA0<cr>

The system boots and displays an XXDP MONITOR NOTICE.

1. Enter: X <cr> to load the Extended Monitor.After the monitor loads, the system displays a “.” prompt.

2. Enter: R CZDRQA0 <cr>

The diagnostic begins and displays the following:

CZDRQA0 DRQ3B DIAG TEST

DRQ3B CABLE REQ’D

SWR = 000000 NEW =

3. Enter: 100000<cr>If no errors occur the program will start displaying END PASS # messages.

4. Allow a minimum of 10 error free passes.

5. Restart the system by pressing the restart button or cycling power.The system should once again present the user with the XXDP MONITOR NOTICE.

6. Enter: X<cr> to load the extended monitor.The “.” prompt is displayed.

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7. Halt the diagnostic by entering CTRL G.The diagnostic stops running and displays:

SWR = 100000 NEW =

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2 General Description

The DQP-1500 provides the functions of a legacy Digital DRQ3B interface in a PCIcontroller for the NuVAX. Like the DRQ3B, the DQP-1500 is a high performance 16-bitparallel interface designed for real time data collection or for high speed inter-processorcommunications. It provides PIO and DMA transfers between a Qbus system and externalequipment at transfer rates up to 1.6 Mbytes/sec of 16-bit words.

Data transfers are selectable as burst, block or extended block mode DMA. Interrupt prioritylevels are switch selectable and interrupt conditions are program selectable.

DRQ3B Interface DescriptionThere are two ports associated with the DRQ3B interface. Port 0 is used for input only andPort 1 is used for output only. Each port consists of a 50-pin connector provided on the cableadapter panel. Each port is 16-data bits wide and uses two control signals to synchronizedata transfer with the external device. Port 0 also includes an end-of-process input signal toallow the external device to abort data transfers. Other general input and output signals areprovided for general purpose use. The signals are listed on the following pages.

General Description

18

Port 0 SignalsSignal Name Signal Description___________________________________________________________________

IN00-15 Port 0 16-bit input data signals. High true.

P0 STROBE Port 0 Strobe input signal. Low true. STROBE is asserted low by theexternal device when the external device is asserting valid data. STROBE isasserted high by the external device after receiving signal ACK.

P0 ACK Port 0 Acknowledge output signal. Low true. The ACK signal is asserted lowby the DQP-1500 after the DQP-1500 has successfully read the data valueon input signals IN00-15. ACK is asserted high by the DQP-1500 afterSTROBE is asserted high and the DQP-1500 is ready to receive more data.

P0 EOP Port 0 END-OF-PROCESS input signal. Low true. When asserted low bythe external device during a data transfer, the data word on the input signallines is flagged as the last data word to transfer for the current DMA. TheEOP signal follows the same timing as the 16-bit input data.

P0 CLR Port 0 CLEAR input signal. Low true. When the CLR signal is asserted lowby the external device, Port 0 input FIFO is reset. This signal can be used bythe external device to ensure that the Port 0 input FIFO is empty following anabort or at the beginning of a data transfer.

EXT INT EXTERNAL INTERRUPT input signal. Low true. The EXT INT signal is forgeneral purpose interrupt use. There is only one EXT INT signal and itappears on both P0 and P1 connectors. When this signal is asserted low bythe external device, a Qbus interrupt is generated if enabled. The EXT INTaction can take place without affecting any DMA activity.

INIT OUT INITIALIZE OUTPUT signal. Low true. INIT OUT is asserted low then highby the DQP-1500 under program control or when power is applied to theworkstation. This signal is intended to be used to initialize external devicesat the same time the DQP-1500 is initialized. There is only one INIT OUTsignal and it appears on both P0 and P1 connectors.

FUNCT OUT0-2 FUNCTION OUTPUT 0,1 and 2 output signals. High true. These threeDQP-1500 generated output signal are provided for general purpose use andare independent of any other DQP-1500 operations.

FUNCT IN0-2 FUNCTION INPUT 0,1 and 2 input signals. High true. These three externaldevice generated signals are provided for general purpose use and areindependent of any other DQP-1500 operations.

GND GROUND. Twenty-one ground pins are provided to support interfacegrounding requirements to an external device.

General Description

19

Port 1 SignalsSignal Name Signal Description________________________________________________________________________________

OUT00-15 Port 1 16-bit Output data signals. High true.

P1 DAV Port 1 Data Available output signal. Low true. DAV is asserted low by theDQP-1500 when asserting valid output data. DAV is asserted high by theDQP-1500 after receiving input signal ACK from the external device.

P1 ACK Port 1 Acknowledge input signal. Low true. The ACK signal is asserted lowby the external device after successfully reading the data value on the outputsignals OUT00-15. ACK is asserted high by the external device after DAV isasserted high.

P1 CLR Port 1 CLEAR input signal. Low true. When the CLR signal is asserted lowby the external device, Port 1 output FIFO is reset. This signal can be usedby the external device to ensure that the Port 1 output FIFO is emptyfollowing an abort or at the beginning of a data transfer.

EXT INT EXTERNAL INTERRUPT input signal. Low true. The EXT INT signal is forgeneral purpose interrupt use. There is only one EXT INT signal and itappears on both P0 and P1 connectors. When this signal is asserted low bythe external device, a Qbus interrupt is generated if enabled. The EXT INTaction can take place without affecting any DMA activity.

INIT OUT INITIALIZE OUTPUT signal. Low true. INIT OUT is asserted low then highby the DQP-1500 under program control or when power is applied to theworkstation. This signal is intended to be used to initialize external devicesat the same time the DQP-1500 is initialized. There is only one INIT OUTsignal and it appears on both P0 and P1 connectors.

FUNCT OUT3-5 FUNCTION OUTPUT 3,4 and 5 output signals. High true. These threeDQP-1500 generated output signal are provided for general purpose use andare independent of any other DQP-1500 operations.

FUNCT IN3-5 FUNCTION INPUT 3,4 and 5 input signals. High true. These three externaldevice generated signals are provided for general purpose use and areindependent of any other DQP-1500 operations.

GND GROUND. Twenty-one ground pins are provided to support interfacegrounding requirements to an external device.

General Description

20

SpecificationsPhysicalController Standard short card measuring 6.875 inches by 4.2 inches

(17.46 cm by 10.67 cm).

InterfaceConnector 50-pin HD SCSI connectorPart No. AMP 390379-9

ElectricalPower Required:+5 volts DC 2 amps+3.3 volts DC 0.4 amps

PCI Local BusPower and Ground only

PerformanceThroughput Up to 1.6 Mbytes per second

EnvironmentalOperating Conditions:

Temperature 5° to 50° C (41° to 122° F)Relative Humidity 20% to 80% non-condensing

Storage Conditions:Temperature -40° to 66° C (-40° to 150° F)Relative Humidity 10% to 95% non-condensing

21

Appendix ADRQ3B Interface Connector

Connector 50-pin HD SCSI connectorPart No. AMP 390379-9Pin Assignments:

Pin Assignments

Port 1Signal Pin J1 Pin Signal

OUT00-H 1 26 GNDOUT01-H 2 27 GNDOUT02-H 3 28 GNDOUT03-H 4 29 GNDOUT04-H 5 30 GNDOUT05-H 6 31 GNDOUT06-H 7 32 GNDOUT07-H 8 33 GNDOUT08-H 9 34 GNDOUT09-H 10 35 GNDOUT10-H 11 36 GNDOUT11-H 12 37 GNDOUT12-H 13 38 GNDOUT13-H 14 39 GNDOUT14-H 15 40 GNDOUT15-H 16 41 GNDP1DAV-L 17 42 GNDP1ACK-L 18 43 GNDEXTINT-L 19 44 GND

20 45 GNDINIT-L 21 46 GNDFNCTI3-H 22 47 FNCTO3-HFNCTI4-H 23 48 FNCTO4-HFNCTI5-H 24 49 FNCTO5-HP1CLR-L 25 50

DRQ3B Interface Connector

22

PORT 0Signal Pin J2 Pin Signal

IN00-H 1 26 GNDIN01-H 2 27 GNDIN02-H 3 28 GNDIN03-H 4 29 GNDIN04-H 5 30 GNDIN05-H 6 31 GNDIN06-H 7 32 GNDIN07-H 8 33 GNDIN08-H 9 34 GNDIN09-H 10 35 GNDIN10-H 11 36 GNDIN11-H 12 37 GNDIN12-H 13 38 GNDIN13-H 14 39 GNDIN14-H 15 40 GNDIN15-H 16 41 GNDP0STB-L 17 42 GNDP0ACK-L 18 43 GNDEXTINT-L 19 44 GNDP0EOP-l 20 45 GNDINIT-L 21 46 GNDFNCTO0-H 22 47 FNCTI0-HFNCTO1-H 23 48 FNCTI1-HFNCTO2-H 24 49 FNCTI2-H

25 50 P0CLR-L

75 Gateway Blvd. The Logical Company Telephone: +1 541-942-3610Cottage Grove, Oregon 97424 USA Fax: +1 541-942-3640http://www.logical-co.com E-mail: sales@logical-co.com