e-voting machine
DESCRIPTION
E-Voting Machine. Group M1 Bohyun Jessica Kim Jonathan Chiang Chi Ho Yoon Donald Cober. Mon, Nov 3 Layout, Layout, Layout. Secure Electronic Voting Terminal. Status. FSMs are not complete (3/4 done) Layout finished for COMMs block but not globally connected - PowerPoint PPT PresentationTRANSCRIPT
E-Voting Machine
• Group M1• Bohyun Jessica Kim• Jonathan Chiang• Chi Ho Yoon• Donald Cober
Mon, Nov 3Layout, Layout, Layout
Secure Electronic Voting Terminal
Status
• FSMs are not complete (3/4 done)• Layout finished for COMMs block but not
globally connected• SRAMs and row decoders finished• Transistors:
88780 Layout:6964
LVS:6652
640:Analog Sim
COMMS Full Schematic
Components
FF 8 bit (2)
FF_C 16 bit (1)
XOR 8 bit (4)
Inv (1)
FA 8bit (4)
FA 16 bit (1)
FA shift 4/5 bit (4)
8 bit 2:1 MUX(4)
COMMS Layout Status Update
•Layout finished and LVS’ed for both 8-bit encryption parts
•Layout finished for 16-bit sum generator (16 bit adder + flip-flop)
•Need to do global routing to hook up all 8-bit and16-bit parts
•Size got a little bigger (before: 66 by 80, now: 77 by 80) – because of added functions (FF that clears, muxes, etc)
•Roadblock 2:1 8-bit MUX layout: Very difficult to wire I/O from covered M1,
hard to pull contact. Already tried multiple versions of 1 bit cell MUX.
Revisit MUXES
Old New
Preserves 5.7150 height .Eliminates metal 2 interconnectA lot easier for routing
Problem: Minimum contact to P-well diffusion of 8-bit flip flop spacing 0.45 is violated with new design.
Comms 8-bit Cipher Encryption Schematics
Components
FF 8 bit (2)
XOR 8 bit (4)
Inv (1)
FA 8bit (4)
FA shift 4/5 bit (4)
8 bit 2:1 MUX(4)
LVS: Partition LVS into 8-bit and 16-bit segments
Comms 8-bit Layout
Comms 8-bit Layout Instances / M3+M4
Comms 16-bit Layout
Comms 16-bit Layout Instances / M3
After global wiring within COMMS blockit will look like a square
FSM Layout Status Update
Registers are complete, LVSing and simulating
Floorplan of the FSMs are complete
Layout of Random Logic in the FSMs has not been started
FSM supporting blocks (message rom, user input reg, etc ) have not been started
FSM Floorplan
FSM Floorplan
FSM Floorplan
SRAM Layout Status Update
Row decoders are complete and LVSing
Cell Matrix has been confirmed
SRAM layout is known
SRAM Decoder Layout
SRAM Matrix Layout
SRAM and Decoder Layout
Floorplan Old vs New
TODO:
For Wednesday: Complete final floorplanComplete FSMs (LVS)Complete COMMs
For Monday: Complete Global interconnectsComplete connection blocks