e3 batch....may 2011
TRANSCRIPT
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May 2011
Q.1a) Design a 8086 microprocessor based system with the following
specifications.
1. Working at 8 MHz.
2. 32 KB EPROM using 8 KB Chips.
3. 32 KB SRAM using 16 KB chips.
Solution:
Total EPROM memory: 32 KB
Chip size available : 8 KB
No. of chips required : 32/8 =4
No. of sets : 2
SET 1
Starting add. : 00000 H
Size of set 1 : 03FFF H
Ending add. : 00000 H + 03FFF H = 03FFF H
SET 2
Starting add. : 04000 H
Size of set : 03FFF H
Ending add. : 04000H +03FFF H = 07FFF H
Total SRAM size = 32 KB
Chip size available = 16 KB
No. of chips = 2
No. of sets = 1
SET 1
Starting add. =08000 H
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Set size = 07FFF H
Ending add. : 08000 H +07FFF H =0EFFF
Q1 b) compare 80286 & 80386 microprocessors on basis of
1)no of address lines
2)no of data lines
3)no of segment registers
Ans=
PARAMETERS 80286 80386
1)Size of address bus 20 bit 32 bit
2)size of data bus 16 bit 32 bit
3)no of segment
registers
4 registers of 16 bit 6 registers of 16 bit
Q.1.C WAP of PIC controller, PORTA for input and PORTB,PORTC for
output.
#include
ORG 0x00
GOTO START
ORG 0x08
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RETFIE
ORG 0x18
RETFIE
Start CLRF TRISB,A
CLRF TRISC,A
SETF TRISA,A
MOVF PORTA,W,A
MOVWF PORTB,A
MOVWF PORTC,A
End
2. a) Draw PSW of 8086 microprocessor and explain setting of different
bits with example.
Flag register is part of EU. It is 16 bit register with each bit
corresponding to a flipflop.
OF DF IF TF SF ZF AF PF CF
There are a active flags out of 16. The remaining are undefined
flags.
Control flags:
1) Trap Flag (TF)
It is used to set the trap mode i.e. start single stepping mode. Here
the microprocessor is interrupted after every instruction so
that program can be debugged.
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2) Interrupt Flag (IF)
It is used to mask (disable) or unmask (enable) the INTR
interrupt.
IF=1 - Interrupt enabled.
IF=0 - Interrupt disabled.
If user sets IF flag. CPU will recognize external interrupt
request.
Clearing IF disables these interrupts.
3) Direction Flag (DF)
a) If this flag is set. SI and DI are in auto decrementing mode in
string operations.
b) If DF=1, the string instruction will automatically decrement
pointer.
c) If DF=0, the string instruction will automatically increment
pointer.
Conditional Flags (status):
1) Carry Flag (CF)
a) It is set whenever there is carry (or borrow) out if MSB of a
result.
(D7 bit for an 8 bit operation and D15 bit for 16 bit operation)
b) Flag is used by instruction that add and subtract multibyte
numbers.
2) Parity Flag (PF)
It is set if result has even parity. If parity is odd. PF is reset. This
flag is normally used to checkfor
data transmission errors.
e.g: 10110101 => odd parity
PF=0.
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10010101 => even parity
PF=1.
3) Auxiliary carry Flag (AF)
a) It is set if carry is generated out of lower Nibble .
b) It is used only in 8 bit operations like DAA and DAS.
c) AF = 1 => carry out if bit 3 on addition or borrow into bit 3 on
subtraction.
AF = 0 => no carry out from bit 3 on addition nor borrow into
bit 3 on subtraction.
e.g: If we add,
0100 0000
+ 0100 0010
1000 0010
As carry is not generated from lower nibble, AC=0.
4) Zero Flag (ZF)
It is set if result is zero.
e.g: 0000 0000
+ 0111 1111
0111 1111
ZF =0 as result is non-zero
5) Sign Flag (SF)
a) It is set if MSB of result is 1.
b) SF indicates sign of result only in case of signed operation.
c) In case of unsigned, sign bit has no significance.
SF=1; MSB is 1.
SF=0; MSB is 0.
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Eg. Addition of positive numbers:
0100 0000
+ 0100 0010
1000 0010
SF = 1
Addition of negative numbers.
1100 0000 -40 + (-40) = -82
+ 1011 1110
0111 1110
SF =0.
6) Overflow Flag (OF)
a) It will be set if result of signed operation is too large to fit in
number of bits available to represent it.
b) If result is not out of range, OF remains reset.
Eg. 0010 0011
+ 0011 0101
0101 1000
OF = SF = ZF = AF = PF = CF = 0.
1100 0000 -40 + (-42) = -82
+ 1011 1110
0111 1110
OF = 1, SF = 0, ZF = 0, AF = 0, PF = 1, CF = 1.
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Q2b. Explain different data transfer modes of DMA controller IC 8257.
Ans.
Usually data transfer takes place between microprocessors and peripheral
device by using a program stored memory which is known as microprocessor
controlled data transfer. In this method, data transfer speed is less. The reason
is each instruction has to be fetched from memory by microprocessor and then
executed. Sometimes we dont want to process the data. During this time a
DMA microcontroller is used to transfer data between peripheral devices. This
is called as device controlled data transfer.
Now there are three data transfer modes in DMAC 8257:
1] Byte or Single Mode:
In Byte or Single mode, after transferring one byte of data the bus control
relinquished and handed over to the microprocessor.
2] Burst or Demand Mode:
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In Burst or Demand mode, data is transferred till the time, the peripheral is
ready. After this the bus control is handed over to the microprocessor.
3] Continuous or Block Mode:
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In this mode, it is identical to the demand mode, but the bus control is not
relinquished until the entire block of data has been transferred.
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Q 2. C) Write functions of following 8086 pins.
1. Lock :-i. This pin in minimum mode carries WR (write) signal and carries
LOCK signal in maximum mode.
ii. This is active low signal and it does not allow external busmaster to take control of system bus. It is activated when 8086
executes an instruction with the LOCK prefix and remains
active till the next instruction.
iii. LOCK prefix : normally the bus request is serviced after thecurrent machine cycle and an interrupt request is serviced after
the current instruction cycle. But if we write LOCK prefix before
any instruction then even if there is bus request the bus will be
released only after cyrrent instruction.
iv. Microprocessor will remain LOCK signal through out theinstruction to indicate that it is performing instruction with
LOCK prefix.v. LOCK signal is given to 8289 Bus Arbiter in loosely coupled
systema, to prevent it from relaesing system bus to other bus
masters.
2. QS0 and Qs1 :-i. This pin carries ALE signal in minimum mode and QS0 in
maximum mode.
ii. Qs1 signal is carried in maximum mode and same pin carriesINTA in minimum mode.
iii. These are active low pins.iv. QS0 is used along with QS1 to indicate instruction queue
status.
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Q3a)Write addressing Rodes of following 8086 instructions.
I. MOVCL,25II. MOV[SI],BX
III.
ADD BX,DXIV. SUB CL,[BX+SI]V. IN AL,80H
I. MOV CL,25H
Immediate operand Is nothing but constant data contained is instruction
.Thus of a source operand is part of instruction of register or memory it is
referred as immediate addressing rode.
MOV CL,25H; CL
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In this Addressing rode, the effective address is sum of a base register
and an index register, both of which are specified by the instruction.
(v) IN AL,80H
Direct port addressing rode
In direct addressing, the port number is an 8-bit immediate operand. This
allows fixed access to ports numbered o-255.
Q3.b) Data And Program Memory Organisation of PIC18
The PIC18 microcontroller supports 4096 bytes of data memory locations.
Hence it requires 12bits of address to select one of the data registers.
Eight bits of PIC18 are used to specify the register to be operated on. As a
result only 256 registers can be accessed i.e. 4096 registers are divided
into 16 banks. Only 1 bank of 256 registers is active at any time selected
by a 4 bit bank selector register (BSR). Function Registers (SFRs). GPRs
are used to hold user random data when the PIC18 is executing the
program. SFRs are control registers used for CPU and on chip peripheral
devices. The SFRs begin from the highest address and go downwards
whereas GPRs must be used from address 0 and go upwards. The first 98
bytes (i.e. is in bank 0,000H to 05FH) of the GPRs and the last 160 bytes
(i.e. is in bank 15, F60H to FFFH) of the SFRs are grouped into a specialbank called access bank.
The PIC18 also has a 1KB of data EEPROM, which is readable and
writeable during normal operation with no extra power supply. The data
EEPROM memory is not directly mapped in the 4096 bytes of register file
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space; instead it is indirectly addressed through a Special Function
Register.
Q3.C
The PIC18 Pipelining- The PIC18 Divide most of the instruction execution into two stages:
instruction
fetch and instruction execution.
- Up Up to two instructions are overlapped in their execution One instruction is
in to two instructions are overlapped in their execution. One instruction is in
fetch stage while the second instruction is in execution stage.
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- Because of pielining, each instruction appears to take one instruction cycle to
complete and thus making microcontroller to work faster.
TCY0 TCY1 TCY2 TCY3 TCY4
fetch 1 execute 1
fetch 2 execute 2
fetch 3 execute 3
fetch 4 execute 4
fetch 3 execute 3
fetch 4 flush
Instruction @address sub_1 fetch sub_1 execute
sub_
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Q4.a) Draw block diagram of I/O port pin of PIC 18.Which are the different
registers involved in the operation of I/O port of PIC 18 and write their
operations.
Ans
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PORT NAME NO OF PINS PIN NAME
A 7 RA6..RA0
B 8 RB7..RB0
C 8 RC7..RC0
D 8 RD7..RD0E 8 RE7..RE0
F 8 RF7..RF0
G 5 RG4..RGO
H 8 RH7..RH0
J 8 RJ7..RJ0
There are 3 registers for the operation of each I/O Port
TRIS Register:-This register is used to control the data direction ofport pins
PORT Register:-This register is used to rad the data on the pins of
the processor
LAT Register:-This latch is used to latch the data for O/P port
For E.g. Port A has TRISA, PORTA, LATA register
Q.4)b) Which are the different methods used for program loops? Explain
each method in short.
Ans: The programming technique used to instruct the p to repeat task is
called looping. 8086 instruction set different instructions are available toimplement the loops, which changes the program branch such a part of
program is executed again to perform the task again. Loops can be of two
types:
1. Continuous Loop: This loop repeats task continuously. It is implemented
using unconditional JMP instruction. This loop can be considered as
infinite loop, it repeats the task until the system reset. For example, if we
want to generate continuous waveform of square wave or trigular wave,
the program should be written with continuous loop.
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Fig 1: Continuous loop. Fig 2: Conditional loop
2. Conditional Loop: This loop repeats task only if particular condition
satisfies. This loop is implemented using conditional JMP instructions.
This loop repeats task n times or repeats task if certain condition is
satisfied. The condition is checked using conditional flags like zero flag,
parity flag, sign flag, carry flag, etc.
For example, if we want to repeat task 10 times, we should write a
program with counter initialized with count equal to 10. Every time the
task is performed, the count should be decremented and program should
check for the count, whether it has become zero. Once the reaches to
zero the program stops.
Q.5a). Explain following instruction of PIC 18
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i) CLRF F,a ii) BCF F,b,a iii) DAW iv) CPESEQ
F,a v)BC,n
Ans: i) CLRF F,a
Operands : 0
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Status affected : C
Description : DAW adjusts the eight-bit value in W, resulting from the
earlier addition of two variables & produces correct packed BCD result.
Cycles : 1
Example : DAW
If W=0xA5, C=0, DC=0
Then W=0x05, C=1, DC=0.
iv) CPFSEQ F,a
Oprands : 0
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(PC)=PC+2+10=PC+12.
Q.5.b write and explain maximum mode operation of 8086.
The use of the bus controller IC 8288 along with the other supportchips.
Additional circuitry is required to translate the control signal. Theadditional circuitry converts the status (S2-S0) to I/O and memory
transfer signal. The intel 8288 bus controller is used for this
purpose. It generates the control signals required to direct the data
flow and for controlling the latches 8288 and trans-receiver 8286.
It generates the signal MRDC, MWTC, AMWC, AIOWC, IORC, IOWCsignal.
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The MRDC and MWTC are memory read command and memory writecommand signal. They instruct the memory to accept or send data
on the data bus.
The IORC and IOWC are I/O read command and I/O write commandsignal. They instruct the I/O device to read write data to and from
address port on the data bus.
The AIOWC and AMWTC are advanced I/O write command andadvanced memory write command signals. These signals are similar
to the IOWC and MWTC signals except that, they are activated one
clock signal earlier to the IOWC and MWTC signal.
Q 6 b] Explain different string premitives of 8086.
: A string is series of bytes stored sequentially in the memory. String
instructions operate on such strings.
The source string is at a location pointed by SI in the data segment. The destination string is at location pointed by DI in the extra
segment.
The count for string operation is alwys given by cx. Since cx is a 16 bit register we can transfer max 64kB using string
instruction.
SI and /or DI are incremented/decremented after each operationdepending upon the direction flag DF in the flag register.
If DF=0,it is auto increment. This is done by CLD instruction. If DF=1, it is auto decrement. This is done by STD instruction.
1]MOVS : MOVSB/MOVSW(move string)
It is used to transfer a word/byte from data segment to extrasegment.
The offset of source in data segment SI. The offset of destination in extra segment is in DI.
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SI and DI are incremented/decremented depending upon thedirection flag.
Eg. MOVSB ; ES:[DI]
; SI
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CMPSW ;compare {DS:[SI], DS:[SI+1]}
;SI
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Example instruction: ADDWF MYREG, W, B
The 6-bit field opcode specifies the operation to be performed by the ALU.
B) Byte to byte move operations (2 words): the format of the instructionin this category is as shown
OPCODE f(Source FILE#)
15 12 11 0
1111 f(Destination FILE#)
15 12 11 0
f= 12 bit file register address
Example instruction: MOVFF MYREG1, MYREG2
There is one instruction that uses the format MOVFF F1, F2. This
instruction allows one to move data from one file register to another.
C) Bit oriented file register operation: the format of the instruction inthis category is as shown
OPCODE b( BIT# ) a f( FILE# )
15 12 11 9 8 7 0
b= 3 bit position of bit in file register (f)
a=0 to force Access Bank
a=1 for BSR to select bank
f=8-bit file register address
Example instruction: BSF MYREG, bit, B
The format uses an 8-bit field (f) to specify a file register as operand.
D) Literal operations: Instructions in this category specify a literal (animmediate value) as an operand. the format of the instruction in this
category is as shown
OPCODE k(literal)
15 8 7 0
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k=8-bit immediate value
Example instruction: MOVLW 0x7F
E) Control operations: the format of the instruction in this category isas shown
CALL, GOTO and Branch operations
Example instruction: GOTO label
OPCODE n (literal)
15 8 7 0
1111 n( literal)
15 12 11 0
n= 20-bit immediate value
Example instruction: CALL MYFUNC
OPCODE S n (literal)
15 9 8 7 0
n (literal)
15 12 11 0
S=Fast bit
Example instruction: BRA MYFUNC
OPCODE n (literal)
15 11 10 0
Example instruction: BC MYFUNC
OPCODE n (literal)
15 8 7 0
The notation stands for the bit 7 to bit 0 of 20-bit immediate number
n, whereas the notation n stands for the bit 19 to bit 8 of 20-bit
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immediate number n. The number n means that the number n is an
11-bit number. There are four different variations of this formats.
Q7.b: Write a short note on: What do you mean by object code
compatibility in processors?
How is it achieved in x86 processors.
Ans: Object code compatibility refers to backward compatibility of the
object code of earlier processor in a later version of the samearchitecture.
From the date of the very first working sample of the 8086
microprocessor to the latest and greatest IA-64 CPU, Intel has had an
important goal: as much as possible, ensure compatibility with software
written for previous generations of the processor. This mantra existed
even on the first member of the family, Intel chose to include compatibility
with their previous 8-bit microprocessor, the 8085. The 8086 was not
capable of running 8085 software, but Intel designed the 8086 instruction
set to provide almost a one for one mapping of 8085 instructions to 8086
instructions. This allowed 8085 software developers to easily translate
their existing assembly language programs to the 8086 with very little
effort.
Intel did not provide object code compatibility with the 8085
instruction set because the design of the 8085 instruction set did not
allow the expansion Intel needed for the 8086. Since there was very little
software running on the 8085 that needed to run on the 8086, Intel felt
that making the software developers responsible for this translation was a
reasonable thin to do.
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The first real extension to the 8086 family the found its way into
general purpose PCs was the 80286 that appeared in 1982. This CPU
answered the second complaint by adding the ability to address up to 16
Mbytes of RAM. Unfortunately, it did not extend the segment size beyond
64 kilobytes. In 1985 Intel introduced the 80386 microprocessor. This chip
answered most of the complaints about the x86 family, and then some, but
people still complained about these problems for nearly ten years after the
introduction of the 80386.
The code written for 8086 can work on 80386 and further processors.
This is how x86 processors achieved object code compatibility.
Q7.C ASSEMBLER DIRECTIVES:
Assembly Language consists of 2 types of statements:-
1. Executable statements: all instructions
2. Assembler Directives: These are the statements that direct the
assembler to do something.
They are classified as:
implified
egment
Data
Allocation
Seg-
ment
Mac-
ros
Code
Label
Sco-
pe
Listing
Control
Misc
Code equ assume endm align Com Page Incluata db end macro even extrn Ttitle Name
Const dw ends local label public
xit DD group Exitm PROC
Model DF segment
tack DQ,dt,org
1.code:
*It indicates the beginning of code segment. code(name)
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*For tiny, small and compact models, the segment name is TEXT always.
*The medium and large memory models use more than one code
segments.
2.data:
It indicates the beginning of data segment.
3.model:
* This directive is used for selecting a standard memory model for the
assembly language program.
* eg. model (memory model)
* The memory model is chosen based on the users requirement by
referring to the size of memory.
* The size of a memory model can be from small to huge.
* The tiny model is meant for the COM programs because they have their
code in only one 64 KB segment of memory.
* The flat model is the biggest which defines one area upto 4 GB for code
and data.
* The small model is useful for the student level programs as for this
model, the assembler assumes that the address are within a span of 64
KB and henceforth generates 16 KB offset addresses.
* In the compact model, the assembler can use 32 Bit addresses. So, the
execution time for this model is longer.
* The huge model needs a larger space than 64 KB.
4. stack:
* Is used for defining the stack.
stack (size)
* The size of the stack is 1024 Bytes by default but this size can be
overridden.
e.g. STACK 100this reserves 100 byes for S.S.
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5.equ:is used to generate some value or symbol in the program.each time
when the assembler finds that name in the program it replaces that name
with the value assigned to that variable
Eg:factorial equ 05h
6.define byte(db)
It defines the byte type variable
Name db initial value
7:define word:it defines the byte type variable
Eg:name db initial value
8:define word:the dw directive defines items that are not one word in
length.the range is 0 to 65,535 for unsigned,for signed -128 o 127.
9:define quad word:it defines the assembler to declare variable in words in
length of 4 words.
10:define ten bytes:used to define the data items that are 10 bytes long.
11:org (originate):it allows the location counter to set the starting address
at any desired point in memory.
12:assume:it is used fr telling the assembler the name of logical
statement to be used.
Eg:cs:code,ds:data]
13:end:it is placed ta the end of program or statement to indicate end .
14:segment ends:indicates the end of segment.
15:group:it collects the segments of same type under one segment.
16:macro and endm:indicates macro directives.
17:align:it tells the assembler to align the next instruction to the address
that is specified in the instruction.
18:even:it tells the assembler toa increment the program counter evenly.
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19:label:it assigns name to the current value of location counter.the label
directive must be followed by a term which specifies the type of
associated with the symbolic name.
20:proc:this directive is used to indicate the start of a procedure.
21:extrn:it indicates that the names or labels that follow extrn directive
are in some other assembly module.
Eg:extrn disp:far.
To call a procedure that is in the program module assembled at a
different time from that which contains call instruction,the assembler has
to be told that procedure is external.
22:public:it informs the assembler and linker hat theidentified variables in
a program are to be refrenced by other modules.
Eg: PUBLIC multiplier,divisor.
23:page:used to specify maximum no. of lines on a page and max no. of
characters on a line.
24:title :it helps for controlling the format of listing of an assembled
program it id usedc to give a title to program and print the title on every
line.
25:include:is used to tell assembler to insert a block of source from the
named fileinto current source module
Eg:INCLUDE path :filename
26:name:assisns a specific ame to each assembly mpodule when program
s consisting of several modules are written.
27:dup:it is use to allocate space for a table or array .
28:global:it can used instead of public directive.
29:length:it is an operator .it informs the assembler tpo find number of
elements I a named data item
Eg:mov cx,length of string.
30:offset:it is an operator.it informs assembler to determine offset of anamed data item.
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31:endp:is use with the named of the procedure to indicate the end of
procedure.
32:label:it is an operator.is udsed to assign a specific type to a variable or
label.
33:short:is an operator used to tell the assembler that only one byte
displacement is needed to code a jump instruction.
34:type:it is an operator.it informs the assembler to fin d the type of a
specified variable .the assembler actually finds the number of bytes in
type of variable.for byte assembler is given a value 2 and for word is given
a value 4.
THE END
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