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Early End of Life Failures ofElectronics in Avionic
Systems
Joseph B. Bernstein
Associate Professor of Reliabilty
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Sponsored by:
Aerospace Vehicle Systems Institute - AVSI
Texas Engineering Experiment StationTexas A&M University
May 2001
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AVSI Project
!Sponsored by a consortium of Aerospacecompanies" Future avionics systems will be designed, built,
operated and maintained using standard,commercially available, electronic components
" The electronics industry trends are movingcounter to aerospace industry needs
" The aerospace industry can no longer assumethat the life of a Line Replaceable Unit (LRU) willbe greater then 5-10 years.
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Methods to Account for AcceleratedSemiconductor Device Wearout
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Lloyd Condra, PIBoeing
425-266-5975
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Assumptions
!Future avionics systems must be designed,produced, operated, maintained, andsupported using commercially-availableelectronic components
!The electronic component industry is movingcounter to aerospace interests
!We cannot assume that the design,production, or service life of an individualLRU will be greater than 5-10 years
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The Whole Problem: Moore’s Law
1972 1976 1980 1984 1988 1992 1996 2000103
104
105
106
107
108
109
Year
Tra
nsi
sto
rs p
er C
hip
4004
8080
8086
80286 80386
80486
Pentium
Pentium Pro
Pentium III
2004 2008
?
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CMOS Gates
Gateoxide
Gate
Source Drain
Conductingchannel
Gateoxide
Gate
DrainSource
Conductingchannel
N-substrate
Trenchisolation
P+ P+
P-well
N+ N+
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Technical Trends
1990 2002 2005 2014
Million transistors per chip 1 100 190 4,308
Local clock frequency, MHz 33 2,100 3,500 13,500
MPU Gate length, nm 600 90 65 22
Gate oxide thickness, nm 12 2.2 1.3 0.6
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More Technical Trends
1990 2000 2010
Operating temperature, °C -55 to 125 -40 to +85 0 to 70
Supply voltage 5v 1.5v 0.6v
Max. power (high perf.) 5 100 170
No. of package types <10 <60 ??
Design support life >10 yrs. 1-5 yrs. <1yr.
Production life >10 yrs. 3-5 yrs. <3yrs.
Service life >20 yrs. 5-10 yrs. <5yrs.
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Device Wearout Trend
103 104 105
Time, hrs.
7 yrs.
1.8 yrs.
1990: Ea = 0.5 eV
30 yrs.
17 yrs.
2002: Ea = 0.9 eV
150
°C
85
70
50
100
Figure. Estimated lifetimes at case temperatures of 70ºC (typicalof desktops) and 85ºC (typical of avionics) for
semiconductor devices produced in 1990 and 2002.
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Semiconductor Device Wearout
!Device manufacturers face relentlesspressure to improve functionality and reducecosts
!Their major customers are willing to acceptshorter device lifetimes in order get lowerprices and improved functionality
!Aerospace customers must use the sameproducts as the major device customers
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Device Wearout Life
! LSI Logic" Current industry standard life tests are only equivalent to
10-year life
" Rules can permit a customer to design for early wearout
! TI" FIT rates quoted are for 10-year life (80% of customers
" Do not want to design for <10-year life, but will do so onrequest
! Motorola" Industry is reviewing 3 categories: 3-5 years, 5-7 years,
10+ years
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Wearout Mechanisms
!Package defects: Understood, technicalissues can be managed for future parts.
!Silicon defects: Understood, fundamentallimitation on chip yield and extrinsic defects.
!Electromigration: Understood, may be lessproblematic for multiple layers of metal.
!Oxide breakdown: Technical limitations withno known technical solutions
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Electromigration
kTE
n
a
eBj
wtMTTF:equations'Black =
1995 2005 20150.1
1.0
10
100
1000
Year produced
Ser
vice
life
, yr
s.
Mitigating factors: multilayer designs, Cu conductors,voltage scaling (probably will not be a show-stopper)
Computers
Airplanes
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Oxide Breakdown
( )γ00
EEetMTTF:elmodLinear −=
1995 2005 20150.1
1.0
10
100
1000
Year produced
Mitigating factors: no known technical options
Servicelife, yrs.
Computers
Airplanes
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Reliability and Safety Assessment
• Short device service life means that constant failure rateassumption (used in all current aerospace reliability andsafety analyses) is no longer true
• Device failures may be considered common cause failures
101
Random failureβ = 1
Time, years
2000
2010
1990Wearout
β1990 > β2000 > β2010
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Reliability Assessment
! Determine failure distributions for semiconductordevices" Will require accelerated testing of devices
" Will require retrospectivly analyzing Field Failure data
" Will be a continuing effort
! Use Numerical Simulation Tools to estimate" System failure rates
" Time to system wearout (most important)
! Reliability assessment will be an ongoing activityfor each system.
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Effects of Early Wearout
Pro
bab
ility
of
Fai
lure
Time
Constantfailure rate
Device Wearout
19902000
2010
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What Will it Cost?
!Assume" A commercial jetliner has 300 electronics boxes
" Each box costs $20,000
" Each box will have to be replaced every 6 years
" Replacement equipment cost is the same asoriginal equipment cost
!Result" The added support cost will be $1M per airplane
per year
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AVSI Project Goals
!Conduct a Reliability Assessment ofSemiconductor Devices" Determine failure distributions for semiconductor
devices
" Understand the effects of early wearout
" Develop safety and reliability tools, process andguidelines for avionics system design
" Estimate the Cost Impact on Future GenerationAvionic Electronic Systems
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UMD Project Organization
!We’ll organize the project into 3 phases" Phase I will examine what is known today about
avionics and component reliability
" Phase II will examine component reliability ingreater depth and develop screening approaches
" Phase III will focus on understanding/predictingreliability and developing tools and process todesign reliability into avionics systems
!The organization is a “living document” andwill evolve
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Project Organization
!Phase 1: Current Knowledge" Compile models on wear-out mechanisms
including electromigration, hot-carrier degradationand oxide breakdown
o Summarize results of literature search in a paper
o Plan to submit paper to IEEE Transactions on Reliability.• No proprietary data will be in the paper.
o Deliverable: Likely failure mechanisms of futuresemiconductor devices in avionics applications
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Project Organization
" Get field data from AVSI memberso Interested in building a baseline understanding of
current avionics reliability and reliability processes
o Not a critique of current processes
" Work with a “burn-in” house such as BellTechnologies and Amkor
o Get test and field data on components• Get data on large numbers of a single component
• Correlate Burn-In data with Field Failure data
• Develop Screening tools for Reliability (I.e. Chip-EyeTechnology methodology)
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Project Organization
!Phase II: Understanding Failure Mechanisms" Complete analysis of field and burn-in data
o Correlate models with field and test data
" Deliverable: Develop Models to Estimate
Lifetimes of Future Avionicso Verify Models
o Continue Field Data analysis
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Project Organization
!Phase III: Design Tools" Develop methodologies and tools to aid in the
design of reliable avionics systemso Component lifetime modeling and selection
o System level design techniques
" Deliverableso Device Assessment Methods and Avionics System
Design Guidelines
o Adequacy of Existing System Reliability and SafetyAnalysis Methods for Future Avionics Systems
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What we need from AVSI members
! LRU (Blackbox) Level• Failure rate
• Number of failures
• Operating time
• Question: Is the operating time for avionics boxesmeasured in flight hours or actual powered-on time?
• Operating conditions/environment
• Failure modes/mechanisms
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What we need from AVSI members
! Component Level• Component Failure Rates
• Component environment
• Failure modes/mechanisms
! Current processes for:• Reliability at the system level
• Reliability at the component level
• Component selection
• Component qualification
• Regulatory Guidance/Requirements
! We’d like to get as much raw field data as possibleon failures
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Areas of Wearout Concern
!Areas of wearout concern at the IC level" Electromigration
" Oxide Breakdown
" Hot Carriers
" Packaging and Connections
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Electromigration
!The movement of conductor atoms due tothe flow of electrons
!Understood phenomenon" Can be dealt with through
o The proper use of materials• Addition of Cu to Al interconnects
o Multiple layers of metallization to reduce currentdensities
! Life time grows as linewidths shrink to 2µm" Due to grain structure assuming a ‘bamboo’
pattern
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Hot Carrier Injection (HCI)
!Degradation of gate oxide performance" Typically results in reduced circuit speed (rather
than hard failure)
!Effects are strongly influenced by voltage" Decreased temperatures INCREASES effects
!Don’t know if HCI will be a reliability concern" Evidence that the physics change at 0.25 µm and
smaller
" Some avionics systems spend time at LOWtemperatures and some at HIGH temperatures.
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Time Dependant Dielectric Breakdown(TDDB)—Oxide Breakdown
!Application of electric field across a dielectricmaterial causes breakdown eventuallyresulting a short circuit failure
!Three step process" Defect generation during electrical stress" Breakdown trigger" Dielectric Breakdown
!This is expected to be an area of concern asdevice features shrink" No known technical solutions
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Time Dependant Dielectric Breakdown
!Thermo-Chemical or E-Model" Field driven model
" Trap generation begins with oxygen vacancy
!Anode Hole Injection (AHI) or I/E-Model" Function of stress current density
" Trapping of holes generated in Oxides
kTEaet /50=
EHBBD et /)( +∪
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Direction
!Bring together published literature andstudent research" Determine the significance and impact of the
different wearout mechanisms
" Understand and predict the lifetimes ofsemiconductor devices
" Develop guidelines for designers ofsemiconductor devices
" Develop guidelines for developer of higher levelsystems
" Evaluate Economic Impact of Reliability