ece 3110: introduction to digital systems combinational-circuit synthesis

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ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

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Page 1: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

ECE 3110: Introduction to Digital Systems

Combinational-Circuit Synthesis

Page 2: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

Previous… Representations of Logic Functions

Truth table Canonical sum Minterm list: on-set Canonical product Maxterm list: off-set

Combinational Circuit Analysis/Synthesis

Page 3: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

Combinational circuit synthesis

Description--->combinational logic circuit. Description:

Word description of a problem using English-language connectives

Write corresponding logic expression/truth table

Manipulate the expression if necessary. Build a circuit from the expression.

A circuit realizes an expression if its output function equals that expression, and the circuit is called a realization of the function.

Page 4: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

Prime-number detector

Word description:Given a 4-bit input combination N= N3N2N1N0, This function produces a 1 output for N=1,2,3,5,7,11,13, and produces a 0 otherwise.

Page 5: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

Brute-force design Truth table -->

canonical sum (sum of minterms)

row N3 N2 N1 N0 F 0 0 0 0 0 0 1 0 0 0 1 1 2 0 0 1 0 1 3 0 0 1 1 1 4 0 1 0 0 0 5 0 1 0 1 1 6 0 1 1 0 0 7 0 1 1 1 1 8 1 0 0 0 0 9 1 0 0 1 010 1 0 1 0 011 0 0 1 1 112 1 1 0 0 013 1 1 0 1 114 1 1 1 0 015 1 1 1 1 0

Page 6: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

Minterm list --> canonical sum

Page 7: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

Combinational-Circuit Design

Sometimes you can write an equation or equations directly using “logic” (the kind in your brain).

Another example: Alarm

Page 8: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

Algebraic expression

Corresponding Circuit

Description:The ALARM output is 1 if the PANIC input is 1, or if the ENABLE input is 1, the EXITING input is 0, and the house is not secure; the house is secure if the WINDOW,DOOR, and GARAGE inputs are all 1.

Page 9: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

Alarm-circuit transformation Sum-of-products form

Useful for programmable logic devices

“Multiply out”:

Page 10: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

Circuit manipulation Standard gate types

AND, OR, Inverter, NAND,NOR In most logic technologies, inverting gates like

NAND/NOR are faster than noninverting gates like AND/OR

Translate any logic expression into an equivalent sum-of-products expression by multiplying it out. (T8)

Translate any logic expression into an equivalent product-of-sums expression by adding it out.(T8’)

Page 11: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

Sum-of-products form

AND-OR

NAND-NAND

Page 12: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

DeMorgan Symbols

Page 13: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

Any sum-of-products expression can be realized in either as an AND-OR circuit or as a NAND-NAND circuit.

Dual statement is also true:

Any product-of-sums expression can be realized in either as an OR-AND circuit or as a NOR-NOR circuit.

Page 14: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

Product-of-sums form

OR-AND

NOR-NOR

P-of-S preferred in CMOS, TTL (NAND-NAND)

Page 15: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

Prime detector

Page 16: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

Minimization

Logic Function minimization : Simplifying the logic function to reduce the number and size of gates.

Minimization methods:1- Using theorems T9,T9’, T10,T10’ 2- Karnaugh map

Page 17: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

Algebraic simplification

Starting from a truth table, or a minterm (maxterm) list

Reduce the cost of a 2-level circuit: Minimize # of first-level gates Minimize # of inputs of gates

Do not consider the cost of input inverters: assuming that both true and complemented versions of all input variables are available.

Page 18: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

Algebraic simplification

T10, X.Y+X.Y’=X T10’: (X+Y).(X+Y’)=X

Generalization of the theorems: (Given product term).Y+(Given product

term).Y’= Given product term (Given product term+Y).(Given product

term+Y’)= Given product term

Reduce number of gates and gate inputs

Page 19: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

Algebraic simplification

Theorem T10,

Reduce number of gates and gate inputs

Page 20: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

Resulting circuit

Page 21: ECE 3110: Introduction to Digital Systems Combinational-Circuit Synthesis

Next:

K-map Simplifying SOP