ece 368 cad-based logic design shantanu dutt lecture 11 file i/o and textio in vhdl (courtesy of...

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ECE 368 ECE 368 CAD-Based Logic Design CAD-Based Logic Design Shantanu Dutt Shantanu Dutt Lecture 11 Lecture 11 File I/O and Textio in File I/O and Textio in VHDL VHDL (courtesy of Karam (courtesy of Karam Chatha, ASU) Chatha, ASU)

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Page 1: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

ECE 368ECE 368CAD-Based Logic DesignCAD-Based Logic Design

Shantanu DuttShantanu Dutt

Lecture 11Lecture 11

File I/O and Textio in VHDLFile I/O and Textio in VHDL

(courtesy of Karam (courtesy of Karam Chatha, ASU)Chatha, ASU)

Page 2: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

FilesFiles

• In all the testbenches we created so far, the test stimuli were coded inside each testbench.

• Hence, if we need to change the test stimuli we need to modify the model or create a new model.

• Input and output files can be used to get around this problem.

Page 3: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

File Definition and DeclarationFile Definition and Declaration

file_type_defn <= type file_type_name is file of type_mark ;

• A file class needs to be defined before it can be used.

• Once defined, a file object can be declared.

type integer _file is file of integer ;

file_decl <= file id { , …} : subtype_indication [ [ open file_open_kind ] is string_expr ;

file table: integer _file open read_mode is “table.dat” ;

type file_open_kind is (read_mode, write_mode, append_mode);

Page 4: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

File readingFile reading

• Given a file definition, VHDL implicitly provides the following subprograms:

type file_type is file of element_type;

procedure read ( file f: file_type; value : out element_type; length : out natural);function endfile ( file f: file_type ) return boolean;

If the length of the element is greater than the lengthof the actual data on the file, it is placed left justifiedin the element.

Page 5: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

Example Example p1: process is

type bit_vector_file is file of bit_vectors;file vectors: bit_vector_file open read_mode is “vec.dat”;variable next_vector : bit_vector (63 downto 0);variable actual_len: natural;

beginwhile not endfile(vectors) loop

read (vectors,next_vector,actual_len);if actual_len > next_vector’length then

report “vector too long”;else

for bit_index in 1 to actual_len loop….

end loop;end if;

end loop;wait;

end process;

Page 6: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

File writingFile writing

• Given a file definition, VHDL implicitly provides the following subprograms:

type file_type is file of element_type;

procedure write ( file f: file_type; value : in element_type);

Page 7: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

Problem DescriptionProblem Description

• Write a process description that writes the data of integer type from an input signal to a file.• Assume that the input signal “s1” is an “in” port of the top level entity.• Assume the file name to be “out.dat”.

Page 8: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

ExampleExample

P1: process (s1) istype integer_file is file of integer;file out_file: integer_file open write_mode is“out.dat”;

beginwrite (out_file,s1);

end;

Page 9: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

Files in SubprogramsFiles in Subprograms

• In all the examples of file I/O thus far, files are opened at the start of simulation, and automatically closed at end of simulation.

• However, for files declared in subprograms, files are opened and closed at each invocation of the subprogram.

Page 10: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

ExampleExample

function read_array (file_name: string; len: natural)return integer_vector is

type integer_file is file of integer;file data_file: integer_file open read_mode is file_name;variable result: integer_vector(1 to len);variable index: integer := 1;

beginwhile not endfile(data_file) and index <= len loop

read(data_file, result(index));index:= index + 1;

end loop;return result;

end;

Page 11: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

File open and closeFile open and close

• In the examples discussed thus far:• we have opened the files at definition.• we have implicitly closed the files.

• VHDL permits explicit opening and closing of files.

Page 12: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

File open and closeFile open and close

procedure file_open (status : out file_open_status; file f: file_type; extern_name: in string; open_kind : in file_open_mode := read_mode);type file_open_status is (open_ok, status_error, name_error, mode_error);

VHDL provides two implicit procedures:

procedure file_close (file f: file_type);

Page 13: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

Open errorsOpen errors

status_error: file object previously open and associated with a physical file.

name_error: in read mode indicates file does not

exist. in write mode indicates file cannot be created. in append mode indicates both.

mode_error: indicates file cannot be opened in the

specified mode.

Page 14: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

File procedure File procedure parametersparameters

procedure read_transform (file f: transform_file; variable transform : out transform_array) isbegin

for i in transform’range(1) loopfor j in transform’range(2) loop

if endfile(f) thenreport “unexpected end of file”severity error;

returnend if;read (f,transform(i,j));

end loop;end loop;

end;

VHDLdoes notpermit readingorwritingof 2-Darrays.

Page 15: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

Package textioPackage textio

• The file that we have created can read only one type of objects.

• The package textio provides useful functions for reading general text files.

• The package is part of the standard library “std”.

Page 16: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

Package textioPackage textio

type line is access string;

type text is file of string;

type side is (right,left);

subtype width is natural;

file input: text open read_mode is “std_input”;

file output: text open write_mode is “std_output”;

procedure readline (file f: text; L: inout line);

procedure writeline (file f: text; L: inout line);

Page 17: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

Using textio proceduresUsing textio procedures

• The type “access” denotes a pointer in VHDL.

• textio works with a pointer to a line of text or string.

• A pointer is an object that has the starting address of the line of text.

Pointer String

• “readline” and “writeline” read and write an entire string that is pointed to by the pointer.

Page 18: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

textio read procedurestextio read proceduresprocedure read (L : inout line; value: out bit; good: out boolean);procedure read (L : inout line; value: out bit_vector; good: out boolean);procedure read (L : inout line; value: out boolean; good: out boolean);procedure read (L : inout line; value: out character; good: out boolean);procedure read (L : inout line; value: out integer; good: out boolean);procedure read (L : inout line; value: out real; good: out boolean);procedure read (L : inout line; value: out string; good: out boolean);procedure read (L : inout line; value: out time; good: out boolean);

Page 19: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

textio read operationtextio read operation• Every read operation that reads a data type otherthan “character” skips whitespace (ws) characters: Space, Tab. Reading a character does not skip ws chars since they are legitimate characters; if they need to be skipped, then that does need to be done explicitly at the point of the ws character w/ a read: read(L,c), where “c” is of type character.• If the line contains the following items:fred “cat” 1001010 12 -4.7 a 10 ns

readline(file_id,L);read (L,s); -- L is a string, s is a stringread (L,s);read (L,bv); -- bv is a bit_vectorread (L,i); -- i is an integerread (L,r); -- r is a realread (L,c); read(L,c); -- c is a characterread (L,t); -- t is a time

Page 20: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

textio write procedurestextio write proceduresprocedure write (L : inout line; value: in bit; justified: in side := right; field: in width := 0);procedure write (L : inout line; value: in bit_vector; justified: in side := right; field: in width := 0);procedure write (L : inout line; value: in boolean; justified: in side := right; field: in width := 0);procedure write (L : inout line; value: in character; justified: in side := right; field: in width := 0);procedure write (L : inout line; value: in integer; justified: in side := right; field: in width := 0);procedure write (L : inout line; value: in real; justified: in side := right; field: in width := 0);procedure write (L : inout line; value: in string; justified: in side := right; field: in width := 0);procedure write (L : inout line; value: in time; justified: in side := right; field: in width; unit: in time:= ns);

Page 21: ECE 368 CAD-Based Logic Design Shantanu Dutt Lecture 11 File I/O and Textio in VHDL (courtesy of Karam Chatha, ASU)

textio write operationtextio write operation

write (L,i,left,5); -- L is a line, i = 45write (L,’ ‘);write (L,i,right,5); write (L,’ ‘);write (L,”fred”);write (L,’ ‘);write (L,”101”);write (L,’ ‘);write (L,r,left,3); -- r = 3.14159write (L,’ ‘);write (L,t,left,0,ms); -- t = 23 micro secswriteline(file_id,L);

45bbb bbb45 fred 101 3.1 0.023 ms