ece/comp sci 352 digital system fundamentalsfall 2002-2003...

Department of Electrical and Computer Engineering University of Wisconsin - Madison

ECE/Comp Sci 352 Digital System Fundamentals - Fall 2002-2003

DESIGN PROJECT 1: BCD DIGIT MODULE Due: Friday, October 25, 2002 (in class); 5% of course grade.

In Project 2, your will be designing a BCD calculator as a team of two students. The purpose of Project 1 is to prepare you for Project 2 by helping you learn more about the Mentor Graphics da and a logic simplification tool CAFE. The goals of project 1 are to: 1. Increase your familiarity with Mentor Graphics design and simulation tools, and familiarize you with CAFE (a logic simplification tool), 2. Improve your understanding of material covered in class, and 3. To provide modules to be used in Project 2. In Project 1, you are to design a module which can perform BCD addition, subtraction, and decimal complement of BCD digits to be used for Project 2, and to learn how to use the logic simplification tool, CAFE. Naturally, Project 1 consists of two parts: Part 1) BCD module design using da, and Part 2) Logic simplification using CAFE. Project 1 is to be submitted by end of your lecture on the deadline date given above and will be approximately 5% of your grade. Project 1 is an individual project; each student is to work on Project 1 alone and is not to copy designs or results from others. However, sharing knowledge and tips on how to use Mentor Graphics tools and/or CAFÉ with others is allowed and encouraged. This project description is organized as follows. For the Part 1 of the project, initially, we give specifications for the BCD digit module. The specifications will be followed by a number of design exercises that will lead you through the design and CAD tool usage. For Part 2 of the project, you are given the descriptions of seven-segment LED display and you are to use CAFÉ to simplify logics to implement seven outputs. You are strongly encouraged to study this entire description carefully before you begin.

ECE 352 DESIGN PROJECT 1: BCD DIGIT MODULE 2

PART 1. BCD Module Design

TABLE 1. OPERATIONS FOR BCD DIGIT ASC

COMP_A SUB Operation 0 0 BCD Addition: S = A + B + CIN 0 1 BCD Subtraction: S = A + 9’s Comp(B) + CIN 1 0 BCD Complement of A: S = 9’s Comp(A) + CIN

PROJECT SPECIFICATIONS

The external connections to the BCD Digit module are given on the symbol in Figure 1. A(3:0) and B(3:0) are the two BCD digit inputs. S(3:0) is the BCD digit output. CIN is the BCD carry input and COUT is the BCD carry output. COMP_A and SUB are the two control signals. The operation of the BCD Digit module is specified in Table 1.

FIGURE 1. SYMBOL FOR BCD DIGIT ADD-SUBTRACT-COMPLEMENT MODULE

A top- level schematic of the BCD Digit module is given in Figure 2. The logic within the dashed box is a standard BCD adder with modifications from Figure 3-35 of the textbook. The additional logic is present to provide BCD subtraction and BCD complement. We will be using the 10’s complement and addition to perform subtraction. The 10’s complement will be implemented by using the 9’s complement of the digits and adding 1. For the least significant digit, the subtract operation is A + 9’s Comp(B) + 1 producing BCD sum digit S and BCD carry COUT. For the other digits, the subtract operation is A + 9’s Comp(A) + CIN where CIN is the BCD carry in. For an n-digit BCD adder/subtractor, n copies of this module can be used with CIN = 1 for the least significant digit and CIN connected to COUT of the prior module as in a ripple carry adder. The logic required for addition and subtraction is a selective 9’s complement module. When COMP equals 0, the BIN inputs are simply passed through the block unchanged. When COMP = 1, the block outputs are the 9’s complement of the BIN inputs. The remaining logic and modules are present to take the 10’s complement of input A. This will be used for a correction step that will be needed in Project 2. Overall, the 10’s complement of A will be implemented as: 0 + 9’s Comp(A) + 1. This is generated by setting A = 0 and by replacing B with A in A + 9’s Comp(B) + CIN. To set


A = 0, we AND A with the complement of COMP_A. To replace B with A at the inputs of the 9’s Complement module, we use a quad 2-to-1 multiplexer. For this multiplexer, when COMP_A = 0, S = 1 so that B is its output. When COMP_A = 1, S = 0, giving A as the multiplexer output. Again, for the least significant digit, CIN = 1.

IMPLEMENTATION This section gives a step-by-step process to design the BCD Digit module. Some initial guidelines:

1. Be sure to name all inputs and outputs and modules exactly as given in Fig. 2. Notice that the locations/orientation of pins, labels and size/shape of a symbol, such as a 4-bit adder, can be modified in da to make the wiring/connection easier.

2. Do not use buses within any of the modules, only in the top- level schematic. 3. Remember that you must label the bus before you connect the wires to it. 4. A constant 0 can be obtained by connecting to the gen_lib component ground. 5. A constant 1 can be obtained by connecting to the gen_lib component vcc.

Figure 2. Top-level Schematic of BCD Digit Module


adder4: Design adder4 using da. Use Figure 3-28 as a reference and use the full adder fa available in gen_lib. For the labeling of inputs and outputs of adder4 , use the labels shown in Figure 2. Using quicksim, manually apply some inputs to the adder to be sure that the carry chain is wired correctly. Print out your schematic when finished. Submit: Printed schematic of adder4.

mux4:

Design mux4 using da. Interconnect four copies of mux21 available from gen_lib. Connect an A input to I0 on each mux21 and a B input to I1 on each mux21. Manually apply some inputs in quicksim to the mux to be sure it is correct. Print out your schematic when finished. Submit: Printed schematic of mux4.

carry_gen:

Design carry_gen using da. Use the logic from Figure 3-35. Manually apply some inputs in quicksim to carry_gen to be sure it is logically correct. Print out your schematic when finished. Submit: Printed schematic of carry_gen and a print of the trace window contents for your test.

comp9s:

Design comp9s using da. First find a truth table for the 9’s complement function (don’t forget the don’t cares and ignore selection for the moment) and then use K-maps to simplify the logic. Use the mux4 module to select between the normal and complemented versions of BIN. Print out your schematic when finished. In quicksim, apply all 10 values for BIN for the 9’s complemented case and apply addition tests to check the selection function. Submit: Truth table of the 9’s complement function, and the K-Maps used to obtain the simplified logic. Printed schematic of comp9s and a print of the trace window contents for your test.

bcd_digit:

Design bcd_digit using da. Incorporate the modules you have previously designed as shown in Figure 2, add the additional logic ga tes and carefully connect including the buses. A quicksim force file for testing bcd_digit will be posted on the website. Use this force file to do the test. Write the list output to a file and from the file print out the list output. Print out your schematic when finished. Generate a symbol for bcd_digit and print it out as well. Submit: Printed schematic of bcd_digit, printed symbol for bcd_digit and list output from quicksim.


Part 2: Logic Simplification with CAFÉ

Hexadecimal to Seven-Segment Encoder

Often, digital readouts found in electronic calculators and digital watches use seven-segment LEDs (Light Emitting Diodes). Each of the seven segments in a given digit contains an individual LED, each segments are labeled a-g as shown in Figure 3.

When a suitable voltage is applied to a given segment LED, current flows through and illuminates that segment LED. By choosing which segments to illuminate, any of the nine digits can be shown. For example, as shown in the Figure 3, a 2 can be displayed by illuminating segments a, b, d, e, and g. In the second part of Project 1, we will examine how we can use logic simplification tool CAFÉ to encode hexadecimal to seven-segment LED display.

Figure 3. Seven-segment LED Display and Partially-filled Truth Table

Seven segment displays come in two varieties - common anode (CA) and common cathode (CC). In a CA display, the anodes for the seven segments are joined into a single circuit node. To illuminate a segment in a CA display, the voltage on a cathode must be at a suitably lower voltage (about .7V) than the anode. In a CC display, the cathodes are joined together, and the segments are illuminated by bringing the anode voltage higher than the cathode node (again, by about .7V). You need not understand the details of CA and CC displays, but recognizing the facts that in a CA display, 0 represents illuminated segment and 1 represents un- illuminated segment, and opposite in CC display (1 represents illuminated and 0 represents un- illuminated). For simplicity, we assume that we will be using CC type seven-segment LED display, thus we use 1 to represent illuminated segment and 0 to represent un- illuminated segment.


Figure 4. Illuminations for Hexadecimal to Seven-Segment LED Display. A partially filled truth table for CC-type seven-segment LED display is shown in Figure 3 and can also be found in our text book, Table 3-3, page 110. Complete the truth table, SOMs and POMs for encoder of each seven-segment in the last two pages of the project descriptions (see page 8-9).

Part 2–1.: Complete the truth table for hexadecimal to seven-segment LED Part 2–2.: Fill in the sum of minterms and product of maxterms for each seven

segments: a, b, c, d, e, f and g. Once you fill up the truth table, you will have to put it in a form that café can understand. First, read CAFÉ Documentation in Course Materials (available from Bob’s copy shop) carefully. Create an input file to be used for CAFÉ using Minterms as a function specification (use “<minterm>” as a specification head). You can use any text editors such as vi, emacs, pico, nedit etc to create the input file. Suppose we want to implement XOR function. A 2-input XOR function’s minterms are Z=F(X,Y) = ? m(1,2). Your input file should look something like in Figure 5. <minterm> 2 X Y. ECE 352 Fall 2002: Yong Kim: UW-ID: xxx-xxx-xxxx Z = 1 2. <process> c Z.

Figure 5. An Example CAFÉ Input File for XOR Function.

The Functional Specification, “<minterm>”, specifies how we will provide the function specifications. The first line “2 X Y. ECE…” specifies that there are two inputs X and Y.


Starting with second line, we can give each output and its minterms. The Process Specification, block starting with “<process>,” tells CAFÉ what to do and what to write to its output file. The command “c Z” means form a connection array for output Z. To generate an output, you will type “café xor.input xor.output –x” at the Unix prompt where xor.input is the name of the input file shown in Figure 5.

Part 2–3.: Create a CAFÉ input file for seven-segment LED encoder for each seven segments: a, b, c, d, e, f and g using Minterms as a functional specification. Be sure to include the generated output file showing Connection array, Espresso description and Truth table for a, b, c, d, e, f and g. Using the Minterms as the input function specifications for CAFÉ, create an output file containing, 1) Connection array, 2) Espresso description and 3) Truth table for a, b, c, d, e, f and g. Be sure to include your name, section, student ID number as a comment on your input file. Verify and report whether the CAFÉ generated truth table is exactly same as the truth table you have filled in for Part 2-1.

Part 2–4.: Create a CAFÉ input file for seven-segment LED encoder for each seven segments: a, b, c, d, e, f and g using Maxterm as a functional specification. Be sure to include the generated output file showing Connection array, Espresso description and Truth table for a, b, c, d, e, f and g. Now, repeat Part 2-3, using Maxterms as the input function specifications for CAFÉ, create an output file containing, 1) Connection array, 2) Espresso description and 3) Truth table for a, b, c, d, e, f and g. . Again, be sure to include your name, section, student ID number as a comment on your input file. Compare your results from Part 2-4 and 2-3. Are the results obtained using Maxterms what you expected? Explain! Suppose you are now required to use only the CA type seven-segment LED displays instead of CC type seven-segment LED displays. Which input functional specification (Minterms or Maxterms) would you use to get the connection array? Explain why?

SUBMISSION

Staple together all of the required submissions (both Part 1 and Part 2) exactly in the order given and submit them as directed by your instructor. Be sure to answer all the questions for Part 2. Please do not submit to mailboxes or under doors.


Last (family) name: _________________________ First (given) name: _________________________ Student I.D. #: _____________________________ Circle section: Kim Hu

Department of Electrical and Computer Engineering

University of Wisconsin - Madison ECE/Comp Sci 352 Digital System Fundamentals - Fall 2002-2003

DESIGN PROJECT 1: BCD DIGIT MODULE

Part 2-1. Truth Table for Hex to 7 -Segment LED Display

Inputs Outputs A B C D a b c d e f g 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1


Part 2-2. Sum of Minterms for 7-Segment LED Display (a, b, c, d, e, f & g) a: f(A,B,C,D) = Sigma m( ) b: f(A,B,C,D) = Sigma m( ) c: f(A,B,C,D) = Sigma m( ) d: f(A,B,C,D) = Sigma m( ) e: f(A,B,C,D) = Sigma m( ) f: f(A,B,C,D) = Sigma m( ) g: f(A,B,C,D) = Sigma m( ) Product of Maxterms for 7-Segment LED Display (a, b, c, d, e, f & g) a: f(A,B,C,D) = Pi M( ) b: f(A,B,C,D) = Pi M( ) c: f(A,B,C,D) = Pi M( ) d: f(A,B,C,D) = Pi M( ) e: f(A,B,C,D) = Pi M( ) f: f(A,B,C,D) = Pi M( ) g: f(A,B,C,D) = Pi M( )

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