ecen326: electronic circuits fall...

Sam PalermoAnalog & Mixed-Signal Center

Texas A&M University

ECEN326: Electronic CircuitsFall 2017

Lecture 5: Frequency Response

Announcements

• HW5 due 11/1• Exam 2 11/6

• 9:10-10:10 (10 extra minutes)• Closed book w/ one standard note sheet• 8.5”x11” front & back• Bring your calculator• Covers through Lecture 6• Sample Exam2 posted on website

• Reading• Razavi Chapter 11

2

Agenda

• Frequency Response Concepts• High-Frequency Models of Transistors• Frequency Response Analysis Procedure• CE and CS Stages• CB and CG Stages• CC and CD (Follower) Stages• Cascode Stages• Differential Pairs• Additional Examples

3

44

High Frequency Roll-off of Amplifier

As frequency of operation increases, the amplifier gain decreases

This lecture analyzes this frequency response issue

CH 11 Frequency Response

5

Example: Human Voice I

Natural human voice spans a frequency range from 20Hz to 20KHz, however conventional telephone system passes frequencies from 400Hz to 3.5KHz. Therefore phone conversation differs from face-to-face conversation.

5

Natural Voice Telephone System

6

Example: Human Voice II

6

Mouth RecorderAir

Mouth EarAir

Skull

Path traveled by the human voice to the voice recorder

Path traveled by the human voice to the human ear

Since the paths are different, the results will also be different.


7

Gain Roll-off: Simple Low-pass Filter

In this simple example, as frequency increases the impedance of C1 decreases and the voltage divider consists of C1 and R1 attenuates Vin to a greater extent at the output.

7

sVsRC

sV

sCR

sCsVZZ

ZsV inininCR

Co

1

11

1

RCj

jH

jssRCsV

sVsHin

o

11

response state-steady sinusoidalfor 1

1

88

Gain Roll-off: Common Source

The capacitive load, CL, is the culprit for gain roll-off since at high frequency, it will “steal” away some signal current and shunt it to ground.

1||out m in DL

V g V RC s

=0

LD

LD

Dm

in

out

CR

CsRRg

sVsVsH

1at pole a hascircuit This

1

p

99

Frequency Response of the CS Stage

At low frequency, the capacitor is effectively open and the gain is flat. As frequency increases, the capacitor tends to a short and the gain starts to decrease.

A special frequency is ω=1/(RDCL), where the gain drops by 3dB (half-power). In this single-pole circuit, this is also the pole frequency.

1222

LD

Dm

in

out

CRRg

VV

LD

Dm

LD

Dm

in

out

CR

RgCR

RgVV

1for Solving

21

gainfrequency -low the torelativepoint (-3dB)power -half thefind ToVoltage toalproportion isPower theRecall

2

2

22

2

10

Example: Relationship between Frequency Response and Step Response

10

2 2 21 1

1

1H s j

R C

0

1 11 expout

tV t V u tR C

The relationship is such that as R1C1 increases, the bandwidth drops and the step response becomes slower.


1111

Bode Plot

When we hit a zero, ωzj, the Bode magnitude rises with a slope of +20dB/dec.

When we hit a pole, ωpj, the Bode magnitude falls with a slope of -20dB/dec

21

210

11

11)(

pp

zz

ss

ss

AsH

1212

Example: Bode Plot

The circuit only has one pole (no zero) at 1/(RDCL), so the slope drops from 0 to -20dB/dec as we pass ωp1.


=0

LD

LD

Dm

in

out

CR

CsRRg

sVsVsH

1at pole a hascircuit This

1

p

1313

Pole Identification Example I

inSp CR

11 LD

p CR1

2

22

221

2 11 pp

Dm

in

out RgVV


• Circuit transfer functions can be well approximated by considering that if a node in the signal path has a small-signal resistance Rj and capacitance Cj in parallel to an AC ground, then it contributes a pole of magnitude (RjCj)-1

=0

1414

Pole Identification Example II

inm

S

p

Cg

R

1||

11

LDp CR

12


2

222

12 11

1

pp

SmDm

in

out RgRgVV

1515

Circuit with Floating Capacitor

The pole of a circuit is computed by finding the effective resistance and capacitance from a node to GROUND.

The circuit above creates a problem since neither terminal of CF is grounded.

While we could always derive the transfer function from the small-signal model, there is a useful “Miller’s Theorem” which can be used to approximate the circuit’s poles

1616

Miller’s Theorem

If Av is the gain from node 1 to 2, then a floating impedance ZF can be converted to two grounded impedances Z1 and Z2.

v

F

AZZ

11

v

F

AZZ

/112

CH 11 Frequency Response1

2

1

221

11

1

1211

1

where

11

1

circuitsboth in same thebe should

VVA

AZZ

VVZ

VVVZ

ZV

ZVVI

I

v

v

FFF

F

v

FFF

F

A

ZZ

VVZ

VVVZ

ZV

ZVVI

I

111

1

circuitsboth in same thebe should

2

112

22

2

2122

2

1717

Miller Multiplication

With Miller’s theorem, we can separate the floating capacitor. However, the input capacitor is larger than the original floating capacitor. We call this Miller multiplication.

oF

oF

oFoFvFin

AC

ACACjACjACj

Z

11by multiplied original theis capoutput theprocedure,similar a Following

1by multiplied original theis that capinput an toEquivalent1

111

11

1818

Example: Miller Theorem

FDmSin CRgR

11

FDm

D

out

CRg

R

11

1

Dmv RgA

2222 11 outin

Dm

in

out RgVV

• Note, this is only a (often good) approximation of the transfer function• Uses only the low-frequency gain• Neglects a zero

19

High-Pass Filter Response

121

21

21

11

CRCR

VV

in

out

The voltage division between a resistor and a capacitor can be configured such that the gain at low frequency is reduced.

19CH 11 Frequency Response

sVCsR

CsRsV

sCR

RsVZZ

ZsV ininin

CR

Ro

11

11

11

111

11

1

20

Example: Audio Amplifier

nFCi 6.79 nFCL 8.39

In order to successfully pass audio band frequencies (20 Hz-20 KHz), large input and output capacitances are needed.

200/1100

m

i

gKR


HzCR ii

inp 2021,

kHzC

g Lm

outp 2021

1

1

,

21

Capacitive Coupling vs. Direct Coupling

Capacitive coupling, also known as AC coupling, passes AC signals from Y to X while blocking DC contents.

This technique allows independent bias conditions between stages. Direct coupling does not.

Capacitive Coupling Direct Coupling 21

Allows for high V(RD) (gain), while also allowing a high output stage gate bias for good output swing

Due to direct coupling, must trade-off AV1 for output stage biasing/swing

22

Typical Frequency Response

Lower Corner Upper Corner


Often due to AC coupling

Often due to load/parasitic capacitors

Agenda


23

2424

High-Frequency Bipolar Model

At high frequency, capacitive effects come into play C and Cje are the junction capacitances Cb represents the base charge to generate the non-uniform

charge profile required for proper operation (Chapter 4)

b jeC C C


2525

High-Frequency Model of Integrated Bipolar Transistor

Since an integrated bipolar circuit is fabricated on top of a substrate, another junction capacitance exists between the collector and substrate, namely CCS.

2626

Example: Capacitance Identification


2727

MOS Intrinsic Capacitances

For a MOS, there exist oxide capacitance from gate to channel, junction capacitances from source/drain to substrate, and overlap capacitance from gate to source/drain.

2828

Gate Oxide Capacitance Partition and Full Model

The gate oxide capacitance is often partitioned between source and drain. In saturation, C2 ~ Cgate, and C1 ~ 0. They are in parallel with the overlap capacitance to form CGS and CGD.


Assuming bulk is an AC ground

2929

Example: Capacitance Identification


3030

Transit Frequency

Transit frequency, fT, is defined as the frequency where the current gain from input to output drops to 1.


Cg

Cr

Cr

sCrsCrrg

II

rsC

Z

ZIgVgI

mT

T

T

m

in

out

in

ininminmout

22222 1

yields at 1 toequal magnitude theSetting11

1

GS

mT

mTGS

T

GS

m

in

out

GSin

ininminmout

Cg

gC

sCg

II

sCZ

ZIgVgI

222

yields at 1 toequal magnitude theSetting

1

Neglecting C Neglecting CGD

31

Example: Transit Frequency Calculation

GHzfsVcm

mVVVnmL

T

n

THGS

226)./(400

10065

2


24

3322

474)in about (talked 32

LVVf

WLC

VVLWC

f

WLCC

VVLWCg

Cg

THGSnT

ox

THGSoxnTT

oxGS

THGSoxnm

GS

mT

• The transit frequency increases dramatically as the channel length is shrunk, allowing for much faster transistors with CMOS scaling

• Note, this neglects some advanced device physics (carrier velocity saturation) which slows this rate of frequency increase

Agenda


32

33

Analysis Summary

The frequency response refers to the magnitude of the transfer function.

Bode’s approximation simplifies the plotting of the frequency response if poles and zeros are known.

In general, it is possible to associate a pole with each node in the signal path.

Miller’s theorem helps to decompose floating capacitors into grounded elements.

Bipolar and MOS devices exhibit various capacitances that limit the speed of circuits.


34

High Frequency Circuit Analysis Procedure

Determine which capacitor impact the low-frequency region of the response and calculate the low-frequency pole (neglect transistor capacitance).

Calculate the midband gain by replacing the capacitors with short circuits (neglect transistor capacitance).

Include transistor capacitances. Merge capacitors connected to AC grounds and omit those

that play no role in the circuit. Determine the high-frequency poles and zeros. Plot the frequency response using Bode’s rules or exact

analysis.


Agenda


35

in

XVV

iCRR 21

1

36

Frequency Response of CS Stagewith Bypassed Degeneration – Input AC Coupling

The input AC coupling forms a high-pass filter which should be designed for a certain minimum cut-off frequency


11 21

21

21

21

sCRRsCRR

sCRR

RRs

VV

VV

VV

VV

i

i

i

in

X

X

out

in

X

in

out

frequency off-cut minimum set the todesigned be also should

1frequency pole The

11

11

bS

Smp

SmbS

bSDm

mbS

D

X

out

CRRg

RgsCRsCRRg

gsCR

RVV

37

Frequency Response of CS Stagewith Bypassed Degeneration – Main Amplifier

In order to increase the midband gain, a capacitor Cb is placed in parallel with Rs.


3838

Unified Model for CE and CS Stages


3939

Unified Model Using Miller’s Theorem


CSout

in

CmY

CmX

SThev

SinThev

CCCC

RgCC

RgCCrRR

RrrVV

11

1

DBout

GSin

DmGDY

DmGDX

SThev

inThev

CCCC

RgCC

RgCCRRVV

11

1

4040

Unified Model Using Miller’s Theorem


XYLm

outL

outp

XYLminThevinp

CRg

CR

CRgCR

11

111

,

,

41

Example: CE Stage

fFCfFCfFC

mAIR

CS

C

S

3020100

1001200

GHz

MHz

outp

inp

59.12

5162

,

,

The input pole is the bottleneck for speed.


RL=2k

42

Example: Half Width CS Stage

XW 2

221

2

122

12

1

,

,

XY

Lm

outL

outp

XYLminS

inp

CRg

CR

CRgCR


WCPCACWCC

WCWLCC

W

VVLWCg

jswDjDDB

ovGD

ovoxGS

THGSoxm

32

are caps MOS all learn that will we474In

• LF gain, gmRL reduces by 1/2• Assuming gmRL is still high:• The input pole increases by ~4X• The output pole increases by ~2x

• Constant gain-bandwidth product!

4343

Direct Analysis of CE and CS Stages

Direct analysis yields different pole locations and an extra zero.CH 11 Frequency Response

• For a detailed direct small-signal analysis, see Razavi 11.4.4

ab

b

ssbsas

ssssbsas

CCRCRRCRgbCCCCCCRRa

bsasRgsCs

VV

pp

ppp

p

pppppp

outXYLinThevThevXYLm

outinXYoutXYinLThev

LmXY

Thev

out

21

121

22

2p1

2121

2

21

2

2

and 1

11

ion approximat pole"dominant " a Using

111111

can write wepoles, 2 thefind To1

where1

Exact Expression

4444

Direct Analysis of CE and CS Stages w/ Dominant Pole Approximation


outinXYoutXYinLThev

outXYLinThevThevXYLmp

outXYLinThevThevXYLmp

XY

mz

CCCCCCRRCCRCRRCRgCCRCRRCRg

Cg

1||

11||

||

2

1

• p1 will be lower due to the additional term

• p2 is at a much higher frequency due to “pole splitting”• Discussed more when we talk about stability

4545

Example: CE and CS Direct Analysis (Dominant Pole Approximation)

outinXYoutXYinOOS

outXYOOinSSXYOOmp

outXYOOinSSXYOOmp

CCCCCCrrRCCrrCRRCrrgCCrrCRRCrrg

21

212112

212111

||)(||||1)(||||1

1


221

11

21

, ,

GDDBDBout

GDXYGSin

OOLSThev

CCCCCCCC

rrRRR

46

Example: Comparison Between Different Methods

MHz

MHz

outp

inp

4282

5712

,

,

GHz

MHz

outp

inp

53.42

2642

,

,

GHz

MHz

outp

inp

79.42

2492

,

,

KR

g

fFCfFCfFC

R

L

m

DB

GD

GS

S

20

150

10080250

200

1

Miller’s Exact Dominant Pole

46

Simple Miller theorem analysis vastly overestimates the output pole at a lower frequency

4747

Input Impedance of CE and CS Stages

rsCRgC

ZCm

in ||1

1

sCRgCZ

GDDmGSin

11

CRgCrZ

r

Cmin 1

1at pole a has

:sfrequencie lowAt capacitivepurely aseApproximat

Agenda


48

49

Low Frequency Response of CB and CG Stages

miSm

iCm

in

out

gsCRgsCRgs

VV

1

As with CE and CS stages, the use of capacitive coupling leads to low-frequency roll-off in CB and CG stages (although a CB stage is shown above, a CG stage is similar).


CR

VA=

mme gg

r 1

5050

Frequency Response of CB Stage

Xm

S

Xp

Cg

R

1||

1,

CCX

YLYp CR

1,

CSY CCC

Or


• No Miller effect• Input pole is ~fT (very

high frequency)

5151

Frequency Response of CG Stage

OrX

mS

Xp

Cg

R

1||

1,

SBGSX CCC

YLYp CR

1,

DBGDY CCC

Similar to a CB stage, the input pole is on the order of fT, so rarely a speed bottleneck.

Or


5252

Example: CG Stage Pole Identification

111

, 1||

1

GDSBm

S

Xp

CCg

R

22112

, 11

DBGSGDDBm

Yp

CCCCg


OrMOSFET Caps

53

Example: Frequency Response of CG Stage

KR

g

fFCCfFCfFC

R

d

m

DBSB

GD

GS

S

20

150

10080

250200

1

MHz

GHz

Yp

Xp

4422

31.52

,

,


• Input pole is ~fT• Output pole limits bandwidth

Agenda


54

5555

Emitter and Source Followers

The following will discuss the frequency response of emitter and source followers using direct analysis, as this circuit typically has 2 poles that are close together

Emitter follower is treated first and source follower is derived easily by allowing r to go to infinity

5656

Direct Analysis of Emitter Follower

1

1

2

bsas

sgC

VV m

in

out

m

LS

mS

LLm

S

gC

rR

gCCRb

CCCCCCgRa

1


For detailed analysis, see Razavi 11.6

mgr 1 that Assuming

Cgm

z

Generally, this yields 2 close poles, necessitating a direct solution approach

5757

Direct Analysis of Source Follower Stage

1

1

2

bsas

sgC

VV m

GS

in

out

m

SBLGDGDS

SBLGSSBLGDGSGDm

S

gCCCCRb

CCCCCCCCgRa


SBC

GD

GS

CCCC

r

Taking

58

Example: Frequency Response of Source Follower

0

150

10080250

100200

1

m

DB

GD

GS

L

S

g

fFCfFCfFC

fFCR

GHzjGHz

GHzjGHz

p

p

57.279.12

57.279.12

2

1


2 Complex Conjugate Poles

5959

Example: Source Follower

1

1

2

1

bsas

sg

C

VV m

GS

in

out

1

22111

22111111

))((

m

DBGDSBGDGDS

DBGDSBGSGDGSGDm

S

gCCCCCRb

CCCCCCCgRa


Or

6060

Input Capacitance of Emitter/Source Follower

Or


Lmin Rg

CCC

1

Lm

GSGDin Rg

CCC

1

Lm

Lmv Rg

RgA

1

withTheoremMiller Using

6161

Example: Source Follower Input Capacitance

1211

1 ||11

GSOOm

GDin Crrg

CC


6262

Output Impedance of Emitter Follower

1

sCrRrsCrR

IV SS

X

X


• Need to consider the output resistance of the previous stage, RS

S

Se

S

R

RrRr

:FrequencyHigh 11

:Frequency Low

Neglecting C

Output impedance generally goes up w/ frequency!

6363

Output Impedance of Source Follower

mGS

GSS

X

X

gsCsCR

IV

1


SR :FrequencyHigh g1 :Frequency Lowm

Neglecting CGD

Output impedance generally goes up w/ frequency!

6464

Active Inductor

The plot above shows the output impedance of emitter and source followers. Since a follower’s primary duty is to lower the driving impedance (RS>1/gm), the “active inductor” characteristic on the right is usually observed.


If RS < 1/gm(not usually true)

If RS > 1/gm(general case)

Cr

CrRRr

p

S

Sz

1

FollowerEmitter

GS

mp

GSSz

CgCR

1FollowerSource

6565

Example: Output Impedance

33

321 1||

mGS

GSOO

X

X

gsCsCrr

IV

Or


Note: This neglects the capacitors from M1 and M2

M3 only

Agenda


66

6767

Frequency Response of Cascode Stage

For cascode stages, there are three poles and Miller multiplication is smaller than in the CE/CS stage.

12

1,

m

mXYv g

gAXYx CC 2


Assume (W/L)1 = (W/L)2

6868

Poles of Bipolar Cascode

111, 2||

1

CCrRS

Xp 121

2

,

211

CCC

g CSm

Yp

22,

1

CCR CSL

outp


Comparable to fT

6969

Poles of MOS Cascode

12

11

,

1

1

GDm

mGSS

Xp

CggCR

211

221

2

,

111

SBGDm

mGSDB

m

Yp

CCggCC

g

22,

1GDDBL

outp CCR


70

Example: Frequency Response of Cascode

KR

g

fFCfFCfFC

R

L

m

DB

GD

GS

S

20

150

10080250

200

1

MHz

GHz

GHz

outp

Yp

Xp

4422

73.12

95.12

,

,

,


GHz

MHz

outp

inp

53.42

2642

,

,

ExactCompare to simple CS

Now output pole sets the bandwidth, and it has increased by 67%

CH 10 Differential Amplifiers 71CH 11 Frequency Response 71

MOS Cascode Example

12

11

,

1

1

GDm

mGSS

Xp

CggCR

3311

221

2

,

111

DBGDGDm

mGSDB

m

Yp

CCCggCC

g

22,

1GDDBL

outp CCR

• Allows for a smaller M2• Improves output pole• Lowers poles at nodes X and Y, but

they should still be relatively high

7272

I/O Impedance of Bipolar Cascode

sCCrZin

111 2

1||

sCC

RZCS

Lout22

1||

AV

(Neglecting RS)

7373

I/O Impedance of MOS Cascode

sCggC

Z

GDm

mGS

in

12

11 1

1

sCCRZ

DBGDLout

22

1||


0

(Neglecting RS)

Cascode Frequency Response Take-Away Points

• Cascode amplifiers offer two good properties• High output impedance to serve as a

good current source and/or amplifier• Reduction of the Miller effect and

better high-frequency performance

• Main cost is higher voltage headroom to keep cascode transistor in saturation• Impacts maximum output swing and

distortion performance74

Agenda


75

7676

Bipolar Differential Pair Frequency Response

Since bipolar differential pair can be analyzed using half-circuit, its transfer function, I/O impedances, locations of poles/zeros are the same as that of the half circuit’s (Slide 43).

Half Circuit


outXYLinThevThevXYLm

outinXYoutXYinLThev

LmXY

Thev

out

CCRCRRCRgbCCCCCCRRa

bsasRgsCs

VV

1

where12

7777

MOS Differential Pair Frequency Response

Since MOS differential pair can be analyzed using half-circuit, its transfer function, I/O impedances, locations of poles/zeros are the same as that of the half circuit’s (Slide 43).

Half Circuit


7878

Example: MOS Differential Pair

33,

311

331

3

,

1311,

1

111

])/1([1

GDDBDoutp

SBGDm

mGSDB

m

Yp

GDmmGSSXp

CCR

CCggCC

g

CggCR

79

Common Mode Frequency Response

Css will lower the total impedance between point P to ground at high frequency, leading to higher CM gain which degrades the CM rejection ratio.

79

12

1121

SSmSSSS

SSSSDm

SSSS

m

D

CM

outRgsCRsCRRg

sCR

g

RVV

80

Tail Node Capacitance Contribution

Source-Body Capacitance of M1, M2

Drain-Body Capacitance of M3 Gate-Drain Capacitance of M3


• M3 is often a large (wide) transistor in order to have a small compliance (VDS) voltage• Watch out for degraded high-frequency CMRR!

CDB3

Agenda


81

82

Example: Capacitive Coupling (Low-Frequency Cut-Off)

EBin RrRR 1|| 222

HzCRr B

L 5422||

1

1111

82

mAImAI

C

C

13.175.1

2

1

22

22

22

211 inC

in

inC

in

Thev

YRRsC

RsC

RsC

R

RsVV

To find L2:

HzCRR inC

L 9.221

222

The “highest” low-frequency pole (L1 = 542Hz) will set the low-frequency cut-off

83

MHzCRR inD

L 92.621

2212

MHzCR

Rg

CRg

S

Sm

Sm

L 2.37211

111

11

111

1

kkR

kRgA

ARR

in

Dmv

v

Fin

30.167.7

10

67.61501

1

2

222

22

Example: IC Amplifier – Low Frequency Design


121 150 mm gg

The “highest” low-frequency pole (L1 = 37.2MHz) will set the low-frequency cut-off

84

dBAAAA

RRgvvA

vvv

v

inDmin

Xv

0.281.2567.6

77.3||

21

2

2111

Example: IC Amplifier – Midband Design


121 150 mm gg

Example: IC Amplifier – High Frequency Design

CH 11 Frequency Response 85

22211

11111121

11211112

11211111

1where

99.221

22221

1

vGDGSDBout

outGSoutGDGDGSinDS

outGDinDGSSSGDvp

outGDinDGSSSGDvp

ACCCC

GHzCCCCCCRRR

CCRRCRRCA

MHzCCRRCRRCA

To get an accurate estimate for p1 and p2, use the dominant pole approximation expressions on Slide 44

Example: IC Amplifier – High Frequency Design

CH 11 Frequency Response 86

MHzC

ACR

GHz

MHz

DBv

GDD

p

p

p

829211

1

99.22

2222

22

22

3

2

1

Next Time

• Feedback• Razavi Chapter 12

87

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