New Optimal Pulsewidth Modulation for SingleDC-Link Dual Inverter fed Open-end Stator

Winding Induction Motor DrivesAmarendra Edpuganti∗, Student Member IEEE, Akshay K. Rathore∗, Senior Member IEEE and

Joachim Holtz†, Life Fellow IEEE∗Department of Electrical and Computer Engineering

National University of Singapore117576 Singapore

Email: amarendra@nus.edu.sg; akshayrathore@nus.edu.sg†University of Wuppertal

42285 Wuppertal, GermanyEmail:j.holtz@ieee.org

Abstract—The multilevel topologies of dual inverters feedingan open-end stator winding induction motor has been introducedaround two decades ago. However, these topologies requirecommon-mode inductor in series with motor windings to suppresszero-sequence or common-mode currents. In medium-voltagehigh power drives, low device switching frequencies are preferredto improve the overall efficiency of drive system. On the otherhand, low device switching frequencies leads to higher totalharmonic distortion (THD) of stator currents. Therefore, theobjective of our study was to propose a new optimal pulsewidthmodulation to eliminate zero-sequence currents and minimizeharmonic distortion of stator currents, while operating powersemiconductor devices at low device switching frequencies. Themain idea is to select switching patterns such that all zero-sequence components are eliminated and then, perform optimiza-tion for every steady-state operating point to minimize the THDof stator currents. The proposed modulation has been validatedon dual two-level and dual three-level inverters fed 1.5-kW open-end stator winding Induction motor drive.

I. INTRODUCTION

Multilevel converters (MLC) are now a mature and well es-tablished technology for medium-voltage (MV) high power ap-plications [1]–[3]. The popular multilevel converter topologiesare neutral-point or diode-clamped converters (NPC), flying-capacitor converters (FC) and cascaded H-Bridge converters(CHB) [4]. The concept of dual two-level (D2L) inverter fedopen-end stator winding induction motor drive was introducedby Stemmler and Guggenbach [5]. This topology requiresonly half of the dc-link voltage and has no neutral-pointfluctuations compared to 3L-NPC topology. In addition, thevoltage amplitude required to produce the air-gap flux in themachine gets divided among the two dc sources. Subsequently,dual inverter topologies have been proposed to achieve five-level (5L), seven-level (7L) and nine-level (9L) multilevelwaveforms across stator windings [6]–[9]. The main draw-back of these topologies are requirement of a common-mode

inductor in series with stator windings to suppress the zero-sequence or common-mode currents.

The energy efficiency in MV high power drives is improvedsignificantly by reducing the device switching frequencies,which brings down the dominating switching losses. However,total harmonic distortion (THD) of machine stator currentsincreases at lower device switching frequencies. Also, it isdesirable to eliminate or minimize the zero-sequence cur-rent components in dual inverter fed induction motor drives.Therefore, the challenge is to minimize or eliminate zero-sequence current components as well as minimize THD ofmachine stator currents, while operating MLCs at low de-vice switching frequencies. In literature, several space vectormodulation (SVM) based techniques have been proposed toeliminate zero-sequence currents as well as common-modevoltages which leads to bearing and leakage currents [10]–[14]. However, all these modulation techniques require deviceswitching frequencies around 1 kHz and hence, not preferredfor MV high power applications.

Synchronous optimal pulsewidth modulation (SOP) is anemerging control technique to operate MLCs at low deviceswitching frequencies with minimal harmonic distortion ofmachine stator currents [15]. The SOP technique has beendemonstrated for dual 3-level (D3L) inverter fed open-endstator winding induction motor drives with maximum deviceswitching frequencies limited to 200 Hz [16]. Later, thisSOP technique has been improved to minimize the zero-sequence currents by using additional constraint (VoltSecT)in the optimization [17]. However, requirement of common-mode inductor still remains and its kVA-rating depends onthe common-mode voltages at six-step operation. Therefore,the objective of our study was to propose a new SOP tech-nique to eliminate zero-sequence currents as well as minimizeharmonic distortion of stator currents, while operating powersemiconductor devices at low device switching frequencies.

978-1-4799-5776-7/14/$31.00 ©2014 IEEE 3865

(a)

(b)

Fig. 1. Single dc-link dual inverter fed open-end stator winding inductionmotor drive. (a) D2L topology (b) D3L topology

The main idea is to impose a constraint on switching patternssuch that zero-sequence voltage components are eliminatedand then, perform optimization to determine switching patternsthat minimize the THD of stator currents.

The topologies of D2L and D3L inverters feeding anopen-end stator winding induction motor drive are shown inFig. 1(a)-(b), respectively. In case of D2L topology shownin Fig. 1(a), two voltage levels (Vdc, 0) are obtained be-tween mid-point of each leg and negative terminal of dc-link capacitor ‘O’ and thus three voltage levels (−Vdc, 0, Vdc)are obtained across each stator winding. Similarly, for D3Ltopology shown in Fig. 1(b), each 3L-NPC leg generatesthree voltage levels (−Vdc, 0, Vdc) with respect to neutral-point of dc-link capacitors ‘N’ and thus five voltage levels(−2Vdc,−Vdc, 0, Vdc, 2Vdc) are obtained across each statorwinding.

The rest of the contents are organized as follows: the detailsof proposed SOP technique are presented in Section II, and theexperimental results are demonstrated in Section III to validatethe proposed technique.

II. NEW SYNCHRONOUS OPTIMAL PULSEWIDTHMODULATION

SOP technique generates switching patterns by using off-line optimization technique for ( vf ) control of induction motordrive. The goal of optimization is to minimize the THD ofstator currents. The word ‘synchronous’ refers to fact thatdevice switching frequency fs is always made an integer mul-tiple of fundamental frequency of inverter output voltage f1.In low device switching frequency applications, synchronizedpulsewidth modulation (PWM) results in a small number ofswitching instants and thus optimization based techniques aresuggested to pre-determine switching angles [18]. All evenorder harmonic components are eliminated by using half-waveand quarter-wave symmetry in the switching patterns. Then,

(a) (b)

Fig. 2. Output potential waveforms of (a) 2L inverter (b) 3L-NPC inverter

it is sufficient to consider total switching instants in a quarterperiod known as pulse number N .

The goal of SOP technique is to operate D2L inverter andD3L inverters with maximum device switching frequenciesfs,max limited to 400 Hz and 200 Hz, respectively. Themodulation index m is defined as f1

f1R, where f1R denotes the

rated fundamental frequency of the induction motor drive (50Hz). The steady-state operating points are denoted by (m,N ).The first step in SOP would be to compute the pulse numberN for a given m such that fs is limited to fs,max. Then,pulse patterns are selected such that zero-sequence voltages inthree-phase windings are eliminated and finally, optimizationis performed to determine switching angles that minimize theTHD of machine currents for each operating point (m,N ).

A. Computation of pulse number N

The phase output voltages of 2L and 3L-NPC inverters areshown in Fig. 2(a)-(b) and their respective pulse numbers aredenoted as N2L and N3L, respectively. The pulse number foroutput voltages of D2L and D3L inverters ND2L, ND3L isequal to 2N2L and 2N3L, respectively. It can be shown that,the device switching frequencies fs of the 2L and 3L-NPCinverters are equal to (2N2L + 1)f1 and N3Lf1, respectively.If maximum device switching frequency fs,max is fixed, thenthe values of N2L and N3L are obtained as,

N2L = floor

(fs,max − f1

2f1

)(1)

N3L = floor

(fs,max

f1

)(2)

The values of ND2L, ND3L, and fs for any given m canbe determined from (1) and (2), as shown in Table I (a)-(b),respectively. The device switching frequencies fs of D2L andD3L inverters versus fundamental frequency of operation f1are shown in Fig. 3 (a)-(b), respectively. As shown in TableI and Fig. 3, fs,max for D2L and D3L inverters are limitedto 400 Hz and 200 Hz, respectively. After determining thevalues of ND2L and ND3L for a given m, the next step wouldbe to determine optimal switching patterns for all steady-stateoperating points.

B. Derivation of Objective Function

The distortion factor d is used as an objective function foroptimization, which is independent of machine parameters.

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Table I: Pulse number N and device switching frequencies fs for a given m. (a) D2L inverter (b) D3L inverter

m f1(Hz) N2L1 N2L2 ND2L fs(Hz)0.889 - 1.000 44.49 - 50.00 3 3 6 311.46 - 3500.728 - 0.888 36.41 - 44.44 4 4 8 327.73 - 4000.616 - 0.727 30.82 - 40.00 5 5 10 339.01 - 4000.534 - 0.615 26.72 - 30.77 6 6 12 347.32 - 4000.471 - 0.533 23.58 - 26.67 7 7 14 353.69 - 4000.422 - 0.470 21.10 - 23.53 8 8 16 358.75 - 4000.382 - 0.421 19.09 - 21.05 9 9 18 362.85 - 4000.349 - 0.381 17.44 - 19.04 10 10 20 366.27 - 4000.321 - 0.348 16.05 - 17.39 11 11 22 369.15 - 4000.297 - 0.320 14.86 - 16.00 12 12 24 371.62 - 400

(a)

m f1(Hz) N3L1 N3L2 ND3L fs(Hz)0.801 - 1.000 40.05 - 50.00 4 4 8 160.20 - 2000.667 - 0.800 33.38 - 40.00 5 5 10 166.90 - 2000.572 - 0.667 28.62 - 33.33 6 6 12 171.73 - 2000.501 - 0.571 25.05 - 28.57 7 7 14 175.35 - 2000.445 - 0.500 22.27 - 25.00 8 8 16 178.17 - 2000.401 - 0.444 20.05 - 22.22 9 9 18 180.45 - 2000.364 - 0.400 18.23 - 20.00 10 10 20 182.32 - 2000.334 - 0.363 16.71 - 18.18 11 11 22 183.88 - 2000.308 - 0.333 15.43 - 16.67 12 12 24 185.21 - 2000.286 - 0.307 14.33 - 15.38 13 13 26 186.36 - 200

(b)

(a)

(b)

Fig. 3. Device switching frequency fs versus fundamental frequency ofoperation f1. (a) D2L inverter (b) D3L inverter

The expression of d is given by [19],

d =ih

ih,six−step(3)

where, ih, ih,six−step represents the harmonic rms current dur-ing normal operation and six-step operation (m=1 or f1=f1R)of the multilevel inverter, respectively.

The stator winding voltages consists of 3L waveforms incase of D2L inverter fed induction motor drive. By utilizingFourier series analysis, the harmonic components of statorwinding voltages vj1j2 (j=A,B,C) for normal and six-stepoperation are obtained as,

ukD2L =4Vdckπ

ND2L∑i=1

s(i)cos(kαi) (4)

ukD2L,six−step =4Vdckπ

(5)

where, k corresponds to kth order harmonic component(k=1,3,5,7,9,11...), s(i) represents the slopes of switching

transitions at switching angles αi. The value of s(i) is equalto -1 for transition to lower potential and s(i) is equal to 1 fortransition to higher potential. Assuming that stator currents aredetermined by leakage inductances, the final expressions fordD2L is obtained as [20],

dD2L =

√∑k i

2kD2L√∑

k i2kD2L,six−step

=

1ω1lσ

√∑k

(ukD2L

k

)21

ω1lσ

√∑k

(ukD2L,six−stepk

)2=

√∑k(

1k4 )(

∑ND2L

i=1 s(i)cos(kαi))2√∑k(

1k4 )

(6)

The voltages across stator windings consist of 5L wave-forms in case of D3L inverter fed induction motor drives.By using Fourier series analysis, harmonic components ofmachine phase voltages vj1j2 (j=A,B,C) for normal and six-step operation are obtained as,

ukD3L =4Vdckπ

ND3L∑i=1

s(i)cos(kαi) (7)

ukD3L,six−step =8Vdckπ

(8)

Assuming that stator currents are determined by leakageinductances, the final expressions for dD3L is obtained as [20],

dD3L =

√∑k(

1k4 )(

∑ND3L

i=1 s(i)cos(kαi))2

2√∑

k(1k4 )

(9)

It can be observed that expressions for distortion factordD2L, dD3L depends only on the switching patterns (s(i), αi

and pulse number N ). As the induction motor is operated inconstant ( vf ) control mode, the constraint on switching anglesto set the fundamental frequency of inverter output voltage to

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f1 is obtained as,

f1f1R

=u1

u1,six−step

mD2L =

ND2L∑i=1

s(i) cos(αi) (10)

mD3L =1

2

ND3L∑i=1

s(i) cos(αi) (11)

where, mD2L and mD3L denotes the modulation index valueof D2L and D3L inverters, respectively.

C. Optimization of Switching Patterns

For the optimization problem, it is sufficient to considera single-phase switching pattern in a quarter period. Thecomplete single-phase switching pattern (0 to 360◦) can beobtained by using half-wave and quarter-wave symmetry. Fi-nally, the three-phase switching pattern is obtained by shiftingthe single-phase switching pattern by 0◦, 120◦, and 240◦,respectively.

In the optimization, the first step is to determine the valueof pulse number N for a given m based on (1) or (2). Next,generate 0.5*N initial angles ang1 randomly for one inverterand initial angles ang2 for second inverter are obtained byshifting ang1 by 120◦. Then, obtain the initial angles ang forstator winding voltages from ang1 and ang2. Thus, all thezero-sequence voltage components in stator winding voltagesare eliminated due to 120◦ phase shift between inverter outputvoltages. Next, the possible structures st of stator windingvoltages are determined. The structure represents a uniquesequence of voltage levels, which is usually represented interms of switching transitions s(i) at each switching angle.For example, there exists only possible structure for 2L and3L waveforms as shown in Fig. 2(a)-(b), respectively. Then, allthe possible switching patterns for D2L and D3L inverters areobtained by combining ang and st. For each switching pattern,optimization is performed to determine switching angles thatminimize the objective function value (dD2L or dD3L), forall steady-state operating point (m,N ). The optimal switchingpatterns are stored in a FPGA controller for all operating points(m,N ). After optimization, there might be large discontinuitiesin switching angles for consecutive operating points with sameN . Thus, post-optimization is performed if switching anglesfor consecutive values of m with same N differ by more than5 degrees [21].

The proposed SOP algorithm was implemented using MAT-LAB programming for D2L and D3L inverters with fs,max

equal to 400 Hz and 200 Hz, respectively. The values of d forD2L and D3L inverters for various values of m, are shown inFig. 4. It can be observed that performance of D3L inverter isalways better than D2L inverter, which is due to increase innumber of voltage levels. As the value of m becomes closeto unity, operation of the inverter will be similar to six-stepoperation and hence results in higher THD. The SOP offersbest performance in the range from m = 0.30 to 0.94.

Fig. 4. Distortion factor d versus modulation index m for D2L and D3Linverters with fs,max = 400 Hz and 200 Hz, respectively.

(a)

(b)

(c)

Fig. 5. (a) Experimental results for (m=0.9333, N=6). X-axis:10 ms/div.(1) Stator winding voltage (Y-axis:50 V/div). (2) Stator current (Y-axis:4A/div). (3) Zero-sequence current (Y-axis:1 A/div). (b) Experimental resultsfor (m=0.7255, N=10). X-axis:10 ms/div. (1) Stator winding voltage (Y-axis:50 V/div). (2) Stator current (Y-axis:4 A/div). (3) Zero-sequence current(Y-axis:1 A/div). (c) Experimental results for (m=0.502, N=14). X-axis:10ms/div. (1) Stator winding voltage (Y-axis:50 V/div). (2) Stator current (Y-axis:4 A/div). (3) Zero-sequence current (Y-axis:1 A/div)

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III. EXPERIMENTAL RESULTS

The proposed SOP technique was implemented to controlD2L and D3L inverters feeding 1.5-kW open-end stator wind-ing induction motor drive. The inverters were prepared usingsix-pack modules FS30R06W1E3 (VCE =600 V, ICnom =30A) and 3L-NPC modules F3L30R06W1E3 B11 (VCE =600V, ICnom =30 A) from Infineon and for driving IGBTs, SKHI61R (VCE =900 V, fmax =50 kHz) from Semikron was used.At the inverter output terminals, LC filter was not used inorder to get better understanding of the significant harmonicsin stator currents.

A. D2L inverter

The optimal switching angles were generated for threeoperating points (m=0.9333, f1=46.67 Hz, N=6), (m=0.7255,f1=36.275 Hz, N=10) and (m=0.5020, f1=25.1 Hz, N=14).The D2L inverter was supplied with DC input voltage of70 V. The stator winding voltage, stator current, and zero-sequence current for three operating points are shown in Fig.5 (a)-(c), respectively. It can be observed that, stator voltagesconsists of 3L waveforms and the stator currents are nearlysinusoidal with device switching frequencies limited to 400Hz. The zero-sequence components are obtained by using therelation (ia+ib+ic)

3 and it can be observed that they are almosteliminated.

The space vector trajectories of stator currents for the threeoperating points are shown in Fig. 6 (a)-(c), respectively.The nearly circular trajectories demonstrate lower harmonicdistortion, although the device switching frequencies werelimited to 400 Hz. The stator currents are recorded into a PCby using data acquisition system and it is further analyzedto estimate the harmonic distortion of stator currents. Thecurrent harmonic spectrum for three operating points areshown in 7 (a)-(c), respectively. The THD of stator currentsfor three operating points were obtained as 4.1%, 9.25%and 13.2%, respectively. It can be observed that harmonicdistortion increases at lower values of modulation index. Foroperating point (m=0.7255, N=10), there was one significantharmonic (19th) of magnitude equal to 7.5% of fundamental.Similarly, for operating point (m=0.502, N=14), there weretwo significant harmonics (29th and 31st) with magnitudeequal to 7% and 8.9% of fundamental. However, these higherorder dominant harmonics can be attentuated signficantly byusing LC filter at the inverter output terminals.

(a) (b) (c)

Fig. 6. Stator current space vector trajectories (a) (m=0.9333, N=6) (b)(m=0.7255, N=10) (c) (m=0.5020, N=14)

(a)

(b)

(c)

Fig. 7. Harmonic spectrum of stator currents (enlarged view to show thedominant harmonic components). X-axis: Frequency (Hz). Y-axis: Ih

I1. (a)

(m=0.9333, N=6) (b) (m=0.7255, N=10) (c) (m=0.502, N=14)

B. D3L inverter

The optimal switching patterns were generated for threeoperating points (m=0.9294, f1=46.47 Hz, N=8), (m=0.6667,f1=33.33 Hz, N=12) and (m=0.5098, f1=25.49 Hz, N=14).The DC input voltage to D3L inverter was maintained at 60 V.The stator winding voltages, stator current, and zero-sequencecurrent for each operating points are shown in Fig. 8 (a)-(c),respectively. The stator winding voltages of machine consistsof 5L waveforms. The stator currents are nearly sinusoidalalthough device switching frequencies are limited to 200 Hz.The improvement in THD of stator currents compared toD2L inverter can be observed. The zero-sequence currentcomponents are almost eliminated. It should be noted that,there exist small zero-sequence currents as the stator currentsin each phase might differ due to unequal winding resistancesand inductance values.

The space vector trajectories of stator currents for threeoperating points (m=0.9294, N=8), (m=0.6667, N=12) and(m=0.5098, N=14), are shown in Fig. 9 (a)-(c), respectively.The nearly circular trajectories demonstrate low THD withdevice switching frequencies limited to 200 Hz. In addition,data acquisition system was used to record stator currents intoa PC to perform FFT analysis. The THD of stator currents forthree operating points were equal to 2.63%, 6.11% and 5.64%,respectively, as shown in Fig. 10(a)-(c). It can be conlcudedthat better quality of stator current waveforms are acheivedwith D3L inverter compared to D2L inverter, which is due to5L waveforms across stator windings.

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(a)

(b)

(c)

Fig. 8. (a) Experimental results for (m=0.9294, N=8). X-axis:10 ms/div.(1) Stator winding voltage (Y-axis:50 V/div). (2) Stator current (Y-axis:4A/div). (3) Zero-sequence current (Y-axis:1 A/div). (b) Experimental resultsfor (m=0.6667, N=12). X-axis:10 ms/div. (1) Stator winding voltage (Y-axis:50 V/div). (2) Stator current (Y-axis:4 A/div). (3) Zero-sequence current(Y-axis:1 A/div). (c) Experimental results for (m=0.5098, N=14). X-axis:10ms/div. (1) Stator winding voltage (Y-axis:50 V/div). (2) Stator current (Y-axis:4 A/div). (3) Zero-sequence current (Y-axis:1 A/div)

(a) (b) (c)

Fig. 9. Stator current space vector trajectories (a) (m=0.9294, N=8) (b)(m=0.667, N=12) (c) (m=0.5098, N=14)

(a)

(b)

(c)

Fig. 10. Harmonic spectrum of stator currents (enlarged view to show thedominant harmonic components). X-axis: Frequency (Hz). Y-axis: Ih

I1. (a)

(m=0.9294, N=8) (b) (m=0.667, N=12) (c) (m=0.5098, N=14)

IV. SUMMARY AND CONCLUSION

The requirements in dual inverter fed medium-voltage high-power drives are low device switching frequencies, low har-monic distortion of machine stator currents and eliminationor minimization of zero-sequence current components. A newSOP technique has been proposed to satisfy all these threerequirements. The main idea is to generate 120◦ phase shiftbetween switching patterns and then optimize the switchingpatterns to minimize the harmonic distortion of stator currents.

The proposed technique has been demonstrated on D2L andD3L inverters feeding an open-end stator winding inductionmotor drive. The maximum device switching frequenciesfs,max were limited to 400 Hz and 200 Hz, respectively.In case of D2L inverter fed induction motor drive, the zero-sequence components are almost eliminated with THD of ma-chine stator currents in the range from 4% to 13%. Moreover,significant harmonics in current waveforms are of higher order,which can be further attenuated by using LC filter at theinverter output terminals. On the other hand, the harmonicdistortion of stator currents was further reduced by using theD3L inverter. The THD of stator currents was in the rangeof 3% to 7% and the zero-sequence current components arealmost eliminated. The improvement is qualiy of stator currentwaveforms with D3L inverter is due to 5-level waveformsacross stator windings. It can be concluded that, the proposedSOP technique was able to eliminate zero-sequence currents aswell as minimize the THD of stator currents, while operatingMLCs at low device switching frequencies.

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