EE 330 Final Design Projects Spring 2016

Students may work individually or in groups of 2 on the final design project. Partners need not

be in the same laboratory section. Please email the name of your group members and rank-

ordered project preferences to:

Xilu Wang <xiluw@iastate.edu>

Please send only one request per group.

In the rank-ordering, please submit your top 3 choices. At most 3 groups will be assigned per project on a first come first serve basis. Selection time will start at 5:00 p.m. on Saturday April 2. Any requests with a time-stamp prior to 5:00 will be placed at the bottom of the priority list. We will try to notify you about final project selections by 1:00 p.m. on Sunday April 3. Please start early on your project, and recognize that some projects may require a bit of research and on-your-own learning. If you get stuck on how to accomplish a task, please consult with either one of the TAs or with the course instructor for guidance on how to resolve issues that may arise. READ each project carefully and thoroughly! You cannot switch projects once you have been assigned to the project.

Project List

Project 1 Digital Stopwatch/Timer Project 2 Electronic Theremin Project 3 Laser Controlled Race Car Project 4 Digital Potentiometer/Amplifier/DAC Project 5 Transceiver Block Project 6 Laser Reaction Game

Project 7 Residential Artistic Light Controller Project 8 Silicon-Based Temperature Sensor Project 9 Analog Hardware Trojan Project 10 Water Fountain Controller Project 11 Nonsynchronous Traffic Intersection Controller Project 12 Self Defined

Project 1 Digital stopwatch/timer In this project, you will be asked to design a digital stopwatch/timer. The circuit should be

designed in a 0.5u CMOS process and should be complete through post layout simulation.

The time should be displayed on a 7-segment display. You must specify the exact display that you will be using for your design. If the circuit is fabricated, it should drive the display directly without the need for any additional components. You can include any number of push button switches for programming the device. The time-base accuracy you have on this project need not be real accurate, +/-30% , is acceptable (this circumvents the need for a crystal oscillator). The timer should also drive an acoustic output device, a buzzer or alarm, when used in the timer mode. Specify exactly what buzzer or alarm device is to be used and include any necessary interface circuitry to drive the acoustic output device. The circuit should be designed so that all that is needed to operate the device is the circuit you design, a single dc power supply, the 7-segment array, and the push-button switches.

Project 2 Electronic Theremin This project is to design a circuit that preforms as an electronic Theremin. The circuit should be

designed in a 0.5u CMOS process and should be complete through post layout simulation.

The electronic Theremin should be “played” by having the user move his/her hands over the

device to change the light striking a 4-element photo-detector array. You can specify whatever

commercially available photo-detector you want to use but likely it will be a photo-resistor, a

photo-transistor, or a photo-diode.

This Theremin is to be comprised of two independent but identical audio frequency oscillators.

The output of the two oscillators are to be added together and that comprises the output of the

device. The output should be capable of driving a 1K load off chip. The user interface will

include four of the photo-detectors that should be placed on a flat surface somewhere around

4” apart. The instrument is played by moving hands above the photo-detectors to create

unique sounds by modulating the light striking the photo detectors and thereby controlling the

amplitude and frequency of the two oscillators. The user control should provide the ability to

independently adjust the amplitude and frequency of each of the 2 oscillators. With total

darkness, the audio output should vanish. You may do either an analog or digital

implementation. Extra credit will be given if you also do a hardware demonstration of your

Theremin.

Project 3 Laser controlled race car In this project you are to design a laser controlled race car. A radio-controlled car that can be

modified by removing the rf controller and adding the laser control will be provided. Other

components needed for the design can be obtained from the part shop. Though two persons

may work on a project, the car should be operated by 1 person using a single laser pointer

during testing. The car is to be designed with 5 separate receivers;

Receiver 1: Causes car to go forward Receiver 2: Causes car to go backward Receiver 3: Causes car to turn left Receiver 4: Causes car to turn right Receiver 5: Causes car to recenter the wheels

Operation: The user will shine the laser from up to 3 stories away at any given receiver to operate the vehicle. To go forward or backward, the user must hold the laser on the receiver. If the laser is removed, the car should stop immediately. To turn, the user will shine the laser at the left/right/center receivers (equivalent to turning the wheel of your car), the wheels will lock in any 1 of 3 directions; all the way left, all the way right, and center. From there the user can then shine the laser on ‘forward’ or ‘backward’ and effectively the car will turn. The car design is entirely up to you and remember it needs to be mobile (it’s a car), you may need batteries. All groups will receive the same starting equipment. The area of all designed laser receivers (photodector, photoresistor, photodiode, etc) will be limited to less than ½in x ½in. The final demo for this project will include a small obstacle course and a race for those groups that selected this project.

Project 4 Digital Potentiometer/Amplifier/DAC This project is for the design of a digital potentiometer/Amplifier/DAC integrated circuit.

The design should be in a 0.5u CMOS process and should include layout and post-layout

simulation results.

This multi-purpose digitally controlled analog building block structure can serve as a digital potentiometer, an inverting or noninverting amplifier, or as a DAC depending upon the

state control inputs. A method of designing the operational amplifier will be provided to you by your TA. Assume VDD=2.5V and VSS=-2.5V. The state control signals AO and A1 will identify one of four states of operation of this device. The operation control signals CO, C1, C2 and C3 are used to control the characteristics of the device in each of the four states.

When AO and A1 are high, the circuit is to perform independently as a digital potentiometer and an operational amplifier. The digital potentiometer should have 16 taps, each with a nominal impedance of 5K. When A0 is high and A1 is low, the circuit is to perform as a 4-bit DAC where the op amp is connected in a unity gain configuration to a tap on the potentiometer and the DAC output is determined by the control settings on the potentiometer. The DAC input, often termed “VREF” should be connected to one end of the resistor string and the other end should be grounded. When A0 is low and A1 is high, the circuit is to perform as a programmable inverting finite gain amplifier. One end of the resistor string should go to the op amp output, the “wiper” to the “-“ input and the other end of the resistor string to the input. Finally, when A0 is low and A1 is low, the circuit is to perform as a programmable noninverting finite gain amplifier.

The digital potentiometer is similar in principle to the Maxim DS 1666 but with a reduced number of taps, with parallel rather than serial control of the tap position, and with a linear taper rather than an audio taper.

Project 5 Transceiver Block This project is for the design of a transceiver integrated circuit. The design should be in a

0.5u CMOS process and include layout and post-layout simulation results.

Serial channels are widely used for communicating between computers that may be a few

feet apart of on the other side of the world. Invariably the data that is to be transmitted is parallel

data so a parallel to serial conversion is needed to get the data ready for transmission and a serial

to parallel conversion is needed to convert the data from serial data to parallel data at the

receiver. Invariably the data is transmitted from a synchronous system on transitions of a clock

and invariably the data at the received is synchronized relative to a clock at the receiver.

Unfortunately the two clock frequencies may not be exactly the same and unfortunately it is

generally considered impractical to transmit the clock signal to the output so the clock must be

recovered from the serial data stream itself. This is often done with a phase-locked loop (PLL)

at the receiver which contains an internal voltage controlled oscillator (VCO) that must be

“locked” to the input data sequence. The “recovered” clock is simply the output of the VCO in

the PLL. The PLL must obtain regular measurements of the phase difference between the VCO

output and the data input to maintain lock. It is common in many applications to have periods of

time where no data is available and during these intervals, long strings long serial strings of 0’s

or 1’s must be transmitted. Unfortunately, it is difficult (actually impossible) for the PLL to

maintain lock in the absence of transitions on the incoming data stream. To circumvent this

problem, the parallel data is often coded prior to serial transmission to guarantee that there will

be ample transitions in the transmitted data to recover the clock. Of course, the received data

must be decoded at the output to recover the intended data sequence. 8B: 10B and 4B:5B coders

are often used for this purpose. In an nB: (n+1)B coder, an n-bit word is converter to an n+1 bit

word with a fixed mapping that will guarantee that the maximum number of consecutive 0’s and

1’s in the transmitted data stream is small (like 3 or 4) irrespective of the nature of the input data.

In many communication channels, data itself is arranged in packets in which a fixed

number of bytes are put together sequentially to form a packet. A header is generally placed at

the front of each packet. This header serves two purposes. One is to give information about

where the packet is to go or where it comes from. The second is to allow for synchronization of

the packet so that the bytes within the packet can be appropriately framed.

The design of transceivers which perform these functions is widely undertaken in

industry but it is beyond the scope of this course. This project will focus on a part of a

transceiver block associated with the encoder and decoder. The PLL that is usually used for

clock and data recovery is not a part of this project. Details follow.

a) Devise a 4B-5B coding scheme that will guarantee at most 3 consecutive 0’s or 1’s for

any input data sequence.

b) Design a circuit that will take an 8-bit wide parallel data sequence at 10K bytes/sec and

serialize it using the 4B-5B coding scheme you devised in part a). You may assume that a

10KHz clock is present that is synchronous with the input data.

c) Design a receiver that will take the serial data string, decode it, and recreate an 8-bit wide

data sequence at the output.

d) Design a “comma detect” circuit that will allow for proper framing of the received data.

The “comma” should be a 10-bit code that cannot represent any data sequence. The “comma”

would be inserted in place of a byte in the transmitted data stream for synchronization and the

receiver should frame the received data relative to the detected “comma” whenever a comma is

detected. After the “comma” is detected, the received should be in synch with the input data

sequence.

Project 6 Laser Reaction Game Design a laser, build, and demonstrate a laser beam reaction game to see how fast players can react

to a sequence of visual cues. In this project, you will create a rectangular 3 x 3 grid of Lamp:photo

detector pairs spaced on a wall at a distance of 24 inches from each other. The middle detector

pair will have a second lamp of a different color. The player will stand or sit at a distance of 8 feet

or more from the wall. A laser pointer will be used to play the game. Whenever game is complete

or whenever it is time to start a new game, the middle lamp that is a different color will be lit. The

player will start the game by shining the laser at any of the 9 photo detectors. A random sequence

of lamps will then be lit and the reaction time to “shoot” the light sensor adjacent to the lamp that

is lit will be measured. After the target is hit, the lamp will go off. This will be repeated 8 times.

After the 8th lamp goes off, the game is over and the total reaction time is to be displayed on a 7

segment display in seconds. Once the reaction time is displayed, the game should be restarted. The

reaction time of the previous player should remain on the display until the following player

completes playing the game. If the components you need are not available in the electronics parts

shop, you will need to order the early enough to complete the design.

Project 7 Residential Artistic Light Controller

This project is for the design of a light controller. The design should be in a 0.5u CMOS

process and include layout and post-layout simulation results. The circuit should operate with a dc supply voltage of VDD=5V.

The controller is to control 10 lights that operate off of 110 VAC. The lights are to be

uniformly spaced around a circular drive. Each light is to be controlled by a separate Triac.

Assume the gate of the Triac is to always be triggered in Quadrant 2. You must specify a

specific commercially available Triac for use with this controller.

There are to be four modes of operation described as follows

Mode 1 All lights are OFF

Mode 2 All lights are ON

Mode 3 Exactly two consecutive lights are on and these two “ON” lights will rotate

clockwise around the circle once every 10 sec

Mode 4 Exactly four consecutive lights are on and these four lights will rotate

counterclockwise around the circle once every 10 sec.

Mode 5 The even and odd lights will alternately blink every 3 seconds at maximum

brightness and an alarm will sound.

A five-position rotary switch will be used to select the mode of operation. For Modes 2,

3, and 4, the intensity can be adjusted to one of 10 levels. An up-intensity switch and a down-

intensity switch will increase or decrease the intensity. Each successive switch position should

change the power dissipation in the lamps by approximately 10%. Some indicator should be

provided that will tell the user the intensity level that has been selected. The buzzer that sounds

in Mode 5 should be designed to provide 50mA of current with a nominal voltage of VDD across

it. The voltage drop across the switch that controls the buzzer should be at most 10% of VDD

when it is ON. The clock signal needed for timing can either be generated on-chip or brought in through an input pin as a square wave of a single frequency but if you bring it in from off chip you must specify the frequency and amplitude. If generated on-chip, the time-base accuracy need only be +/- 30%.

Include a debouncing circuit on any critical inputs. Anytime a switch is opened or closed, there is some chance that multiple openings and closings will be counted. A debouncing circuit eliminates the interpretation of multiple closings. If LEDs are used, the current ratings should be specified and the driver circuit should provide the correct drive capability for the LEDs.

Testing and operation of the integrated circuit should require only VDD, the rotary switch, up to 4 SPST push button switches, up to 4 LEDs, 10 output pins for driving the Triacs, and a square-wave input pin if needed.

Project 8 Silicon-Based Temperature Sensor Temperature sensors have a wide range of applications. This project will focus on the

design of an on-chip temperature sensor that provides an analog output that is proportional to

absolute temperature (PTAT). A pair of diodes will be used as the temperature sensor. The

project will also require the use of an operational amplifier. A method will be provided for

designing an externally compensated operational amplifier for this project. Though we have

not discussed temperature sensors in class, a 1-hour discussion with the course instructor

should be sufficient to obtain the understanding needed to build this temperature sensor.

Project 9 Analog Hardware Trojan Most of the work on security focuses on software security and the detection and

elimination of software Trojans. However, the semiconductor industry realizes that system

security can also be compromised by the malicious insertion of hardware Trojans. In the

hardware security area, most emphasis is on the concerns about possible Trojans in the digital

hardware. But there is also a vulnerability for the presence of Trojans in the analog hardware.

This project will focus on the design of a circuit that harbors an analog hardware Trojan.

Specifically, it will focus on the design of an injection-locked ring oscillator that carries the

Trojan in a secondary mode of operation that is difficult to detect. Specifically, the circuit will

be designed to operate at one frequency but will sustain oscillation at a different frequency if

appropriately triggered. Those that choose to work on this project will be paired with one of

the graduate students working on analog hardware Trojans in our department. A 1-hour

discussion with the instructor of the course should be adequate to gain a sufficient

understanding of this project not only be able to work with the injection-locked ring oscillator

but also to appreciate the vulnerability that exists to these Trojans. Through the description

here is limited, it is anticipate that the time and complexity of this project should be about

average or below average compared to the other projects listed.

Project 10 Water Fountain Controller This project is for the design of a high capacity water fountain controller. The design

should be in a 0.5u CMOS process and include layout and post-layout simulation results. The circuit should operate with a dc supply voltage of VDD=5V.

In a high-traffic area there is a water fountain that is able to provide both hot water and

cold water. The water fountain has two tanks, one for hot water and the other for cold water.

The water fountain has a mechanism to heat up or cool down the water. The temperature of

the hot water is ideally 160F and the temperature of the cold water is ideally 40F. However,

during periods of high use, water entering the tanks will change the temperature of the water.

During normal operation under low-use conditions the standard heater for the hot

water tank will turn on any time the temperature of the water near the outlet drops to 155F

and then turn off when the temperature reaches 160F. Correspondingly, any time the

temperature of the water near the outlet of the cold water tank rises above 45F the standard

cooler will turn on and it will turn off when the temperature is reduced to 40F. During high use

periods, high capacity coolers and heaters will be use. Any time the hot water temperature

drops below 155F the high capacity heater will come on and will turn off when the temperature

reaches 160F. Correspondingly any time the cold water temperature exceeds 45 degrees, the

high capacity cooler will come on and will turn off when the temperature drops to 40F.

Assume the tanks have circulating pumps to keep the temperature in the tanks reasonably

uniform.

Each tank has four water level sensors that indicate when the water level is above 95%,

above 80% , below 30% or below 20%. Whenever the water level drops below 80% a signal is

sent to a valve that turns on the water supply to the tank. Any time the water level reaches

95%, the water entry valve is turned off. The 20% water level sensor is used for safety control.

Any time the water level drops below 20% in the hot water tank, all heaters will be turned off

and any time the water level drops below 20% in the cold water tank all coolers will be turned

off. When below 20% the water output valves will be turned off as well. The heaters or coolers

will come on again only after the water level gets up to 30%.

During high use, replacement water entering either tank may be coming in so fast that

the hot water temperature or the cold water temperature can not be maintained at the target

levels. As long as the temperature in the hot water tank is above 150F, hot water will be

available to the consumer an any time the temperature in the cold water tank is below 50F,

cold water will be available to the consumer. But if the hot water temperature drops below

150F a red indicator light will come on and the hot water output valve will be disabled an any

time the cold water temperature raises above 50F a second red indicator light will come on and

the cold water output valve will be disabled. When the water fountain is operating normally, a

green light by the hot water outlet valve will be on indicating the hot water is available and the

hot water outlet valve will be active. Likewise a green light by the cold water outlet valve will

be on indicating the cold water is available and the cold water outlet valve will be active.

This project involves the design of a controller for this water fountain. Assume the

water level sensors have a standard Boolean output that changes states when the set water

level is reached. Assume the temperature sensors have an analog output with the high

temperature sensor having an output

5 165

140140 165

5

0 140

HIGH

T

TV T T

T

and the low temperature sensor having an output

5 55

3030 55

5

0 30

LOW

T

TV T T

T

where T is in degrees F.

Thus each tank has 8 boolean outputs summarized as

For hot water tank:

B0: Level above 95%

B1: Level above 80%

B2: Level above 30%

B3: Level above 20%

For cold water tank:

B4: Level above 95%

B5: Level above 80%

B6: Level above 30%

B7: Level above 20%

The controller is to have 12 Boolean outputs. Each should provide 0V and 5V as standard high

and low logic levels and should be able to sink or source a load current of at least 25 mA with a

change in the high or low logic level of at most 1V.

B9: Turn on water to hot water tank

B10: Turn on water to cold water tank

B11: Disable outlet valve on hot water tank

B12: Disable outlet valve on cold water tank

B13: Turn on green LED for water ready in hot water tank

B14: Turn on red LED for water not available in hot water tank

B15: Turn on green LED for water ready in cold water tank

B16: Turn on red LED for water not available in cold water tank

B17: Turn on standard heater in hot water tank

B18: Turn on high capacity heater in hot water tank

B19: Turn on standard cooler in cold water tank

B20: Turn on high capacity cooler in cold water tank

Project 11 Nonsynchronous Traffic Intersection Controller This project is for the design of a 4-way traffic intersection controller. The design

should be in a 0.5u CMOS process and include layout and post-layout simulation results. The circuit should operate with a dc supply voltage of VDD=5V.

The controller will have 8 inputs and 20 outputs for traffic lights and 16 outputs for pedestrian crossing light and 16 outputs for each pedestrian crossing request acknowledgemet. The inputs are push-button inputs with two buttons located at each corner of the intersection for the purpose of pedestrian interrupts that allow the pedestrian to request a green pedestrian crosswalk light for crossing the intersection in either direction. The outputs should all be a port that can drive a 5V, 1mA incandescent lamp (by sinking current) when “ON” The voltage drop across the port should be at most 500mV when carrying a current of up to 1mA. The 1mA lights are meant to model the traffic lights and the crosswalk lights.

There will be four clusters of 5 traffic lights facing each direction. The lights in each cluster, as depicted below, will be designated as Red (R), Green (R), Yellow (Y), Left Turn (LT), and No Right Turn (NRT). There will be 8 clusters of 2 pedestrian crosswalk lights. The lights in each crosswalk cluster, as depicted below, will be designated as Walk (W) and don’t walk (DW). Red and Green will be used for W and DW respectively. There will be an indicator light by each pedestrian request light button.

The vehicular traffic flow can be classified into four phases as described by the traffic intersection depicted in the following figure. In the intersection vehicles are allowed to make a right turn on Red or Green provided they do not cross an active pedestrian crosswalk. A

NO

Traffic

Pedestrian

description of the system based upon a 4-phase model follows.

PHASE I-East/West

Green signal in A and E permits vehicles to pass through while red will appear for east and west roads

to stop east/west travel

PHASE II-North/South

Green signal in C and G permits vehicles to pass through while red will appear for north and south

roads to stop north/south travel

PHASE III-East/West Left Turn

Green signal in LT permits vehicles to make left turns from A to D and from E to H. Other traffic flow is

stopped.

PHASE IV-North/South Left Turn

Green signal in LT permits vehicles to make left turns from G to B and from C to F. Other traffic flow is

is stopped.

The cycle repeats itself continuously jumping to Phase I every time Phase IV is completed.

Timing of the signals:

Programming should be done such that in every phase the red signal will be on for 60 sec yellow will be on for 15 seconds and green will be on for 45 seconds before switching the flow to the next phase except when a pedestrian interrupt occurs. During normal operation during Phase 1 and Phase 2, pedestrians moving in East and West directions will have a green light when the East and West traffic flow light is green and pedestrians moving in the North and South directions will have a green light when the North and South Traffic lights are green irrespective of whether a valid pedestrian interrupt occurs. Correspondingly, during normal

operation, during Phase 3 and Phase 4 pedestrians that will not cross an active left-turn path will have a green light irrespective of whether a valid pedestrian interrupt occurs. Any time a pedestrian interrupt occurs, the NRT light will prevent a right hand turn for the requested pedestrian path crossing for the immediately following phase that would have a right turn cross a requested pedestrian path. (If the request for a pedestrian crossing occurs during the time which a pedestrian crossing will conflict with an active right turn traffic path, the request will be treated as if it occurred just after the corresponding phase is completed). All pedestrian path crossings will be of duration 30 sec. and will be coincident with the first 30 seconds of the corresponding 45 second green traffic path lights. The pedestrian crossing lights will always be red for the last 15 seconds of a green traffic path light.

An interrupt requires that a request button be pressed for a minimum of 5 seconds and the interrupt becomes valid only after the 5 seconds elapses. If the duration of the request is less than 5 seconds, it is ignored. The request acknowledgement light should turn on as soon as a valid request has been detected and remain on until the resultant crossing path has been made available to the pedestrian and turn off only after the corresponding pedestrian path light turns red. Multiple pressings of the pedestrian request button should be ignored if the acknowledgement light is still on.

The clock signal should be generated internally. Each phase is designated to last for 60 seconds but process variations will make it difficult to generate a clock that has an absolute accuracy of 60 sec. The circuit should be designed so that the nominal phase period is 60 seconds. Since the clock period can vary somewhat, this is a nonsynchronous traffic controller and would be most suitable for use where traffic lights are isolate and not coordinated with other traffic lights in the immediate vicinity.

Project 12 Self-Defined

This project will be personalized to the individual interests of the student. All proposals for the self-defined projects should be approved by the course instructor. Self-defined projects can be either for an integrated circuit design or for a hardware implementation.